Mercurial > audlegacy-plugins
annotate src/sexypsf/PsxBios.c @ 2507:251336bee085
Cosmetic cleanups, synchronized from XMMS-SID.
author | Matti Hamalainen <ccr@tnsp.org> |
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date | Wed, 02 Apr 2008 19:53:39 +0300 |
parents | 9d2d7061caed |
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1 /* Pcsx - Pc Psx Emulator |
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2 * Copyright (C) 1999-2002 Pcsx Team |
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3 * |
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4 * This program is free software; you can redistribute it and/or modify |
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5 * it under the terms of the GNU General Public License as published by |
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6 * the Free Software Foundation; either version 2 of the License, or |
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7 * (at your option) any later version. |
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8 * |
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9 * This program is distributed in the hope that it will be useful, |
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10 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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12 * GNU General Public License for more details. |
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13 * |
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14 * You should have received a copy of the GNU General Public License |
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15 * along with this program; if not, write to the Free Software |
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16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
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17 */ |
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18 |
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19 #include <stdlib.h> |
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20 #include <stdio.h> |
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21 #include <string.h> |
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22 #include <stdarg.h> |
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23 #include <ctype.h> |
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24 |
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25 #include "PsxCommon.h" |
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26 //We try to emulate bios :) HELP US :P |
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27 |
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28 #ifdef NONONO |
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29 char *biosA0n[256] = { |
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30 // 0x00 |
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31 "open", "lseek", "read", "write", |
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32 "close", "ioctl", "exit", "sys_a0_07", |
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33 "getc", "putc", "todigit", "atof", |
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34 "strtoul", "strtol", "abs", "labs", |
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35 // 0x10 |
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36 "atoi", "atol", "atob", "setjmp", |
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37 "longjmp", "strcat", "strncat", "strcmp", |
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38 "strncmp", "strcpy", "strncpy", "strlen", |
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39 "index", "rindex", "strchr", "strrchr", |
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40 // 0x20 |
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41 "strpbrk", "strspn", "strcspn", "strtok", |
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42 "strstr", "toupper", "tolower", "bcopy", |
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43 "bzero", "bcmp", "memcpy", "memset", |
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44 "memmove", "memcmp", "memchr", "rand", |
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45 // 0x30 |
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46 "srand", "qsort", "strtod", "malloc", |
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47 "free", "lsearch", "bsearch", "calloc", |
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48 "realloc", "InitHeap", "_exit", "getchar", |
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49 "putchar", "gets", "puts", "printf", |
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50 // 0x40 |
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51 "sys_a0_40", "LoadTest", "Load", "Exec", |
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52 "FlushCache", "InstallInterruptHandler", "GPU_dw", "mem2vram", |
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53 "SendGPUStatus", "GPU_cw", "GPU_cwb", "SendPackets", |
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54 "sys_a0_4c", "GetGPUStatus", "GPU_sync", "sys_a0_4f", |
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55 // 0x50 |
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56 "sys_a0_50", "LoadExec", "GetSysSp", "sys_a0_53", |
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57 "_96_init()", "_bu_init()", "_96_remove()", "sys_a0_57", |
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58 "sys_a0_58", "sys_a0_59", "sys_a0_5a", "dev_tty_init", |
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59 "dev_tty_open", "sys_a0_5d", "dev_tty_ioctl","dev_cd_open", |
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60 // 0x60 |
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61 "dev_cd_read", "dev_cd_close", "dev_cd_firstfile", "dev_cd_nextfile", |
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62 "dev_cd_chdir", "dev_card_open", "dev_card_read", "dev_card_write", |
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63 "dev_card_close", "dev_card_firstfile", "dev_card_nextfile","dev_card_erase", |
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64 "dev_card_undelete","dev_card_format", "dev_card_rename", "dev_card_6f", |
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65 // 0x70 |
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66 "_bu_init", "_96_init", "_96_remove", "sys_a0_73", |
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67 "sys_a0_74", "sys_a0_75", "sys_a0_76", "sys_a0_77", |
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68 "_96_CdSeekL", "sys_a0_79", "sys_a0_7a", "sys_a0_7b", |
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69 "_96_CdGetStatus", "sys_a0_7d", "_96_CdRead", "sys_a0_7f", |
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70 // 0x80 |
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71 "sys_a0_80", "sys_a0_81", "sys_a0_82", "sys_a0_83", |
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72 "sys_a0_84", "_96_CdStop", "sys_a0_86", "sys_a0_87", |
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73 "sys_a0_88", "sys_a0_89", "sys_a0_8a", "sys_a0_8b", |
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74 "sys_a0_8c", "sys_a0_8d", "sys_a0_8e", "sys_a0_8f", |
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75 // 0x90 |
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76 "sys_a0_90", "sys_a0_91", "sys_a0_92", "sys_a0_93", |
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77 "sys_a0_94", "sys_a0_95", "AddCDROMDevice", "AddMemCardDevide", |
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78 "DisableKernelIORedirection", "EnableKernelIORedirection", "sys_a0_9a", "sys_a0_9b", |
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79 "SetConf", "GetConf", "sys_a0_9e", "SetMem", |
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80 // 0xa0 |
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81 "_boot", "SystemError", "EnqueueCdIntr", "DequeueCdIntr", |
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82 "sys_a0_a4", "ReadSector", "get_cd_status", "bufs_cb_0", |
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83 "bufs_cb_1", "bufs_cb_2", "bufs_cb_3", "_card_info", |
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84 "_card_load", "_card_auto", "bufs_cd_4", "sys_a0_af", |
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85 // 0xb0 |
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86 "sys_a0_b0", "sys_a0_b1", "do_a_long_jmp", "sys_a0_b3", |
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87 "?? sub_function", |
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88 }; |
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89 |
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90 char *biosB0n[256] = { |
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91 // 0x00 |
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92 "SysMalloc", "sys_b0_01", "sys_b0_02", "sys_b0_03", |
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93 "sys_b0_04", "sys_b0_05", "sys_b0_06", "DeliverEvent", |
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94 "OpenEvent", "CloseEvent", "WaitEvent", "TestEvent", |
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95 "EnableEvent", "DisableEvent", "OpenTh", "CloseTh", |
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96 // 0x10 |
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97 "ChangeTh", "sys_b0_11", "InitPAD", "StartPAD", |
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98 "StopPAD", "PAD_init", "PAD_dr", "ReturnFromExecption", |
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99 "ResetEntryInt", "HookEntryInt", "sys_b0_1a", "sys_b0_1b", |
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100 "sys_b0_1c", "sys_b0_1d", "sys_b0_1e", "sys_b0_1f", |
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101 // 0x20 |
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102 "UnDeliverEvent", "sys_b0_21", "sys_b0_22", "sys_b0_23", |
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103 "sys_b0_24", "sys_b0_25", "sys_b0_26", "sys_b0_27", |
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104 "sys_b0_28", "sys_b0_29", "sys_b0_2a", "sys_b0_2b", |
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105 "sys_b0_2c", "sys_b0_2d", "sys_b0_2e", "sys_b0_2f", |
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106 // 0x30 |
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107 "sys_b0_30", "sys_b0_31", "open", "lseek", |
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108 "read", "write", "close", "ioctl", |
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109 "exit", "sys_b0_39", "getc", "putc", |
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110 "getchar", "putchar", "gets", "puts", |
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111 // 0x40 |
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112 "cd", "format", "firstfile", "nextfile", |
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113 "rename", "delete", "undelete", "AddDevice", |
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114 "RemoteDevice", "PrintInstalledDevices", "InitCARD", "StartCARD", |
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115 "StopCARD", "sys_b0_4d", "_card_write", "_card_read", |
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116 // 0x50 |
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117 "_new_card", "Krom2RawAdd", "sys_b0_52", "sys_b0_53", |
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118 "_get_errno", "_get_error", "GetC0Table", "GetB0Table", |
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119 "_card_chan", "sys_b0_59", "sys_b0_5a", "ChangeClearPAD", |
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120 "_card_status", "_card_wait", |
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121 }; |
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122 |
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123 char *biosC0n[256] = { |
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124 // 0x00 |
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125 "InitRCnt", "InitException", "SysEnqIntRP", "SysDeqIntRP", |
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126 "get_free_EvCB_slot", "get_free_TCB_slot", "ExceptionHandler", "InstallExeptionHandler", |
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127 "SysInitMemory", "SysInitKMem", "ChangeClearRCnt", "SystemError", |
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128 "InitDefInt", "sys_c0_0d", "sys_c0_0e", "sys_c0_0f", |
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129 // 0x10 |
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130 "sys_c0_10", "sys_c0_11", "InstallDevices", "FlushStfInOutPut", |
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131 "sys_c0_14", "_cdevinput", "_cdevscan", "_circgetc", |
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132 "_circputc", "ioabort", "sys_c0_1a", "KernelRedirect", |
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133 "PatchAOTable", |
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134 }; |
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135 #endif |
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136 |
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137 //#define r0 (psxRegs.GPR.n.r0) |
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138 #define at (psxRegs.GPR.n.at) |
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139 #define v0 (psxRegs.GPR.n.v0) |
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140 #define v1 (psxRegs.GPR.n.v1) |
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141 #define a0 (psxRegs.GPR.n.a0) |
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142 #define a1 (psxRegs.GPR.n.a1) |
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143 #define a2 (psxRegs.GPR.n.a2) |
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144 #define a3 (psxRegs.GPR.n.a3) |
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145 #define t0 (psxRegs.GPR.n.t0) |
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146 #define t1 (psxRegs.GPR.n.t1) |
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147 #define t2 (psxRegs.GPR.n.t2) |
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148 #define t3 (psxRegs.GPR.n.t3) |
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149 #define t4 (psxRegs.GPR.n.t4) |
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150 #define t5 (psxRegs.GPR.n.t5) |
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151 #define t6 (psxRegs.GPR.n.t6) |
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152 #define t7 (psxRegs.GPR.n.t7) |
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153 #define s0 (psxRegs.GPR.n.s0) |
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154 #define s1 (psxRegs.GPR.n.s1) |
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155 #define s2 (psxRegs.GPR.n.s2) |
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156 #define s3 (psxRegs.GPR.n.s3) |
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157 #define s4 (psxRegs.GPR.n.s4) |
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158 #define s5 (psxRegs.GPR.n.s5) |
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159 #define s6 (psxRegs.GPR.n.s6) |
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160 #define s7 (psxRegs.GPR.n.s7) |
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161 #define t8 (psxRegs.GPR.n.t6) |
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162 #define t9 (psxRegs.GPR.n.t7) |
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163 #define k0 (psxRegs.GPR.n.k0) |
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164 #define k1 (psxRegs.GPR.n.k1) |
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165 #define gp (psxRegs.GPR.n.gp) |
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166 #define sp (psxRegs.GPR.n.sp) |
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167 #define fp (psxRegs.GPR.n.s8) |
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168 #define ra (psxRegs.GPR.n.ra) |
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169 #define pc0 (psxRegs.pc) |
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170 |
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171 #define Ra0 ((char*)PSXM(a0)) |
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172 #define Ra1 ((char*)PSXM(a1)) |
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173 #define Ra2 ((char*)PSXM(a2)) |
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174 #define Ra3 ((char*)PSXM(a3)) |
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175 #define Rv0 ((char*)PSXM(v0)) |
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176 #define Rsp ((char*)PSXM(sp)) |
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177 |
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178 |
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179 typedef struct _malloc_chunk { |
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180 u32 stat; |
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181 u32 size; |
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182 u32 fd; |
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183 u32 bk; |
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184 } PACKSTRUCT malloc_chunk; |
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185 |
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186 #define INUSE 0x1 |
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187 |
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188 typedef struct { |
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189 u32 desc; |
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190 s32 status; |
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191 s32 mode; |
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192 u32 fhandler; |
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193 } PACKSTRUCT EvCB[32]; |
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194 |
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195 #define EvStUNUSED 0x0000 |
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196 #define EvStWAIT 0x1000 |
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197 #define EvStACTIVE 0x2000 |
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198 #define EvStALREADY 0x4000 |
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199 |
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200 #define EvMdINTR 0x1000 |
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201 #define EvMdNOINTR 0x2000 |
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202 |
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203 typedef struct { |
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204 s32 status; |
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205 s32 mode; |
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206 u32 reg[32]; |
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207 u32 func; |
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208 } PACKSTRUCT TCB; |
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209 |
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210 static u32 *jmp_int; |
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211 |
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212 static u32 regs[35]; |
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213 static EvCB *Event; |
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214 |
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215 //static EvCB *HwEV; // 0xf0 |
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216 //static EvCB *EvEV; // 0xf1 |
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217 static EvCB *RcEV; // 0xf2 |
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218 //static EvCB *UeEV; // 0xf3 |
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219 //static EvCB *SwEV; // 0xf4 |
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220 //static EvCB *ThEV; // 0xff |
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221 |
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222 static u32 heap_addr; |
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223 static u32 SysIntRP[8]; |
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224 static TCB Thread[8]; |
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225 static int CurThread; |
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226 |
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227 static INLINE void softCall(u32 pc) { |
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228 pc0 = pc; |
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229 ra = 0x80001000; |
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230 while (pc0 != 0x80001000) psxCpu->ExecuteBlock(); |
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231 } |
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232 |
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233 static INLINE void softCall2(u32 pc) { |
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234 u32 sra = ra; |
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235 pc0 = pc; |
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236 ra = 0x80001000; |
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237 while (pc0 != 0x80001000) psxCpu->ExecuteBlock(); |
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238 ra = sra; |
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239 } |
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240 |
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241 static INLINE void DeliverEvent(u32 ev, u32 spec) { |
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242 if (Event[ev][spec].status != BFLIP32S(EvStACTIVE)) return; |
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243 |
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244 // Event[ev][spec].status = BFLIP32S(EvStALREADY); |
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245 if (Event[ev][spec].mode == BFLIP32S(EvMdINTR)) { |
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246 softCall2(BFLIP32S(Event[ev][spec].fhandler)); |
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247 } else Event[ev][spec].status = BFLIP32S(EvStALREADY); |
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248 } |
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249 |
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250 /* * |
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251 // * |
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252 // * |
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253 // System calls A0 */ |
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254 |
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255 /* Abs and labs do the same thing? */ |
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256 |
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257 static void bios_abs() { // 0x0e |
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258 if((s32)a0 < 0) v0=0-(s32)a0; |
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259 else v0=a0; |
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260 //v0 = abs(a0); |
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261 pc0 = ra; |
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262 } |
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263 |
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264 static void bios_labs() { // 0x0f |
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265 if((s32)a0 < 0) v0=0-(s32)a0; |
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266 else v0=a0; |
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267 //v0 = labs(a0); |
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268 pc0 = ra; |
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269 } |
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270 |
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271 static void bios_atoi() { // 0x10 |
2232 | 272 char *p0 = Ra0; |
273 v0 = atoi(p0); | |
0
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274 pc0 = ra; |
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275 } |
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276 |
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277 static void bios_atol() { // 0x11 |
2232 | 278 char *p0 = Ra0; |
279 v0 = atoi(p0); | |
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280 pc0 = ra; |
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281 } |
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282 |
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283 static void bios_setjmp() { // 13 |
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284 u32 *jmp_buf= (u32*)Ra0; |
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285 int i; |
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286 |
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287 jmp_buf[0] = BFLIP32(ra); |
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288 jmp_buf[1] = BFLIP32(sp); |
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289 jmp_buf[2] = BFLIP32(fp); |
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290 for (i=0; i<8; i++) // s0-s7 |
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291 jmp_buf[3+i] = BFLIP32(psxRegs.GPR.r[16+i]); |
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292 jmp_buf[11] = BFLIP32(gp); |
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293 |
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294 v0 = 0; pc0 = ra; |
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295 } |
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296 |
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297 static void bios_longjmp() { //14 |
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298 u32 *jmp_buf= (u32*)Ra0; |
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299 int i; |
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300 |
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301 ra = BFLIP32(jmp_buf[0]); /* ra */ |
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302 sp = BFLIP32(jmp_buf[1]); /* sp */ |
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303 fp = BFLIP32(jmp_buf[2]); /* fp */ |
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304 for (i=0; i<8; i++) // s0-s7 |
2231 | 305 psxRegs.GPR.r[16+i] = BFLIP32(jmp_buf[3+i]); |
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306 gp = BFLIP32(jmp_buf[11]); /* gp */ |
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307 |
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308 v0 = a1; pc0 = ra; |
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309 } |
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310 |
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311 static void bios_strcat() { // 0x15 |
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312 u32 dest,src; |
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313 |
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314 dest=a0; |
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315 src=a1; |
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316 |
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317 while(PSXMu8(dest) != 0) dest++; /* Move to end of first string. */ |
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318 while(PSXMu8(src) != 0) |
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319 { |
2231 | 320 if(PSXM(dest) && PSXM(src)) |
321 PSXMu8(dest)=PSXMu8(src); | |
322 src++; | |
323 dest++; | |
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324 } |
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325 PSXMu8(dest) = 0; /* Append null character. */ |
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326 //strcat(Ra0, Ra1); |
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327 |
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328 v0 = a0; |
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329 pc0 = ra; |
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330 } |
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331 |
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332 /*0x16*/ |
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333 static void bios_strncat() |
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334 { |
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335 u32 dest,src,count; |
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336 |
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337 dest=a0; |
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338 src=a1; |
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339 count=a2; |
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340 |
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341 while(PSXMu8(dest) != 0) dest++; /* Move to end of first string. */ |
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342 while(PSXMu8(src) != 0 && count) |
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343 { |
2231 | 344 if(PSXM(dest) && PSXM(src)) |
345 PSXMu8(dest)=PSXMu8(src); | |
346 src++; | |
347 dest++; | |
348 count--; | |
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349 } |
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350 PSXMu8(dest) = 0; /* Append null character. */ |
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351 |
2231 | 352 //strncat(Ra0, Ra1, a2); |
353 v0 = a0; | |
354 pc0 = ra; | |
0
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355 } |
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356 |
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357 static void bios_strcmp() { // 0x17 |
2232 | 358 char *p0 = Ra0, *p1 = Ra1; |
359 v0 = strcmp(p0, p1); | |
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360 pc0 = ra; |
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361 } |
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362 |
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363 static void bios_strncmp() { // 0x18 |
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364 u32 max=a2; |
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365 u32 string1=a0; |
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366 u32 string2=a1; |
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367 s8 tmpv=0; |
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368 |
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369 while(max>0) |
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370 { |
2231 | 371 u8 tmp1=PSXMuR8(string1); |
372 u8 tmp2=PSXMuR8(string2); | |
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373 |
2231 | 374 if(!tmp1 || !tmp2) break; |
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375 |
2231 | 376 tmpv=tmp1-tmp2; |
377 if(tmpv) break; | |
378 if(!tmp1 || !tmp2) break; | |
379 if(!PSXM(string1) || !PSXM(string2)) break; | |
380 max--; | |
381 string1++; | |
382 string2++; | |
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383 } |
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384 if(tmpv>0) v0=1; |
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385 else if(tmpv<0) v0=-1; |
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386 else v0=0; |
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387 //printf("%s:%s, %d, %d\n",Ra0,Ra1,a2,v0); |
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388 //v0 = strncmp(Ra0, Ra1, a2); |
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389 pc0 = ra; |
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390 } |
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391 |
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392 /*0x19*/ |
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393 static void bios_strcpy() |
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394 { |
2231 | 395 u32 src=a1,dest=a0; |
396 u8 val; | |
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397 |
2231 | 398 do |
399 { | |
400 val=PSXMu8(src); | |
401 PSXMu8(dest)=val; | |
402 src++; | |
403 dest++; | |
404 } while(val); | |
405 //strcpy(Ra0, Ra1); | |
406 v0 = a0; | |
407 pc0 = ra; | |
0
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408 } |
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409 /*0x1a*/ |
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410 static void bios_strncpy() |
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411 { |
2231 | 412 u32 src=a1,dest=a0,max=a2; |
413 u8 val; | |
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414 |
2231 | 415 do |
416 { | |
417 val=PSXMu8(src); | |
418 PSXMu8(dest)=val; | |
419 src++; | |
420 dest++; | |
421 max--; | |
422 } while(val && max); | |
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423 |
2231 | 424 //strncpy(Ra0, Ra1, a2); |
425 v0 = a0; | |
426 pc0 = ra; | |
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427 } |
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428 |
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429 /*0x1b*/ |
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430 static void bios_strlen() |
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431 { |
2231 | 432 u32 src=a0; |
0
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433 |
2231 | 434 while(PSXMu8(src)) src++; |
0
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435 |
2231 | 436 v0 = src-a0; |
437 pc0 = ra; | |
0
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438 } |
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439 |
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440 static void bios_index() { // 0x1c |
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441 char *pcA0 = (char *)Ra0; |
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442 char *pcRet = strchr(pcA0, a1); |
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443 if(pcRet) |
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444 v0 = a0 + pcRet - pcA0; |
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445 else |
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446 v0 = 0; |
2231 | 447 pc0 = ra; |
0
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448 } |
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449 |
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450 static void bios_rindex() { // 0x1d |
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451 char *pcA0 = (char *)Ra0; |
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452 char *pcRet = strrchr(pcA0, a1); |
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453 if(pcRet) |
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454 v0 = a0 + pcRet - pcA0; |
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455 else |
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456 v0 = 0; |
2231 | 457 pc0 = ra; |
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458 } |
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459 |
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460 static void bios_strchr() { // 0x1e |
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461 char *pcA0 = (char *)Ra0; |
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462 char *pcRet = strchr(pcA0, a1); |
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463 if(pcRet) |
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464 v0 = a0 + pcRet - pcA0; |
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465 else |
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466 v0 = 0; |
2231 | 467 pc0 = ra; |
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468 } |
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469 |
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470 static void bios_strrchr() { // 0x1f |
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471 char *pcA0 = (char *)Ra0; |
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472 char *pcRet = strrchr(pcA0, a1); |
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473 if(pcRet) |
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474 v0 = a0 + pcRet - pcA0; |
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475 else |
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476 v0 = 0; |
2231 | 477 pc0 = ra; |
0
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478 } |
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479 |
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480 static void bios_strpbrk() { // 0x20 |
2232 | 481 char *pcA0 = Ra0, *pcA1 = Ra1; |
482 char *pcRet = strpbrk(pcA0, pcA1); | |
0
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483 if(pcRet) |
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484 v0 = a0 + pcRet - pcA0; |
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485 else |
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486 v0 = 0; |
2231 | 487 pc0 = ra; |
0
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488 } |
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489 |
2232 | 490 static void bios_strspn() { /*21*/ |
491 char *p0 = Ra0, *p1 = Ra1; | |
492 v0 = strspn (p0, p1); | |
493 pc0 = ra; | |
494 } | |
495 static void bios_strcspn() { /*22*/ | |
496 char *p0 = Ra0, *p1 = Ra1; | |
497 v0 = strcspn(p0, p1); | |
498 pc0 = ra; | |
499 } | |
0
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500 |
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501 #ifdef MOO |
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502 static void bios_strtok() { // 0x23 |
2232 | 503 char *pcA0 = Ra0, *pcA1 = Ra1; |
504 char *pcRet = strtok(pcA0, pcA1); | |
0
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505 if(pcRet) |
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506 v0 = a0 + pcRet - pcA0; |
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507 else |
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508 v0 = 0; |
2231 | 509 pc0 = ra; |
0
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510 } |
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511 #endif |
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512 |
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513 static void bios_strstr() { // 0x24 |
2232 | 514 char *pcA0 = Ra0, *pcA1 = Ra1; |
515 char *pcRet = strstr(pcA0, pcA1); | |
0
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516 if(pcRet) |
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517 v0 = a0 + pcRet - pcA0; |
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518 else |
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519 v0 = 0; |
2231 | 520 pc0 = ra; |
0
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521 } |
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522 |
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523 /*0x25*/ |
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524 static void bios_toupper() {v0 = toupper(a0); pc0 = ra;} |
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525 |
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526 /*0x26*/ |
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527 static void bios_tolower() {v0 = tolower(a0); pc0 = ra;} |
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528 |
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529 /*0x27*/ |
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530 static void bios_bcopy() |
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531 { |
2231 | 532 u32 dest=a1, src=a0, len=a2; |
0
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533 |
2231 | 534 while(len--) |
535 { | |
536 PSXMu8(dest)=PSXMu8(src); | |
537 dest++; | |
538 src++; | |
539 } | |
540 //memcpy(Ra1,Ra0,a2); | |
541 pc0=ra; | |
0
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542 } |
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543 |
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544 /*0x28*/ |
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545 static void bios_bzero() |
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546 { |
2231 | 547 u32 dest=a0, len=a1; |
0
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548 |
2231 | 549 while(len--) |
550 { | |
551 PSXMu8(dest)=0; | |
552 dest++; | |
553 } | |
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554 |
2231 | 555 //memset(Ra0,0,a1); |
556 pc0=ra; | |
0
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557 } |
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558 |
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559 /*0x29*/ |
2232 | 560 static void bios_bcmp() { |
561 char *p0 = Ra0, *p1 = Ra1; | |
562 v0 = memcmp(p0, p1, a2); | |
563 pc0=ra; | |
564 } | |
0
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565 |
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566 /*0x2a*/ |
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567 static void bios_memcpy() |
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568 { |
2231 | 569 u32 dest=a0, src=a1, len=a2; |
0
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570 |
2231 | 571 while(len--) |
572 { | |
573 PSXMu8(dest)=PSXMu8(src); | |
574 dest++; | |
575 src++; | |
576 } | |
577 //memcpy(Ra0, Ra1, a2); | |
578 v0 = a0; | |
579 pc0 = ra; | |
0
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580 } |
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581 |
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582 static void bios_memset() /*0x2b*/ |
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583 { |
2231 | 584 u32 len=a2; |
585 u32 dest=a0; | |
0
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586 |
2231 | 587 while(len--) |
588 { | |
589 if(PSXM(dest)) PSXMu8(dest)=a1; | |
590 dest++; | |
591 } | |
592 //memset(Ra0, a1, a2); | |
593 v0 = a0; | |
594 pc0 = ra; | |
0
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595 } |
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596 |
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597 #ifdef MOO |
2232 | 598 /*0x2c*/void bios_memmove() { |
599 char *p0 = Ra0, *p1 = Ra1; | |
600 memmove(p0, p1, a2); | |
601 v0 = a0; | |
602 pc0 = ra; | |
603 } | |
0
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604 #endif |
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605 |
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606 /*0x2d*/ |
2232 | 607 static void bios_memcmp() { |
608 char *p0 = Ra0, *p1 = Ra1; | |
609 v0 = memcmp(p0, p1, a2); | |
2231 | 610 pc0 = ra; |
0
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611 } |
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612 |
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613 static void bios_memchr() { // 2e |
2232 | 614 char *p0 = Ra0; |
615 void *ret = memchr(p0, a1, a2); | |
616 if (ret != NULL) v0 = (u32)((char*)ret - p0) + a0; | |
0
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617 else v0 = 0; |
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618 pc0 = ra; |
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619 } |
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620 |
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621 static void bios_rand() { // 2f |
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622 v0 = 1+(int) (32767.0*rand()/(RAND_MAX+1.0)); |
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623 pc0 = ra; |
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624 } |
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625 |
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626 static void bios_srand() { // 30 |
2232 | 627 srand(a0); |
628 pc0 = ra; | |
0
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629 } |
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630 |
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631 static void bios_malloc() { // 33 |
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632 u32 chunk; |
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633 u32 fd; |
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634 |
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635 /* a0: Number of bytes to allocate. */ |
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636 |
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637 chunk = heap_addr; |
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638 |
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639 /* Search for first chunk that's large enough and not currently |
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640 being used. |
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641 */ |
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642 while( (a0 > BFLIP32(((malloc_chunk*)PSXM(chunk)) ->size)) || |
2231 | 643 (BFLIP32( ((malloc_chunk*)PSXM(chunk))->stat ) == INUSE) |
0
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644 ) |
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645 chunk=((malloc_chunk*)PSXM(chunk)) -> fd; |
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646 //printf("%08x\n",chunk); |
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647 |
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648 /* split free chunk */ |
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649 fd = chunk + sizeof(malloc_chunk) + a0; |
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650 ((malloc_chunk*)PSXM(fd))->stat = ((malloc_chunk*)PSXM(chunk))->stat; |
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651 ((malloc_chunk*)PSXM(fd))->size = BFLIP32(BFLIP32(((malloc_chunk*)PSXM(chunk))->size) - a0); |
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652 ((malloc_chunk*)PSXM(fd))->fd = ((malloc_chunk*)PSXM(chunk))->fd; |
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653 ((malloc_chunk*)PSXM(fd))->bk = chunk; |
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654 |
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655 /* set new chunk */ |
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656 ((malloc_chunk*)PSXM(chunk))->stat = BFLIP32(INUSE); |
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657 ((malloc_chunk*)PSXM(chunk))->size = BFLIP32(a0); |
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658 ((malloc_chunk*)PSXM(chunk))->fd = fd; |
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659 |
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660 v0 = chunk + sizeof(malloc_chunk); |
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661 v0|= 0x80000000; |
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662 // printf ("malloc %lx,%lx\n", v0, a0); |
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663 pc0 = ra; |
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664 } |
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665 |
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666 static void bios_InitHeap() { // 39 |
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667 malloc_chunk *chunk; |
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668 |
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669 heap_addr = a0; // Ra0 |
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670 |
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671 chunk = (malloc_chunk *)PSXM(heap_addr); |
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672 chunk->stat = 0; |
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673 if (((a0 & 0x1fffff) + a1)>= 0x200000) |
2231 | 674 chunk->size = BFLIP32(0x1ffffc - (a0 & 0x1fffff)); |
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675 else chunk->size = BFLIP32(a1); |
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676 chunk->fd = 0; |
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677 chunk->bk = 0; |
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678 |
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679 pc0 = ra; |
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680 } |
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681 |
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682 static void bios_FlushCache() { // 44 |
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683 |
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684 pc0 = ra; |
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685 } |
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686 |
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687 static void bios__bu_init() { // 70 |
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688 |
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689 DeliverEvent(0x11, 0x2); // 0xf0000011, 0x0004 |
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690 DeliverEvent(0x81, 0x2); // 0xf4000001, 0x0004 |
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691 |
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692 pc0 = ra; |
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693 } |
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694 |
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695 static void bios__96_init() { // 71 |
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696 |
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697 pc0 = ra; |
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698 } |
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699 |
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700 static void bios__96_remove() { // 72 |
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701 |
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702 pc0 = ra; |
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703 } |
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704 |
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705 /* System calls B0 */ |
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706 |
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707 static void bios_SetRCnt() { // 02 |
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708 |
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709 a0&= 0x3; |
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710 if (a0 != 3) { |
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711 u32 mode=0; |
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712 |
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713 psxRcntWtarget(a0, a1); |
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714 if (a2&0x1000) mode|= 0x050; // Interrupt Mode |
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715 if (a2&0x0100) mode|= 0x008; // Count to 0xffff |
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716 if (a2&0x0010) mode|= 0x001; // Timer stop mode |
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717 if (a0 == 2) { if (a2&0x0001) mode|= 0x200; } // System Clock mode |
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718 else { if (a2&0x0001) mode|= 0x100; } // System Clock mode |
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719 |
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720 psxRcntWmode(a0, mode); |
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721 } |
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722 pc0 = ra; |
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723 } |
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724 |
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725 static void bios_GetRCnt() { // 03 |
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726 |
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727 a0&= 0x3; |
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728 if (a0 != 3) v0 = psxRcntRcount(a0); |
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729 else v0 = 0; |
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730 pc0 = ra; |
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731 } |
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732 |
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733 static void bios_StartRCnt() { // 04 |
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734 |
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735 a0&= 0x3; |
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736 if (a0 != 3) psxHu32(0x1074)|= BFLIP32(1<<(a0+4)); |
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737 else psxHu32(0x1074)|= BFLIP32(0x1); |
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738 v0 = 1; pc0 = ra; |
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739 } |
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740 |
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741 static void bios_StopRCnt() { // 05 |
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742 |
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743 a0&= 0x3; |
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744 if (a0 != 3) psxHu32(0x1074)&= BFLIP32(~(1<<(a0+4))); |
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745 else psxHu32(0x1074)&= BFLIP32(~0x1); |
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746 pc0 = ra; |
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747 } |
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748 |
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749 static void bios_ResetRCnt() { // 06 |
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750 |
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751 a0&= 0x3; |
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752 if (a0 != 3) { |
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753 psxRcntWmode(a0, 0); |
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754 psxRcntWtarget(a0, 0); |
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755 psxRcntWcount(a0, 0); |
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756 } |
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757 pc0 = ra; |
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758 } |
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759 |
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760 |
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761 /* gets ev for use with Event */ |
2231 | 762 #define GetEv() \ |
763 ev = (a0 >> 24) & 0xf; \ | |
764 if (ev == 0xf) ev = 0x5; \ | |
765 ev*= 32; \ | |
0
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766 ev+= a0&0x1f; |
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767 |
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768 /* gets spec for use with Event */ |
2231 | 769 #define GetSpec() \ |
770 spec = 0; \ | |
771 switch (a1) { \ | |
772 case 0x0301: spec = 16; break; \ | |
773 case 0x0302: spec = 17; break; \ | |
774 default: \ | |
775 for (i=0; i<16; i++) if (a1 & (1 << i)) { spec = i; break; } \ | |
776 break; \ | |
0
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777 } |
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778 |
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779 static void bios_DeliverEvent() { // 07 |
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780 int ev, spec; |
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781 int i; |
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782 |
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783 GetEv(); |
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784 GetSpec(); |
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785 |
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786 DeliverEvent(ev, spec); |
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787 |
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788 pc0 = ra; |
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789 } |
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790 |
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791 static void bios_OpenEvent() { // 08 |
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792 int ev, spec; |
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793 int i; |
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794 |
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795 GetEv(); |
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796 GetSpec(); |
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797 |
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798 Event[ev][spec].status = BFLIP32S(EvStWAIT); |
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799 Event[ev][spec].mode = BFLIP32(a2); |
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800 Event[ev][spec].fhandler = BFLIP32(a3); |
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801 |
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802 v0 = ev | (spec << 8); |
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803 pc0 = ra; |
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804 } |
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805 |
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806 static void bios_CloseEvent() { // 09 |
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807 int ev, spec; |
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808 |
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809 ev = a0 & 0xff; |
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810 spec = (a0 >> 8) & 0xff; |
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811 |
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812 Event[ev][spec].status = BFLIP32S(EvStUNUSED); |
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813 |
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814 v0 = 1; pc0 = ra; |
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815 } |
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816 |
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817 static void bios_WaitEvent() { // 0a |
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818 int ev, spec; |
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819 |
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820 ev = a0 & 0xff; |
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821 spec = (a0 >> 8) & 0xff; |
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822 |
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823 Event[ev][spec].status = BFLIP32S(EvStACTIVE); |
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824 |
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825 v0 = 1; pc0 = ra; |
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826 } |
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827 |
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828 static void bios_TestEvent() { // 0b |
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829 int ev, spec; |
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830 |
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831 ev = a0 & 0xff; |
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832 spec = (a0 >> 8) & 0xff; |
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833 |
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834 if (Event[ev][spec].status == BFLIP32S(EvStALREADY)) { |
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835 Event[ev][spec].status = BFLIP32S(EvStACTIVE); v0 = 1; |
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836 } else v0 = 0; |
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837 |
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838 pc0 = ra; |
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839 } |
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840 |
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841 static void bios_EnableEvent() { // 0c |
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842 int ev, spec; |
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843 |
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844 ev = a0 & 0xff; |
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845 spec = (a0 >> 8) & 0xff; |
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846 |
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847 Event[ev][spec].status = BFLIP32S(EvStACTIVE); |
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848 |
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849 v0 = 1; pc0 = ra; |
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850 } |
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851 |
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852 static void bios_DisableEvent() { // 0d |
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853 int ev, spec; |
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854 |
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855 ev = a0 & 0xff; |
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856 spec = (a0 >> 8) & 0xff; |
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857 |
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858 Event[ev][spec].status = BFLIP32S(EvStWAIT); |
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859 |
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860 v0 = 1; pc0 = ra; |
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861 } |
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862 |
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863 /* |
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864 * long OpenTh(long (*func)(), unsigned long sp, unsigned long gp); |
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865 */ |
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866 |
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867 static void bios_OpenTh() { // 0e |
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868 int th; |
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869 |
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870 for (th=1; th<8; th++) |
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871 if (Thread[th].status == 0) break; |
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872 |
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873 Thread[th].status = BFLIP32(1); |
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874 Thread[th].func = BFLIP32(a0); |
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875 Thread[th].reg[29] = BFLIP32(a1); |
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876 Thread[th].reg[28] = BFLIP32(a2); |
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877 |
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878 v0 = th; pc0 = ra; |
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879 } |
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880 |
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881 /* |
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882 * int CloseTh(long thread); |
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883 */ |
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884 |
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885 static void bios_CloseTh() { // 0f |
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886 int th = a0 & 0xff; |
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887 |
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888 if (Thread[th].status == 0) { |
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889 v0 = 0; |
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890 } else { |
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891 Thread[th].status = 0; |
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892 v0 = 1; |
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|
893 } |
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894 |
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895 pc0 = ra; |
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896 } |
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897 |
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898 /* |
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899 * int ChangeTh(long thread); |
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900 */ |
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901 |
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902 static void bios_ChangeTh() { // 10 |
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903 int th = a0 & 0xff; |
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904 |
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905 if (Thread[th].status == 0 || CurThread == th) { |
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906 v0 = 0; |
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907 |
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908 pc0 = ra; |
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909 } else { |
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910 v0 = 1; |
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911 |
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912 if (Thread[CurThread].status == BFLIP32S(2)) { |
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913 Thread[CurThread].status = BFLIP32S(1); |
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914 Thread[CurThread].func = BFLIP32(ra); |
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915 memcpy(Thread[CurThread].reg, psxRegs.GPR.r, 32*4); |
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916 } |
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917 |
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918 memcpy(psxRegs.GPR.r, Thread[th].reg, 32*4); |
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919 pc0 = BFLIP32(Thread[th].func); |
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920 Thread[th].status = BFLIP32(2); |
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921 CurThread = th; |
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922 } |
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923 } |
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924 |
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925 static void bios_ReturnFromException() { // 17 |
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926 memcpy(psxRegs.GPR.r, regs, 32*4); |
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927 psxRegs.GPR.n.lo = regs[32]; |
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928 psxRegs.GPR.n.hi = regs[33]; |
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929 |
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930 pc0 = psxRegs.CP0.n.EPC; |
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931 if (psxRegs.CP0.n.Cause & 0x80000000) pc0+=4; |
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932 |
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933 psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status & 0xfffffff0) | |
2231 | 934 ((psxRegs.CP0.n.Status & 0x3c) >> 2); |
0
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935 } |
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936 |
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937 static void bios_ResetEntryInt() { // 18 |
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938 |
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939 jmp_int = NULL; |
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940 pc0 = ra; |
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941 } |
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942 |
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943 static void bios_HookEntryInt() { // 19 |
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944 |
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945 jmp_int = (u32*)Ra0; |
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946 pc0 = ra; |
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947 } |
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948 |
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949 static void bios_UnDeliverEvent() { // 0x20 |
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950 int ev, spec; |
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951 int i; |
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952 |
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953 GetEv(); |
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954 GetSpec(); |
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955 |
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956 if (Event[ev][spec].status == BFLIP32S(EvStALREADY) && |
2231 | 957 Event[ev][spec].mode == BFLIP32S(EvMdNOINTR)) |
958 Event[ev][spec].status = BFLIP32S(EvStACTIVE); | |
0
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959 |
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960 pc0 = ra; |
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961 } |
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962 |
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963 static void bios_GetC0Table() { // 56 |
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964 |
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965 v0 = 0x674; pc0 = ra; |
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966 } |
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967 |
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968 static void bios_GetB0Table() { // 57 |
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969 |
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970 v0 = 0x874; pc0 = ra; |
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971 } |
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972 |
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973 /* System calls C0 */ |
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974 |
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975 /* |
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976 * int SysEnqIntRP(int index , long *queue); |
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977 */ |
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978 |
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979 static void bios_SysEnqIntRP() { // 02 |
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980 |
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981 SysIntRP[a0] = a1; |
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982 |
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983 v0 = 0; pc0 = ra; |
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984 } |
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985 |
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986 /* |
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987 * int SysDeqIntRP(int index , long *queue); |
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988 */ |
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989 |
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990 static void bios_SysDeqIntRP() { // 03 |
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991 |
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992 SysIntRP[a0] = 0; |
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993 |
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994 v0 = 0; pc0 = ra; |
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995 } |
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996 |
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997 static void bios_ChangeClearRCnt() { // 0a |
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998 u32 *ptr; |
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999 |
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1000 ptr = (u32*)PSXM((a0 << 2) + 0x8600); |
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1001 v0 = BFLIP32(*ptr); |
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1002 *ptr = BFLIP32(a1); |
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1003 |
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1004 // psxRegs.CP0.n.Status|= 0x404; |
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1005 pc0 = ra; |
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1006 } |
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1007 |
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1008 static void bios_dummy() { |
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1009 pc0 = ra; |
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1010 } |
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1011 |
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1012 void (*biosA0[256])(); |
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1013 void (*biosB0[256])(); |
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1014 void (*biosC0[256])(); |
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1015 |
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1016 void psxBiosInit() { |
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1017 u32 base, size; |
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1018 u32 *ptr; |
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1019 int i; |
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1020 |
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1021 heap_addr=0; |
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1022 CurThread = 0; |
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1023 jmp_int = NULL; |
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1024 |
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1025 for(i = 0; i < 256; i++) { |
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1026 biosA0[i] = NULL; |
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1027 biosB0[i] = NULL; |
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1028 biosC0[i] = NULL; |
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1029 } |
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1030 |
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1031 for(i = 0; i < 256; i++) { |
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1032 if (biosA0[i] == NULL) biosA0[i] = bios_dummy; |
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1033 if (biosB0[i] == NULL) biosB0[i] = bios_dummy; |
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1034 if (biosC0[i] == NULL) biosC0[i] = bios_dummy; |
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1035 } |
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1036 |
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1037 biosA0[0x0e] = bios_abs; |
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1038 biosA0[0x0f] = bios_labs; |
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1039 biosA0[0x10] = bios_atoi; |
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1040 biosA0[0x11] = bios_atol; |
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1041 //biosA0[0x12] = bios_atob; |
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1042 biosA0[0x13] = bios_setjmp; |
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1043 biosA0[0x14] = bios_longjmp; |
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1044 |
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1045 biosA0[0x15] = bios_strcat; |
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1046 biosA0[0x16] = bios_strncat; |
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1047 biosA0[0x17] = bios_strcmp; |
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1048 biosA0[0x18] = bios_strncmp; |
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1049 biosA0[0x19] = bios_strcpy; |
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1050 biosA0[0x1a] = bios_strncpy; |
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1051 biosA0[0x1b] = bios_strlen; |
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1052 biosA0[0x1c] = bios_index; |
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1053 biosA0[0x1d] = bios_rindex; |
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1054 biosA0[0x1e] = bios_strchr; |
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1055 biosA0[0x1f] = bios_strrchr; |
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1056 biosA0[0x20] = bios_strpbrk; |
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1057 biosA0[0x21] = bios_strspn; |
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1058 biosA0[0x22] = bios_strcspn; |
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1059 //biosA0[0x23] = bios_strtok; |
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1060 biosA0[0x24] = bios_strstr; |
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1061 biosA0[0x25] = bios_toupper; |
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1062 biosA0[0x26] = bios_tolower; |
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1063 biosA0[0x27] = bios_bcopy; |
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1064 biosA0[0x28] = bios_bzero; |
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1065 biosA0[0x29] = bios_bcmp; |
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1066 biosA0[0x2a] = bios_memcpy; |
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1067 biosA0[0x2b] = bios_memset; |
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1068 //biosA0[0x2c] = bios_memmove; |
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1069 biosA0[0x2c] = bios_memcpy; /* Our code should be compatible |
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1070 with both memcpy and memmove |
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1071 semantics. */ |
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1072 biosA0[0x2d] = bios_memcmp; |
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1073 biosA0[0x2e] = bios_memchr; |
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1074 |
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1075 biosA0[0x2f] = bios_rand; |
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1076 biosA0[0x30] = bios_srand; |
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1077 |
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1078 //biosA0[0x31] = bios_qsort; |
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1079 //biosA0[0x32] = bios_strtod; |
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1080 biosA0[0x33] = bios_malloc; |
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1081 //biosA0[0x34] = bios_free; |
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1082 //biosA0[0x35] = bios_lsearch; |
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1083 //biosA0[0x36] = bios_bsearch; |
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1084 //biosA0[0x37] = bios_calloc; |
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1085 //biosA0[0x38] = bios_realloc; |
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1086 biosA0[0x39] = bios_InitHeap; |
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1087 //biosA0[0x3a] = bios__exit; |
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1088 biosA0[0x44] = bios_FlushCache; |
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1089 //biosA0[0x45] = bios_InstallInterruptHandler; |
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1090 //biosA0[0x4f] = bios_sys_a0_4f; |
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1091 //biosA0[0x50] = bios_sys_a0_50; |
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1092 biosA0[0x70] = bios__bu_init; |
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1093 biosA0[0x71] = bios__96_init; |
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1094 biosA0[0x72] = bios__96_remove; |
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1095 //biosA0[0x73] = bios_sys_a0_73; |
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1096 //biosA0[0x74] = bios_sys_a0_74; |
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1097 //biosA0[0x75] = bios_sys_a0_75; |
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1098 //biosA0[0x76] = bios_sys_a0_76; |
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1099 //biosA0[0x77] = bios_sys_a0_77; |
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1100 //biosA0[0x78] = bios__96_CdSeekL; |
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1101 //biosA0[0x79] = bios_sys_a0_79; |
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1102 //biosA0[0x7a] = bios_sys_a0_7a; |
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1103 //biosA0[0x7b] = bios_sys_a0_7b; |
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1104 //biosA0[0x7c] = bios__96_CdGetStatus; |
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1105 //biosA0[0x7d] = bios_sys_a0_7d; |
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1106 //biosA0[0x7e] = bios__96_CdRead; |
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1107 //biosA0[0x7f] = bios_sys_a0_7f; |
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1108 //biosA0[0x80] = bios_sys_a0_80; |
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1109 //biosA0[0x81] = bios_sys_a0_81; |
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1110 //biosA0[0x82] = bios_sys_a0_82; |
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1111 //biosA0[0x83] = bios_sys_a0_83; |
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1112 //biosA0[0x84] = bios_sys_a0_84; |
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1113 //biosA0[0x85] = bios__96_CdStop; |
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1114 //biosA0[0x86] = bios_sys_a0_86; |
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1115 //biosA0[0x87] = bios_sys_a0_87; |
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1116 //biosA0[0x88] = bios_sys_a0_88; |
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1117 //biosA0[0x89] = bios_sys_a0_89; |
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1118 //biosA0[0x8a] = bios_sys_a0_8a; |
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1119 //biosA0[0x8b] = bios_sys_a0_8b; |
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1120 //biosA0[0x8c] = bios_sys_a0_8c; |
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1121 //biosA0[0x8d] = bios_sys_a0_8d; |
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1122 //biosA0[0x8e] = bios_sys_a0_8e; |
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1123 //biosA0[0x8f] = bios_sys_a0_8f; |
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1124 //biosA0[0x90] = bios_sys_a0_90; |
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1125 //biosA0[0x91] = bios_sys_a0_91; |
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1126 //biosA0[0x92] = bios_sys_a0_92; |
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1127 //biosA0[0x93] = bios_sys_a0_93; |
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1128 //biosA0[0x94] = bios_sys_a0_94; |
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1129 //biosA0[0x95] = bios_sys_a0_95; |
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1130 //biosA0[0x96] = bios_AddCDROMDevice; |
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1131 //biosA0[0x97] = bios_AddMemCardDevide; |
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1132 //biosA0[0x98] = bios_DisableKernelIORedirection; |
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1133 //biosA0[0x99] = bios_EnableKernelIORedirection; |
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1134 //biosA0[0x9a] = bios_sys_a0_9a; |
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1135 //biosA0[0x9b] = bios_sys_a0_9b; |
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1136 //biosA0[0x9c] = bios_SetConf; |
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1137 //biosA0[0x9d] = bios_GetConf; |
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1138 //biosA0[0x9e] = bios_sys_a0_9e; |
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1139 //biosA0[0x9f] = bios_SetMem; |
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1140 //biosA0[0xa0] = bios__boot; |
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1141 //biosA0[0xa1] = bios_SystemError; |
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1142 //biosA0[0xa2] = bios_EnqueueCdIntr; |
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1143 //biosA0[0xa3] = bios_DequeueCdIntr; |
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1144 //biosA0[0xa4] = bios_sys_a0_a4; |
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1145 //biosA0[0xa5] = bios_ReadSector; |
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1146 //biosA0[0xa6] = bios_get_cd_status; |
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1147 //biosA0[0xa7] = bios_bufs_cb_0; |
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1148 //biosA0[0xa8] = bios_bufs_cb_1; |
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1149 //biosA0[0xa9] = bios_bufs_cb_2; |
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1150 //biosA0[0xaa] = bios_bufs_cb_3; |
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1151 //biosA0[0xab] = bios__card_info; |
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1152 //biosA0[0xac] = bios__card_load; |
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1153 //biosA0[0axd] = bios__card_auto; |
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1154 //biosA0[0xae] = bios_bufs_cd_4; |
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1155 //biosA0[0xaf] = bios_sys_a0_af; |
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1156 //biosA0[0xb0] = bios_sys_a0_b0; |
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1157 //biosA0[0xb1] = bios_sys_a0_b1; |
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1158 //biosA0[0xb2] = bios_do_a_long_jmp |
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1159 //biosA0[0xb3] = bios_sys_a0_b3; |
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1160 //biosA0[0xb4] = bios_sub_function; |
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1161 //*******************B0 CALLS**************************** |
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1162 //biosB0[0x00] = bios_SysMalloc; |
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1163 //biosB0[0x01] = bios_sys_b0_01; |
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1164 biosB0[0x02] = bios_SetRCnt; |
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1165 biosB0[0x03] = bios_GetRCnt; |
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1166 biosB0[0x04] = bios_StartRCnt; |
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1167 biosB0[0x05] = bios_StopRCnt; |
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1168 biosB0[0x06] = bios_ResetRCnt; |
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1169 biosB0[0x07] = bios_DeliverEvent; |
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1170 biosB0[0x08] = bios_OpenEvent; |
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1171 biosB0[0x09] = bios_CloseEvent; |
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1172 biosB0[0x0a] = bios_WaitEvent; |
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1173 biosB0[0x0b] = bios_TestEvent; |
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1174 biosB0[0x0c] = bios_EnableEvent; |
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1175 biosB0[0x0d] = bios_DisableEvent; |
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1176 biosB0[0x0e] = bios_OpenTh; |
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1177 biosB0[0x0f] = bios_CloseTh; |
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1178 biosB0[0x10] = bios_ChangeTh; |
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1179 //biosB0[0x11] = bios_bios_b0_11; |
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1180 biosB0[0x17] = bios_ReturnFromException; |
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1181 biosB0[0x18] = bios_ResetEntryInt; |
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1182 biosB0[0x19] = bios_HookEntryInt; |
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1183 //biosB0[0x1a] = bios_sys_b0_1a; |
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1184 //biosB0[0x1b] = bios_sys_b0_1b; |
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1185 //biosB0[0x1c] = bios_sys_b0_1c; |
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1186 //biosB0[0x1d] = bios_sys_b0_1d; |
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1187 //biosB0[0x1e] = bios_sys_b0_1e; |
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1188 //biosB0[0x1f] = bios_sys_b0_1f; |
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1189 biosB0[0x20] = bios_UnDeliverEvent; |
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1190 //biosB0[0x21] = bios_sys_b0_21; |
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1191 //biosB0[0x22] = bios_sys_b0_22; |
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1192 //biosB0[0x23] = bios_sys_b0_23; |
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1193 //biosB0[0x24] = bios_sys_b0_24; |
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1194 //biosB0[0x25] = bios_sys_b0_25; |
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1195 //biosB0[0x26] = bios_sys_b0_26; |
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1196 //biosB0[0x27] = bios_sys_b0_27; |
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1197 //biosB0[0x28] = bios_sys_b0_28; |
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1198 //biosB0[0x29] = bios_sys_b0_29; |
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1199 //biosB0[0x2a] = bios_sys_b0_2a; |
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1200 //biosB0[0x2b] = bios_sys_b0_2b; |
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1201 //biosB0[0x2c] = bios_sys_b0_2c; |
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1202 //biosB0[0x2d] = bios_sys_b0_2d; |
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1203 //biosB0[0x2e] = bios_sys_b0_2e; |
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1204 //biosB0[0x2f] = bios_sys_b0_2f; |
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1205 //biosB0[0x30] = bios_sys_b0_30; |
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1206 //biosB0[0x31] = bios_sys_b0_31; |
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1207 biosB0[0x56] = bios_GetC0Table; |
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1208 biosB0[0x57] = bios_GetB0Table; |
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1209 //biosB0[0x58] = bios__card_chan; |
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1210 //biosB0[0x59] = bios_sys_b0_59; |
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1211 //biosB0[0x5a] = bios_sys_b0_5a; |
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1212 //biosB0[0x5c] = bios__card_status; |
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1213 //biosB0[0x5d] = bios__card_wait; |
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1214 //*******************C0 CALLS**************************** |
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1215 //biosC0[0x00] = bios_InitRCnt; |
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1216 //biosC0[0x01] = bios_InitException; |
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1217 biosC0[0x02] = bios_SysEnqIntRP; |
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1218 biosC0[0x03] = bios_SysDeqIntRP; |
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1219 //biosC0[0x04] = bios_get_free_EvCB_slot; |
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1220 //biosC0[0x05] = bios_get_free_TCB_slot; |
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1221 //biosC0[0x06] = bios_ExceptionHandler; |
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1222 //biosC0[0x07] = bios_InstallExeptionHandler; |
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1223 //biosC0[0x08] = bios_SysInitMemory; |
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1224 //biosC0[0x09] = bios_SysInitKMem; |
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1225 biosC0[0x0a] = bios_ChangeClearRCnt; |
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1226 //biosC0[0x0b] = bios_SystemError; |
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1227 //biosC0[0x0c] = bios_InitDefInt; |
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1228 //biosC0[0x0d] = bios_sys_c0_0d; |
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1229 //biosC0[0x0e] = bios_sys_c0_0e; |
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1230 //biosC0[0x0f] = bios_sys_c0_0f; |
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1231 //biosC0[0x10] = bios_sys_c0_10; |
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1232 //biosC0[0x11] = bios_sys_c0_11; |
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1233 //biosC0[0x12] = bios_InstallDevices; |
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1234 //biosC0[0x13] = bios_FlushStfInOutPut; |
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1235 //biosC0[0x14] = bios_sys_c0_14; |
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1236 //biosC0[0x15] = bios__cdevinput; |
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1237 //biosC0[0x16] = bios__cdevscan; |
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1238 //biosC0[0x17] = bios__circgetc; |
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1239 //biosC0[0x18] = bios__circputc; |
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1240 //biosC0[0x19] = bios_ioabort; |
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1241 //biosC0[0x1a] = bios_sys_c0_1a |
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1242 //biosC0[0x1b] = bios_KernelRedirect; |
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1243 //biosC0[0x1c] = bios_PatchAOTable; |
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1244 //************** THE END *************************************** |
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1245 |
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1246 base = 0x1000; |
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1247 size = sizeof(EvCB) * 32; |
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1248 Event = (void *)&psxR[base]; base+= size*6; |
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1249 memset(Event, 0, size * 6); |
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1250 //HwEV = Event; |
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1251 //EvEV = Event + 32; |
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1252 RcEV = Event + 32*2; |
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1253 //UeEV = Event + 32*3; |
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1254 //SwEV = Event + 32*4; |
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1255 //ThEV = Event + 32*5; |
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1256 |
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1257 ptr = (u32*)&psxM[0x0874]; // b0 table |
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1258 ptr[0] = BFLIP32(0x4c54 - 0x884); |
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1259 |
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1260 ptr = (u32*)&psxM[0x0674]; // c0 table |
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1261 ptr[6] = BFLIP32(0xc80); |
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1262 |
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1263 memset(SysIntRP, 0, sizeof(SysIntRP)); |
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1264 memset(Thread, 0, sizeof(Thread)); |
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1265 Thread[0].status = BFLIP32(2); // main thread |
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1266 |
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1267 psxMu32(0x0150) = BFLIP32(0x160); |
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1268 psxMu32(0x0154) = BFLIP32(0x320); |
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1269 psxMu32(0x0160) = BFLIP32(0x248); |
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1270 strcpy(&psxM[0x248], "bu"); |
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1271 |
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1272 /* psxMu32(0x0ca8) = BFLIP32(0x1f410004); |
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1273 psxMu32(0x0cf0) = BFLIP32(0x3c020000); |
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1274 psxMu32(0x0cf4) = BFLIP32(0x2442641c); |
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1275 psxMu32(0x09e0) = BFLIP32(0x43d0); |
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1276 psxMu32(0x4d98) = BFLIP32(0x946f000a); |
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1277 */ |
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1278 // opcode HLE |
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1279 psxRu32(0x0000) = BFLIP32((0x3b << 26) | 4); |
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1280 psxMu32(0x0000) = BFLIP32((0x3b << 26) | 0); |
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1281 psxMu32(0x00a0) = BFLIP32((0x3b << 26) | 1); |
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1282 psxMu32(0x00b0) = BFLIP32((0x3b << 26) | 2); |
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1283 psxMu32(0x00c0) = BFLIP32((0x3b << 26) | 3); |
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1284 psxMu32(0x4c54) = BFLIP32((0x3b << 26) | 0); |
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1285 psxMu32(0x8000) = BFLIP32((0x3b << 26) | 5); |
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1286 psxMu32(0x07a0) = BFLIP32((0x3b << 26) | 0); |
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1287 psxMu32(0x0884) = BFLIP32((0x3b << 26) | 0); |
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1288 psxMu32(0x0894) = BFLIP32((0x3b << 26) | 0); |
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1289 } |
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1290 |
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1291 void psxBiosShutdown() { |
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1292 } |
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1293 |
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1294 void biosInterrupt() { |
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1295 if (BFLIP32(psxHu32(0x1070)) & 0x1) { // Vsync |
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1296 if (RcEV[3][1].status == BFLIP32S(EvStACTIVE)) { |
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1297 softCall(BFLIP32(RcEV[3][1].fhandler)); |
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1298 // hwWrite32(0x1f801070, ~(1)); |
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1299 } |
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1300 } |
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1301 |
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1302 if (BFLIP32(psxHu32(0x1070)) & 0x70) { // Rcnt 0,1,2 |
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1303 int i; |
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1304 |
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1305 for (i=0; i<3; i++) { |
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1306 if (BFLIP32(psxHu32(0x1070)) & (1 << (i+4))) { |
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1307 if (RcEV[i][1].status == BFLIP32S(EvStACTIVE)) { |
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1308 softCall(BFLIP32(RcEV[i][1].fhandler)); |
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1309 psxHwWrite32(0x1f801070, ~(1 << (i+4))); |
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1310 } |
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1311 } |
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1312 } |
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1313 } |
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1314 } |
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1315 |
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1316 static INLINE void SaveRegs() { |
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1317 memcpy(regs, psxRegs.GPR.r, 32*4); |
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1318 regs[32] = psxRegs.GPR.n.lo; |
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1319 regs[33] = psxRegs.GPR.n.hi; |
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1320 regs[34] = psxRegs.pc; |
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1321 } |
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1322 |
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1323 void psxBiosException() { |
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1324 int i; |
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1325 |
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1326 switch (psxRegs.CP0.n.Cause & 0x3c) { |
2231 | 1327 case 0x00: // Interrupt |
0
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1328 #ifdef PSXCPU_LOG |
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1329 // PSXCPU_LOG("interrupt\n"); |
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1330 #endif |
2231 | 1331 SaveRegs(); |
0
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1332 |
2231 | 1333 biosInterrupt(); |
0
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1334 |
2231 | 1335 for (i=0; i<8; i++) { |
1336 if (SysIntRP[i]) { | |
1337 u32 *queue = (u32*)PSXM(SysIntRP[i]); | |
0
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1338 |
2231 | 1339 s0 = BFLIP32(queue[2]); |
1340 softCall(BFLIP32(queue[1])); | |
0
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1341 } |
2231 | 1342 } |
0
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1343 |
2231 | 1344 if (jmp_int != NULL) { |
1345 int i; | |
0
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1346 |
2231 | 1347 psxHwWrite32(0x1f801070, 0xffffffff); |
0
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1348 |
2231 | 1349 ra = BFLIP32(jmp_int[0]); |
1350 sp = BFLIP32(jmp_int[1]); | |
1351 fp = BFLIP32(jmp_int[2]); | |
1352 for (i=0; i<8; i++) // s0-s7 | |
1353 psxRegs.GPR.r[16+i] = BFLIP32(jmp_int[3+i]); | |
1354 gp = BFLIP32(jmp_int[11]); | |
0
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1355 |
2231 | 1356 v0 = 1; |
1357 pc0 = ra; | |
1358 return; | |
1359 } | |
1360 psxHwWrite16(0x1f801070, 0); | |
1361 break; | |
1362 case 0x20: // Syscall | |
0
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1363 #ifdef PSXCPU_LOG |
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1364 // PSXCPU_LOG("syscall exp %x\n", a0); |
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1365 #endif |
2231 | 1366 switch (a0) { |
1367 case 1: // EnterCritical - disable irq's | |
1368 psxRegs.CP0.n.Status&=~0x404; break; | |
1369 case 2: // ExitCritical - enable irq's | |
1370 psxRegs.CP0.n.Status|= 0x404; break; | |
1371 } | |
1372 pc0 = psxRegs.CP0.n.EPC + 4; | |
0
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1373 |
2231 | 1374 psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status & 0xfffffff0) | |
1375 ((psxRegs.CP0.n.Status & 0x3c) >> 2); | |
1376 return; | |
1377 default: | |
0
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1378 #ifdef PSXCPU_LOG |
2231 | 1379 PSXCPU_LOG("unk exp\n"); |
0
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1380 #endif |
2231 | 1381 break; |
0
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1382 } |
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1383 |
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1384 pc0 = psxRegs.CP0.n.EPC; |
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1385 if (psxRegs.CP0.n.Cause & 0x80000000) pc0+=4; |
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1386 |
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1387 psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status & 0xfffffff0) | |
2231 | 1388 ((psxRegs.CP0.n.Status & 0x3c) >> 2); |
0
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1389 } |