Mercurial > audlegacy-plugins
annotate src/console/Sap_Cpu.h @ 1877:28d360594d3a
Update buildsys.
author | Jonathan Schleifer <js@h3c.de> |
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date | Wed, 26 Sep 2007 00:42:58 +0200 |
parents | 986f098da058 |
children | 240bdf781ad0 |
rev | line source |
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1 // Atari 6502 CPU emulator |
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2 |
341 | 3 // Game_Music_Emu 0.5.2 |
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4 #ifndef SAP_CPU_H |
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5 #define SAP_CPU_H |
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6 |
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7 #include "blargg_common.h" |
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8 |
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9 typedef blargg_long sap_time_t; // clock cycle count |
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10 typedef unsigned sap_addr_t; // 16-bit address |
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11 enum { future_sap_time = LONG_MAX / 2 + 1 }; |
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12 |
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13 class Sap_Cpu { |
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14 public: |
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15 typedef BOOST::uint8_t uint8_t; |
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16 |
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17 // Clear all registers and keep pointer to 64K memory passed in |
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18 void reset( void* mem_64k ); |
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19 |
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20 // Run until specified time is reached. Returns true if suspicious/unsupported |
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21 // instruction was encountered at any point during run. |
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22 bool run( sap_time_t end_time ); |
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23 |
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24 // Registers are not updated until run() returns (except I flag in status) |
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25 struct registers_t { |
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26 BOOST::uint16_t pc; |
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27 BOOST::uint8_t a; |
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28 BOOST::uint8_t x; |
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29 BOOST::uint8_t y; |
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30 BOOST::uint8_t status; |
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31 BOOST::uint8_t sp; |
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32 }; |
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33 registers_t r; |
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34 |
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35 enum { idle_addr = 0xFEFF }; |
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36 |
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37 // Time of beginning of next instruction to be executed |
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38 sap_time_t time() const { return state->time + state->base; } |
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39 void set_time( sap_time_t t ) { state->time = t - state->base; } |
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40 void adjust_time( int delta ) { state->time += delta; } |
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41 |
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42 sap_time_t irq_time() const { return irq_time_; } |
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43 void set_irq_time( sap_time_t ); |
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44 |
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45 sap_time_t end_time() const { return end_time_; } |
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46 void set_end_time( sap_time_t ); |
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47 |
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48 public: |
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49 Sap_Cpu() { state = &state_; } |
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50 enum { irq_inhibit = 0x04 }; |
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51 private: |
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52 struct state_t { |
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53 sap_time_t base; |
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54 sap_time_t time; |
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55 }; |
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56 state_t* state; // points to state_ or a local copy within run() |
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57 state_t state_; |
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58 sap_time_t irq_time_; |
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59 sap_time_t end_time_; |
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60 uint8_t* mem; |
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61 |
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62 inline sap_time_t update_end_time( sap_time_t end, sap_time_t irq ); |
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63 }; |
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64 |
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65 inline sap_time_t Sap_Cpu::update_end_time( sap_time_t t, sap_time_t irq ) |
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66 { |
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67 if ( irq < t && !(r.status & irq_inhibit) ) t = irq; |
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68 sap_time_t delta = state->base - t; |
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69 state->base = t; |
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70 return delta; |
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71 } |
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72 |
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73 inline void Sap_Cpu::set_irq_time( sap_time_t t ) |
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74 { |
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75 state->time += update_end_time( end_time_, (irq_time_ = t) ); |
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76 } |
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77 |
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78 inline void Sap_Cpu::set_end_time( sap_time_t t ) |
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79 { |
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80 state->time += update_end_time( (end_time_ = t), irq_time_ ); |
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81 } |
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82 |
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83 #endif |