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annotate src/madplug/SFMT-params19937.h @ 2084:371d9450c631

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Fix default custom Tuplez format string.
author Matti Hamalainen <ccr@tnsp.org>
date Wed, 17 Oct 2007 23:09:30 +0300
parents b8dd67ad7b86
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
1386
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
1 #ifndef SFMT_PARAMS19937_H
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
2 #define SFMT_PARAMS19937_H
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
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3
922
7e14701aef54 [svn] - replace random number generator in dithering code with SIMD-oriented Fast Mersenne Twister (SFMT). it reduces CPU load on SSE2 or AltiVec capable platform.
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4 #define POS1 122
7e14701aef54 [svn] - replace random number generator in dithering code with SIMD-oriented Fast Mersenne Twister (SFMT). it reduces CPU load on SSE2 or AltiVec capable platform.
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5 #define SL1 18
7e14701aef54 [svn] - replace random number generator in dithering code with SIMD-oriented Fast Mersenne Twister (SFMT). it reduces CPU load on SSE2 or AltiVec capable platform.
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6 #define SL2 1
7e14701aef54 [svn] - replace random number generator in dithering code with SIMD-oriented Fast Mersenne Twister (SFMT). it reduces CPU load on SSE2 or AltiVec capable platform.
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7 #define SR1 11
7e14701aef54 [svn] - replace random number generator in dithering code with SIMD-oriented Fast Mersenne Twister (SFMT). it reduces CPU load on SSE2 or AltiVec capable platform.
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8 #define SR2 1
7e14701aef54 [svn] - replace random number generator in dithering code with SIMD-oriented Fast Mersenne Twister (SFMT). it reduces CPU load on SSE2 or AltiVec capable platform.
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9 #define MSK1 0xdfffffefU
7e14701aef54 [svn] - replace random number generator in dithering code with SIMD-oriented Fast Mersenne Twister (SFMT). it reduces CPU load on SSE2 or AltiVec capable platform.
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10 #define MSK2 0xddfecb7fU
7e14701aef54 [svn] - replace random number generator in dithering code with SIMD-oriented Fast Mersenne Twister (SFMT). it reduces CPU load on SSE2 or AltiVec capable platform.
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11 #define MSK3 0xbffaffffU
7e14701aef54 [svn] - replace random number generator in dithering code with SIMD-oriented Fast Mersenne Twister (SFMT). it reduces CPU load on SSE2 or AltiVec capable platform.
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12 #define MSK4 0xbffffff6U
7e14701aef54 [svn] - replace random number generator in dithering code with SIMD-oriented Fast Mersenne Twister (SFMT). it reduces CPU load on SSE2 or AltiVec capable platform.
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13 #define PARITY1 0x00000001U
7e14701aef54 [svn] - replace random number generator in dithering code with SIMD-oriented Fast Mersenne Twister (SFMT). it reduces CPU load on SSE2 or AltiVec capable platform.
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14 #define PARITY2 0x00000000U
7e14701aef54 [svn] - replace random number generator in dithering code with SIMD-oriented Fast Mersenne Twister (SFMT). it reduces CPU load on SSE2 or AltiVec capable platform.
yaz
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15 #define PARITY3 0x00000000U
7e14701aef54 [svn] - replace random number generator in dithering code with SIMD-oriented Fast Mersenne Twister (SFMT). it reduces CPU load on SSE2 or AltiVec capable platform.
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16 #define PARITY4 0x13c9e684U
1386
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
17
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
18
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
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19 /* PARAMETERS FOR ALTIVEC */
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
20 #if defined(__APPLE__) /* For OSX */
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
21 #define ALTI_SL1 (vector unsigned int)(SL1, SL1, SL1, SL1)
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
22 #define ALTI_SR1 (vector unsigned int)(SR1, SR1, SR1, SR1)
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
23 #define ALTI_MSK (vector unsigned int)(MSK1, MSK2, MSK3, MSK4)
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
24 #define ALTI_MSK64 \
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
25 (vector unsigned int)(MSK2, MSK1, MSK4, MSK3)
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
26 #define ALTI_SL2_PERM \
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
27 (vector unsigned char)(1,2,3,23,5,6,7,0,9,10,11,4,13,14,15,8)
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
28 #define ALTI_SL2_PERM64 \
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
29 (vector unsigned char)(1,2,3,4,5,6,7,31,9,10,11,12,13,14,15,0)
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
30 #define ALTI_SR2_PERM \
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
31 (vector unsigned char)(7,0,1,2,11,4,5,6,15,8,9,10,17,12,13,14)
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
32 #define ALTI_SR2_PERM64 \
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
33 (vector unsigned char)(15,0,1,2,3,4,5,6,17,8,9,10,11,12,13,14)
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
34 #else /* For OTHER OSs(Linux?) */
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
35 #define ALTI_SL1 {SL1, SL1, SL1, SL1}
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
36 #define ALTI_SR1 {SR1, SR1, SR1, SR1}
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
37 #define ALTI_MSK {MSK1, MSK2, MSK3, MSK4}
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
38 #define ALTI_MSK64 {MSK2, MSK1, MSK4, MSK3}
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
39 #define ALTI_SL2_PERM {1,2,3,23,5,6,7,0,9,10,11,4,13,14,15,8}
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
40 #define ALTI_SL2_PERM64 {1,2,3,4,5,6,7,31,9,10,11,12,13,14,15,0}
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
41 #define ALTI_SR2_PERM {7,0,1,2,11,4,5,6,15,8,9,10,17,12,13,14}
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
42 #define ALTI_SR2_PERM64 {15,0,1,2,3,4,5,6,17,8,9,10,11,12,13,14}
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
43 #endif /* For OSX */
922
7e14701aef54 [svn] - replace random number generator in dithering code with SIMD-oriented Fast Mersenne Twister (SFMT). it reduces CPU load on SSE2 or AltiVec capable platform.
yaz
parents:
diff changeset
44 #define IDSTR "SFMT-19937:122-18-1-11-1:dfffffef-ddfecb7f-bffaffff-bffffff6"
1386
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
45
b8dd67ad7b86 update SFMT files to version 1.3. please let me know if it break on altivec box.
Yoshiki Yazawa <yaz@cc.rim.or.jp>
parents: 929
diff changeset
46 #endif /* SFMT_PARAMS19937_H */