annotate src/sexypsf/R3000A.h @ 2426:39be83376f18

Automated merge with ssh://majeru@hg.atheme.org//hg/audacious-plugins
author Cristi Magherusan <majeru@atheme.org>
date Mon, 25 Feb 2008 14:38:37 +0200
parents 8a4fbe599b05
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1 /* Pcsx - Pc Psx Emulator
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2 * Copyright (C) 1999-2002 Pcsx Team
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3 *
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4 * This program is free software; you can redistribute it and/or modify
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5 * it under the terms of the GNU General Public License as published by
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6 * the Free Software Foundation; either version 2 of the License, or
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7 * (at your option) any later version.
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8 *
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9 * This program is distributed in the hope that it will be useful,
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10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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12 * GNU General Public License for more details.
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13 *
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14 * You should have received a copy of the GNU General Public License
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15 * along with this program; if not, write to the Free Software
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16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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17 */
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18
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19 #ifndef __R3000A_H__
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20 #define __R3000A_H__
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21
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22 #include <stdio.h>
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23
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24 #include "PsxCommon.h"
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25
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26 typedef struct {
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27 int (*Init)();
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28 void (*Reset)();
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29 void (*Execute)(); /* executes up to a break */
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30 void (*ExecuteBlock)(); /* executes up to a jump */
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31 void (*Clear)(u32 Addr, u32 Size);
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32 void (*Shutdown)();
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33 } R3000Acpu;
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34
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35 extern R3000Acpu *psxCpu;
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36 extern R3000Acpu psxInt;
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37
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38 typedef union {
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39 struct {
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40 u32 r0, at, v0, v1, a0, a1, a2, a3,
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41 t0, t1, t2, t3, t4, t5, t6, t7,
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42 s0, s1, s2, s3, s4, s5, s6, s7,
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43 t8, t9, k0, k1, gp, sp, s8, ra, lo, hi;
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44 } n PACKSTRUCT;
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45 u32 r[34]; /* Lo, Hi in r[33] and r[34] */
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46 } psxGPRRegs;
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47
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48 typedef union {
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49 struct {
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50 u32 Index, Random, EntryLo0, EntryLo1,
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51 Context, PageMask, Wired, Reserved0,
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52 BadVAddr, Count, EntryHi, Compare,
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53 Status, Cause, EPC, PRid,
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54 Config, LLAddr, WatchLO, WatchHI,
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55 XContext, Reserved1, Reserved2, Reserved3,
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56 Reserved4, Reserved5, ECC, CacheErr,
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57 TagLo, TagHi, ErrorEPC, Reserved6;
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58 } n PACKSTRUCT;
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59 u32 r[32];
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60 } psxCP0Regs;
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61
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62 typedef struct {
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63 psxGPRRegs GPR; /* General Purpose Registers */
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64 psxCP0Regs CP0; /* Coprocessor0 Registers */
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65 u32 pc; /* Program counter */
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66 u32 code; /* The instruction */
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67 u32 cycle;
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68 u32 interrupt;
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69 } psxRegisters;
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70
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71 extern psxRegisters psxRegs;
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72
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73 #define _i32(x) (s32)x
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74 #define _u32(x) (u32)x
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75
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76 #define _i16(x) (s16)x
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77 #define _u16(x) (u32)x
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78
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79 #define _i8(x) (s8)x
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80 #define _u8(x) (u8)x
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81
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82 /**** R3000A Instruction Macros ****/
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83 #define _PC_ psxRegs.pc // The next PC to be executed
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84
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85 #define _Funct_ ((psxRegs.code ) & 0x3F) // The funct part of the instruction register
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86 #define _Rd_ ((psxRegs.code >> 11) & 0x1F) // The rd part of the instruction register
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87 #define _Rt_ ((psxRegs.code >> 16) & 0x1F) // The rt part of the instruction register
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88 #define _Rs_ ((psxRegs.code >> 21) & 0x1F) // The rs part of the instruction register
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89 #define _Sa_ ((psxRegs.code >> 6) & 0x1F) // The sa part of the instruction register
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90 #define _Im_ ((u16)psxRegs.code) // The immediate part of the instruction register
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91 #define _Target_ (psxRegs.code & 0x03ffffff) // The target part of the instruction register
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92
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93 #define _Imm_ ((s16)psxRegs.code) // sign-extended immediate
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94 #define _ImmU_ (psxRegs.code&0xffff) // zero-extended immediate
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95
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96 #define _rRs_ psxRegs.GPR.r[_Rs_] // Rs register
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97 #define _rRt_ psxRegs.GPR.r[_Rt_] // Rt register
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98 #define _rRd_ psxRegs.GPR.r[_Rd_] // Rd register
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99 #define _rSa_ psxRegs.GPR.r[_Sa_] // Sa register
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100 #define _rFs_ psxRegs.CP0.r[_Rd_] // Fs register
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101
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102 #define _c2dRs_ psxRegs.CP2D.r[_Rs_] // Rs cop2 data register
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103 #define _c2dRt_ psxRegs.CP2D.r[_Rt_] // Rt cop2 data register
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104 #define _c2dRd_ psxRegs.CP2D.r[_Rd_] // Rd cop2 data register
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105 #define _c2dSa_ psxRegs.CP2D.r[_Sa_] // Sa cop2 data register
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106
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107 #define _rHi_ psxRegs.GPR.n.hi // The HI register
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108 #define _rLo_ psxRegs.GPR.n.lo // The LO register
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109
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110 #define _JumpTarget_ ((_Target_ * 4) + (_PC_ & 0xf0000000)) // Calculates the target during a jump instruction
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111 #define _BranchTarget_ ((s16)_Im_ * 4 + _PC_) // Calculates the target during a branch instruction
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112
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113 #define _SetLink(x) psxRegs.GPR.r[x] = _PC_ + 4; // Sets the return address in the link register
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114
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115 int psxInit();
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116 void psxReset();
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117 void psxShutdown();
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118 void psxException(u32 code, u32 bd);
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119 void psxBranchTest();
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120 void psxExecuteBios();
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121
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122 #endif /* __R3000A_H__ */