Mercurial > audlegacy-plugins
annotate src/console/Snes_Spc.cxx @ 12:3da1b8942b8b trunk
[svn] - remove src/Input src/Output src/Effect src/General src/Visualization src/Container
author | nenolod |
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date | Mon, 18 Sep 2006 03:14:20 -0700 |
parents | src/Input/console/Snes_Spc.cxx@13389e613d67 |
children | fb513e10174e |
rev | line source |
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1 |
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2 // Game_Music_Emu 0.3.0. http://www.slack.net/~ant/ |
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3 |
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4 #include "Snes_Spc.h" |
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5 |
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6 #include <assert.h> |
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7 #include <string.h> |
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8 |
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9 /* Copyright (C) 2004-2006 Shay Green. This module is free software; you |
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10 can redistribute it and/or modify it under the terms of the GNU Lesser |
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11 General Public License as published by the Free Software Foundation; either |
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12 version 2.1 of the License, or (at your option) any later version. This |
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13 module is distributed in the hope that it will be useful, but WITHOUT ANY |
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14 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS |
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15 FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for |
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16 more details. You should have received a copy of the GNU Lesser General |
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17 Public License along with this module; if not, write to the Free Software |
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18 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */ |
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19 |
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20 #include BLARGG_SOURCE_BEGIN |
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21 |
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22 // always in the future (CPU time can go over 0, but not by this much) |
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23 int const timer_disabled_time = 127; |
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24 |
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25 Snes_Spc::Snes_Spc() : dsp( ram ), cpu( this, ram ) |
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26 { |
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27 timer [0].shift = 7; // 8 kHz |
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28 timer [1].shift = 7; // 8 kHz |
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29 timer [2].shift = 4; // 64 kHz |
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30 |
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31 // Put STOP instruction past end of memory to catch PC overflow. |
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32 memset( ram + ram_size, 0xff, (sizeof ram) - ram_size ); |
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33 } |
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34 |
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35 // Load |
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36 |
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37 blargg_err_t Snes_Spc::load_spc( const void* data, long size, bool clear_echo_ ) |
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38 { |
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39 struct spc_file_t { |
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40 char signature [27]; |
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41 char unused [10]; |
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42 uint8_t pc [2]; |
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43 uint8_t a; |
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44 uint8_t x; |
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45 uint8_t y; |
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46 uint8_t status; |
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47 uint8_t sp; |
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48 char unused2 [212]; |
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49 uint8_t ram [0x10000]; |
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50 uint8_t dsp [128]; |
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51 }; |
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52 BOOST_STATIC_ASSERT( sizeof (spc_file_t) == spc_file_size ); |
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53 |
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54 const spc_file_t* spc = (spc_file_t*) data; |
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55 |
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56 if ( size < spc_file_size ) |
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57 return "Not an SPC file"; |
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58 |
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59 if ( strncmp( spc->signature, "SNES-SPC700 Sound File Data", 27 ) != 0 ) |
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60 return "Not an SPC file"; |
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61 |
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62 registers_t regs; |
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63 regs.pc = spc->pc [1] * 0x100 + spc->pc [0]; |
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64 regs.a = spc->a; |
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65 regs.x = spc->x; |
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66 regs.y = spc->y; |
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67 regs.status = spc->status; |
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68 regs.sp = spc->sp; |
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69 |
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70 const char* error = load_state( regs, spc->ram, spc->dsp ); |
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71 |
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72 echo_accessed = false; |
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73 |
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74 if ( clear_echo_ ) |
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75 clear_echo(); |
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76 |
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77 return error; |
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78 } |
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79 |
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80 void Snes_Spc::clear_echo() |
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81 { |
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82 if ( !(dsp.read( 0x6c ) & 0x20) ) |
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83 { |
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84 unsigned addr = 0x100 * dsp.read( 0x6d ); |
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85 unsigned size = 0x800 * dsp.read( 0x7d ); |
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86 unsigned limit = ram_size - addr; |
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87 memset( ram + addr, 0xff, (size < limit) ? size : limit ); |
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88 } |
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89 } |
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90 |
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91 // Handle other file formats (emulator save states) in user code, not here. |
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92 |
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93 blargg_err_t Snes_Spc::load_state( const registers_t& cpu_state, const void* new_ram, |
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94 const void* dsp_state ) |
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95 { |
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96 // cpu |
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97 cpu.r = cpu_state; |
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98 |
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99 // Allow DSP to generate one sample before code starts |
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100 // (Tengai Makyo Zero, Tenjin's Table Toss first notes are lost since it |
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101 // clears KON 31 cycles from starting execution. It works on the SNES |
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102 // since the SPC player adds a few extra cycles delay after restoring |
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103 // KON from the DSP registers at the end of an SPC file). |
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104 extra_cycles = 32; |
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105 |
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106 // ram |
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107 memcpy( ram, new_ram, ram_size ); |
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108 memcpy( extra_ram, ram + rom_addr, sizeof extra_ram ); |
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109 |
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110 // boot rom (have to force enable_rom() to update it) |
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111 rom_enabled = !(ram [0xf1] & 0x80); |
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112 enable_rom( !rom_enabled ); |
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113 |
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114 // dsp |
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115 dsp.reset(); |
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116 int i; |
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117 for ( i = 0; i < Spc_Dsp::register_count; i++ ) |
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118 dsp.write( i, ((uint8_t*) dsp_state) [i] ); |
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119 |
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120 // timers |
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121 for ( i = 0; i < timer_count; i++ ) |
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122 { |
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123 Timer& t = timer [i]; |
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124 |
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125 t.next_tick = 0; |
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126 t.enabled = (ram [0xf1] >> i) & 1; |
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127 if ( !t.enabled ) |
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128 t.next_tick = timer_disabled_time; |
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129 t.count = 0; |
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130 t.counter = ram [0xfd + i] & 15; |
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131 |
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132 int p = ram [0xfa + i]; |
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133 t.period = p ? p : 0x100; |
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134 } |
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135 |
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136 // Handle registers which already give 0 when read by setting RAM and not changing it. |
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137 // Put STOP instruction in registers which can be read, to catch attempted CPU execution. |
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138 ram [0xf0] = 0; |
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139 ram [0xf1] = 0; |
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140 ram [0xf3] = 0xff; |
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141 ram [0xfa] = 0; |
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142 ram [0xfb] = 0; |
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143 ram [0xfc] = 0; |
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144 ram [0xfd] = 0xff; |
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145 ram [0xfe] = 0xff; |
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146 ram [0xff] = 0xff; |
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147 |
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148 return NULL; // success |
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149 } |
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150 |
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151 // Hardware |
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152 |
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153 // Current time starts negative and ends at 0 |
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154 inline spc_time_t Snes_Spc::time() const |
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155 { |
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156 return -cpu.remain(); |
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157 } |
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158 |
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159 // Keep track of next time to run and avoid a function call if it hasn't been reached. |
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160 |
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161 // Timers |
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162 |
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163 void Snes_Spc::Timer::run_until_( spc_time_t time ) |
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164 { |
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165 if ( !enabled ) |
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166 dprintf( "next_tick: %ld, time: %ld", (long) next_tick, (long) time ); |
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167 assert( enabled ); // when disabled, next_tick should always be in the future |
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168 |
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169 int elapsed = ((time - next_tick) >> shift) + 1; |
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170 next_tick += elapsed << shift; |
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171 elapsed += count; |
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172 if ( elapsed >= period ) { // avoid costly divide |
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173 int n = elapsed / period; |
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174 elapsed -= n * period; |
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175 counter = (counter + n) & 15; |
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176 } |
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177 count = elapsed; |
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178 } |
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179 |
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180 // DSP |
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181 |
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182 const int clocks_per_sample = 32; // 1.024 MHz CPU clock / 32000 samples per second |
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183 |
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184 void Snes_Spc::run_dsp_( spc_time_t time ) |
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185 { |
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186 int count = ((time - next_dsp) >> 5) + 1; // divide by clocks_per_sample |
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187 sample_t* buf = sample_buf; |
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188 if ( buf ) { |
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189 sample_buf = buf + count * 2; // stereo |
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190 assert( sample_buf <= buf_end ); |
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191 } |
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192 next_dsp += count * clocks_per_sample; |
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193 dsp.run( count, buf ); |
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194 } |
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195 |
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196 inline void Snes_Spc::run_dsp( spc_time_t time ) |
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197 { |
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198 if ( time >= next_dsp ) |
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199 run_dsp_( time ); |
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200 } |
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201 |
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202 // Debug-only check for read/write within echo buffer, since this might result in |
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203 // inaccurate emulation due to the DSP not being caught up to the present. |
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204 inline void Snes_Spc::check_for_echo_access( spc_addr_t addr ) |
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205 { |
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206 if ( !echo_accessed && !(dsp.read( 0x6c ) & 0x20) ) |
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207 { |
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208 // ** If echo accesses are found that require running the DSP, cache |
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209 // the start and end address on DSP writes to speed up checking. |
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210 |
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211 unsigned start = 0x100 * dsp.read( 0x6d ); |
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212 unsigned end = start + 0x800 * dsp.read( 0x7d ); |
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213 if ( start <= addr && addr < end ) { |
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214 echo_accessed = true; |
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215 dprintf( "Read/write at $%04X within echo buffer\n", (unsigned) addr ); |
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216 } |
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217 } |
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218 } |
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219 |
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220 // Read |
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221 |
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222 int Snes_Spc::read( spc_addr_t addr ) |
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223 { |
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224 // zero page ram is used most often |
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225 if ( addr < 0xf0 ) |
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226 return ram [addr]; |
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227 |
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228 // dsp |
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229 if ( addr == 0xf3 ) { |
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230 run_dsp( time() ); |
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231 if ( ram [0xf2] >= Spc_Dsp::register_count ) |
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232 dprintf( "DSP read from $%02X\n", (int) ram [0xf2] ); |
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233 return dsp.read( ram [0xf2] & 0x7f ); |
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234 } |
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235 |
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236 // counters |
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237 unsigned i = addr - 0xfd; // negative converts to large positive unsigned |
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238 if ( i < timer_count ) { |
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239 Timer& t = timer [i]; |
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240 t.run_until( time() ); |
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241 int result = t.counter; |
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242 t.counter = 0; |
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243 return result; |
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244 } |
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245 |
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246 if ( addr == 0xf0 || addr == 0xf1 || addr == 0xf8 || |
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247 addr == 0xf9 || addr == 0xfa ) |
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248 dprintf( "Read from register $%02X\n", (int) addr ); |
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249 |
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250 // Registers which always read as 0 are handled by setting ram [reg] to 0 |
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251 // at startup then never changing that value. |
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252 |
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253 check(( check_for_echo_access( addr ), true )); |
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254 |
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255 // ram |
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256 return ram [addr]; |
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257 } |
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258 |
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259 |
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260 // Write |
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261 |
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262 const unsigned char Snes_Spc::boot_rom [rom_size] = { // verified |
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263 0xCD, 0xEF, 0xBD, 0xE8, 0x00, 0xC6, 0x1D, 0xD0, |
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264 0xFC, 0x8F, 0xAA, 0xF4, 0x8F, 0xBB, 0xF5, 0x78, |
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265 0xCC, 0xF4, 0xD0, 0xFB, 0x2F, 0x19, 0xEB, 0xF4, |
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266 0xD0, 0xFC, 0x7E, 0xF4, 0xD0, 0x0B, 0xE4, 0xF5, |
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267 0xCB, 0xF4, 0xD7, 0x00, 0xFC, 0xD0, 0xF3, 0xAB, |
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268 0x01, 0x10, 0xEF, 0x7E, 0xF4, 0x10, 0xEB, 0xBA, |
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269 0xF6, 0xDA, 0x00, 0xBA, 0xF4, 0xC4, 0xF4, 0xDD, |
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270 0x5D, 0xD0, 0xDB, 0x1F, 0x00, 0x00, 0xC0, 0xFF |
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271 }; |
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272 |
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273 void Snes_Spc::enable_rom( bool enable ) |
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274 { |
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275 if ( rom_enabled != enable ) |
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276 { |
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277 rom_enabled = enable; |
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278 memcpy( ram + rom_addr, (enable ? boot_rom : extra_ram), rom_size ); |
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279 } |
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280 } |
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281 |
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282 void Snes_Spc::write( spc_addr_t addr, int data ) |
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283 { |
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284 // first page is very common |
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285 if ( addr < 0xf0 ) { |
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286 ram [addr] = data; |
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287 } |
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288 else switch ( addr ) |
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289 { |
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290 // RAM |
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291 default: |
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292 check(( check_for_echo_access( addr ), true )); |
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293 if ( addr < rom_addr ) { |
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294 ram [addr] = data; |
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295 } |
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296 else { |
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297 extra_ram [addr - rom_addr] = data; |
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298 if ( !rom_enabled ) |
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299 ram [addr] = data; |
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300 } |
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301 break; |
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302 |
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303 // DSP |
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304 //case 0xf2: // mapped to RAM |
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305 case 0xf3: { |
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306 run_dsp( time() ); |
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307 int reg = ram [0xf2]; |
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308 if ( next_dsp > 0 ) { |
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309 // skip mode |
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310 |
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311 // key press |
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312 if ( reg == 0x4C ) |
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313 keys_pressed |= data & ~dsp.read( 0x5C ); |
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314 |
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315 // key release |
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316 if ( reg == 0x5C ) { |
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317 keys_released |= data; |
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318 keys_pressed &= ~data; |
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319 } |
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320 } |
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321 if ( reg < Spc_Dsp::register_count ) { |
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322 dsp.write( reg, data ); |
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323 } |
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324 else { |
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325 dprintf( "DSP write to $%02X\n", (int) reg ); |
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326 } |
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327 break; |
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328 } |
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329 |
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330 case 0xf0: // Test register |
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331 dprintf( "Wrote $%02X to $F0\n", (int) data ); |
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332 break; |
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333 |
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334 // Config |
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335 case 0xf1: |
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336 { |
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337 // timers |
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338 for ( int i = 0; i < timer_count; i++ ) |
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339 { |
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340 Timer& t = timer [i]; |
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341 if ( !(data & (1 << i)) ) { |
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342 t.enabled = 0; |
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343 t.next_tick = timer_disabled_time; |
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344 } |
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345 else if ( !t.enabled ) { |
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346 // just enabled |
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347 t.enabled = 1; |
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348 t.counter = 0; |
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349 t.count = 0; |
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350 t.next_tick = time(); |
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351 } |
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352 } |
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353 |
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354 // port clears |
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355 if ( data & 0x10 ) { |
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356 ram [0xf4] = 0; |
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357 ram [0xf5] = 0; |
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358 } |
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359 if ( data & 0x20 ) { |
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360 ram [0xf6] = 0; |
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361 ram [0xf7] = 0; |
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362 } |
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363 |
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364 enable_rom( data & 0x80 ); |
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365 |
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366 break; |
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367 } |
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368 |
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369 // Ports |
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370 case 0xf4: |
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371 case 0xf5: |
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372 case 0xf6: |
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373 case 0xf7: |
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374 // to do: handle output ports |
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375 break; |
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376 |
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377 //case 0xf8: // verified on SNES that these are read/write (RAM) |
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378 //case 0xf9: |
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379 |
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380 // Timers |
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381 case 0xfa: |
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382 case 0xfb: |
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383 case 0xfc: { |
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384 Timer& t = timer [addr - 0xfa]; |
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385 if ( (t.period & 0xff) != data ) { |
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386 t.run_until( time() ); |
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387 t.period = data ? data : 0x100; |
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388 } |
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389 break; |
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390 } |
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391 |
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392 // Counters (cleared on write) |
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393 case 0xfd: |
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394 case 0xfe: |
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395 case 0xff: |
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396 dprintf( "Wrote to counter $%02X\n", (int) addr ); |
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397 timer [addr - 0xfd].counter = 0; |
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398 break; |
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399 } |
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400 } |
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401 |
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402 // Play |
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403 |
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404 blargg_err_t Snes_Spc::skip( long count ) |
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405 { |
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406 if ( count > 4 * 32000L ) |
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407 { |
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408 // don't run DSP for long durations (2-3 times faster) |
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409 |
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410 const long sync_count = 32000L * 2; |
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411 |
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412 // keep track of any keys pressed/released (and not subsequently released) |
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413 keys_pressed = 0; |
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414 keys_released = 0; |
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415 // sentinel tells play to ignore DSP |
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416 BLARGG_RETURN_ERR( play( count - sync_count, skip_sentinel ) ); |
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417 |
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418 // press/release keys now |
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419 dsp.write( 0x5C, keys_released & ~keys_pressed ); |
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420 dsp.write( 0x4C, keys_pressed ); |
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421 |
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422 clear_echo(); |
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423 |
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424 // play the last few seconds normally to help synchronize DSP |
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425 count = sync_count; |
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426 } |
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427 |
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428 return play( count ); |
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429 } |
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430 |
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431 blargg_err_t Snes_Spc::play( long count, sample_t* out ) |
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432 { |
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433 require( count % 2 == 0 ); // output is always in pairs of samples |
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434 |
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435 // CPU time() runs from -duration to 0 |
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436 spc_time_t duration = (count / 2) * clocks_per_sample; |
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437 |
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438 // DSP output is made on-the-fly when the CPU reads/writes DSP registers |
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439 sample_buf = out; |
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440 buf_end = out + (out && out != skip_sentinel ? count : 0); |
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441 next_dsp = (out == skip_sentinel) ? clocks_per_sample : -duration + clocks_per_sample; |
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442 |
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443 // Localize timer next_tick times and run them to the present to prevent a running |
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444 // but ignored timer's next_tick from getting too far behind and overflowing. |
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445 for ( int i = 0; i < timer_count; i++ ) |
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446 { |
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447 Timer& t = timer [i]; |
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448 if ( t.enabled ) |
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449 { |
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450 t.next_tick -= duration; |
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451 t.run_until( -duration ); |
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452 } |
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453 } |
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454 |
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455 // Run CPU for duration, reduced by any extra cycles from previous run |
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456 int elapsed = cpu.run( duration - extra_cycles ); |
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457 if ( elapsed > 0 ) |
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458 { |
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459 dprintf( "Unhandled instruction $%02X, pc = $%04X\n", |
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460 (int) cpu.read( cpu.r.pc ), (unsigned) cpu.r.pc ); |
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461 return "Emulation error"; |
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462 } |
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463 extra_cycles = -elapsed; |
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464 |
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465 // Catch DSP up to present. |
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466 run_dsp( 0 ); |
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467 if ( out ) { |
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468 assert( next_dsp == clocks_per_sample ); |
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469 assert( out == skip_sentinel || sample_buf - out == count ); |
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470 } |
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471 buf_end = NULL; |
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472 |
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473 return blargg_success; |
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474 } |
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475 |