Mercurial > audlegacy-plugins
annotate src/sexypsf/PsxBios.c @ 2128:feb0e916f8bc
adapted SexyPSF timeout to the method nenolod introduced in UPSE
author | mf0102 <0102@gmx.at> |
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date | Wed, 24 Oct 2007 15:46:20 +0200 |
parents | 3da1b8942b8b |
children | a8471cee0697 |
rev | line source |
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0
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1 /* Pcsx - Pc Psx Emulator |
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2 * Copyright (C) 1999-2002 Pcsx Team |
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3 * |
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4 * This program is free software; you can redistribute it and/or modify |
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5 * it under the terms of the GNU General Public License as published by |
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6 * the Free Software Foundation; either version 2 of the License, or |
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7 * (at your option) any later version. |
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8 * |
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9 * This program is distributed in the hope that it will be useful, |
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10 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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12 * GNU General Public License for more details. |
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13 * |
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14 * You should have received a copy of the GNU General Public License |
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15 * along with this program; if not, write to the Free Software |
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16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
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17 */ |
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18 |
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19 #include <stdlib.h> |
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20 #include <stdio.h> |
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21 #include <string.h> |
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22 #include <stdarg.h> |
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23 #include <ctype.h> |
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24 |
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25 #include "PsxCommon.h" |
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26 //We try to emulate bios :) HELP US :P |
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27 |
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28 #ifdef NONONO |
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29 char *biosA0n[256] = { |
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30 // 0x00 |
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31 "open", "lseek", "read", "write", |
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32 "close", "ioctl", "exit", "sys_a0_07", |
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33 "getc", "putc", "todigit", "atof", |
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34 "strtoul", "strtol", "abs", "labs", |
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35 // 0x10 |
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36 "atoi", "atol", "atob", "setjmp", |
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37 "longjmp", "strcat", "strncat", "strcmp", |
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38 "strncmp", "strcpy", "strncpy", "strlen", |
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39 "index", "rindex", "strchr", "strrchr", |
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40 // 0x20 |
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41 "strpbrk", "strspn", "strcspn", "strtok", |
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42 "strstr", "toupper", "tolower", "bcopy", |
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43 "bzero", "bcmp", "memcpy", "memset", |
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44 "memmove", "memcmp", "memchr", "rand", |
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45 // 0x30 |
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46 "srand", "qsort", "strtod", "malloc", |
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47 "free", "lsearch", "bsearch", "calloc", |
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48 "realloc", "InitHeap", "_exit", "getchar", |
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49 "putchar", "gets", "puts", "printf", |
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50 // 0x40 |
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51 "sys_a0_40", "LoadTest", "Load", "Exec", |
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52 "FlushCache", "InstallInterruptHandler", "GPU_dw", "mem2vram", |
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53 "SendGPUStatus", "GPU_cw", "GPU_cwb", "SendPackets", |
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54 "sys_a0_4c", "GetGPUStatus", "GPU_sync", "sys_a0_4f", |
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55 // 0x50 |
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56 "sys_a0_50", "LoadExec", "GetSysSp", "sys_a0_53", |
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57 "_96_init()", "_bu_init()", "_96_remove()", "sys_a0_57", |
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58 "sys_a0_58", "sys_a0_59", "sys_a0_5a", "dev_tty_init", |
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59 "dev_tty_open", "sys_a0_5d", "dev_tty_ioctl","dev_cd_open", |
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60 // 0x60 |
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61 "dev_cd_read", "dev_cd_close", "dev_cd_firstfile", "dev_cd_nextfile", |
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62 "dev_cd_chdir", "dev_card_open", "dev_card_read", "dev_card_write", |
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63 "dev_card_close", "dev_card_firstfile", "dev_card_nextfile","dev_card_erase", |
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64 "dev_card_undelete","dev_card_format", "dev_card_rename", "dev_card_6f", |
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65 // 0x70 |
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66 "_bu_init", "_96_init", "_96_remove", "sys_a0_73", |
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67 "sys_a0_74", "sys_a0_75", "sys_a0_76", "sys_a0_77", |
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68 "_96_CdSeekL", "sys_a0_79", "sys_a0_7a", "sys_a0_7b", |
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69 "_96_CdGetStatus", "sys_a0_7d", "_96_CdRead", "sys_a0_7f", |
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70 // 0x80 |
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71 "sys_a0_80", "sys_a0_81", "sys_a0_82", "sys_a0_83", |
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72 "sys_a0_84", "_96_CdStop", "sys_a0_86", "sys_a0_87", |
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73 "sys_a0_88", "sys_a0_89", "sys_a0_8a", "sys_a0_8b", |
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74 "sys_a0_8c", "sys_a0_8d", "sys_a0_8e", "sys_a0_8f", |
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75 // 0x90 |
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76 "sys_a0_90", "sys_a0_91", "sys_a0_92", "sys_a0_93", |
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77 "sys_a0_94", "sys_a0_95", "AddCDROMDevice", "AddMemCardDevide", |
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78 "DisableKernelIORedirection", "EnableKernelIORedirection", "sys_a0_9a", "sys_a0_9b", |
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79 "SetConf", "GetConf", "sys_a0_9e", "SetMem", |
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80 // 0xa0 |
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81 "_boot", "SystemError", "EnqueueCdIntr", "DequeueCdIntr", |
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82 "sys_a0_a4", "ReadSector", "get_cd_status", "bufs_cb_0", |
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83 "bufs_cb_1", "bufs_cb_2", "bufs_cb_3", "_card_info", |
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84 "_card_load", "_card_auto", "bufs_cd_4", "sys_a0_af", |
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85 // 0xb0 |
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86 "sys_a0_b0", "sys_a0_b1", "do_a_long_jmp", "sys_a0_b3", |
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87 "?? sub_function", |
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88 }; |
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89 |
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90 char *biosB0n[256] = { |
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91 // 0x00 |
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92 "SysMalloc", "sys_b0_01", "sys_b0_02", "sys_b0_03", |
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93 "sys_b0_04", "sys_b0_05", "sys_b0_06", "DeliverEvent", |
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94 "OpenEvent", "CloseEvent", "WaitEvent", "TestEvent", |
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95 "EnableEvent", "DisableEvent", "OpenTh", "CloseTh", |
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96 // 0x10 |
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97 "ChangeTh", "sys_b0_11", "InitPAD", "StartPAD", |
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98 "StopPAD", "PAD_init", "PAD_dr", "ReturnFromExecption", |
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99 "ResetEntryInt", "HookEntryInt", "sys_b0_1a", "sys_b0_1b", |
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100 "sys_b0_1c", "sys_b0_1d", "sys_b0_1e", "sys_b0_1f", |
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101 // 0x20 |
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102 "UnDeliverEvent", "sys_b0_21", "sys_b0_22", "sys_b0_23", |
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103 "sys_b0_24", "sys_b0_25", "sys_b0_26", "sys_b0_27", |
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104 "sys_b0_28", "sys_b0_29", "sys_b0_2a", "sys_b0_2b", |
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105 "sys_b0_2c", "sys_b0_2d", "sys_b0_2e", "sys_b0_2f", |
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106 // 0x30 |
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107 "sys_b0_30", "sys_b0_31", "open", "lseek", |
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108 "read", "write", "close", "ioctl", |
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109 "exit", "sys_b0_39", "getc", "putc", |
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110 "getchar", "putchar", "gets", "puts", |
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111 // 0x40 |
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112 "cd", "format", "firstfile", "nextfile", |
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113 "rename", "delete", "undelete", "AddDevice", |
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114 "RemoteDevice", "PrintInstalledDevices", "InitCARD", "StartCARD", |
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115 "StopCARD", "sys_b0_4d", "_card_write", "_card_read", |
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116 // 0x50 |
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117 "_new_card", "Krom2RawAdd", "sys_b0_52", "sys_b0_53", |
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118 "_get_errno", "_get_error", "GetC0Table", "GetB0Table", |
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119 "_card_chan", "sys_b0_59", "sys_b0_5a", "ChangeClearPAD", |
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120 "_card_status", "_card_wait", |
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121 }; |
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122 |
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123 char *biosC0n[256] = { |
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124 // 0x00 |
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125 "InitRCnt", "InitException", "SysEnqIntRP", "SysDeqIntRP", |
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126 "get_free_EvCB_slot", "get_free_TCB_slot", "ExceptionHandler", "InstallExeptionHandler", |
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127 "SysInitMemory", "SysInitKMem", "ChangeClearRCnt", "SystemError", |
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128 "InitDefInt", "sys_c0_0d", "sys_c0_0e", "sys_c0_0f", |
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129 // 0x10 |
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130 "sys_c0_10", "sys_c0_11", "InstallDevices", "FlushStfInOutPut", |
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131 "sys_c0_14", "_cdevinput", "_cdevscan", "_circgetc", |
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132 "_circputc", "ioabort", "sys_c0_1a", "KernelRedirect", |
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133 "PatchAOTable", |
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134 }; |
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135 #endif |
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136 |
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137 //#define r0 (psxRegs.GPR.n.r0) |
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138 #define at (psxRegs.GPR.n.at) |
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139 #define v0 (psxRegs.GPR.n.v0) |
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140 #define v1 (psxRegs.GPR.n.v1) |
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141 #define a0 (psxRegs.GPR.n.a0) |
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142 #define a1 (psxRegs.GPR.n.a1) |
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143 #define a2 (psxRegs.GPR.n.a2) |
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144 #define a3 (psxRegs.GPR.n.a3) |
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145 #define t0 (psxRegs.GPR.n.t0) |
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146 #define t1 (psxRegs.GPR.n.t1) |
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147 #define t2 (psxRegs.GPR.n.t2) |
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148 #define t3 (psxRegs.GPR.n.t3) |
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149 #define t4 (psxRegs.GPR.n.t4) |
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150 #define t5 (psxRegs.GPR.n.t5) |
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151 #define t6 (psxRegs.GPR.n.t6) |
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152 #define t7 (psxRegs.GPR.n.t7) |
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153 #define s0 (psxRegs.GPR.n.s0) |
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154 #define s1 (psxRegs.GPR.n.s1) |
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155 #define s2 (psxRegs.GPR.n.s2) |
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156 #define s3 (psxRegs.GPR.n.s3) |
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157 #define s4 (psxRegs.GPR.n.s4) |
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158 #define s5 (psxRegs.GPR.n.s5) |
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159 #define s6 (psxRegs.GPR.n.s6) |
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160 #define s7 (psxRegs.GPR.n.s7) |
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161 #define t8 (psxRegs.GPR.n.t6) |
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162 #define t9 (psxRegs.GPR.n.t7) |
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163 #define k0 (psxRegs.GPR.n.k0) |
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164 #define k1 (psxRegs.GPR.n.k1) |
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165 #define gp (psxRegs.GPR.n.gp) |
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166 #define sp (psxRegs.GPR.n.sp) |
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167 #define fp (psxRegs.GPR.n.s8) |
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168 #define ra (psxRegs.GPR.n.ra) |
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169 #define pc0 (psxRegs.pc) |
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170 |
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171 #define Ra0 ((char*)PSXM(a0)) |
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172 #define Ra1 ((char*)PSXM(a1)) |
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173 #define Ra2 ((char*)PSXM(a2)) |
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174 #define Ra3 ((char*)PSXM(a3)) |
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175 #define Rv0 ((char*)PSXM(v0)) |
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176 #define Rsp ((char*)PSXM(sp)) |
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177 |
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178 |
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179 typedef struct _malloc_chunk { |
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180 u32 stat; |
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181 u32 size; |
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182 u32 fd; |
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183 u32 bk; |
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184 } PACKSTRUCT malloc_chunk; |
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185 |
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186 #define INUSE 0x1 |
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187 |
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188 typedef struct { |
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189 u32 desc; |
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190 s32 status; |
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191 s32 mode; |
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192 u32 fhandler; |
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193 } PACKSTRUCT EvCB[32]; |
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194 |
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195 #define EvStUNUSED 0x0000 |
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196 #define EvStWAIT 0x1000 |
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197 #define EvStACTIVE 0x2000 |
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198 #define EvStALREADY 0x4000 |
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199 |
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200 #define EvMdINTR 0x1000 |
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201 #define EvMdNOINTR 0x2000 |
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202 |
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203 typedef struct { |
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204 s32 status; |
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205 s32 mode; |
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206 u32 reg[32]; |
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207 u32 func; |
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208 } PACKSTRUCT TCB; |
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209 |
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210 static u32 *jmp_int; |
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211 |
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212 static u32 regs[35]; |
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213 static EvCB *Event; |
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214 |
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215 //static EvCB *HwEV; // 0xf0 |
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216 //static EvCB *EvEV; // 0xf1 |
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217 static EvCB *RcEV; // 0xf2 |
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218 //static EvCB *UeEV; // 0xf3 |
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219 //static EvCB *SwEV; // 0xf4 |
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220 //static EvCB *ThEV; // 0xff |
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221 |
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222 static u32 heap_addr; |
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223 static u32 SysIntRP[8]; |
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224 static TCB Thread[8]; |
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225 static int CurThread; |
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226 |
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227 static INLINE void softCall(u32 pc) { |
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228 pc0 = pc; |
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229 ra = 0x80001000; |
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230 while (pc0 != 0x80001000) psxCpu->ExecuteBlock(); |
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231 } |
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232 |
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233 static INLINE void softCall2(u32 pc) { |
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234 u32 sra = ra; |
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235 pc0 = pc; |
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236 ra = 0x80001000; |
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237 while (pc0 != 0x80001000) psxCpu->ExecuteBlock(); |
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238 ra = sra; |
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239 } |
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240 |
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241 static INLINE void DeliverEvent(u32 ev, u32 spec) { |
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242 if (Event[ev][spec].status != BFLIP32S(EvStACTIVE)) return; |
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243 |
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244 // Event[ev][spec].status = BFLIP32S(EvStALREADY); |
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245 if (Event[ev][spec].mode == BFLIP32S(EvMdINTR)) { |
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246 softCall2(BFLIP32S(Event[ev][spec].fhandler)); |
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247 } else Event[ev][spec].status = BFLIP32S(EvStALREADY); |
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248 } |
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249 |
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250 /* * |
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251 // * |
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252 // * |
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253 // System calls A0 */ |
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254 |
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255 /* Abs and labs do the same thing? */ |
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256 |
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257 static void bios_abs() { // 0x0e |
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258 if((s32)a0 < 0) v0=0-(s32)a0; |
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259 else v0=a0; |
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260 //v0 = abs(a0); |
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261 pc0 = ra; |
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262 } |
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263 |
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264 static void bios_labs() { // 0x0f |
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265 if((s32)a0 < 0) v0=0-(s32)a0; |
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266 else v0=a0; |
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267 //v0 = labs(a0); |
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268 pc0 = ra; |
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269 } |
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270 |
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271 static void bios_atoi() { // 0x10 |
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272 v0 = atoi((char *)Ra0); |
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273 pc0 = ra; |
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274 } |
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275 |
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276 static void bios_atol() { // 0x11 |
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277 v0 = atoi((char *)Ra0); |
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278 pc0 = ra; |
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279 } |
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280 |
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281 static void bios_setjmp() { // 13 |
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282 u32 *jmp_buf= (u32*)Ra0; |
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283 int i; |
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284 |
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285 jmp_buf[0] = BFLIP32(ra); |
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286 jmp_buf[1] = BFLIP32(sp); |
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287 jmp_buf[2] = BFLIP32(fp); |
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288 for (i=0; i<8; i++) // s0-s7 |
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289 jmp_buf[3+i] = BFLIP32(psxRegs.GPR.r[16+i]); |
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290 jmp_buf[11] = BFLIP32(gp); |
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291 |
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292 v0 = 0; pc0 = ra; |
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293 } |
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294 |
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295 static void bios_longjmp() { //14 |
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296 u32 *jmp_buf= (u32*)Ra0; |
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297 int i; |
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298 |
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299 ra = BFLIP32(jmp_buf[0]); /* ra */ |
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300 sp = BFLIP32(jmp_buf[1]); /* sp */ |
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301 fp = BFLIP32(jmp_buf[2]); /* fp */ |
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302 for (i=0; i<8; i++) // s0-s7 |
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303 psxRegs.GPR.r[16+i] = BFLIP32(jmp_buf[3+i]); |
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304 gp = BFLIP32(jmp_buf[11]); /* gp */ |
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305 |
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306 v0 = a1; pc0 = ra; |
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307 } |
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308 |
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309 static void bios_strcat() { // 0x15 |
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310 u32 dest,src; |
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311 |
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312 dest=a0; |
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313 src=a1; |
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314 |
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315 while(PSXMu8(dest) != 0) dest++; /* Move to end of first string. */ |
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316 while(PSXMu8(src) != 0) |
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317 { |
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318 if(PSXM(dest) && PSXM(src)) |
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319 PSXMu8(dest)=PSXMu8(src); |
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320 src++; |
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321 dest++; |
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322 } |
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323 PSXMu8(dest) = 0; /* Append null character. */ |
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324 //strcat(Ra0, Ra1); |
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325 |
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326 v0 = a0; |
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327 pc0 = ra; |
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328 } |
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329 |
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330 /*0x16*/ |
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331 static void bios_strncat() |
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332 { |
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333 u32 dest,src,count; |
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334 |
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335 dest=a0; |
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336 src=a1; |
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337 count=a2; |
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338 |
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339 while(PSXMu8(dest) != 0) dest++; /* Move to end of first string. */ |
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340 while(PSXMu8(src) != 0 && count) |
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341 { |
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342 if(PSXM(dest) && PSXM(src)) |
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343 PSXMu8(dest)=PSXMu8(src); |
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344 src++; |
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345 dest++; |
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346 count--; |
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347 } |
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348 PSXMu8(dest) = 0; /* Append null character. */ |
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349 |
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350 //strncat(Ra0, Ra1, a2); |
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351 v0 = a0; |
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352 pc0 = ra; |
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353 } |
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354 |
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355 static void bios_strcmp() { // 0x17 |
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356 v0 = strcmp(Ra0, Ra1); |
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357 pc0 = ra; |
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358 } |
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359 |
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360 static void bios_strncmp() { // 0x18 |
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361 u32 max=a2; |
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362 u32 string1=a0; |
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363 u32 string2=a1; |
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364 s8 tmpv=0; |
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365 |
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366 while(max>0) |
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367 { |
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368 u8 tmp1=PSXMuR8(string1); |
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369 u8 tmp2=PSXMuR8(string2); |
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370 |
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371 if(!tmp1 || !tmp2) break; |
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372 |
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373 tmpv=tmp1-tmp2; |
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374 if(tmpv) break; |
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375 if(!tmp1 || !tmp2) break; |
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376 if(!PSXM(string1) || !PSXM(string2)) break; |
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377 max--; |
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378 string1++; |
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379 string2++; |
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380 } |
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381 if(tmpv>0) v0=1; |
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382 else if(tmpv<0) v0=-1; |
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383 else v0=0; |
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384 //printf("%s:%s, %d, %d\n",Ra0,Ra1,a2,v0); |
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385 //v0 = strncmp(Ra0, Ra1, a2); |
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386 pc0 = ra; |
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387 } |
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388 |
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389 /*0x19*/ |
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390 static void bios_strcpy() |
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391 { |
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392 u32 src=a1,dest=a0; |
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393 u8 val; |
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394 |
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395 do |
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396 { |
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397 val=PSXMu8(src); |
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398 PSXMu8(dest)=val; |
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399 src++; |
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400 dest++; |
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401 } while(val); |
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402 //strcpy(Ra0, Ra1); |
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403 v0 = a0; |
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404 pc0 = ra; |
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405 } |
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406 /*0x1a*/ |
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407 static void bios_strncpy() |
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408 { |
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409 u32 src=a1,dest=a0,max=a2; |
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410 u8 val; |
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411 |
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412 do |
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413 { |
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414 val=PSXMu8(src); |
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415 PSXMu8(dest)=val; |
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416 src++; |
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417 dest++; |
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418 max--; |
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419 } while(val && max); |
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420 |
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421 //strncpy(Ra0, Ra1, a2); |
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422 v0 = a0; |
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423 pc0 = ra; |
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424 } |
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425 |
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426 /*0x1b*/ |
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427 static void bios_strlen() |
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428 { |
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429 u32 src=a0; |
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430 |
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431 while(PSXMu8(src)) src++; |
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432 |
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433 v0 = src-a0; |
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434 pc0 = ra; |
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435 } |
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436 |
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437 static void bios_index() { // 0x1c |
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438 char *pcA0 = (char *)Ra0; |
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439 char *pcRet = strchr(pcA0, a1); |
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440 if(pcRet) |
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441 v0 = a0 + pcRet - pcA0; |
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442 else |
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443 v0 = 0; |
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444 pc0 = ra; |
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445 } |
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446 |
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447 static void bios_rindex() { // 0x1d |
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448 char *pcA0 = (char *)Ra0; |
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449 char *pcRet = strrchr(pcA0, a1); |
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450 if(pcRet) |
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451 v0 = a0 + pcRet - pcA0; |
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452 else |
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453 v0 = 0; |
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454 pc0 = ra; |
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455 } |
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456 |
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457 static void bios_strchr() { // 0x1e |
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458 char *pcA0 = (char *)Ra0; |
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459 char *pcRet = strchr(pcA0, a1); |
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460 if(pcRet) |
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461 v0 = a0 + pcRet - pcA0; |
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462 else |
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463 v0 = 0; |
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464 pc0 = ra; |
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465 } |
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466 |
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467 static void bios_strrchr() { // 0x1f |
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468 char *pcA0 = (char *)Ra0; |
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469 char *pcRet = strrchr(pcA0, a1); |
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470 if(pcRet) |
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471 v0 = a0 + pcRet - pcA0; |
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472 else |
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473 v0 = 0; |
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474 pc0 = ra; |
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475 } |
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476 |
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477 static void bios_strpbrk() { // 0x20 |
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478 char *pcA0 = (char *)Ra0; |
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479 char *pcRet = strpbrk(pcA0, (char *)Ra1); |
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480 if(pcRet) |
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481 v0 = a0 + pcRet - pcA0; |
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482 else |
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483 v0 = 0; |
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484 pc0 = ra; |
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485 } |
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486 |
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487 static void bios_strspn() { v0 = strspn ((char *)Ra0, (char *)Ra1); pc0 = ra;}/*21*/ |
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488 static void bios_strcspn() { v0 = strcspn((char *)Ra0, (char *)Ra1); pc0 = ra;}/*22*/ |
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489 |
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490 #ifdef MOO |
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491 static void bios_strtok() { // 0x23 |
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492 char *pcA0 = (char *)Ra0; |
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493 char *pcRet = strtok(pcA0, (char *)Ra1); |
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494 if(pcRet) |
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495 v0 = a0 + pcRet - pcA0; |
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496 else |
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497 v0 = 0; |
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498 pc0 = ra; |
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499 } |
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500 #endif |
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501 |
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502 static void bios_strstr() { // 0x24 |
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503 char *pcA0 = (char *)Ra0; |
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504 char *pcRet = strstr(pcA0, (char *)Ra1); |
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505 if(pcRet) |
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506 v0 = a0 + pcRet - pcA0; |
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507 else |
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508 v0 = 0; |
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509 pc0 = ra; |
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510 } |
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511 |
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512 /*0x25*/ |
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513 static void bios_toupper() {v0 = toupper(a0); pc0 = ra;} |
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514 |
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515 /*0x26*/ |
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516 static void bios_tolower() {v0 = tolower(a0); pc0 = ra;} |
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517 |
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518 /*0x27*/ |
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519 static void bios_bcopy() |
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520 { |
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521 u32 dest=a1, src=a0, len=a2; |
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522 |
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523 while(len--) |
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524 { |
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525 PSXMu8(dest)=PSXMu8(src); |
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526 dest++; |
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527 src++; |
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528 } |
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529 //memcpy(Ra1,Ra0,a2); |
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530 pc0=ra; |
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531 } |
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532 |
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533 /*0x28*/ |
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534 static void bios_bzero() |
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535 { |
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536 u32 dest=a0, len=a1; |
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537 |
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538 while(len--) |
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539 { |
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540 PSXMu8(dest)=0; |
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541 dest++; |
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542 } |
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543 |
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544 //memset(Ra0,0,a1); |
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545 pc0=ra; |
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546 } |
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547 |
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548 /*0x29*/ |
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549 static void bios_bcmp() {v0 = memcmp(Ra0,Ra1,a2); pc0=ra; } |
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550 |
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551 /*0x2a*/ |
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552 static void bios_memcpy() |
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553 { |
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554 u32 dest=a0, src=a1, len=a2; |
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555 |
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556 while(len--) |
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557 { |
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558 PSXMu8(dest)=PSXMu8(src); |
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559 dest++; |
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560 src++; |
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561 } |
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562 //memcpy(Ra0, Ra1, a2); |
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563 v0 = a0; |
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564 pc0 = ra; |
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565 } |
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566 |
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567 static void bios_memset() /*0x2b*/ |
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568 { |
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569 u32 len=a2; |
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570 u32 dest=a0; |
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571 |
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572 while(len--) |
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573 { |
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574 if(PSXM(dest)) PSXMu8(dest)=a1; |
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575 dest++; |
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576 } |
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577 //memset(Ra0, a1, a2); |
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578 v0 = a0; |
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579 pc0 = ra; |
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580 } |
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581 |
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582 #ifdef MOO |
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583 /*0x2c*/void bios_memmove() {memmove(Ra0, Ra1, a2); v0 = a0; pc0 = ra;} |
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584 #endif |
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585 |
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586 /*0x2d*/ |
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587 static void bios_memcmp() |
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588 { |
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589 v0 = memcmp(Ra0, Ra1, a2); |
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590 pc0 = ra; |
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591 } |
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592 |
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593 static void bios_memchr() { // 2e |
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594 void *ret = memchr(Ra0, a1, a2); |
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595 if (ret != NULL) v0 = (u32)((char*)ret - Ra0) + a0; |
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596 else v0 = 0; |
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597 pc0 = ra; |
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598 } |
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599 |
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600 static void bios_rand() { // 2f |
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601 v0 = 1+(int) (32767.0*rand()/(RAND_MAX+1.0)); |
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602 pc0 = ra; |
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603 } |
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604 |
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605 static void bios_srand() { // 30 |
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606 srand(a0); pc0 = ra; |
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607 } |
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|
608 |
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609 static void bios_malloc() { // 33 |
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610 u32 chunk; |
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611 u32 fd; |
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612 |
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613 /* a0: Number of bytes to allocate. */ |
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614 |
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615 chunk = heap_addr; |
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616 |
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617 /* Search for first chunk that's large enough and not currently |
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618 being used. |
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619 */ |
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620 while( (a0 > BFLIP32(((malloc_chunk*)PSXM(chunk)) ->size)) || |
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621 (BFLIP32( ((malloc_chunk*)PSXM(chunk))->stat ) == INUSE) |
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622 ) |
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623 chunk=((malloc_chunk*)PSXM(chunk)) -> fd; |
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624 //printf("%08x\n",chunk); |
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625 |
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626 /* split free chunk */ |
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627 fd = chunk + sizeof(malloc_chunk) + a0; |
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628 ((malloc_chunk*)PSXM(fd))->stat = ((malloc_chunk*)PSXM(chunk))->stat; |
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629 ((malloc_chunk*)PSXM(fd))->size = BFLIP32(BFLIP32(((malloc_chunk*)PSXM(chunk))->size) - a0); |
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630 ((malloc_chunk*)PSXM(fd))->fd = ((malloc_chunk*)PSXM(chunk))->fd; |
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631 ((malloc_chunk*)PSXM(fd))->bk = chunk; |
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632 |
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633 /* set new chunk */ |
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634 ((malloc_chunk*)PSXM(chunk))->stat = BFLIP32(INUSE); |
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635 ((malloc_chunk*)PSXM(chunk))->size = BFLIP32(a0); |
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636 ((malloc_chunk*)PSXM(chunk))->fd = fd; |
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637 |
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638 v0 = chunk + sizeof(malloc_chunk); |
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639 v0|= 0x80000000; |
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640 // printf ("malloc %lx,%lx\n", v0, a0); |
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641 pc0 = ra; |
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642 } |
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643 |
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644 static void bios_InitHeap() { // 39 |
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645 malloc_chunk *chunk; |
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646 |
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647 heap_addr = a0; // Ra0 |
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648 |
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649 chunk = (malloc_chunk *)PSXM(heap_addr); |
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650 chunk->stat = 0; |
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651 if (((a0 & 0x1fffff) + a1)>= 0x200000) |
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652 chunk->size = BFLIP32(0x1ffffc - (a0 & 0x1fffff)); |
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653 else chunk->size = BFLIP32(a1); |
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654 chunk->fd = 0; |
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655 chunk->bk = 0; |
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656 |
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657 pc0 = ra; |
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658 } |
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659 |
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660 static void bios_FlushCache() { // 44 |
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661 |
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662 pc0 = ra; |
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663 } |
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664 |
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665 static void bios__bu_init() { // 70 |
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666 |
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667 DeliverEvent(0x11, 0x2); // 0xf0000011, 0x0004 |
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668 DeliverEvent(0x81, 0x2); // 0xf4000001, 0x0004 |
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669 |
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670 pc0 = ra; |
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671 } |
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672 |
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673 static void bios__96_init() { // 71 |
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674 |
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675 pc0 = ra; |
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676 } |
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677 |
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678 static void bios__96_remove() { // 72 |
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679 |
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680 pc0 = ra; |
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681 } |
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682 |
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683 /* System calls B0 */ |
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684 |
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685 static void bios_SetRCnt() { // 02 |
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686 |
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687 a0&= 0x3; |
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688 if (a0 != 3) { |
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689 u32 mode=0; |
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690 |
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691 psxRcntWtarget(a0, a1); |
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692 if (a2&0x1000) mode|= 0x050; // Interrupt Mode |
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693 if (a2&0x0100) mode|= 0x008; // Count to 0xffff |
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694 if (a2&0x0010) mode|= 0x001; // Timer stop mode |
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695 if (a0 == 2) { if (a2&0x0001) mode|= 0x200; } // System Clock mode |
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696 else { if (a2&0x0001) mode|= 0x100; } // System Clock mode |
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697 |
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698 psxRcntWmode(a0, mode); |
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699 } |
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700 pc0 = ra; |
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701 } |
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702 |
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703 static void bios_GetRCnt() { // 03 |
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704 |
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705 a0&= 0x3; |
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706 if (a0 != 3) v0 = psxRcntRcount(a0); |
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707 else v0 = 0; |
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708 pc0 = ra; |
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709 } |
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710 |
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711 static void bios_StartRCnt() { // 04 |
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712 |
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713 a0&= 0x3; |
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714 if (a0 != 3) psxHu32(0x1074)|= BFLIP32(1<<(a0+4)); |
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715 else psxHu32(0x1074)|= BFLIP32(0x1); |
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716 v0 = 1; pc0 = ra; |
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717 } |
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|
718 |
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719 static void bios_StopRCnt() { // 05 |
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|
720 |
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721 a0&= 0x3; |
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722 if (a0 != 3) psxHu32(0x1074)&= BFLIP32(~(1<<(a0+4))); |
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723 else psxHu32(0x1074)&= BFLIP32(~0x1); |
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724 pc0 = ra; |
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725 } |
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726 |
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727 static void bios_ResetRCnt() { // 06 |
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728 |
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729 a0&= 0x3; |
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730 if (a0 != 3) { |
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731 psxRcntWmode(a0, 0); |
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732 psxRcntWtarget(a0, 0); |
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733 psxRcntWcount(a0, 0); |
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734 } |
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735 pc0 = ra; |
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736 } |
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737 |
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|
738 |
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739 /* gets ev for use with Event */ |
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740 #define GetEv() \ |
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741 ev = (a0 >> 24) & 0xf; \ |
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742 if (ev == 0xf) ev = 0x5; \ |
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743 ev*= 32; \ |
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744 ev+= a0&0x1f; |
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|
745 |
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746 /* gets spec for use with Event */ |
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747 #define GetSpec() \ |
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748 spec = 0; \ |
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749 switch (a1) { \ |
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750 case 0x0301: spec = 16; break; \ |
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751 case 0x0302: spec = 17; break; \ |
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752 default: \ |
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753 for (i=0; i<16; i++) if (a1 & (1 << i)) { spec = i; break; } \ |
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754 break; \ |
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755 } |
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|
756 |
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757 static void bios_DeliverEvent() { // 07 |
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758 int ev, spec; |
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759 int i; |
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|
760 |
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761 GetEv(); |
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762 GetSpec(); |
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|
763 |
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|
764 DeliverEvent(ev, spec); |
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|
765 |
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|
766 pc0 = ra; |
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|
767 } |
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|
768 |
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769 static void bios_OpenEvent() { // 08 |
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|
770 int ev, spec; |
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771 int i; |
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|
772 |
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773 GetEv(); |
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774 GetSpec(); |
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|
775 |
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776 Event[ev][spec].status = BFLIP32S(EvStWAIT); |
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777 Event[ev][spec].mode = BFLIP32(a2); |
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778 Event[ev][spec].fhandler = BFLIP32(a3); |
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|
779 |
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780 v0 = ev | (spec << 8); |
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781 pc0 = ra; |
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|
782 } |
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783 |
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784 static void bios_CloseEvent() { // 09 |
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785 int ev, spec; |
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|
786 |
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787 ev = a0 & 0xff; |
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788 spec = (a0 >> 8) & 0xff; |
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789 |
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790 Event[ev][spec].status = BFLIP32S(EvStUNUSED); |
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791 |
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792 v0 = 1; pc0 = ra; |
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|
793 } |
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|
794 |
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795 static void bios_WaitEvent() { // 0a |
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|
796 int ev, spec; |
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|
797 |
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798 ev = a0 & 0xff; |
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799 spec = (a0 >> 8) & 0xff; |
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800 |
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801 Event[ev][spec].status = BFLIP32S(EvStACTIVE); |
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802 |
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803 v0 = 1; pc0 = ra; |
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804 } |
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805 |
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806 static void bios_TestEvent() { // 0b |
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807 int ev, spec; |
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808 |
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809 ev = a0 & 0xff; |
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810 spec = (a0 >> 8) & 0xff; |
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811 |
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812 if (Event[ev][spec].status == BFLIP32S(EvStALREADY)) { |
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813 Event[ev][spec].status = BFLIP32S(EvStACTIVE); v0 = 1; |
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814 } else v0 = 0; |
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815 |
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816 pc0 = ra; |
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817 } |
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818 |
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819 static void bios_EnableEvent() { // 0c |
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820 int ev, spec; |
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821 |
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822 ev = a0 & 0xff; |
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823 spec = (a0 >> 8) & 0xff; |
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824 |
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825 Event[ev][spec].status = BFLIP32S(EvStACTIVE); |
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826 |
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827 v0 = 1; pc0 = ra; |
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828 } |
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829 |
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830 static void bios_DisableEvent() { // 0d |
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831 int ev, spec; |
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832 |
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833 ev = a0 & 0xff; |
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834 spec = (a0 >> 8) & 0xff; |
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835 |
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836 Event[ev][spec].status = BFLIP32S(EvStWAIT); |
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837 |
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838 v0 = 1; pc0 = ra; |
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839 } |
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840 |
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841 /* |
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842 * long OpenTh(long (*func)(), unsigned long sp, unsigned long gp); |
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843 */ |
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844 |
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845 static void bios_OpenTh() { // 0e |
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846 int th; |
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847 |
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848 for (th=1; th<8; th++) |
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849 if (Thread[th].status == 0) break; |
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850 |
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851 Thread[th].status = BFLIP32(1); |
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852 Thread[th].func = BFLIP32(a0); |
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853 Thread[th].reg[29] = BFLIP32(a1); |
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854 Thread[th].reg[28] = BFLIP32(a2); |
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855 |
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856 v0 = th; pc0 = ra; |
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857 } |
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858 |
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859 /* |
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860 * int CloseTh(long thread); |
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861 */ |
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862 |
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863 static void bios_CloseTh() { // 0f |
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864 int th = a0 & 0xff; |
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865 |
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866 if (Thread[th].status == 0) { |
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867 v0 = 0; |
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868 } else { |
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869 Thread[th].status = 0; |
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870 v0 = 1; |
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871 } |
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872 |
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873 pc0 = ra; |
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874 } |
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875 |
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876 /* |
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877 * int ChangeTh(long thread); |
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878 */ |
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879 |
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880 static void bios_ChangeTh() { // 10 |
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881 int th = a0 & 0xff; |
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882 |
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883 if (Thread[th].status == 0 || CurThread == th) { |
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884 v0 = 0; |
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885 |
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886 pc0 = ra; |
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887 } else { |
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888 v0 = 1; |
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|
889 |
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890 if (Thread[CurThread].status == BFLIP32S(2)) { |
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891 Thread[CurThread].status = BFLIP32S(1); |
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892 Thread[CurThread].func = BFLIP32(ra); |
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893 memcpy(Thread[CurThread].reg, psxRegs.GPR.r, 32*4); |
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894 } |
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|
895 |
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896 memcpy(psxRegs.GPR.r, Thread[th].reg, 32*4); |
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897 pc0 = BFLIP32(Thread[th].func); |
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898 Thread[th].status = BFLIP32(2); |
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899 CurThread = th; |
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900 } |
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|
901 } |
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902 |
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903 static void bios_ReturnFromException() { // 17 |
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904 memcpy(psxRegs.GPR.r, regs, 32*4); |
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905 psxRegs.GPR.n.lo = regs[32]; |
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906 psxRegs.GPR.n.hi = regs[33]; |
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907 |
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908 pc0 = psxRegs.CP0.n.EPC; |
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909 if (psxRegs.CP0.n.Cause & 0x80000000) pc0+=4; |
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910 |
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911 psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status & 0xfffffff0) | |
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912 ((psxRegs.CP0.n.Status & 0x3c) >> 2); |
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913 } |
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914 |
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915 static void bios_ResetEntryInt() { // 18 |
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916 |
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917 jmp_int = NULL; |
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918 pc0 = ra; |
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919 } |
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920 |
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921 static void bios_HookEntryInt() { // 19 |
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|
922 |
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923 jmp_int = (u32*)Ra0; |
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924 pc0 = ra; |
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|
925 } |
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926 |
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927 static void bios_UnDeliverEvent() { // 0x20 |
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928 int ev, spec; |
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929 int i; |
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930 |
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931 GetEv(); |
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932 GetSpec(); |
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|
933 |
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934 if (Event[ev][spec].status == BFLIP32S(EvStALREADY) && |
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935 Event[ev][spec].mode == BFLIP32S(EvMdNOINTR)) |
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936 Event[ev][spec].status = BFLIP32S(EvStACTIVE); |
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937 |
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938 pc0 = ra; |
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939 } |
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940 |
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941 static void bios_GetC0Table() { // 56 |
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942 |
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943 v0 = 0x674; pc0 = ra; |
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944 } |
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945 |
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946 static void bios_GetB0Table() { // 57 |
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947 |
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948 v0 = 0x874; pc0 = ra; |
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949 } |
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950 |
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951 /* System calls C0 */ |
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952 |
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953 /* |
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954 * int SysEnqIntRP(int index , long *queue); |
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955 */ |
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956 |
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957 static void bios_SysEnqIntRP() { // 02 |
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958 |
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959 SysIntRP[a0] = a1; |
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960 |
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961 v0 = 0; pc0 = ra; |
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962 } |
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963 |
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964 /* |
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965 * int SysDeqIntRP(int index , long *queue); |
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966 */ |
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967 |
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968 static void bios_SysDeqIntRP() { // 03 |
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969 |
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970 SysIntRP[a0] = 0; |
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971 |
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972 v0 = 0; pc0 = ra; |
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973 } |
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974 |
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975 static void bios_ChangeClearRCnt() { // 0a |
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976 u32 *ptr; |
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977 |
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978 ptr = (u32*)PSXM((a0 << 2) + 0x8600); |
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979 v0 = BFLIP32(*ptr); |
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980 *ptr = BFLIP32(a1); |
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981 |
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982 // psxRegs.CP0.n.Status|= 0x404; |
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983 pc0 = ra; |
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984 } |
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985 |
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986 static void bios_dummy() { |
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987 pc0 = ra; |
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988 } |
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989 |
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990 void (*biosA0[256])(); |
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991 void (*biosB0[256])(); |
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992 void (*biosC0[256])(); |
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993 |
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994 void psxBiosInit() { |
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995 u32 base, size; |
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996 u32 *ptr; |
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997 int i; |
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998 |
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999 heap_addr=0; |
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1000 CurThread = 0; |
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1001 jmp_int = NULL; |
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1002 |
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1003 for(i = 0; i < 256; i++) { |
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1004 biosA0[i] = NULL; |
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1005 biosB0[i] = NULL; |
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1006 biosC0[i] = NULL; |
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1007 } |
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1008 |
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1009 for(i = 0; i < 256; i++) { |
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1010 if (biosA0[i] == NULL) biosA0[i] = bios_dummy; |
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1011 if (biosB0[i] == NULL) biosB0[i] = bios_dummy; |
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1012 if (biosC0[i] == NULL) biosC0[i] = bios_dummy; |
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1013 } |
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1014 |
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1015 biosA0[0x0e] = bios_abs; |
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1016 biosA0[0x0f] = bios_labs; |
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1017 biosA0[0x10] = bios_atoi; |
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1018 biosA0[0x11] = bios_atol; |
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1019 //biosA0[0x12] = bios_atob; |
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1020 biosA0[0x13] = bios_setjmp; |
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1021 biosA0[0x14] = bios_longjmp; |
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1022 |
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1023 biosA0[0x15] = bios_strcat; |
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1024 biosA0[0x16] = bios_strncat; |
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1025 biosA0[0x17] = bios_strcmp; |
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1026 biosA0[0x18] = bios_strncmp; |
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1027 biosA0[0x19] = bios_strcpy; |
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1028 biosA0[0x1a] = bios_strncpy; |
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1029 biosA0[0x1b] = bios_strlen; |
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1030 biosA0[0x1c] = bios_index; |
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1031 biosA0[0x1d] = bios_rindex; |
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1032 biosA0[0x1e] = bios_strchr; |
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1033 biosA0[0x1f] = bios_strrchr; |
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1034 biosA0[0x20] = bios_strpbrk; |
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1035 biosA0[0x21] = bios_strspn; |
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1036 biosA0[0x22] = bios_strcspn; |
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1037 //biosA0[0x23] = bios_strtok; |
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1038 biosA0[0x24] = bios_strstr; |
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1039 biosA0[0x25] = bios_toupper; |
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1040 biosA0[0x26] = bios_tolower; |
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1041 biosA0[0x27] = bios_bcopy; |
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1042 biosA0[0x28] = bios_bzero; |
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1043 biosA0[0x29] = bios_bcmp; |
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1044 biosA0[0x2a] = bios_memcpy; |
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1045 biosA0[0x2b] = bios_memset; |
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1046 //biosA0[0x2c] = bios_memmove; |
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1047 biosA0[0x2c] = bios_memcpy; /* Our code should be compatible |
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1048 with both memcpy and memmove |
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1049 semantics. */ |
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1050 biosA0[0x2d] = bios_memcmp; |
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1051 biosA0[0x2e] = bios_memchr; |
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1052 |
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1053 biosA0[0x2f] = bios_rand; |
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1054 biosA0[0x30] = bios_srand; |
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1055 |
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1056 //biosA0[0x31] = bios_qsort; |
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1057 //biosA0[0x32] = bios_strtod; |
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1058 biosA0[0x33] = bios_malloc; |
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1059 //biosA0[0x34] = bios_free; |
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1060 //biosA0[0x35] = bios_lsearch; |
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1061 //biosA0[0x36] = bios_bsearch; |
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1062 //biosA0[0x37] = bios_calloc; |
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1063 //biosA0[0x38] = bios_realloc; |
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1064 biosA0[0x39] = bios_InitHeap; |
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1065 //biosA0[0x3a] = bios__exit; |
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1066 biosA0[0x44] = bios_FlushCache; |
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1067 //biosA0[0x45] = bios_InstallInterruptHandler; |
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1068 //biosA0[0x4f] = bios_sys_a0_4f; |
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1069 //biosA0[0x50] = bios_sys_a0_50; |
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1070 biosA0[0x70] = bios__bu_init; |
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1071 biosA0[0x71] = bios__96_init; |
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1072 biosA0[0x72] = bios__96_remove; |
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1073 //biosA0[0x73] = bios_sys_a0_73; |
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1074 //biosA0[0x74] = bios_sys_a0_74; |
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1075 //biosA0[0x75] = bios_sys_a0_75; |
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1076 //biosA0[0x76] = bios_sys_a0_76; |
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1077 //biosA0[0x77] = bios_sys_a0_77; |
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1078 //biosA0[0x78] = bios__96_CdSeekL; |
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1079 //biosA0[0x79] = bios_sys_a0_79; |
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1080 //biosA0[0x7a] = bios_sys_a0_7a; |
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1081 //biosA0[0x7b] = bios_sys_a0_7b; |
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1082 //biosA0[0x7c] = bios__96_CdGetStatus; |
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1083 //biosA0[0x7d] = bios_sys_a0_7d; |
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1084 //biosA0[0x7e] = bios__96_CdRead; |
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1085 //biosA0[0x7f] = bios_sys_a0_7f; |
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1086 //biosA0[0x80] = bios_sys_a0_80; |
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1087 //biosA0[0x81] = bios_sys_a0_81; |
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1088 //biosA0[0x82] = bios_sys_a0_82; |
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1089 //biosA0[0x83] = bios_sys_a0_83; |
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1090 //biosA0[0x84] = bios_sys_a0_84; |
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1091 //biosA0[0x85] = bios__96_CdStop; |
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1092 //biosA0[0x86] = bios_sys_a0_86; |
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1093 //biosA0[0x87] = bios_sys_a0_87; |
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1094 //biosA0[0x88] = bios_sys_a0_88; |
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1095 //biosA0[0x89] = bios_sys_a0_89; |
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1096 //biosA0[0x8a] = bios_sys_a0_8a; |
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1097 //biosA0[0x8b] = bios_sys_a0_8b; |
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1098 //biosA0[0x8c] = bios_sys_a0_8c; |
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1099 //biosA0[0x8d] = bios_sys_a0_8d; |
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1100 //biosA0[0x8e] = bios_sys_a0_8e; |
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1101 //biosA0[0x8f] = bios_sys_a0_8f; |
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1102 //biosA0[0x90] = bios_sys_a0_90; |
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1103 //biosA0[0x91] = bios_sys_a0_91; |
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1104 //biosA0[0x92] = bios_sys_a0_92; |
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1105 //biosA0[0x93] = bios_sys_a0_93; |
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1106 //biosA0[0x94] = bios_sys_a0_94; |
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1107 //biosA0[0x95] = bios_sys_a0_95; |
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1108 //biosA0[0x96] = bios_AddCDROMDevice; |
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1109 //biosA0[0x97] = bios_AddMemCardDevide; |
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1110 //biosA0[0x98] = bios_DisableKernelIORedirection; |
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1111 //biosA0[0x99] = bios_EnableKernelIORedirection; |
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1112 //biosA0[0x9a] = bios_sys_a0_9a; |
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1113 //biosA0[0x9b] = bios_sys_a0_9b; |
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1114 //biosA0[0x9c] = bios_SetConf; |
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1115 //biosA0[0x9d] = bios_GetConf; |
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1116 //biosA0[0x9e] = bios_sys_a0_9e; |
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1117 //biosA0[0x9f] = bios_SetMem; |
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1118 //biosA0[0xa0] = bios__boot; |
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1119 //biosA0[0xa1] = bios_SystemError; |
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1120 //biosA0[0xa2] = bios_EnqueueCdIntr; |
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1121 //biosA0[0xa3] = bios_DequeueCdIntr; |
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1122 //biosA0[0xa4] = bios_sys_a0_a4; |
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1123 //biosA0[0xa5] = bios_ReadSector; |
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1124 //biosA0[0xa6] = bios_get_cd_status; |
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1125 //biosA0[0xa7] = bios_bufs_cb_0; |
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1126 //biosA0[0xa8] = bios_bufs_cb_1; |
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1127 //biosA0[0xa9] = bios_bufs_cb_2; |
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1128 //biosA0[0xaa] = bios_bufs_cb_3; |
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1129 //biosA0[0xab] = bios__card_info; |
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1130 //biosA0[0xac] = bios__card_load; |
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1131 //biosA0[0axd] = bios__card_auto; |
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1132 //biosA0[0xae] = bios_bufs_cd_4; |
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1133 //biosA0[0xaf] = bios_sys_a0_af; |
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1134 //biosA0[0xb0] = bios_sys_a0_b0; |
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1135 //biosA0[0xb1] = bios_sys_a0_b1; |
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1136 //biosA0[0xb2] = bios_do_a_long_jmp |
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1137 //biosA0[0xb3] = bios_sys_a0_b3; |
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1138 //biosA0[0xb4] = bios_sub_function; |
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1139 //*******************B0 CALLS**************************** |
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1140 //biosB0[0x00] = bios_SysMalloc; |
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1141 //biosB0[0x01] = bios_sys_b0_01; |
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1142 biosB0[0x02] = bios_SetRCnt; |
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1143 biosB0[0x03] = bios_GetRCnt; |
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1144 biosB0[0x04] = bios_StartRCnt; |
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1145 biosB0[0x05] = bios_StopRCnt; |
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1146 biosB0[0x06] = bios_ResetRCnt; |
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1147 biosB0[0x07] = bios_DeliverEvent; |
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1148 biosB0[0x08] = bios_OpenEvent; |
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1149 biosB0[0x09] = bios_CloseEvent; |
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1150 biosB0[0x0a] = bios_WaitEvent; |
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1151 biosB0[0x0b] = bios_TestEvent; |
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1152 biosB0[0x0c] = bios_EnableEvent; |
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1153 biosB0[0x0d] = bios_DisableEvent; |
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1154 biosB0[0x0e] = bios_OpenTh; |
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1155 biosB0[0x0f] = bios_CloseTh; |
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1156 biosB0[0x10] = bios_ChangeTh; |
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1157 //biosB0[0x11] = bios_bios_b0_11; |
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1158 biosB0[0x17] = bios_ReturnFromException; |
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1159 biosB0[0x18] = bios_ResetEntryInt; |
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1160 biosB0[0x19] = bios_HookEntryInt; |
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1161 //biosB0[0x1a] = bios_sys_b0_1a; |
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1162 //biosB0[0x1b] = bios_sys_b0_1b; |
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1163 //biosB0[0x1c] = bios_sys_b0_1c; |
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1164 //biosB0[0x1d] = bios_sys_b0_1d; |
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1165 //biosB0[0x1e] = bios_sys_b0_1e; |
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1166 //biosB0[0x1f] = bios_sys_b0_1f; |
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1167 biosB0[0x20] = bios_UnDeliverEvent; |
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1168 //biosB0[0x21] = bios_sys_b0_21; |
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1169 //biosB0[0x22] = bios_sys_b0_22; |
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1170 //biosB0[0x23] = bios_sys_b0_23; |
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1171 //biosB0[0x24] = bios_sys_b0_24; |
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1172 //biosB0[0x25] = bios_sys_b0_25; |
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1173 //biosB0[0x26] = bios_sys_b0_26; |
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1174 //biosB0[0x27] = bios_sys_b0_27; |
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1175 //biosB0[0x28] = bios_sys_b0_28; |
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1176 //biosB0[0x29] = bios_sys_b0_29; |
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1177 //biosB0[0x2a] = bios_sys_b0_2a; |
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1178 //biosB0[0x2b] = bios_sys_b0_2b; |
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1179 //biosB0[0x2c] = bios_sys_b0_2c; |
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1180 //biosB0[0x2d] = bios_sys_b0_2d; |
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1181 //biosB0[0x2e] = bios_sys_b0_2e; |
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1182 //biosB0[0x2f] = bios_sys_b0_2f; |
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1183 //biosB0[0x30] = bios_sys_b0_30; |
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1184 //biosB0[0x31] = bios_sys_b0_31; |
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1185 biosB0[0x56] = bios_GetC0Table; |
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1186 biosB0[0x57] = bios_GetB0Table; |
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1187 //biosB0[0x58] = bios__card_chan; |
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1188 //biosB0[0x59] = bios_sys_b0_59; |
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1189 //biosB0[0x5a] = bios_sys_b0_5a; |
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1190 //biosB0[0x5c] = bios__card_status; |
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1191 //biosB0[0x5d] = bios__card_wait; |
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1192 //*******************C0 CALLS**************************** |
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1193 //biosC0[0x00] = bios_InitRCnt; |
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1194 //biosC0[0x01] = bios_InitException; |
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1195 biosC0[0x02] = bios_SysEnqIntRP; |
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1196 biosC0[0x03] = bios_SysDeqIntRP; |
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1197 //biosC0[0x04] = bios_get_free_EvCB_slot; |
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1198 //biosC0[0x05] = bios_get_free_TCB_slot; |
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1199 //biosC0[0x06] = bios_ExceptionHandler; |
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1200 //biosC0[0x07] = bios_InstallExeptionHandler; |
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1201 //biosC0[0x08] = bios_SysInitMemory; |
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1202 //biosC0[0x09] = bios_SysInitKMem; |
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1203 biosC0[0x0a] = bios_ChangeClearRCnt; |
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1204 //biosC0[0x0b] = bios_SystemError; |
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1205 //biosC0[0x0c] = bios_InitDefInt; |
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1206 //biosC0[0x0d] = bios_sys_c0_0d; |
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1207 //biosC0[0x0e] = bios_sys_c0_0e; |
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1208 //biosC0[0x0f] = bios_sys_c0_0f; |
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1209 //biosC0[0x10] = bios_sys_c0_10; |
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1210 //biosC0[0x11] = bios_sys_c0_11; |
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1211 //biosC0[0x12] = bios_InstallDevices; |
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1212 //biosC0[0x13] = bios_FlushStfInOutPut; |
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1213 //biosC0[0x14] = bios_sys_c0_14; |
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1214 //biosC0[0x15] = bios__cdevinput; |
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1215 //biosC0[0x16] = bios__cdevscan; |
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1216 //biosC0[0x17] = bios__circgetc; |
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1217 //biosC0[0x18] = bios__circputc; |
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1218 //biosC0[0x19] = bios_ioabort; |
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1219 //biosC0[0x1a] = bios_sys_c0_1a |
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1220 //biosC0[0x1b] = bios_KernelRedirect; |
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1221 //biosC0[0x1c] = bios_PatchAOTable; |
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1222 //************** THE END *************************************** |
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1223 |
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1224 base = 0x1000; |
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1225 size = sizeof(EvCB) * 32; |
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1226 Event = (void *)&psxR[base]; base+= size*6; |
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1227 memset(Event, 0, size * 6); |
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1228 //HwEV = Event; |
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1229 //EvEV = Event + 32; |
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1230 RcEV = Event + 32*2; |
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1231 //UeEV = Event + 32*3; |
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1232 //SwEV = Event + 32*4; |
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1233 //ThEV = Event + 32*5; |
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1234 |
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1235 ptr = (u32*)&psxM[0x0874]; // b0 table |
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1236 ptr[0] = BFLIP32(0x4c54 - 0x884); |
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1237 |
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1238 ptr = (u32*)&psxM[0x0674]; // c0 table |
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1239 ptr[6] = BFLIP32(0xc80); |
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1240 |
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1241 memset(SysIntRP, 0, sizeof(SysIntRP)); |
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1242 memset(Thread, 0, sizeof(Thread)); |
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1243 Thread[0].status = BFLIP32(2); // main thread |
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1244 |
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1245 psxMu32(0x0150) = BFLIP32(0x160); |
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1246 psxMu32(0x0154) = BFLIP32(0x320); |
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1247 psxMu32(0x0160) = BFLIP32(0x248); |
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1248 strcpy(&psxM[0x248], "bu"); |
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1249 |
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1250 /* psxMu32(0x0ca8) = BFLIP32(0x1f410004); |
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1251 psxMu32(0x0cf0) = BFLIP32(0x3c020000); |
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1252 psxMu32(0x0cf4) = BFLIP32(0x2442641c); |
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1253 psxMu32(0x09e0) = BFLIP32(0x43d0); |
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1254 psxMu32(0x4d98) = BFLIP32(0x946f000a); |
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1255 */ |
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1256 // opcode HLE |
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1257 psxRu32(0x0000) = BFLIP32((0x3b << 26) | 4); |
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1258 psxMu32(0x0000) = BFLIP32((0x3b << 26) | 0); |
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1259 psxMu32(0x00a0) = BFLIP32((0x3b << 26) | 1); |
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1260 psxMu32(0x00b0) = BFLIP32((0x3b << 26) | 2); |
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1261 psxMu32(0x00c0) = BFLIP32((0x3b << 26) | 3); |
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1262 psxMu32(0x4c54) = BFLIP32((0x3b << 26) | 0); |
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1263 psxMu32(0x8000) = BFLIP32((0x3b << 26) | 5); |
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1264 psxMu32(0x07a0) = BFLIP32((0x3b << 26) | 0); |
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1265 psxMu32(0x0884) = BFLIP32((0x3b << 26) | 0); |
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1266 psxMu32(0x0894) = BFLIP32((0x3b << 26) | 0); |
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1267 } |
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1268 |
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1269 void psxBiosShutdown() { |
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1270 } |
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1271 |
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1272 void biosInterrupt() { |
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1273 if (BFLIP32(psxHu32(0x1070)) & 0x1) { // Vsync |
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1274 if (RcEV[3][1].status == BFLIP32S(EvStACTIVE)) { |
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1275 softCall(BFLIP32(RcEV[3][1].fhandler)); |
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1276 // hwWrite32(0x1f801070, ~(1)); |
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1277 } |
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1278 } |
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1279 |
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1280 if (BFLIP32(psxHu32(0x1070)) & 0x70) { // Rcnt 0,1,2 |
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1281 int i; |
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1282 |
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1283 for (i=0; i<3; i++) { |
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1284 if (BFLIP32(psxHu32(0x1070)) & (1 << (i+4))) { |
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1285 if (RcEV[i][1].status == BFLIP32S(EvStACTIVE)) { |
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1286 softCall(BFLIP32(RcEV[i][1].fhandler)); |
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1287 psxHwWrite32(0x1f801070, ~(1 << (i+4))); |
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1288 } |
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1289 } |
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1290 } |
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1291 } |
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1292 } |
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1293 |
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1294 static INLINE void SaveRegs() { |
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1295 memcpy(regs, psxRegs.GPR.r, 32*4); |
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1296 regs[32] = psxRegs.GPR.n.lo; |
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1297 regs[33] = psxRegs.GPR.n.hi; |
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1298 regs[34] = psxRegs.pc; |
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1299 } |
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1300 |
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1301 void psxBiosException() { |
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1302 int i; |
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1303 |
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1304 switch (psxRegs.CP0.n.Cause & 0x3c) { |
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1305 case 0x00: // Interrupt |
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1306 #ifdef PSXCPU_LOG |
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1307 // PSXCPU_LOG("interrupt\n"); |
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1308 #endif |
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1309 SaveRegs(); |
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1310 |
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1311 biosInterrupt(); |
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1312 |
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1313 for (i=0; i<8; i++) { |
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1314 if (SysIntRP[i]) { |
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1315 u32 *queue = (u32*)PSXM(SysIntRP[i]); |
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1316 |
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1317 s0 = BFLIP32(queue[2]); |
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1318 softCall(BFLIP32(queue[1])); |
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1319 } |
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1320 } |
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1321 |
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1322 if (jmp_int != NULL) { |
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1323 int i; |
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1324 |
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1325 psxHwWrite32(0x1f801070, 0xffffffff); |
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1326 |
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1327 ra = BFLIP32(jmp_int[0]); |
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1328 sp = BFLIP32(jmp_int[1]); |
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1329 fp = BFLIP32(jmp_int[2]); |
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1330 for (i=0; i<8; i++) // s0-s7 |
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1331 psxRegs.GPR.r[16+i] = BFLIP32(jmp_int[3+i]); |
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1332 gp = BFLIP32(jmp_int[11]); |
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1333 |
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1334 v0 = 1; |
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1335 pc0 = ra; |
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1336 return; |
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1337 } |
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1338 psxHwWrite16(0x1f801070, 0); |
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1339 break; |
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1340 case 0x20: // Syscall |
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1341 #ifdef PSXCPU_LOG |
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1342 // PSXCPU_LOG("syscall exp %x\n", a0); |
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1343 #endif |
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1344 switch (a0) { |
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1345 case 1: // EnterCritical - disable irq's |
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1346 psxRegs.CP0.n.Status&=~0x404; break; |
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1347 case 2: // ExitCritical - enable irq's |
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1348 psxRegs.CP0.n.Status|= 0x404; break; |
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1349 } |
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1350 pc0 = psxRegs.CP0.n.EPC + 4; |
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1351 |
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1352 psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status & 0xfffffff0) | |
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1353 ((psxRegs.CP0.n.Status & 0x3c) >> 2); |
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1354 return; |
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1355 default: |
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1356 #ifdef PSXCPU_LOG |
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1357 PSXCPU_LOG("unk exp\n"); |
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1358 #endif |
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1359 break; |
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1360 } |
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1361 |
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1362 pc0 = psxRegs.CP0.n.EPC; |
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1363 if (psxRegs.CP0.n.Cause & 0x80000000) pc0+=4; |
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1364 |
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1365 psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status & 0xfffffff0) | |
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1366 ((psxRegs.CP0.n.Status & 0x3c) >> 2); |
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1367 } |