annotate nt/ftime.bat @ 80163:22e82356b25e

* progmodes/verilog-mode.el (customize): Fix typo in error message. (verilog-mode, verilog-mode-indent, verilog-mode-actions) (verilog-mode-auto, verilog-indent-level-module) (verilog-minimum-comment-distance, verilog-library-flags) (verilog-library-directories, verilog-library-files) (verilog-auto-reset-widths, verilog-imenu-generic-expression) (verilog-xemacs-menu, verilog-set-compile-command) (verilog-set-compile-command, verilog-mode-syntax-table, verilog-mode) (verilog-get-expr, verilog-strip-comments, verilog-one-line) (verilog-lint-off, verilog-batch-auto, verilog-batch-delete-auto) (verilog-batch-inject-auto, verilog-batch-indent) (verilog-continued-line, verilog-type-keywords) (verilog-read-sub-decls-sig, verilog-read-sub-decls-line) (verilog-read-inst-pins, verilog-read-arg-pins) (verilog-read-auto-template, verilog-read-signals, verilog-getopt-file) (verilog-add-list-unique, verilog-symbol-detick, verilog-modi-filename) (verilog-auto-star, verilog-auto-inst, verilog-auto-wire) (verilog-enum-ascii, verilog-sk-begin, verilog-sk-fork) (verilog-sk-datadef, verilog-colorize-include-files-buffer) (verilog-mode-version, verilog-mode-release-date) (verilog-mode-release-emacs, verilog-linter, verilog-coverage) (verilog-simulator, verilog-compiler) (verilog-auto-sense-defines-constant, verilog-company) (verilog-project, verilog-mark-defun, verilog-submit-bug-report): Fix typos in docstrings. (verilog-set-auto-endcomments, verilog-calculate-indent) (verilog-inject-auto, verilog-auto-arg, verilog-auto-inout-module): Reflow docstrings. (verilog-tab-always-indent, verilog-highlight-p1800-keywords) (verilog-auto-star-save, verilog-auto-inst-vector, verilog-mode-hook) (electric-verilog-forward-sexp, verilog-in-case-region-p) (verilog-in-struct-region-p, verilog-in-generate-region-p) (verilog-leap-to-head, verilog-current-indent-level) (verilog-case-indent-level, verilog-cpp-keywords) (verilog-defun-keywords, verilog-block-keywords, verilog-tf-keywords) (verilog-case-keywords, verilog-separator-keywords, verilog-completion) (verilog-signals-not-in, verilog-symbol-detick-text) (verilog-modi-cache-preserve-tick, verilog-modi-cache-preserve-buffer) (verilog-forward-close-paren, verilog-backward-open-paren) (verilog-backward-open-bracket): Doc fixes.

@echo off
if (%1)==() echo Usage: %0 tracefile
if (%1)==() goto done
rem Need to fiddle with the dumped image so prep doesn't break it
obj\i386\preprep ..\src\obj\i386\emacs.exe ..\src\obj\i386\pemacs.exe
copy ..\src\obj\i386\temacs.map ..\src\obj\i386\pemacs.map
rem -----------------------------------------------------------------
rem    Use this version to profile explicit commands only.
prep /om /ft /sf _Fexecute_extended_command ..\src\obj\i386\pemacs
rem -----------------------------------------------------------------
rem    Use this version to ignore startup code
rem prep /om /ft /sf _command_loop_1 ..\src\obj\i386\pemacs
rem -----------------------------------------------------------------
rem    Use this version to include startup code
rem prep /om /ft ..\src\obj\i386\pemacs
rem -----------------------------------------------------------------
if errorlevel 1 goto done
profile ..\src\obj\i386\pemacs %2 %3 %4 %5 %6 %7 %8 %9
if errorlevel 1 goto done
prep /m  ..\src\obj\i386\pemacs
if errorlevel 1 goto done
plist ..\src\obj\i386\pemacs > %1
:done

goto skipArchTag
   arch-tag: d1c629de-9172-4d72-ab68-9d45ab9903cc
:skipArchTag