Mercurial > emacs
comparison lisp/progmodes/verilog-mode.el @ 80141:00b853b0f933
(customize): Fix typo in error message.
(verilog-mode, verilog-mode-indent, verilog-mode-actions, verilog-mode-auto,
verilog-indent-level-module, verilog-minimum-comment-distance,
verilog-library-flags, verilog-library-directories, verilog-library-files,
verilog-auto-reset-widths, verilog-imenu-generic-expression,
verilog-xemacs-menu, verilog-set-compile-command, verilog-set-compile-command,
verilog-mode-syntax-table, verilog-mode, verilog-get-expr,
verilog-strip-comments, verilog-one-line, verilog-lint-off, verilog-batch-auto,
verilog-batch-delete-auto, verilog-batch-inject-auto, verilog-batch-indent,
verilog-continued-line, verilog-type-keywords, verilog-read-sub-decls-sig,
verilog-read-sub-decls-line, verilog-read-inst-pins, verilog-read-arg-pins,
verilog-read-auto-template, verilog-read-signals, verilog-getopt-file,
verilog-add-list-unique, verilog-symbol-detick, verilog-modi-filename,
verilog-auto-star, verilog-auto-inst, verilog-auto-wire, verilog-enum-ascii,
verilog-sk-begin, verilog-sk-fork, verilog-sk-datadef,
verilog-colorize-include-files-buffer): Fix typos in docstrings.
(verilog-set-auto-endcomments, verilog-calculate-indent, verilog-inject-auto,
verilog-auto-arg, verilog-auto-inout-module): Reflow docstrings.
(verilog-tab-always-indent, verilog-highlight-p1800-keywords,
verilog-auto-star-save, verilog-auto-inst-vector, verilog-mode-hook,
electric-verilog-forward-sexp, verilog-in-case-region-p,
verilog-in-struct-region-p, verilog-in-generate-region-p, verilog-leap-to-head,
verilog-current-indent-level, verilog-case-indent-level, verilog-cpp-keywords,
verilog-defun-keywords, verilog-block-keywords, verilog-tf-keywords,
verilog-case-keywords, verilog-separator-keywords, verilog-completion,
verilog-signals-not-in, verilog-symbol-detick-text,
verilog-modi-cache-preserve-tick, verilog-modi-cache-preserve-buffer,
verilog-forward-close-paren, verilog-backward-open-paren,
verilog-backward-open-bracket): Doc fixes.
author | Juanma Barranquero <lekktu@gmail.com> |
---|---|
date | Mon, 18 Feb 2008 14:38:13 +0000 |
parents | 9231505e5076 |
children | adbd1e116992 |
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80140:001f79563e5a | 80141:00b853b0f933 |
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106 ; ) | 106 ; ) |
107 | 107 |
108 ;; | 108 ;; |
109 | 109 |
110 ;;; History: | 110 ;;; History: |
111 ;; | 111 ;; |
112 ;; See commit history at http://www.veripool.com/verilog-mode.html | 112 ;; See commit history at http://www.veripool.com/verilog-mode.html |
113 ;; (This section is required to appease checkdoc.) | 113 ;; (This section is required to appease checkdoc.) |
114 | 114 |
115 ;;; Code: | 115 ;;; Code: |
116 | 116 |
201 nil ;; We've got what we needed | 201 nil ;; We've got what we needed |
202 ;; We have the old custom-library, hack around it! | 202 ;; We have the old custom-library, hack around it! |
203 (defmacro defgroup (&rest args) nil) | 203 (defmacro defgroup (&rest args) nil) |
204 (defmacro customize (&rest args) | 204 (defmacro customize (&rest args) |
205 (message | 205 (message |
206 "Sorry, Customize is not available with this version of emacs")) | 206 "Sorry, Customize is not available with this version of Emacs")) |
207 (defmacro defcustom (var value doc &rest args) | 207 (defmacro defcustom (var value doc &rest args) |
208 `(defvar ,var ,value ,doc)) | 208 `(defvar ,var ,value ,doc)) |
209 ) | 209 ) |
210 (if (fboundp 'defface) | 210 (if (fboundp 'defface) |
211 nil ; great! | 211 nil ; great! |
280 This implements GNU Emacs 22.1's `booleanp' function in earlier Emacs. | 280 This implements GNU Emacs 22.1's `booleanp' function in earlier Emacs. |
281 This function may be removed when Emacs 21 is no longer supported." | 281 This function may be removed when Emacs 21 is no longer supported." |
282 (or (equal value t) (equal value nil))) | 282 (or (equal value t) (equal value nil))) |
283 | 283 |
284 (defgroup verilog-mode nil | 284 (defgroup verilog-mode nil |
285 "Facilitates easy editing of Verilog source text" | 285 "Facilitates easy editing of Verilog source text." |
286 :group 'languages) | 286 :group 'languages) |
287 | 287 |
288 ; (defgroup verilog-mode-fonts nil | 288 ; (defgroup verilog-mode-fonts nil |
289 ; "Facilitates easy customization fonts used in Verilog source text" | 289 ; "Facilitates easy customization fonts used in Verilog source text" |
290 ; :link '(customize-apropos "font-lock-*" 'faces) | 290 ; :link '(customize-apropos "font-lock-*" 'faces) |
291 ; :group 'verilog-mode) | 291 ; :group 'verilog-mode) |
292 | 292 |
293 (defgroup verilog-mode-indent nil | 293 (defgroup verilog-mode-indent nil |
294 "Customize indentation and highlighting of verilog source text" | 294 "Customize indentation and highlighting of verilog source text." |
295 :group 'verilog-mode) | 295 :group 'verilog-mode) |
296 | 296 |
297 (defgroup verilog-mode-actions nil | 297 (defgroup verilog-mode-actions nil |
298 "Customize actions on verilog source text" | 298 "Customize actions on verilog source text." |
299 :group 'verilog-mode) | 299 :group 'verilog-mode) |
300 | 300 |
301 (defgroup verilog-mode-auto nil | 301 (defgroup verilog-mode-auto nil |
302 "Customize AUTO actions when expanding verilog source text" | 302 "Customize AUTO actions when expanding verilog source text." |
303 :group 'verilog-mode) | 303 :group 'verilog-mode) |
304 | 304 |
305 (defcustom verilog-linter | 305 (defcustom verilog-linter |
306 "echo 'No verilog-linter set, see \"M-x describe-variable verilog-linter\"'" | 306 "echo 'No verilog-linter set, see \"M-x describe-variable verilog-linter\"'" |
307 "*Unix program and arguments to call to run a lint checker on verilog source. | 307 "*Unix program and arguments to call to run a lint checker on verilog source. |
368 :group 'verilog-mode-indent | 368 :group 'verilog-mode-indent |
369 :type 'integer) | 369 :type 'integer) |
370 (put 'verilog-indent-level 'safe-local-variable 'integerp) | 370 (put 'verilog-indent-level 'safe-local-variable 'integerp) |
371 | 371 |
372 (defcustom verilog-indent-level-module 3 | 372 (defcustom verilog-indent-level-module 3 |
373 "*Indentation of Module level Verilog statements. (eg always, initial) | 373 "*Indentation of Module level Verilog statements (eg always, initial). |
374 Set to 0 to get initial and always statements lined up on the left side of | 374 Set to 0 to get initial and always statements lined up on the left side of |
375 your screen." | 375 your screen." |
376 :group 'verilog-mode-indent | 376 :group 'verilog-mode-indent |
377 :type 'integer) | 377 :type 'integer) |
378 (put 'verilog-indent-level-module 'safe-local-variable 'integerp) | 378 (put 'verilog-indent-level-module 'safe-local-variable 'integerp) |
449 :type 'boolean) | 449 :type 'boolean) |
450 (put 'verilog-auto-indent-on-newline 'safe-local-variable 'verilog-booleanp) | 450 (put 'verilog-auto-indent-on-newline 'safe-local-variable 'verilog-booleanp) |
451 | 451 |
452 (defcustom verilog-tab-always-indent t | 452 (defcustom verilog-tab-always-indent t |
453 "*True means TAB should always re-indent the current line. | 453 "*True means TAB should always re-indent the current line. |
454 Nil means TAB will only reindent when at the beginning of the line." | 454 A nil value means TAB will only reindent when at the beginning of the line." |
455 :group 'verilog-mode-indent | 455 :group 'verilog-mode-indent |
456 :type 'boolean) | 456 :type 'boolean) |
457 (put 'verilog-tab-always-indent 'safe-local-variable 'verilog-booleanp) | 457 (put 'verilog-tab-always-indent 'safe-local-variable 'verilog-booleanp) |
458 | 458 |
459 (defcustom verilog-tab-to-comment nil | 459 (defcustom verilog-tab-to-comment nil |
478 (put 'verilog-align-ifelse 'safe-local-variable 'verilog-booleanp) | 478 (put 'verilog-align-ifelse 'safe-local-variable 'verilog-booleanp) |
479 | 479 |
480 (defcustom verilog-minimum-comment-distance 10 | 480 (defcustom verilog-minimum-comment-distance 10 |
481 "*Minimum distance (in lines) between begin and end required before a comment. | 481 "*Minimum distance (in lines) between begin and end required before a comment. |
482 Setting this variable to zero results in every end acquiring a comment; the | 482 Setting this variable to zero results in every end acquiring a comment; the |
483 default avoids too many redundant comments in tight quarters" | 483 default avoids too many redundant comments in tight quarters." |
484 :group 'verilog-mode-indent | 484 :group 'verilog-mode-indent |
485 :type 'integer) | 485 :type 'integer) |
486 (put 'verilog-minimum-comment-distance 'safe-local-variable 'integerp) | 486 (put 'verilog-minimum-comment-distance 'safe-local-variable 'integerp) |
487 | 487 |
488 (defcustom verilog-auto-lineup '(declaration) | 488 (defcustom verilog-auto-lineup '(declaration) |
528 | 528 |
529 (defcustom verilog-highlight-p1800-keywords nil | 529 (defcustom verilog-highlight-p1800-keywords nil |
530 "*True means highlight words newly reserved by IEEE-1800. | 530 "*True means highlight words newly reserved by IEEE-1800. |
531 These will appear in `verilog-font-lock-p1800-face' in order to gently | 531 These will appear in `verilog-font-lock-p1800-face' in order to gently |
532 suggest changing where these words are used as variables to something else. | 532 suggest changing where these words are used as variables to something else. |
533 Nil means highlight these words as appropriate for the SystemVerilog | 533 A nil value means highlight these words as appropriate for the SystemVerilog |
534 IEEE-1800 standard. Note that changing this will require restarting Emacs | 534 IEEE-1800 standard. Note that changing this will require restarting Emacs |
535 to see the effect as font color choices are cached by Emacs" | 535 to see the effect as font color choices are cached by Emacs." |
536 :group 'verilog-mode-indent | 536 :group 'verilog-mode-indent |
537 :type 'boolean) | 537 :type 'boolean) |
538 (put 'verilog-highlight-p1800-keywords 'safe-local-variable 'verilog-booleanp) | 538 (put 'verilog-highlight-p1800-keywords 'safe-local-variable 'verilog-booleanp) |
539 | 539 |
540 (defcustom verilog-auto-endcomments t | 540 (defcustom verilog-auto-endcomments t |
575 :type 'boolean) | 575 :type 'boolean) |
576 (put 'verilog-auto-star-expand 'safe-local-variable 'verilog-booleanp) | 576 (put 'verilog-auto-star-expand 'safe-local-variable 'verilog-booleanp) |
577 | 577 |
578 (defcustom verilog-auto-star-save nil | 578 (defcustom verilog-auto-star-save nil |
579 "*Non-nil indicates to save to disk SystemVerilog .* instance expansions. | 579 "*Non-nil indicates to save to disk SystemVerilog .* instance expansions. |
580 Nil indicates direct connections will be removed before saving. Only | 580 A nil value indicates direct connections will be removed before saving. |
581 meaningful to those created due to `verilog-auto-star-expand' being set. | 581 Only meaningful to those created due to `verilog-auto-star-expand' being set. |
582 | 582 |
583 Instead of setting this, you may want to use /*AUTOINST*/, which will | 583 Instead of setting this, you may want to use /*AUTOINST*/, which will |
584 always be saved." | 584 always be saved." |
585 :group 'verilog-mode-actions | 585 :group 'verilog-mode-actions |
586 :type 'boolean) | 586 :type 'boolean) |
695 // Local Variables: | 695 // Local Variables: |
696 // verilog-library-flags:(\"-y dir -y otherdir\") | 696 // verilog-library-flags:(\"-y dir -y otherdir\") |
697 // End: | 697 // End: |
698 | 698 |
699 Verilog-mode attempts to detect changes to this local variable, but they | 699 Verilog-mode attempts to detect changes to this local variable, but they |
700 are only insured to be correct when the file is first visited. Thus if you | 700 are only insured to be correct when the file is first visited. Thus if you |
701 have problems, use \\[find-alternate-file] RET to have these take effect. | 701 have problems, use \\[find-alternate-file] RET to have these take effect. |
702 | 702 |
703 See also the variables mentioned above." | 703 See also the variables mentioned above." |
704 :group 'verilog-mode-auto | 704 :group 'verilog-mode-auto |
705 :type '(repeat string)) | 705 :type '(repeat string)) |
717 // Local Variables: | 717 // Local Variables: |
718 // verilog-library-directories:(\".\" \"subdir\" \"subdir2\") | 718 // verilog-library-directories:(\".\" \"subdir\" \"subdir2\") |
719 // End: | 719 // End: |
720 | 720 |
721 Verilog-mode attempts to detect changes to this local variable, but they | 721 Verilog-mode attempts to detect changes to this local variable, but they |
722 are only insured to be correct when the file is first visited. Thus if you | 722 are only insured to be correct when the file is first visited. Thus if you |
723 have problems, use \\[find-alternate-file] RET to have these take effect. | 723 have problems, use \\[find-alternate-file] RET to have these take effect. |
724 | 724 |
725 See also `verilog-library-flags', `verilog-library-files' | 725 See also `verilog-library-flags', `verilog-library-files' |
726 and `verilog-library-extensions'." | 726 and `verilog-library-extensions'." |
727 :group 'verilog-mode-auto | 727 :group 'verilog-mode-auto |
740 // Local Variables: | 740 // Local Variables: |
741 // verilog-library-files:(\"/some/path/technology.v\" \"/some/path/tech2.v\") | 741 // verilog-library-files:(\"/some/path/technology.v\" \"/some/path/tech2.v\") |
742 // End: | 742 // End: |
743 | 743 |
744 Verilog-mode attempts to detect changes to this local variable, but they | 744 Verilog-mode attempts to detect changes to this local variable, but they |
745 are only insured to be correct when the file is first visited. Thus if you | 745 are only insured to be correct when the file is first visited. Thus if you |
746 have problems, use \\[find-alternate-file] RET to have these take effect. | 746 have problems, use \\[find-alternate-file] RET to have these take effect. |
747 | 747 |
748 See also `verilog-library-flags', `verilog-library-directories'." | 748 See also `verilog-library-flags', `verilog-library-directories'." |
749 :group 'verilog-mode-auto | 749 :group 'verilog-mode-auto |
750 :type '(repeat directory)) | 750 :type '(repeat directory)) |
785 (defcustom verilog-auto-reset-widths t | 785 (defcustom verilog-auto-reset-widths t |
786 "*If true, AUTORESET should determine the width of signals. | 786 "*If true, AUTORESET should determine the width of signals. |
787 This is then used to set the width of the zero (32'h0 for example). This | 787 This is then used to set the width of the zero (32'h0 for example). This |
788 is required by some lint tools that aren't smart enough to ignore widths of | 788 is required by some lint tools that aren't smart enough to ignore widths of |
789 the constant zero. This may result in ugly code when parameters determine | 789 the constant zero. This may result in ugly code when parameters determine |
790 the MSB or LSB of a signal inside a AUTORESET." | 790 the MSB or LSB of a signal inside an AUTORESET." |
791 :type 'boolean | 791 :type 'boolean |
792 :group 'verilog-mode-auto) | 792 :group 'verilog-mode-auto) |
793 (put 'verilog-auto-reset-widths 'safe-local-variable 'verilog-booleanp) | 793 (put 'verilog-auto-reset-widths 'safe-local-variable 'verilog-booleanp) |
794 | 794 |
795 (defcustom verilog-assignment-delay "" | 795 (defcustom verilog-assignment-delay "" |
800 | 800 |
801 (defcustom verilog-auto-inst-vector t | 801 (defcustom verilog-auto-inst-vector t |
802 "*If true, when creating default ports with AUTOINST, use bus subscripts. | 802 "*If true, when creating default ports with AUTOINST, use bus subscripts. |
803 If nil, skip the subscript when it matches the entire bus as declared in | 803 If nil, skip the subscript when it matches the entire bus as declared in |
804 the module (AUTOWIRE signals always are subscripted, you must manually | 804 the module (AUTOWIRE signals always are subscripted, you must manually |
805 declare the wire to have the subscripts removed.) Nil may speed up some | 805 declare the wire to have the subscripts removed.) Setting this to nil may |
806 simulators, but is less general and harder to read, so avoid." | 806 speed up some simulators, but is less general and harder to read, so avoid." |
807 :group 'verilog-mode-auto | 807 :group 'verilog-mode-auto |
808 :type 'boolean) | 808 :type 'boolean) |
809 (put 'verilog-auto-inst-vector 'safe-local-variable 'verilog-booleanp) | 809 (put 'verilog-auto-inst-vector 'safe-local-variable 'verilog-booleanp) |
810 | 810 |
811 (defcustom verilog-auto-inst-template-numbers nil | 811 (defcustom verilog-auto-inst-template-numbers nil |
854 :group 'verilog-mode-auto | 854 :group 'verilog-mode-auto |
855 :type 'string) | 855 :type 'string) |
856 (put 'verilog-typedef-regexp 'safe-local-variable 'stringp) | 856 (put 'verilog-typedef-regexp 'safe-local-variable 'stringp) |
857 | 857 |
858 (defcustom verilog-mode-hook 'verilog-set-compile-command | 858 (defcustom verilog-mode-hook 'verilog-set-compile-command |
859 "*Hook (List of functions) run after verilog mode is loaded." | 859 "*Hook run after Verilog mode is loaded." |
860 :type 'hook | 860 :type 'hook |
861 :group 'verilog-mode) | 861 :group 'verilog-mode) |
862 | 862 |
863 (defcustom verilog-auto-hook nil | 863 (defcustom verilog-auto-hook nil |
864 "*Hook run after `verilog-mode' updates AUTOs." | 864 "*Hook run after `verilog-mode' updates AUTOs." |
891 :type 'hook) | 891 :type 'hook) |
892 | 892 |
893 (defvar verilog-imenu-generic-expression | 893 (defvar verilog-imenu-generic-expression |
894 '((nil "^\\s-*\\(\\(m\\(odule\\|acromodule\\)\\)\\|primitive\\)\\s-+\\([a-zA-Z0-9_.:]+\\)" 4) | 894 '((nil "^\\s-*\\(\\(m\\(odule\\|acromodule\\)\\)\\|primitive\\)\\s-+\\([a-zA-Z0-9_.:]+\\)" 4) |
895 ("*Vars*" "^\\s-*\\(reg\\|wire\\)\\s-+\\(\\|\\[[^]]+\\]\\s-+\\)\\([A-Za-z0-9_]+\\)" 3)) | 895 ("*Vars*" "^\\s-*\\(reg\\|wire\\)\\s-+\\(\\|\\[[^]]+\\]\\s-+\\)\\([A-Za-z0-9_]+\\)" 3)) |
896 "Imenu expression for Verilog-mode. See `imenu-generic-expression'.") | 896 "Imenu expression for Verilog mode. See `imenu-generic-expression'.") |
897 | 897 |
898 ;; | 898 ;; |
899 ;; provide a verilog-header function. | 899 ;; provide a verilog-header function. |
900 ;; Customization variables: | 900 ;; Customization variables: |
901 ;; | 901 ;; |
991 :style radio | 991 :style radio |
992 :selected (equal verilog-tool `verilog-compiler)] | 992 :selected (equal verilog-tool `verilog-compiler)] |
993 ) | 993 ) |
994 ("Move" | 994 ("Move" |
995 ,(if (featurep 'xemacs) | 995 ,(if (featurep 'xemacs) |
996 (progn | 996 (progn |
997 ["Beginning of function" verilog-beg-of-defun t] | 997 ["Beginning of function" verilog-beg-of-defun t] |
998 ["End of function" verilog-end-of-defun t] | 998 ["End of function" verilog-end-of-defun t] |
999 ["Mark function" verilog-mark-defun t]) | 999 ["Mark function" verilog-mark-defun t]) |
1000 ["Beginning of function" beginning-of-defun t] | 1000 ["Beginning of function" beginning-of-defun t] |
1001 ["End of function" end-of-defun t] | 1001 ["End of function" end-of-defun t] |
1002 ["Mark function" mark-defun t]) | 1002 ["Mark function" mark-defun t]) |
1003 | 1003 |
1004 ["Goto function/module" verilog-goto-defun t] | 1004 ["Goto function/module" verilog-goto-defun t] |
1005 ["Move to beginning of block" electric-verilog-backward-sexp t] | 1005 ["Move to beginning of block" electric-verilog-backward-sexp t] |
1006 ["Move to end of block" electric-verilog-forward-sexp t] | 1006 ["Move to end of block" electric-verilog-forward-sexp t] |
1007 ) | 1007 ) |
1008 ("Comments" | 1008 ("Comments" |
1057 ["Submit bug report" verilog-submit-bug-report t] | 1057 ["Submit bug report" verilog-submit-bug-report t] |
1058 ["Version and FAQ" verilog-faq t] | 1058 ["Version and FAQ" verilog-faq t] |
1059 ["Customize Verilog Mode..." verilog-customize t] | 1059 ["Customize Verilog Mode..." verilog-customize t] |
1060 ["Customize Verilog Fonts & Colors" verilog-font-customize t] | 1060 ["Customize Verilog Fonts & Colors" verilog-font-customize t] |
1061 ) | 1061 ) |
1062 "Emacs menu for VERILOG mode." | 1062 "Emacs menu for Verilog mode." |
1063 ) | 1063 ) |
1064 (defvar verilog-statement-menu | 1064 (defvar verilog-statement-menu |
1065 '("Statements" | 1065 '("Statements" |
1066 ["Header" verilog-sk-header t] | 1066 ["Header" verilog-sk-header t] |
1067 ["Comment" verilog-sk-comment t] | 1067 ["Comment" verilog-sk-comment t] |
1198 | 1198 |
1199 (defvar compile-command) | 1199 (defvar compile-command) |
1200 | 1200 |
1201 ;; compilation program | 1201 ;; compilation program |
1202 (defun verilog-set-compile-command () | 1202 (defun verilog-set-compile-command () |
1203 "Function to compute shell command to compile verilog. | 1203 "Function to compute shell command to compile Verilog. |
1204 | 1204 |
1205 This reads `verilog-tool' and sets `compile-command'. This specifies the | 1205 This reads `verilog-tool' and sets `compile-command'. This specifies the |
1206 program that executes when you type \\[compile] or | 1206 program that executes when you type \\[compile] or |
1207 \\[verilog-auto-save-compile]. | 1207 \\[verilog-auto-save-compile]. |
1208 | 1208 |
1219 | 1219 |
1220 In the former case, the path to the current buffer is concat'ed to the | 1220 In the former case, the path to the current buffer is concat'ed to the |
1221 value of `verilog-tool'; in the later, the path to the current buffer is | 1221 value of `verilog-tool'; in the later, the path to the current buffer is |
1222 substituted for the %s. | 1222 substituted for the %s. |
1223 | 1223 |
1224 Where __FILE__ appears in the string, the buffer-file-name of the current | 1224 Where __FILE__ appears in the string, the `buffer-file-name' of the |
1225 buffer, without the directory portion, will be substituted." | 1225 current buffer, without the directory portion, will be substituted." |
1226 (interactive) | 1226 (interactive) |
1227 (cond | 1227 (cond |
1228 ((or (file-exists-p "makefile") ;If there is a makefile, use it | 1228 ((or (file-exists-p "makefile") ;If there is a makefile, use it |
1229 (file-exists-p "Makefile")) | 1229 (file-exists-p "Makefile")) |
1230 (make-local-variable 'compile-command) | 1230 (make-local-variable 'compile-command) |
1525 (defconst verilog-declaration-core-re | 1525 (defconst verilog-declaration-core-re |
1526 (eval-when-compile | 1526 (eval-when-compile |
1527 (verilog-regexp-words | 1527 (verilog-regexp-words |
1528 `( | 1528 `( |
1529 ;; port direction (by themselves) | 1529 ;; port direction (by themselves) |
1530 "inout" "input" "output" | 1530 "inout" "input" "output" |
1531 ;; integer_atom_type | 1531 ;; integer_atom_type |
1532 "byte" "shortint" "int" "longint" "integer" "time" | 1532 "byte" "shortint" "int" "longint" "integer" "time" |
1533 ;; integer_vector_type | 1533 ;; integer_vector_type |
1534 "bit" "logic" "reg" | 1534 "bit" "logic" "reg" |
1535 ;; non_integer_type | 1535 ;; non_integer_type |
1752 ;; Emacs 19 does things differently, but we can work with it | 1752 ;; Emacs 19 does things differently, but we can work with it |
1753 (modify-syntax-entry ?/ ". 124b" table) | 1753 (modify-syntax-entry ?/ ". 124b" table) |
1754 (modify-syntax-entry ?* ". 23" table) | 1754 (modify-syntax-entry ?* ". 23" table) |
1755 (modify-syntax-entry ?\n "> b" table)) | 1755 (modify-syntax-entry ?\n "> b" table)) |
1756 table) | 1756 table) |
1757 "Syntax table used in `verilog-mode' buffers.") | 1757 "Syntax table used in Verilog mode buffers.") |
1758 | 1758 |
1759 (defvar verilog-font-lock-keywords nil | 1759 (defvar verilog-font-lock-keywords nil |
1760 "Default highlighting for Verilog mode.") | 1760 "Default highlighting for Verilog mode.") |
1761 | 1761 |
1762 (defvar verilog-font-lock-keywords-1 nil | 1762 (defvar verilog-font-lock-keywords-1 nil |
1991 (interactive) | 1991 (interactive) |
1992 ;; before that see if we are in a comment | 1992 ;; before that see if we are in a comment |
1993 (verilog-backward-sexp)) | 1993 (verilog-backward-sexp)) |
1994 | 1994 |
1995 (defun electric-verilog-forward-sexp () | 1995 (defun electric-verilog-forward-sexp () |
1996 "Move backward over a sexp." | 1996 "Move forward over a sexp." |
1997 (interactive) | 1997 (interactive) |
1998 ;; before that see if we are in a comment | 1998 ;; before that see if we are in a comment |
1999 (verilog-forward-sexp)) | 1999 (verilog-forward-sexp)) |
2000 | 2000 |
2001 ;;;used by hs-minor-mode | 2001 ;;;used by hs-minor-mode |
2211 `verilog-indent-level-declaration' (default 3) | 2211 `verilog-indent-level-declaration' (default 3) |
2212 Indentation of declarations with respect to containing block. | 2212 Indentation of declarations with respect to containing block. |
2213 Set to 0 to get them list right under containing block. | 2213 Set to 0 to get them list right under containing block. |
2214 `verilog-indent-level-behavioral' (default 3) | 2214 `verilog-indent-level-behavioral' (default 3) |
2215 Indentation of first begin in a task or function block | 2215 Indentation of first begin in a task or function block |
2216 Set to 0 to get such code to lined up underneath the task or function keyword | 2216 Set to 0 to get such code to lined up underneath the task or |
2217 function keyword. | |
2217 `verilog-indent-level-directive' (default 1) | 2218 `verilog-indent-level-directive' (default 1) |
2218 Indentation of `ifdef/`endif blocks | 2219 Indentation of `ifdef/`endif blocks. |
2219 `verilog-cexp-indent' (default 1) | 2220 `verilog-cexp-indent' (default 1) |
2220 Indentation of Verilog statements broken across lines i.e.: | 2221 Indentation of Verilog statements broken across lines i.e.: |
2221 if (a) | 2222 if (a) |
2222 begin | 2223 begin |
2223 `verilog-case-indent' (default 2) | 2224 `verilog-case-indent' (default 2) |
2224 Indentation for case statements. | 2225 Indentation for case statements. |
2225 `verilog-auto-newline' (default nil) | 2226 `verilog-auto-newline' (default nil) |
2226 Non-nil means automatically newline after semicolons and the punctuation | 2227 Non-nil means automatically newline after semicolons and the punctuation |
2227 mark after an end. | 2228 mark after an end. |
2228 `verilog-auto-indent-on-newline' (default t) | 2229 `verilog-auto-indent-on-newline' (default t) |
2229 Non-nil means automatically indent line after newline | 2230 Non-nil means automatically indent line after newline. |
2230 `verilog-tab-always-indent' (default t) | 2231 `verilog-tab-always-indent' (default t) |
2231 Non-nil means TAB in Verilog mode should always reindent the current line, | 2232 Non-nil means TAB in Verilog mode should always reindent the current line, |
2232 regardless of where in the line point is when the TAB command is used. | 2233 regardless of where in the line point is when the TAB command is used. |
2233 `verilog-indent-begin-after-if' (default t) | 2234 `verilog-indent-begin-after-if' (default t) |
2234 Non-nil means to indent begin statements following a preceding | 2235 Non-nil means to indent begin statements following a preceding |
2235 if, else, while, for and repeat statements, if any. otherwise, | 2236 if, else, while, for and repeat statements, if any. Otherwise, |
2236 the begin is lined up with the preceding token. If t, you get: | 2237 the begin is lined up with the preceding token. If t, you get: |
2237 if (a) | 2238 if (a) |
2238 begin // amount of indent based on `verilog-cexp-indent' | 2239 begin // amount of indent based on `verilog-cexp-indent' |
2239 otherwise you get: | 2240 otherwise you get: |
2240 if (a) | 2241 if (a) |
2870 ((= 0 nest) | 2871 ((= 0 nest) |
2871 (throw 'found (verilog-end-of-statement)))))) | 2872 (throw 'found (verilog-end-of-statement)))))) |
2872 pos))) | 2873 pos))) |
2873 | 2874 |
2874 (defun verilog-in-case-region-p () | 2875 (defun verilog-in-case-region-p () |
2875 "Return TRUE if in a case region; | 2876 "Return true if in a case region. |
2876 more specifically, point @ in the line foo : @ begin" | 2877 More specifically, point @ in the line foo : @ begin" |
2877 (interactive) | 2878 (interactive) |
2878 (save-excursion | 2879 (save-excursion |
2879 (if (and | 2880 (if (and |
2880 (progn (verilog-forward-syntactic-ws) | 2881 (progn (verilog-forward-syntactic-ws) |
2881 (looking-at "\\<begin\\>")) | 2882 (looking-at "\\<begin\\>")) |
2896 (throw 'found 1)) | 2897 (throw 'found 1)) |
2897 (setq nest (1- nest))) | 2898 (setq nest (1- nest))) |
2898 (t | 2899 (t |
2899 (throw 'found (= nest 0))))))) | 2900 (throw 'found (= nest 0))))))) |
2900 nil))) | 2901 nil))) |
2901 | |
2902 (defun verilog-in-struct-region-p () | 2902 (defun verilog-in-struct-region-p () |
2903 "Return TRUE if in a struct region; | 2903 "Return true if in a struct region. |
2904 more specifically, in a list after a struct|union keyword" | 2904 More specifically, in a list after a struct|union keyword." |
2905 (interactive) | 2905 (interactive) |
2906 (save-excursion | 2906 (save-excursion |
2907 (let* ((state (parse-partial-sexp (point-min) (point))) | 2907 (let* ((state (parse-partial-sexp (point-min) (point))) |
2908 (depth (nth 0 state))) | 2908 (depth (nth 0 state))) |
2909 (if depth | 2909 (if depth |
2910 (progn (backward-up-list depth) | 2910 (progn (backward-up-list depth) |
2911 (verilog-beg-of-statement) | 2911 (verilog-beg-of-statement) |
2912 (looking-at "\\<typedef\\>?\\s-*\\<struct\\|union\\>")))))) | 2912 (looking-at "\\<typedef\\>?\\s-*\\<struct\\|union\\>")))))) |
2913 | 2913 |
2914 (defun verilog-in-generate-region-p () | 2914 (defun verilog-in-generate-region-p () |
2915 "Return TRUE if in a generate region; | 2915 "Return true if in a generate region. |
2916 more specifically, after a generate and before an endgenerate" | 2916 More specifically, after a generate and before an endgenerate." |
2917 (interactive) | 2917 (interactive) |
2918 (let ((lim (save-excursion (verilog-beg-of-defun) (point))) | 2918 (let ((lim (save-excursion (verilog-beg-of-defun) (point))) |
2919 (nest 1)) | 2919 (nest 1)) |
2920 (save-excursion | 2920 (save-excursion |
2921 (while (and | 2921 (while (and |
3035 "Add ending comment with given INDENT-STR. | 3035 "Add ending comment with given INDENT-STR. |
3036 With KILL-EXISTING-COMMENT, remove what was there before. | 3036 With KILL-EXISTING-COMMENT, remove what was there before. |
3037 Insert `// case: 7 ' or `// NAME ' on this line if appropriate. | 3037 Insert `// case: 7 ' or `// NAME ' on this line if appropriate. |
3038 Insert `// case expr ' if this line ends a case block. | 3038 Insert `// case expr ' if this line ends a case block. |
3039 Insert `// ifdef FOO ' if this line ends code conditional on FOO. | 3039 Insert `// ifdef FOO ' if this line ends code conditional on FOO. |
3040 Insert `// NAME ' if this line ends a function, task, module, primitive or interface named NAME." | 3040 Insert `// NAME ' if this line ends a function, task, module, |
3041 primitive or interface named NAME." | |
3041 (save-excursion | 3042 (save-excursion |
3042 (cond | 3043 (cond |
3043 (; Comment close preprocessor directives | 3044 (; Comment close preprocessor directives |
3044 (and | 3045 (and |
3045 (looking-at "\\(`endif\\)\\|\\(`else\\)") | 3046 (looking-at "\\(`endif\\)\\|\\(`else\\)") |
3380 (end-of-line) | 3381 (end-of-line) |
3381 (insert (concat " // " string ))) | 3382 (insert (concat " // " string ))) |
3382 )))))))))) | 3383 )))))))))) |
3383 | 3384 |
3384 (defun verilog-get-expr() | 3385 (defun verilog-get-expr() |
3385 "Grab expression at point, e.g, case ( a | b & (c ^d))" | 3386 "Grab expression at point, e.g, case ( a | b & (c ^d))." |
3386 (let* ((b (progn | 3387 (let* ((b (progn |
3387 (verilog-forward-syntactic-ws) | 3388 (verilog-forward-syntactic-ws) |
3388 (skip-chars-forward " \t") | 3389 (skip-chars-forward " \t") |
3389 (point))) | 3390 (point))) |
3390 (e (let ((par 1)) | 3391 (e (let ((par 1)) |
3495 (delete-char -1) | 3496 (delete-char -1) |
3496 ;; | 3497 ;; |
3497 ))))) | 3498 ))))) |
3498 | 3499 |
3499 (defun verilog-strip-comments () | 3500 (defun verilog-strip-comments () |
3500 "Strip all comments from the verilog code." | 3501 "Strip all comments from the Verilog code." |
3501 (interactive) | 3502 (interactive) |
3502 (goto-char (point-min)) | 3503 (goto-char (point-min)) |
3503 (while (re-search-forward "//" nil t) | 3504 (while (re-search-forward "//" nil t) |
3504 (if (verilog-within-string) | 3505 (if (verilog-within-string) |
3505 (re-search-forward "\"" nil t) | 3506 (re-search-forward "\"" nil t) |
3516 (let ((bpt (- (point) 2))) | 3517 (let ((bpt (- (point) 2))) |
3517 (re-search-forward "\\*/") | 3518 (re-search-forward "\\*/") |
3518 (delete-region bpt (point)))))) | 3519 (delete-region bpt (point)))))) |
3519 | 3520 |
3520 (defun verilog-one-line () | 3521 (defun verilog-one-line () |
3521 "Convert structural verilog instances to occupy one line." | 3522 "Convert structural Verilog instances to occupy one line." |
3522 (interactive) | 3523 (interactive) |
3523 (goto-char (point-min)) | 3524 (goto-char (point-min)) |
3524 (while (re-search-forward "\\([^;]\\)[ \t]*\n[ \t]*" nil t) | 3525 (while (re-search-forward "\\([^;]\\)[ \t]*\n[ \t]*" nil t) |
3525 (replace-match "\\1 " nil nil))) | 3526 (replace-match "\\1 " nil nil))) |
3526 | 3527 |
3541 For example: | 3542 For example: |
3542 pci_bfm_null.v, line 46: Unused input: pci_rst_ | 3543 pci_bfm_null.v, line 46: Unused input: pci_rst_ |
3543 becomes a comment for the appropriate tool. | 3544 becomes a comment for the appropriate tool. |
3544 | 3545 |
3545 The first word of the `compile-command' or `verilog-linter' | 3546 The first word of the `compile-command' or `verilog-linter' |
3546 variables are used to determine which product is being used. | 3547 variables is used to determine which product is being used. |
3547 | 3548 |
3548 See \\[verilog-surelint-off] and \\[verilog-verilint-off]." | 3549 See \\[verilog-surelint-off] and \\[verilog-verilint-off]." |
3549 (interactive) | 3550 (interactive) |
3550 (let ((linter (verilog-linter-name))) | 3551 (let ((linter (verilog-linter-name))) |
3551 (cond ((equal linter `surelint) | 3552 (cond ((equal linter `surelint) |
3691 (save-buffer)))) | 3692 (save-buffer)))) |
3692 (buffer-list)))) | 3693 (buffer-list)))) |
3693 | 3694 |
3694 (defun verilog-batch-auto () | 3695 (defun verilog-batch-auto () |
3695 "For use with --batch, perform automatic expansions as a stand-alone tool. | 3696 "For use with --batch, perform automatic expansions as a stand-alone tool. |
3696 This sets up the appropriate Verilog-Mode environment, updates automatics | 3697 This sets up the appropriate Verilog mode environment, updates automatics |
3697 with \\[verilog-auto] on all command-line files, and saves the buffers. | 3698 with \\[verilog-auto] on all command-line files, and saves the buffers. |
3698 For proper results, multiple filenames need to be passed on the command | 3699 For proper results, multiple filenames need to be passed on the command |
3699 line in bottom-up order." | 3700 line in bottom-up order." |
3700 (unless noninteractive | 3701 (unless noninteractive |
3701 (error "Use verilog-batch-auto only with --batch")) ;; Otherwise we'd mess up buffer modes | 3702 (error "Use verilog-batch-auto only with --batch")) ;; Otherwise we'd mess up buffer modes |
3702 (verilog-batch-execute-func `verilog-auto)) | 3703 (verilog-batch-execute-func `verilog-auto)) |
3703 | 3704 |
3704 (defun verilog-batch-delete-auto () | 3705 (defun verilog-batch-delete-auto () |
3705 "For use with --batch, perform automatic deletion as a stand-alone tool. | 3706 "For use with --batch, perform automatic deletion as a stand-alone tool. |
3706 This sets up the appropriate Verilog-Mode environment, deletes automatics | 3707 This sets up the appropriate Verilog mode environment, deletes automatics |
3707 with \\[verilog-delete-auto] on all command-line files, and saves the buffers." | 3708 with \\[verilog-delete-auto] on all command-line files, and saves the buffers." |
3708 (unless noninteractive | 3709 (unless noninteractive |
3709 (error "Use verilog-batch-delete-auto only with --batch")) ;; Otherwise we'd mess up buffer modes | 3710 (error "Use verilog-batch-delete-auto only with --batch")) ;; Otherwise we'd mess up buffer modes |
3710 (verilog-batch-execute-func `verilog-delete-auto)) | 3711 (verilog-batch-execute-func `verilog-delete-auto)) |
3711 | 3712 |
3712 (defun verilog-batch-inject-auto () | 3713 (defun verilog-batch-inject-auto () |
3713 "For use with --batch, perform automatic injection as a stand-alone tool. | 3714 "For use with --batch, perform automatic injection as a stand-alone tool. |
3714 This sets up the appropriate Verilog-Mode environment, injects new automatics | 3715 This sets up the appropriate Verilog mode environment, injects new automatics |
3715 with \\[verilog-inject-auto] on all command-line files, and saves the buffers. | 3716 with \\[verilog-inject-auto] on all command-line files, and saves the buffers. |
3716 For proper results, multiple filenames need to be passed on the command | 3717 For proper results, multiple filenames need to be passed on the command |
3717 line in bottom-up order." | 3718 line in bottom-up order." |
3718 (unless noninteractive | 3719 (unless noninteractive |
3719 (error "Use verilog-batch-inject-auto only with --batch")) ;; Otherwise we'd mess up buffer modes | 3720 (error "Use verilog-batch-inject-auto only with --batch")) ;; Otherwise we'd mess up buffer modes |
3720 (verilog-batch-execute-func `verilog-inject-auto)) | 3721 (verilog-batch-execute-func `verilog-inject-auto)) |
3721 | 3722 |
3722 (defun verilog-batch-indent () | 3723 (defun verilog-batch-indent () |
3723 "For use with --batch, reindent an a entire file as a stand-alone tool. | 3724 "For use with --batch, reindent an a entire file as a stand-alone tool. |
3724 This sets up the appropriate Verilog-Mode environment, calls | 3725 This sets up the appropriate Verilog mode environment, calls |
3725 \\[verilog-indent-buffer] on all command-line files, and saves the buffers." | 3726 \\[verilog-indent-buffer] on all command-line files, and saves the buffers." |
3726 (unless noninteractive | 3727 (unless noninteractive |
3727 (error "Use verilog-batch-indent only with --batch")) ;; Otherwise we'd mess up buffer modes | 3728 (error "Use verilog-batch-indent only with --batch")) ;; Otherwise we'd mess up buffer modes |
3728 (verilog-batch-execute-func `verilog-indent-buffer)) | 3729 (verilog-batch-execute-func `verilog-indent-buffer)) |
3729 | 3730 |
3762 continued)) | 3763 continued)) |
3763 | 3764 |
3764 (defun verilog-calculate-indent () | 3765 (defun verilog-calculate-indent () |
3765 "Calculate the indent of the current Verilog line. | 3766 "Calculate the indent of the current Verilog line. |
3766 Examine previous lines. Once a line is found that is definitive as to the | 3767 Examine previous lines. Once a line is found that is definitive as to the |
3767 type of the current line, return that lines' indent level and its | 3768 type of the current line, return that lines' indent level and its type. |
3768 type. Return a list of two elements: (INDENT-TYPE INDENT-LEVEL)." | 3769 Return a list of two elements: (INDENT-TYPE INDENT-LEVEL)." |
3769 (save-excursion | 3770 (save-excursion |
3770 (let* ((starting_position (point)) | 3771 (let* ((starting_position (point)) |
3771 (par 0) | 3772 (par 0) |
3772 (begin (looking-at "[ \t]*begin\\>")) | 3773 (begin (looking-at "[ \t]*begin\\>")) |
3773 (lim (save-excursion (verilog-re-search-backward "\\(\\<begin\\>\\)\\|\\(\\<module\\>\\)" nil t))) | 3774 (lim (save-excursion (verilog-re-search-backward "\\(\\<begin\\>\\)\\|\\(\\<module\\>\\)" nil t))) |
4015 ((bobp) | 4016 ((bobp) |
4016 (ding 't) | 4017 (ding 't) |
4017 (setq nest 0)))))) | 4018 (setq nest 0)))))) |
4018 | 4019 |
4019 (defun verilog-leap-to-head () | 4020 (defun verilog-leap-to-head () |
4020 "Move point to the head of this block; jump from end to matching begin, | 4021 "Move point to the head of this block. |
4021 from endcase to matching case, and so on." | 4022 Jump from end to matching begin, from endcase to matching case, and so on." |
4022 (let ((reg nil) | 4023 (let ((reg nil) |
4023 snest | 4024 snest |
4024 (nest 1)) | 4025 (nest 1)) |
4025 (cond | 4026 (cond |
4026 ((looking-at "\\<end\\>") | 4027 ((looking-at "\\<end\\>") |
4095 (setq reg "\\(\\<fork\\>\\)\\|\\(\\<join\\(_any\\|_none\\)?\\>\\)" )) | 4096 (setq reg "\\(\\<fork\\>\\)\\|\\(\\<join\\(_any\\|_none\\)?\\>\\)" )) |
4096 ))))))) | 4097 ))))))) |
4097 | 4098 |
4098 (defun verilog-continued-line () | 4099 (defun verilog-continued-line () |
4099 "Return true if this is a continued line. | 4100 "Return true if this is a continued line. |
4100 Set point to where line starts" | 4101 Set point to where line starts." |
4101 (let ((continued 't)) | 4102 (let ((continued 't)) |
4102 (if (eq 0 (forward-line -1)) | 4103 (if (eq 0 (forward-line -1)) |
4103 (progn | 4104 (progn |
4104 (end-of-line) | 4105 (end-of-line) |
4105 (verilog-backward-ws&directives) | 4106 (verilog-backward-ws&directives) |
4594 (skip-chars-forward " \t")) | 4595 (skip-chars-forward " \t")) |
4595 indent-str ; Return indent data | 4596 indent-str ; Return indent data |
4596 )) | 4597 )) |
4597 | 4598 |
4598 (defun verilog-current-indent-level () | 4599 (defun verilog-current-indent-level () |
4599 "Return the indent-level the current statement has." | 4600 "Return the indent-level of the current statement." |
4600 (save-excursion | 4601 (save-excursion |
4601 (let (par-pos) | 4602 (let (par-pos) |
4602 (beginning-of-line) | 4603 (beginning-of-line) |
4603 (setq par-pos (verilog-parenthesis-depth)) | 4604 (setq par-pos (verilog-parenthesis-depth)) |
4604 (while par-pos | 4605 (while par-pos |
4607 (setq par-pos (verilog-parenthesis-depth))) | 4608 (setq par-pos (verilog-parenthesis-depth))) |
4608 (skip-chars-forward " \t") | 4609 (skip-chars-forward " \t") |
4609 (current-column)))) | 4610 (current-column)))) |
4610 | 4611 |
4611 (defun verilog-case-indent-level () | 4612 (defun verilog-case-indent-level () |
4612 "Return the indent-level the current statement has. | 4613 "Return the indent-level of the current statement. |
4613 Do not count named blocks or case-statements." | 4614 Do not count named blocks or case-statements." |
4614 (save-excursion | 4615 (save-excursion |
4615 (skip-chars-forward " \t") | 4616 (skip-chars-forward " \t") |
4616 (cond | 4617 (cond |
4617 ((looking-at verilog-named-block-re) | 4618 ((looking-at verilog-named-block-re) |
4830 (goto-char start) | 4831 (goto-char start) |
4831 (verilog-do-indent (verilog-calculate-indent)) | 4832 (verilog-do-indent (verilog-calculate-indent)) |
4832 (if (and (not quiet) | 4833 (if (and (not quiet) |
4833 (> (- end start) 100)) | 4834 (> (- end start) 100)) |
4834 (message "Lining up expressions..(please stand by)")) | 4835 (message "Lining up expressions..(please stand by)")) |
4835 | 4836 |
4836 ;; Set indent to minimum throughout region | 4837 ;; Set indent to minimum throughout region |
4837 (while (< (point) (marker-position edpos)) | 4838 (while (< (point) (marker-position edpos)) |
4838 (beginning-of-line) | 4839 (beginning-of-line) |
4839 (verilog-just-one-space myre) | 4840 (verilog-just-one-space myre) |
4840 (end-of-line) | 4841 (end-of-line) |
4841 (verilog-forward-syntactic-ws) | 4842 (verilog-forward-syntactic-ws) |
4842 ) | 4843 ) |
4843 | 4844 |
4844 ;; Now find biggest prefix | 4845 ;; Now find biggest prefix |
4845 (setq ind (verilog-get-lineup-indent-2 myre start edpos)) | 4846 (setq ind (verilog-get-lineup-indent-2 myre start edpos)) |
4846 | 4847 |
4847 ;; Now indent each line. | 4848 ;; Now indent each line. |
4848 (goto-char start) | 4849 (goto-char start) |
4849 (while (progn (setq e (marker-position edpos)) | 4850 (while (progn (setq e (marker-position edpos)) |
4850 (setq r (- e (point))) | 4851 (setq r (- e (point))) |
4851 (> r 0)) | 4852 (> r 0)) |
5046 "rcmos" "real" "realtime" "reg" "rnmos" "rpmos" "rtran" "rtranif0" | 5047 "rcmos" "real" "realtime" "reg" "rnmos" "rpmos" "rtran" "rtranif0" |
5047 "rtranif1" "semaphore" "time" "tran" "tranif0" "tranif1" "tri" "tri0" "tri1" | 5048 "rtranif1" "semaphore" "time" "tran" "tranif0" "tranif1" "tri" "tri0" "tri1" |
5048 "triand" "trior" "trireg" "wand" "wire" "wor" "xnor" "xor" | 5049 "triand" "trior" "trireg" "wand" "wire" "wor" "xnor" "xor" |
5049 ) | 5050 ) |
5050 "*Keywords for types used when completing a word in a declaration or parmlist. | 5051 "*Keywords for types used when completing a word in a declaration or parmlist. |
5051 \(eg. integer, real, reg...)") | 5052 \(Eg. integer, real, reg...)") |
5052 | 5053 |
5053 (defvar verilog-cpp-keywords | 5054 (defvar verilog-cpp-keywords |
5054 '("module" "macromodule" "primitive" "timescale" "define" "ifdef" "ifndef" "else" | 5055 '("module" "macromodule" "primitive" "timescale" "define" "ifdef" "ifndef" "else" |
5055 "endif") | 5056 "endif") |
5056 "*Keywords to complete when at first word of a line in declarative scope. | 5057 "*Keywords to complete when at first word of a line in declarative scope. |
5057 \(eg. initial, always, begin, assign.) | 5058 \(Eg. initial, always, begin, assign.) |
5058 The procedures and variables defined within the Verilog program | 5059 The procedures and variables defined within the Verilog program |
5059 will be completed runtime and should not be added to this list.") | 5060 will be completed at runtime and should not be added to this list.") |
5060 | 5061 |
5061 (defvar verilog-defun-keywords | 5062 (defvar verilog-defun-keywords |
5062 (append | 5063 (append |
5063 '( | 5064 '( |
5064 "always" "always_comb" "always_ff" "always_latch" "assign" | 5065 "always" "always_comb" "always_ff" "always_latch" "assign" |
5066 "specify" "endspecify" "function" "endfunction" "initial" "final" | 5067 "specify" "endspecify" "function" "endfunction" "initial" "final" |
5067 "task" "endtask" "primitive" "endprimitive" | 5068 "task" "endtask" "primitive" "endprimitive" |
5068 ) | 5069 ) |
5069 verilog-type-keywords) | 5070 verilog-type-keywords) |
5070 "*Keywords to complete when at first word of a line in declarative scope. | 5071 "*Keywords to complete when at first word of a line in declarative scope. |
5071 \(eg. initial, always, begin, assign.) | 5072 \(Eg. initial, always, begin, assign.) |
5072 The procedures and variables defined within the Verilog program | 5073 The procedures and variables defined within the Verilog program |
5073 will be completed runtime and should not be added to this list.") | 5074 will be completed at runtime and should not be added to this list.") |
5074 | 5075 |
5075 (defvar verilog-block-keywords | 5076 (defvar verilog-block-keywords |
5076 '( | 5077 '( |
5077 "begin" "break" "case" "continue" "else" "end" "endfunction" | 5078 "begin" "break" "case" "continue" "else" "end" "endfunction" |
5078 "endgenerate" "endinterface" "endpackage" "endspecify" "endtask" | 5079 "endgenerate" "endinterface" "endpackage" "endspecify" "endtask" |
5079 "for" "fork" "if" "join" "join_any" "join_none" "repeat" "return" | 5080 "for" "fork" "if" "join" "join_any" "join_none" "repeat" "return" |
5080 "while") | 5081 "while") |
5081 "*Keywords to complete when at first word of a line in behavioral scope. | 5082 "*Keywords to complete when at first word of a line in behavioral scope. |
5082 \(eg. begin, if, then, else, for, fork.) | 5083 \(Eg. begin, if, then, else, for, fork.) |
5083 The procedures and variables defined within the Verilog program | 5084 The procedures and variables defined within the Verilog program |
5084 will be completed runtime and should not be added to this list.") | 5085 will be completed at runtime and should not be added to this list.") |
5085 | 5086 |
5086 (defvar verilog-tf-keywords | 5087 (defvar verilog-tf-keywords |
5087 '("begin" "break" "fork" "join" "join_any" "join_none" "case" "end" "endtask" "endfunction" "if" "else" "for" "while" "repeat") | 5088 '("begin" "break" "fork" "join" "join_any" "join_none" "case" "end" "endtask" "endfunction" "if" "else" "for" "while" "repeat") |
5088 "*Keywords to complete when at first word of a line in a task or function. | 5089 "*Keywords to complete when at first word of a line in a task or function. |
5089 \(eg. begin, if, then, else, for, fork.) | 5090 \(Eg. begin, if, then, else, for, fork.) |
5090 The procedures and variables defined within the Verilog program | 5091 The procedures and variables defined within the Verilog program |
5091 will be completed runtime and should not be added to this list.") | 5092 will be completed at runtime and should not be added to this list.") |
5092 | 5093 |
5093 (defvar verilog-case-keywords | 5094 (defvar verilog-case-keywords |
5094 '("begin" "fork" "join" "join_any" "join_none" "case" "end" "endcase" "if" "else" "for" "repeat") | 5095 '("begin" "fork" "join" "join_any" "join_none" "case" "end" "endcase" "if" "else" "for" "repeat") |
5095 "*Keywords to complete when at first word of a line in case scope. | 5096 "*Keywords to complete when at first word of a line in case scope. |
5096 \(eg. begin, if, then, else, for, fork.) | 5097 \(Eg. begin, if, then, else, for, fork.) |
5097 The procedures and variables defined within the Verilog program | 5098 The procedures and variables defined within the Verilog program |
5098 will be completed runtime and should not be added to this list.") | 5099 will be completed at runtime and should not be added to this list.") |
5099 | 5100 |
5100 (defvar verilog-separator-keywords | 5101 (defvar verilog-separator-keywords |
5101 '("else" "then" "begin") | 5102 '("else" "then" "begin") |
5102 "*Keywords to complete when NOT standing at the first word of a statement. | 5103 "*Keywords to complete when NOT standing at the first word of a statement. |
5103 \(eg. else, then.) | 5104 \(Eg. else, then.) |
5104 Variables and function names defined within the | 5105 Variables and function names defined within the Verilog program |
5105 Verilog program are completed runtime and should not be added to this list.") | 5106 will be completed at runtime and should not be added to this list.") |
5106 | 5107 |
5107 (defun verilog-string-diff (str1 str2) | 5108 (defun verilog-string-diff (str1 str2) |
5108 "Return index of first letter where STR1 and STR2 differs." | 5109 "Return index of first letter where STR1 and STR2 differs." |
5109 (catch 'done | 5110 (catch 'done |
5110 (let ((diff 0)) | 5111 (let ((diff 0)) |
5208 | 5209 |
5209 (defun verilog-completion (verilog-str verilog-pred verilog-flag) | 5210 (defun verilog-completion (verilog-str verilog-pred verilog-flag) |
5210 "Function passed to `completing-read', `try-completion' or `all-completions'. | 5211 "Function passed to `completing-read', `try-completion' or `all-completions'. |
5211 Called to get completion on VERILOG-STR. If VERILOG-PRED is non-nil, it | 5212 Called to get completion on VERILOG-STR. If VERILOG-PRED is non-nil, it |
5212 must be a function to be called for every match to check if this should | 5213 must be a function to be called for every match to check if this should |
5213 really be a match. If VERILOG-FLAG is t, the function returns a list of all | 5214 really be a match. If VERILOG-FLAG is t, the function returns a list of |
5214 possible completions. If VERILOG-FLAG is nil it returns a string, the | 5215 all possible completions. If VERILOG-FLAG is nil it returns a string, |
5215 longest possible completion, or t if STR is an exact match. If VERILOG-FLAG | 5216 the longest possible completion, or t if VERILOG-STR is an exact match. |
5216 is 'lambda, the function returns t if STR is an exact match, nil | 5217 If VERILOG-FLAG is 'lambda, the function returns t if VERILOG-STR is an |
5217 otherwise." | 5218 exact match, nil otherwise." |
5218 (save-excursion | 5219 (save-excursion |
5219 (let ((verilog-all nil)) | 5220 (let ((verilog-all nil)) |
5220 ;; Set buffer to use for searching labels. This should be set | 5221 ;; Set buffer to use for searching labels. This should be set |
5221 ;; within functions which use verilog-completions | 5222 ;; within functions which use verilog-completions |
5222 (set-buffer verilog-buffer-to-use) | 5223 (set-buffer verilog-buffer-to-use) |
5719 (nth 0 sigs)) | 5720 (nth 0 sigs)) |
5720 (defsubst verilog-alw-get-uses-delayed (sigs) | 5721 (defsubst verilog-alw-get-uses-delayed (sigs) |
5721 (nth 3 sigs)) | 5722 (nth 3 sigs)) |
5722 | 5723 |
5723 (defun verilog-signals-not-in (in-list not-list) | 5724 (defun verilog-signals-not-in (in-list not-list) |
5724 "Return list of signals in IN-LIST that aren't also in NOT-LIST, | 5725 "Return list of signals in IN-LIST that aren't also in NOT-LIST. |
5725 and also remove any duplicates in IN-LIST. | 5726 Also remove any duplicates in IN-LIST. |
5726 Signals must be in standard (base vector) form." | 5727 Signals must be in standard (base vector) form." |
5727 (let (out-list) | 5728 (let (out-list) |
5728 (while in-list | 5729 (while in-list |
5729 (if (not (or (assoc (car (car in-list)) not-list) | 5730 (if (not (or (assoc (car (car in-list)) not-list) |
5730 (assoc (car (car in-list)) out-list))) | 5731 (assoc (car (car in-list)) out-list))) |
6111 (defsubst verilog-modi-get-sub-inputs (modi) | 6112 (defsubst verilog-modi-get-sub-inputs (modi) |
6112 (aref (verilog-modi-get-sub-decls modi) 2)) | 6113 (aref (verilog-modi-get-sub-decls modi) 2)) |
6113 | 6114 |
6114 | 6115 |
6115 (defun verilog-read-sub-decls-sig (submodi comment port sig vec multidim) | 6116 (defun verilog-read-sub-decls-sig (submodi comment port sig vec multidim) |
6116 "For verilog-read-sub-decls-line, add a signal." | 6117 "For `verilog-read-sub-decls-line', add a signal." |
6117 (let (portdata) | 6118 (let (portdata) |
6118 (when sig | 6119 (when sig |
6119 (setq port (verilog-symbol-detick-denumber port)) | 6120 (setq port (verilog-symbol-detick-denumber port)) |
6120 (setq sig (verilog-symbol-detick-denumber sig)) | 6121 (setq sig (verilog-symbol-detick-denumber sig)) |
6121 (if sig (setq sig (verilog-string-replace-matches "^[---+~!|&]+" "" nil nil sig))) | 6122 (if sig (setq sig (verilog-string-replace-matches "^[---+~!|&]+" "" nil nil sig))) |
6143 sigs-in))) | 6144 sigs-in))) |
6144 ;; (t -- warning pin isn't defined.) ; Leave for lint tool | 6145 ;; (t -- warning pin isn't defined.) ; Leave for lint tool |
6145 ))))) | 6146 ))))) |
6146 | 6147 |
6147 (defun verilog-read-sub-decls-line (submodi comment) | 6148 (defun verilog-read-sub-decls-line (submodi comment) |
6148 "For read-sub-decls, read lines of port defs until none match anymore. | 6149 "For `verilog-read-sub-decls', read lines of port defs until none match anymore. |
6149 Return the list of signals found, using submodi to look up each port." | 6150 Return the list of signals found, using submodi to look up each port." |
6150 (let (done port sig vec multidim) | 6151 (let (done port sig vec multidim) |
6151 (save-excursion | 6152 (save-excursion |
6152 (forward-line 1) | 6153 (forward-line 1) |
6153 (while (not done) | 6154 (while (not done) |
6264 (vector (verilog-signals-combine-bus (nreverse sigs-out)) | 6265 (vector (verilog-signals-combine-bus (nreverse sigs-out)) |
6265 (verilog-signals-combine-bus (nreverse sigs-inout)) | 6266 (verilog-signals-combine-bus (nreverse sigs-inout)) |
6266 (verilog-signals-combine-bus (nreverse sigs-in)))))) | 6267 (verilog-signals-combine-bus (nreverse sigs-in)))))) |
6267 | 6268 |
6268 (defun verilog-read-inst-pins () | 6269 (defun verilog-read-inst-pins () |
6269 "Return a array of [ pins ] for the current instantiation at point. | 6270 "Return an array of [ pins ] for the current instantiation at point. |
6270 For example if declare A A (.B(SIG)) then B will be included in the list." | 6271 For example if declare A A (.B(SIG)) then B will be included in the list." |
6271 (save-excursion | 6272 (save-excursion |
6272 (let ((end-mod-point (point)) ;; presume at /*AUTOINST*/ point | 6273 (let ((end-mod-point (point)) ;; presume at /*AUTOINST*/ point |
6273 pins pin) | 6274 pins pin) |
6274 (verilog-backward-open-paren) | 6275 (verilog-backward-open-paren) |
6279 (when (looking-at "(") | 6280 (when (looking-at "(") |
6280 (forward-sexp 1)))) | 6281 (forward-sexp 1)))) |
6281 (vector pins)))) | 6282 (vector pins)))) |
6282 | 6283 |
6283 (defun verilog-read-arg-pins () | 6284 (defun verilog-read-arg-pins () |
6284 "Return a array of [ pins ] for the current argument declaration at point." | 6285 "Return an array of [ pins ] for the current argument declaration at point." |
6285 (save-excursion | 6286 (save-excursion |
6286 (let ((end-mod-point (point)) ;; presume at /*AUTOARG*/ point | 6287 (let ((end-mod-point (point)) ;; presume at /*AUTOARG*/ point |
6287 pins pin) | 6288 pins pin) |
6288 (verilog-backward-open-paren) | 6289 (verilog-backward-open-paren) |
6289 (while (re-search-forward "\\([a-zA-Z0-9$_.%`]+\\)" end-mod-point t) | 6290 (while (re-search-forward "\\([a-zA-Z0-9$_.%`]+\\)" end-mod-point t) |
6508 | 6509 |
6509 | 6510 |
6510 (defun verilog-read-auto-template (module) | 6511 (defun verilog-read-auto-template (module) |
6511 "Look for a auto_template for the instantiation of the given MODULE. | 6512 "Look for a auto_template for the instantiation of the given MODULE. |
6512 If found returns the signal name connections. Return REGEXP and | 6513 If found returns the signal name connections. Return REGEXP and |
6513 list of ( (signal_name connection_name)... )" | 6514 list of ( (signal_name connection_name)... )." |
6514 (save-excursion | 6515 (save-excursion |
6515 ;; Find beginning | 6516 ;; Find beginning |
6516 (let ((tpl-regexp "\\([0-9]+\\)") | 6517 (let ((tpl-regexp "\\([0-9]+\\)") |
6517 (lineno 0) | 6518 (lineno 0) |
6518 (templateno 0) | 6519 (templateno 0) |
6724 (verilog-read-defines inc nil t))))) | 6725 (verilog-read-defines inc nil t))))) |
6725 | 6726 |
6726 (defun verilog-read-signals (&optional start end) | 6727 (defun verilog-read-signals (&optional start end) |
6727 "Return a simple list of all possible signals in the file. | 6728 "Return a simple list of all possible signals in the file. |
6728 Bounded by optional region from START to END. Overly aggressive but fast. | 6729 Bounded by optional region from START to END. Overly aggressive but fast. |
6729 Some macros and such are also found and included. For dinotrace.el" | 6730 Some macros and such are also found and included. For dinotrace.el." |
6730 (let (sigs-all keywd) | 6731 (let (sigs-all keywd) |
6731 (progn;save-excursion | 6732 (progn;save-excursion |
6732 (goto-char (or start (point-min))) | 6733 (goto-char (or start (point-min))) |
6733 (setq end (or end (point-max))) | 6734 (setq end (or end (point-max))) |
6734 (while (re-search-forward "[\"/a-zA-Z_.%`]" end t) | 6735 (while (re-search-forward "[\"/a-zA-Z_.%`]" end t) |
6819 ;; Default - ignore; no warning | 6820 ;; Default - ignore; no warning |
6820 )))) | 6821 )))) |
6821 ;;(verilog-getopt (list "+libext+.a+.b" "+incdir+foodir" "+define+a+aval" "-f" "otherf" "-v" "library" "-y" "dir")) | 6822 ;;(verilog-getopt (list "+libext+.a+.b" "+incdir+foodir" "+define+a+aval" "-f" "otherf" "-v" "library" "-y" "dir")) |
6822 | 6823 |
6823 (defun verilog-getopt-file (filename) | 6824 (defun verilog-getopt-file (filename) |
6824 "Read verilog options from the specified FILENAME." | 6825 "Read Verilog options from the specified FILENAME." |
6825 (save-excursion | 6826 (save-excursion |
6826 (let ((fns (verilog-library-filenames filename (buffer-file-name))) | 6827 (let ((fns (verilog-library-filenames filename (buffer-file-name))) |
6827 (orig-buffer (current-buffer)) | 6828 (orig-buffer (current-buffer)) |
6828 line) | 6829 line) |
6829 (if fns | 6830 (if fns |
6856 ;; Allow user to customize | 6857 ;; Allow user to customize |
6857 (run-hooks 'verilog-getopt-flags-hook)) | 6858 (run-hooks 'verilog-getopt-flags-hook)) |
6858 | 6859 |
6859 (defun verilog-add-list-unique (varref object) | 6860 (defun verilog-add-list-unique (varref object) |
6860 "Append to VARREF list the given OBJECT, | 6861 "Append to VARREF list the given OBJECT, |
6861 unless it is already a member of the variable's list" | 6862 unless it is already a member of the variable's list." |
6862 (unless (member object (symbol-value varref)) | 6863 (unless (member object (symbol-value varref)) |
6863 (set varref (append (symbol-value varref) (list object)))) | 6864 (set varref (append (symbol-value varref) (list object)))) |
6864 varref) | 6865 varref) |
6865 ;;(progn (setq l '()) (verilog-add-list-unique `l "a") (verilog-add-list-unique `l "a") l) | 6866 ;;(progn (setq l '()) (verilog-add-list-unique `l "a") (verilog-add-list-unique `l "a") l) |
6866 | 6867 |
6892 (or (string-match "^[0-9 \t:]+$" symbol) | 6893 (or (string-match "^[0-9 \t:]+$" symbol) |
6893 (string-match "^[---]*[0-9]+$" symbol) | 6894 (string-match "^[---]*[0-9]+$" symbol) |
6894 (string-match "^[0-9 \t]+'s?[hdxbo][0-9a-fA-F_xz? \t]*$" symbol))) | 6895 (string-match "^[0-9 \t]+'s?[hdxbo][0-9a-fA-F_xz? \t]*$" symbol))) |
6895 | 6896 |
6896 (defun verilog-symbol-detick (symbol wing-it) | 6897 (defun verilog-symbol-detick (symbol wing-it) |
6897 "Return a expanded SYMBOL name without any defines. | 6898 "Return an expanded SYMBOL name without any defines. |
6898 If the variable vh-{symbol} is defined, return that value. | 6899 If the variable vh-{symbol} is defined, return that value. |
6899 If undefined, and WING-IT, return just SYMBOL without the tick, else nil." | 6900 If undefined, and WING-IT, return just SYMBOL without the tick, else nil." |
6900 (while (and symbol (string-match "^`" symbol)) | 6901 (while (and symbol (string-match "^`" symbol)) |
6901 (setq symbol (substring symbol 1)) | 6902 (setq symbol (substring symbol 1)) |
6902 (setq symbol | 6903 (setq symbol |
6927 (if (verilog-is-number symbol) | 6928 (if (verilog-is-number symbol) |
6928 nil | 6929 nil |
6929 symbol)) | 6930 symbol)) |
6930 | 6931 |
6931 (defun verilog-symbol-detick-text (text) | 6932 (defun verilog-symbol-detick-text (text) |
6932 "Return TEXT with any without any known defines. | 6933 "Return TEXT without any known defines. |
6933 If the variable vh-{symbol} is defined, substitute that value." | 6934 If the variable vh-{symbol} is defined, substitute that value." |
6934 (let ((ok t) symbol val) | 6935 (let ((ok t) symbol val) |
6935 (while (and ok (string-match "`\\([a-zA-Z0-9_]+\\)" text)) | 6936 (while (and ok (string-match "`\\([a-zA-Z0-9_]+\\)" text)) |
6936 (setq symbol (match-string 1 text)) | 6937 (setq symbol (match-string 1 text)) |
6937 (message symbol) | 6938 (message symbol) |
7032 | 7033 |
7033 (make-variable-buffer-local 'verilog-modi-cache-list) | 7034 (make-variable-buffer-local 'verilog-modi-cache-list) |
7034 | 7035 |
7035 (defvar verilog-modi-cache-preserve-tick nil | 7036 (defvar verilog-modi-cache-preserve-tick nil |
7036 "Modification tick after which the cache is still considered valid. | 7037 "Modification tick after which the cache is still considered valid. |
7037 Use verilog-preserve-cache's to set") | 7038 Use `verilog-preserve-cache' to set it.") |
7038 (defvar verilog-modi-cache-preserve-buffer nil | 7039 (defvar verilog-modi-cache-preserve-buffer nil |
7039 "Modification tick after which the cache is still considered valid. | 7040 "Modification tick after which the cache is still considered valid. |
7040 Use verilog-preserve-cache's to set") | 7041 Use `verilog-preserve-cache' to set it.") |
7041 | 7042 |
7042 (defun verilog-modi-current () | 7043 (defun verilog-modi-current () |
7043 "Return the modi structure for the module currently at point." | 7044 "Return the modi structure for the module currently at point." |
7044 (let* (name pt) | 7045 (let* (name pt) |
7045 ;; read current module's name | 7046 ;; read current module's name |
7099 (aref modi 1)) | 7100 (aref modi 1)) |
7100 (defsubst verilog-modi-point (modi) | 7101 (defsubst verilog-modi-point (modi) |
7101 (aref modi 2)) | 7102 (aref modi 2)) |
7102 | 7103 |
7103 (defun verilog-modi-filename (modi) | 7104 (defun verilog-modi-filename (modi) |
7104 "Filename of MODI, or name of buffer if its never been saved." | 7105 "Filename of MODI, or name of buffer if it's never been saved." |
7105 (if (bufferp (verilog-modi-file-or-buffer modi)) | 7106 (if (bufferp (verilog-modi-file-or-buffer modi)) |
7106 (or (buffer-file-name (verilog-modi-file-or-buffer modi)) | 7107 (or (buffer-file-name (verilog-modi-file-or-buffer modi)) |
7107 (buffer-name (verilog-modi-file-or-buffer modi))) | 7108 (buffer-name (verilog-modi-file-or-buffer modi))) |
7108 (verilog-modi-file-or-buffer modi))) | 7109 (verilog-modi-file-or-buffer modi))) |
7109 | 7110 |
7410 (end-of-line) | 7411 (end-of-line) |
7411 (delete-region pt (point)) | 7412 (delete-region pt (point)) |
7412 (forward-line 1)))) | 7413 (forward-line 1)))) |
7413 | 7414 |
7414 (defun verilog-forward-close-paren () | 7415 (defun verilog-forward-close-paren () |
7415 "Find the close parenthesis that match the current point, | 7416 "Find the close parenthesis that match the current point. |
7416 ignore other close parenthesis with matching open parens" | 7417 Ignore other close parenthesis with matching open parens." |
7417 (let ((parens 1)) | 7418 (let ((parens 1)) |
7418 (while (> parens 0) | 7419 (while (> parens 0) |
7419 (unless (verilog-re-search-forward-quick "[()]" nil t) | 7420 (unless (verilog-re-search-forward-quick "[()]" nil t) |
7420 (error "%s: Mismatching ()" (verilog-point-text))) | 7421 (error "%s: Mismatching ()" (verilog-point-text))) |
7421 (cond ((= (preceding-char) ?\( ) | 7422 (cond ((= (preceding-char) ?\( ) |
7422 (setq parens (1+ parens))) | 7423 (setq parens (1+ parens))) |
7423 ((= (preceding-char) ?\) ) | 7424 ((= (preceding-char) ?\) ) |
7424 (setq parens (1- parens))))))) | 7425 (setq parens (1- parens))))))) |
7425 | 7426 |
7426 (defun verilog-backward-open-paren () | 7427 (defun verilog-backward-open-paren () |
7427 "Find the open parenthesis that match the current point, | 7428 "Find the open parenthesis that match the current point. |
7428 ignore other open parenthesis with matching close parens" | 7429 Ignore other open parenthesis with matching close parens." |
7429 (let ((parens 1)) | 7430 (let ((parens 1)) |
7430 (while (> parens 0) | 7431 (while (> parens 0) |
7431 (unless (verilog-re-search-backward-quick "[()]" nil t) | 7432 (unless (verilog-re-search-backward-quick "[()]" nil t) |
7432 (error "%s: Mismatching ()" (verilog-point-text))) | 7433 (error "%s: Mismatching ()" (verilog-point-text))) |
7433 (cond ((= (following-char) ?\) ) | 7434 (cond ((= (following-char) ?\) ) |
7434 (setq parens (1+ parens))) | 7435 (setq parens (1+ parens))) |
7435 ((= (following-char) ?\( ) | 7436 ((= (following-char) ?\( ) |
7436 (setq parens (1- parens))))))) | 7437 (setq parens (1- parens))))))) |
7437 | 7438 |
7438 (defun verilog-backward-open-bracket () | 7439 (defun verilog-backward-open-bracket () |
7439 "Find the open bracket that match the current point, | 7440 "Find the open bracket that match the current point. |
7440 ignore other open bracket with matching close bracket" | 7441 Ignore other open bracket with matching close bracket." |
7441 (let ((parens 1)) | 7442 (let ((parens 1)) |
7442 (while (> parens 0) | 7443 (while (> parens 0) |
7443 (unless (verilog-re-search-backward-quick "[][]" nil t) | 7444 (unless (verilog-re-search-backward-quick "[][]" nil t) |
7444 (error "%s: Mismatching []" (verilog-point-text))) | 7445 (error "%s: Mismatching []" (verilog-point-text))) |
7445 (cond ((= (following-char) ?\] ) | 7446 (cond ((= (following-char) ?\] ) |
7550 "Examine legacy non-AUTO code and insert AUTOs in appropriate places. | 7551 "Examine legacy non-AUTO code and insert AUTOs in appropriate places. |
7551 | 7552 |
7552 Any always @ blocks with sensitivity lists that match computed lists will | 7553 Any always @ blocks with sensitivity lists that match computed lists will |
7553 be replaced with /*AS*/ comments. | 7554 be replaced with /*AS*/ comments. |
7554 | 7555 |
7555 Any cells will get /*AUTOINST*/ added to the end of the pin list. Pins with | 7556 Any cells will get /*AUTOINST*/ added to the end of the pin list. |
7556 have identical names will be deleted. | 7557 Pins with have identical names will be deleted. |
7557 | 7558 |
7558 Argument lists will not be deleted, /*AUTOARG*/ will only be inserted to | 7559 Argument lists will not be deleted, /*AUTOARG*/ will only be inserted to |
7559 support adding new ports. You may wish to delete older ports yourself. | 7560 support adding new ports. You may wish to delete older ports yourself. |
7560 | 7561 |
7561 For example: | 7562 For example: |
7765 output o; | 7766 output o; |
7766 endmodule | 7767 endmodule |
7767 | 7768 |
7768 Any ports declared between the ( and /*AUTOARG*/ are presumed to be | 7769 Any ports declared between the ( and /*AUTOARG*/ are presumed to be |
7769 predeclared and are not redeclared by AUTOARG. AUTOARG will make a | 7770 predeclared and are not redeclared by AUTOARG. AUTOARG will make a |
7770 conservative guess on adding a comma for the first signal, if you have any | 7771 conservative guess on adding a comma for the first signal, if you have |
7771 ifdefs or complicated expressions before the AUTOARG you will need to | 7772 any ifdefs or complicated expressions before the AUTOARG you will need |
7772 choose the comma yourself. | 7773 to choose the comma yourself. |
7773 | 7774 |
7774 Avoid declaring ports manually, as it makes code harder to maintain." | 7775 Avoid declaring ports manually, as it makes code harder to maintain." |
7775 (save-excursion | 7776 (save-excursion |
7776 (let ((modi (verilog-modi-current)) | 7777 (let ((modi (verilog-modi-current)) |
7777 (skip-pins (aref (verilog-read-arg-pins) 0))) | 7778 (skip-pins (aref (verilog-read-arg-pins) 0))) |
7897 | 7898 |
7898 (defun verilog-auto-star () | 7899 (defun verilog-auto-star () |
7899 "Expand SystemVerilog .* pins, as part of \\[verilog-auto]. | 7900 "Expand SystemVerilog .* pins, as part of \\[verilog-auto]. |
7900 | 7901 |
7901 If `verilog-auto-star-expand' is set, .* pins are treated if they were | 7902 If `verilog-auto-star-expand' is set, .* pins are treated if they were |
7902 AUTOINST statements, otherwise they are ignored. For safety, Verilog-Mode | 7903 AUTOINST statements, otherwise they are ignored. For safety, Verilog mode |
7903 will also ignore any .* that are not last in your pin list (this prevents | 7904 will also ignore any .* that are not last in your pin list (this prevents |
7904 it from deleting pins following the .* when it expands the AUTOINST.) | 7905 it from deleting pins following the .* when it expands the AUTOINST.) |
7905 | 7906 |
7906 On writing your file, unless `verilog-auto-star-save' is set, any | 7907 On writing your file, unless `verilog-auto-star-save' is set, any |
7907 non-templated expanded pins will be removed. You may do this at any time | 7908 non-templated expanded pins will be removed. You may do this at any time |
7933 In templates you must have one signal per line, ending in a ), or ));, | 7934 In templates you must have one signal per line, ending in a ), or ));, |
7934 and have proper () nesting, including a final ); to end the template. | 7935 and have proper () nesting, including a final ); to end the template. |
7935 | 7936 |
7936 Typedefs must match `verilog-typedef-regexp', which is disabled by default. | 7937 Typedefs must match `verilog-typedef-regexp', which is disabled by default. |
7937 | 7938 |
7938 SystemVerilog multidimmensional input/output has only experimental support. | 7939 SystemVerilog multidimensional input/output has only experimental support. |
7939 | 7940 |
7940 For example, first take the submodule inst.v: | 7941 For example, first take the submodule inst.v: |
7941 | 7942 |
7942 module inst (o,i) | 7943 module inst (o,i) |
7943 output [31:0] o; | 7944 output [31:0] o; |
7968 Where the list of inputs and outputs came from the inst module. | 7969 Where the list of inputs and outputs came from the inst module. |
7969 | 7970 |
7970 Exceptions: | 7971 Exceptions: |
7971 | 7972 |
7972 Unless you are instantiating a module multiple times, or the module is | 7973 Unless you are instantiating a module multiple times, or the module is |
7973 something trivial like a adder, DO NOT CHANGE SIGNAL NAMES ACROSS HIERARCHY. | 7974 something trivial like an adder, DO NOT CHANGE SIGNAL NAMES ACROSS HIERARCHY. |
7974 It just makes for unmaintainable code. To sanitize signal names, try | 7975 It just makes for unmaintainable code. To sanitize signal names, try |
7975 vrename from http://www.veripool.com | 7976 vrename from http://www.veripool.com. |
7976 | 7977 |
7977 When you need to violate this suggestion there are two ways to list | 7978 When you need to violate this suggestion there are two ways to list |
7978 exceptions, placing them before the AUTOINST, or using templates. | 7979 exceptions, placing them before the AUTOINST, or using templates. |
7979 | 7980 |
7980 Any ports defined before the /*AUTOINST*/ are not included in the list of | 7981 Any ports defined before the /*AUTOINST*/ are not included in the list of |
7999 /* instantiating_module_name AUTO_TEMPLATE ( | 8000 /* instantiating_module_name AUTO_TEMPLATE ( |
8000 .sig3 (sigz[]), | 8001 .sig3 (sigz[]), |
8001 ); | 8002 ); |
8002 */ | 8003 */ |
8003 | 8004 |
8004 Templates go ABOVE the instantiation(s). When a instantiation is | 8005 Templates go ABOVE the instantiation(s). When an instantiation is |
8005 expanded `verilog-mode' simply searches up for the closest template. | 8006 expanded `verilog-mode' simply searches up for the closest template. |
8006 Thus you can have multiple templates for the same module, just alternate | 8007 Thus you can have multiple templates for the same module, just alternate |
8007 between the template for a instantiation and the instantiation itself. | 8008 between the template for an instantiation and the instantiation itself. |
8008 | 8009 |
8009 The module name must be the same as the name of the module in the | 8010 The module name must be the same as the name of the module in the |
8010 instantiation name, and the code \"AUTO_TEMPLATE\" must be in these exact | 8011 instantiation name, and the code \"AUTO_TEMPLATE\" must be in these exact |
8011 words and capitalized. Only signals that must be different for each | 8012 words and capitalized. Only signals that must be different for each |
8012 instantiation need to be listed. | 8013 instantiation need to be listed. |
8108 | 8109 |
8109 A template entry of the form | 8110 A template entry of the form |
8110 | 8111 |
8111 .pci_req\\([0-9]+\\)_l (pci_req_jtag_[\\1]), | 8112 .pci_req\\([0-9]+\\)_l (pci_req_jtag_[\\1]), |
8112 | 8113 |
8113 will apply a Emacs style regular expression search for any port beginning | 8114 will apply an Emacs style regular expression search for any port beginning |
8114 in pci_req followed by numbers and ending in _l and connecting that to | 8115 in pci_req followed by numbers and ending in _l and connecting that to |
8115 the pci_req_jtag_[] net, with the bus subscript coming from what matches | 8116 the pci_req_jtag_[] net, with the bus subscript coming from what matches |
8116 inside the first set of \\( \\). Thus pci_req2_l becomes pci_req_jtag_[2]. | 8117 inside the first set of \\( \\). Thus pci_req2_l becomes pci_req_jtag_[2]. |
8117 | 8118 |
8118 Since \\([0-9]+\\) is so common and ugly to read, a @ in the port name | 8119 Since \\([0-9]+\\) is so common and ugly to read, a @ in the port name |
8137 instantiation number. The MAPVALIDP1X example above would put @+1 modulo | 8138 instantiation number. The MAPVALIDP1X example above would put @+1 modulo |
8138 4 into the brackets. Quote all double-quotes inside the expression with | 8139 4 into the brackets. Quote all double-quotes inside the expression with |
8139 a leading backslash (\\\"). There are special variables defined that are | 8140 a leading backslash (\\\"). There are special variables defined that are |
8140 useful in these Lisp functions: | 8141 useful in these Lisp functions: |
8141 | 8142 |
8142 vl-name Name portion of the input/output port | 8143 vl-name Name portion of the input/output port. |
8143 vl-bits Bus bits portion of the input/output port ('[2:0]') | 8144 vl-bits Bus bits portion of the input/output port ('[2:0]'). |
8144 vl-width Width of the input/output port ('3' for [2:0]) | 8145 vl-width Width of the input/output port ('3' for [2:0]). |
8145 May be a (...) expression if bits isn't a constant. | 8146 May be a (...) expression if bits isn't a constant. |
8146 vl-dir Direction of the pin input/output/inout. | 8147 vl-dir Direction of the pin input/output/inout. |
8147 vl-cell-type Module name/type of the cell ('psm_mas') | 8148 vl-cell-type Module name/type of the cell ('psm_mas'). |
8148 vl-cell-name Instance name of the cell ('ms2m') | 8149 vl-cell-name Instance name of the cell ('ms2m'). |
8149 | 8150 |
8150 Normal Lisp variables may be used in expressions. See | 8151 Normal Lisp variables may be used in expressions. See |
8151 `verilog-read-defines' which can set vh-{definename} variables for use | 8152 `verilog-read-defines' which can set vh-{definename} variables for use |
8152 here. Also, any comments of the form: | 8153 here. Also, any comments of the form: |
8153 | 8154 |
8156 will evaluate any Lisp expression inside the parenthesis between the | 8157 will evaluate any Lisp expression inside the parenthesis between the |
8157 beginning of the buffer and the point of the AUTOINST. This allows | 8158 beginning of the buffer and the point of the AUTOINST. This allows |
8158 functions to be defined or variables to be changed between instantiations. | 8159 functions to be defined or variables to be changed between instantiations. |
8159 | 8160 |
8160 Note that when using lisp expressions errors may occur when @ is not a | 8161 Note that when using lisp expressions errors may occur when @ is not a |
8161 number, you may need to use the standard Emacs Lisp functions | 8162 number; you may need to use the standard Emacs Lisp functions |
8162 `number-to-string' and `string-to-number'. | 8163 `number-to-string' and `string-to-number'. |
8163 | 8164 |
8164 After the evaluation is completed, @ substitution and [] substitution | 8165 After the evaluation is completed, @ substitution and [] substitution |
8165 occur." | 8166 occur." |
8166 (save-excursion | 8167 (save-excursion |
8461 in AUTO_TEMPLATEs. | 8462 in AUTO_TEMPLATEs. |
8462 | 8463 |
8463 This does NOT work on memories or SystemVerilog .name connections, | 8464 This does NOT work on memories or SystemVerilog .name connections, |
8464 declare those yourself. | 8465 declare those yourself. |
8465 | 8466 |
8466 Verilog-mode will add \"Couldn't Merge\" comments to signals it cannot | 8467 Verilog mode will add \"Couldn't Merge\" comments to signals it cannot |
8467 determine how to bus together. This occurs when you have ports with | 8468 determine how to bus together. This occurs when you have ports with |
8468 non-numeric or non-sequential bus subscripts. If Verilog-Mode | 8469 non-numeric or non-sequential bus subscripts. If Verilog mode |
8469 mis-guessed, you'll have to declare them yourself. | 8470 mis-guessed, you'll have to declare them yourself. |
8470 | 8471 |
8471 An example (see `verilog-auto-inst' for what else is going on here): | 8472 An example (see `verilog-auto-inst' for what else is going on here): |
8472 | 8473 |
8473 module ex_wire (o,i) | 8474 module ex_wire (o,i) |
8759 | 8760 |
8760 (defun verilog-auto-inout-module () | 8761 (defun verilog-auto-inout-module () |
8761 "Expand AUTOINOUTMODULE statements, as part of \\[verilog-auto]. | 8762 "Expand AUTOINOUTMODULE statements, as part of \\[verilog-auto]. |
8762 Take input/output/inout statements from the specified module and insert | 8763 Take input/output/inout statements from the specified module and insert |
8763 into the current module. This is useful for making null templates and | 8764 into the current module. This is useful for making null templates and |
8764 shell modules which need to have identical I/O with another module. Any | 8765 shell modules which need to have identical I/O with another module. |
8765 I/O which are already defined in this module will not be redefined. | 8766 Any I/O which are already defined in this module will not be redefined. |
8766 | 8767 |
8767 Limitations: | 8768 Limitations: |
8768 If placed inside the parenthesis of a module declaration, it creates | 8769 If placed inside the parenthesis of a module declaration, it creates |
8769 Verilog 2001 style, else uses Verilog 1995 style. | 8770 Verilog 2001 style, else uses Verilog 1995 style. |
8770 | 8771 |
9168 (insert (verilog-sig-name sig) ",\n") | 9169 (insert (verilog-sig-name sig) ",\n") |
9169 (setq sig-list (cdr sig-list)))) | 9170 (setq sig-list (cdr sig-list)))) |
9170 (verilog-insert-indent "// End of automatics\n"))))) | 9171 (verilog-insert-indent "// End of automatics\n"))))) |
9171 | 9172 |
9172 (defun verilog-enum-ascii (signm elim-regexp) | 9173 (defun verilog-enum-ascii (signm elim-regexp) |
9173 "Convert a enum name SIGNM to a ascii string for insertion. | 9174 "Convert an enum name SIGNM to an ascii string for insertion. |
9174 Remove user provided prefix ELIM-REGEXP." | 9175 Remove user provided prefix ELIM-REGEXP." |
9175 (or elim-regexp (setq elim-regexp "_ DONT MATCH IT_")) | 9176 (or elim-regexp (setq elim-regexp "_ DONT MATCH IT_")) |
9176 (let ((case-fold-search t)) | 9177 (let ((case-fold-search t)) |
9177 ;; All upper becomes all lower for readability | 9178 ;; All upper becomes all lower for readability |
9178 (downcase (verilog-string-replace-matches elim-regexp "" nil nil signm)))) | 9179 (downcase (verilog-string-replace-matches elim-regexp "" nil nil signm)))) |
9651 > "generate\n" | 9652 > "generate\n" |
9652 > _ \n | 9653 > _ \n |
9653 > (- verilog-indent-level-behavioral) "endgenerate" \n > ) | 9654 > (- verilog-indent-level-behavioral) "endgenerate" \n > ) |
9654 | 9655 |
9655 (define-skeleton verilog-sk-begin | 9656 (define-skeleton verilog-sk-begin |
9656 "Insert begin end block. Uses the minibuffer to prompt for name" | 9657 "Insert begin end block. Uses the minibuffer to prompt for name." |
9657 () | 9658 () |
9658 > "begin" '(verilog-sk-prompt-name) \n | 9659 > "begin" '(verilog-sk-prompt-name) \n |
9659 > _ \n | 9660 > _ \n |
9660 > (- verilog-indent-level-behavioral) "end" | 9661 > (- verilog-indent-level-behavioral) "end" |
9661 ) | 9662 ) |
9662 | 9663 |
9663 (define-skeleton verilog-sk-fork | 9664 (define-skeleton verilog-sk-fork |
9664 "Insert an fork join block." | 9665 "Insert a fork join block." |
9665 () | 9666 () |
9666 > "fork\n" | 9667 > "fork\n" |
9667 > "begin" \n | 9668 > "begin" \n |
9668 > _ \n | 9669 > _ \n |
9669 > (- verilog-indent-level-behavioral) "end" \n | 9670 > (- verilog-indent-level-behavioral) "end" \n |
9710 (progn (setq verilog-sk-p (point)) nil) '(verilog-sk-prompt-condition) (if (> (point) verilog-sk-p) ") " -1 ) & " begin" \n | 9711 (progn (setq verilog-sk-p (point)) nil) '(verilog-sk-prompt-condition) (if (> (point) verilog-sk-p) ") " -1 ) & " begin" \n |
9711 > _ \n | 9712 > _ \n |
9712 > "end" (progn (electric-verilog-terminate-line) nil)) | 9713 > "end" (progn (electric-verilog-terminate-line) nil)) |
9713 | 9714 |
9714 (define-skeleton verilog-sk-datadef | 9715 (define-skeleton verilog-sk-datadef |
9715 "Common routine to get data definition" | 9716 "Common routine to get data definition." |
9716 () | 9717 () |
9717 '(verilog-sk-prompt-width) | -1 ("name (RET to end):" str ", ") -2 ";" \n) | 9718 '(verilog-sk-prompt-width) | -1 ("name (RET to end):" str ", ") -2 ";" \n) |
9718 | 9719 |
9719 (define-skeleton verilog-sk-input | 9720 (define-skeleton verilog-sk-input |
9720 "Insert an input definition." | 9721 "Insert an input definition." |
9904 (overlay-put ov 'mouse-face 'highlight) | 9905 (overlay-put ov 'mouse-face 'highlight) |
9905 (overlay-put ov 'local-map verilog-mode-mouse-map))))))) | 9906 (overlay-put ov 'local-map verilog-mode-mouse-map))))))) |
9906 | 9907 |
9907 | 9908 |
9908 (defun verilog-colorize-include-files-buffer () | 9909 (defun verilog-colorize-include-files-buffer () |
9909 "Colorize a include file." | 9910 "Colorize an include file." |
9910 (interactive) | 9911 (interactive) |
9911 ;; delete overlays | 9912 ;; delete overlays |
9912 (let ((overlays (overlays-in (point-min) (point-max)))) | 9913 (let ((overlays (overlays-in (point-min) (point-max)))) |
9913 (while overlays | 9914 (while overlays |
9914 (if (and | 9915 (if (and |