Mercurial > emacs
comparison lisp/progmodes/mixal-mode.el @ 66055:99e68b20efb2
(mixal-mode-syntax-table): Add \n as end-comment.
(mixal-operation-codes): Remove.
(mixal-operation-codes-alist): Immediately initialize to full value.
(mixal-add-operation-code): Remove.
(mixal-describe-operation-code): Make the arg non-optional.
Use the interactive spec instead.
Use mixal-operation-codes-alist rather than mixal-operation-codes.
(mixal-font-lock-keywords): Don't highlight comments here any more.
(mixal-font-lock-syntactic-keywords): New var.
(mixal-mode): Use it. Fix comment-start-skip.
author | Stefan Monnier <monnier@iro.umontreal.ca> |
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date | Wed, 12 Oct 2005 17:28:52 +0000 |
parents | 20752359c953 |
children | aa2acf40c91b |
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66054:9a0d9cf10142 | 66055:99e68b20efb2 |
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44 ;; | 44 ;; |
45 ;; Have fun. | 45 ;; Have fun. |
46 | 46 |
47 ;;; History: | 47 ;;; History: |
48 ;; Version 0.3: | 48 ;; Version 0.3: |
49 ;; 12/10/05: Stefan Monnier <monnier@iro.umontreal.ca> | |
50 ;; Use font-lock-syntactic-keywords to detect/mark comments. | |
51 ;; Use [^ \t\n]+ to match the operand part of a line. | |
52 ;; Drop mixal-operation-codes. | |
53 ;; Build the mixal-operation-codes-alist immediately. | |
54 ;; Use `interactive' in mixal-describe-operation-code. | |
55 ;; Remove useless ".*$" at the end of some regexps. | |
56 ;; Fix the definition of comment-start-skip. | |
49 ;; 08/10/05: sync mdk and emacs cvs | 57 ;; 08/10/05: sync mdk and emacs cvs |
50 ;; from emacs: compile-command and require-final-newline | 58 ;; from emacs: compile-command and require-final-newline |
51 ;; from mdk: see version 0.2 | 59 ;; from mdk: see version 0.2 |
52 ;; correct my email address | 60 ;; correct my email address |
53 ;; Version 0.2: | 61 ;; Version 0.2: |
77 ;; (makunbound 'mixal-mode-map) | 85 ;; (makunbound 'mixal-mode-map) |
78 | 86 |
79 ;;; Syntax table | 87 ;;; Syntax table |
80 (defvar mixal-mode-syntax-table | 88 (defvar mixal-mode-syntax-table |
81 (let ((st (make-syntax-table))) | 89 (let ((st (make-syntax-table))) |
82 ;; (modify-syntax-entry ?* "<" st) we need to do a bit more to make | 90 ;; We need to do a bit more to make fontlocking for comments work. |
83 ;; (modify-syntax-entry ?\n ">" st) fontlocking for comments work | 91 ;; See mixal-font-lock-syntactic-keywords. |
92 ;; (modify-syntax-entry ?* "<" st) | |
93 (modify-syntax-entry ?\n ">" st) | |
84 st) | 94 st) |
85 "Syntax table for `dot-mode'.") | 95 "Syntax table for `mixal-mode'.") |
86 | 96 |
87 (defvar mixal-font-lock-label-face 'font-lock-variable-name-face | 97 (defvar mixal-font-lock-label-face 'font-lock-variable-name-face |
88 "Face name to use for label names. | 98 "Face name to use for label names. |
89 Default value is that of `font-lock-variable-name-face', but you can modify | 99 Default value is that of `font-lock-variable-name-face', but you can modify |
90 its value.") | 100 its value.") |
97 (defvar mixal-font-lock-assembly-pseudoinstruction-face 'font-lock-builtin-face | 107 (defvar mixal-font-lock-assembly-pseudoinstruction-face 'font-lock-builtin-face |
98 "Face name to use for assembly pseudoinstruction names. | 108 "Face name to use for assembly pseudoinstruction names. |
99 Default value is that of `font-lock-builtin-face', but you can modify its | 109 Default value is that of `font-lock-builtin-face', but you can modify its |
100 value.") | 110 value.") |
101 | 111 |
102 (defvar mixal-operation-codes | |
103 '("NOP" "ADD" "FADD" "SUB" "FSUB" "MUL" "FMUL" "DIV" "FDIV" "NUM" "CHAR" | |
104 "HLT" "SLA" "SRA" "SLAX" "SRAX" "SLC" "SRC" "MOVE" "LDA" "LD1" "LD2" "LD3" | |
105 "LD4" "LD5" "LD6" "LDX" "LDAN" "LD1N" "LD2N" "LD3N" "LD4N" "LD5N" "LD6N" | |
106 "LDXN" "STA" "ST1" "ST2" "ST3" "ST4" "ST5" "ST6" "STX" "STJ" "STZ" "JBUS" | |
107 "IOC" "IN" "OUT" "JRAD" "JMP" "JSJ" "JOV" "JNOV" | |
108 "JL" "JE" "JG" "JGE" "JNE" "JLE" | |
109 "JAN" "J1N" "J2N" "J3N" "J4N" "J5N" "J6N" "JXN" | |
110 "JAZ" "J1Z" "J2Z" "J3Z" "J4Z" "J5Z" "J6Z" "JXZ" | |
111 "JAP" "J1P" "J2P" "J3P" "J4P" "J5P" "J6P" "JXP" | |
112 "JANN" "J1NN" "J2NN" "J3NN" "J4NN" "J5NN" "J6NN" "JXNN" | |
113 "JANZ" "J1NZ" "J2NZ" "J3NZ" "J4NZ" "J5NZ" "J6NZ" "JXNZ" | |
114 "JANP" "J1NP" "J2NP" "J3NP" "J4NP" "J5NP" "J6NP" "JXNP" | |
115 "INCA" "DECA" "ENTA" "ENNA" "INC1" "DEC1" "ENT1" "ENN1" | |
116 "INC2" "DEC2" "ENT2" "ENN2" "INC3" "DEC3" "ENT3" "ENN3" "INC4" "DEC4" | |
117 "ENT4" "ENN4" "INC5" "DEC5" "ENT5" "ENN5" "INC6" "DEC6" "ENT6" "ENN6" | |
118 "INCX" "DECX" "ENTX" "ENNX" "CMPA" "FCMP" "CMP1" "CMP2" "CMP3" "CMP4" | |
119 "CMP5" "CMP6" "CMPX") | |
120 "List of possible operation codes as strings.") | |
121 ;; (makunbound 'mixal-operation-codes) | |
122 | |
123 (defvar mixal-assembly-pseudoinstructions | 112 (defvar mixal-assembly-pseudoinstructions |
124 '("ORIG" "EQU" "CON" "ALF" "END") | 113 '("ORIG" "EQU" "CON" "ALF" "END") |
125 "List of possible assembly pseudoinstructions.") | 114 "List of possible assembly pseudoinstructions.") |
126 | 115 |
127 ;;; Font-locking: | |
128 (defvar mixal-font-lock-keywords | |
129 `(("^\\([A-Z0-9a-z]+\\).*$" | |
130 (1 mixal-font-lock-label-face)) | |
131 (,(regexp-opt mixal-operation-codes 'words) | |
132 . mixal-font-lock-operation-code-face) | |
133 (,(regexp-opt | |
134 mixal-assembly-pseudoinstructions 'words) | |
135 . mixal-font-lock-assembly-pseudoinstruction-face) | |
136 ("^[A-Z0-9a-z]*[ \t]+[A-ZO-9a-z]+[ \t]+\\(=.*=\\).*$" | |
137 (1 font-lock-constant-face)) | |
138 ("^[A-Z0-9a-z]*[ \t]+[A-Z0-9a-z]+[ \t]+[A-Z0-9a-z,():+-\\*=\" ]*\t+\\(.*\\)$" | |
139 (1 font-lock-comment-face)) | |
140 ("^\\*.*$" . font-lock-comment-face)) | |
141 "Keyword highlighting specification for `mixal-mode'.") | |
142 ;; (makunbound 'mixal-font-lock-keywords) | |
143 | |
144 ;;;; Compilation | 116 ;;;; Compilation |
145 ;; Output from mixasm is compatible with default behavior of emacs, | 117 ;; Output from mixasm is compatible with default behavior of emacs, |
146 ;; I just added a key (C-cc) and modified the make-command. | 118 ;; I just added a key (C-cc) and modified the make-command. |
147 | 119 |
148 ;;;; Indentation | 120 ;;;; Indentation |
149 ;; Tabs works well by default. | 121 ;; Tabs works well by default. |
150 | 122 |
151 ;;;; Describe | 123 ;;;; Describe |
152 (defvar mixal-operation-codes-alist '() | 124 (defvar mixal-operation-codes-alist |
125 ;; FIXME: the codes FADD, FSUB, FMUL, FDIV, JRAD, and FCMP were in | |
126 ;; mixal-operation-codes but not here. They should probably be added here. | |
127 `((LDA loading "load A" 8 field | |
128 "Put in rA the contents of cell no. M. | |
129 Uses a + when there is no sign in subfield. Subfield is left padded with | |
130 zeros to make a word." | |
131 2) | |
132 | |
133 (LDX loading "load X" 15 field | |
134 "Put in rX the contents of cell no. M. | |
135 Uses a + when there is no sign in subfield. Subfield is left padded with | |
136 zeros to make a word." | |
137 2) | |
138 | |
139 (LD1 loading "load I1" ,(+ 8 1) field | |
140 "Put in rI1 the contents of cell no. M. | |
141 Uses a + when there is no sign in subfield. Subfield is left padded with | |
142 zeros to make a word. Index registers only have 2 bytes and a sign, Trying | |
143 to set anything more that that will result in undefined behavior." | |
144 2) | |
145 | |
146 (LD2 loading "load I2" ,(+ 8 2) field | |
147 "Put in rI2 the contents of cell no. M. | |
148 Uses a + when there is no sign in subfield. Subfield is left padded with | |
149 zeros to make a word. Index registers only have 2 bytes and a sign, Trying | |
150 to set anything more that that will result in undefined behavior." | |
151 2) | |
152 | |
153 (LD3 loading "load I3" ,(+ 8 3) field | |
154 "Put in rI3 the contents of cell no. M. | |
155 Uses a + when there is no sign in subfield. Subfield is left padded with | |
156 zeros to make a word. Index registers only have 2 bytes and a sign, Trying | |
157 to set anything more that that will result in undefined behavior." | |
158 2) | |
159 | |
160 (LD4 loading "load I4" ,(+ 8 4) field | |
161 "Put in rI4 the contents of cell no. M. | |
162 Uses a + when there is no sign in subfield. Subfield is left padded with | |
163 zeros to make a word. Index registers only have 2 bytes and a sign, Trying | |
164 to set anything more that that will result in undefined behavior." | |
165 2) | |
166 | |
167 (LD5 loading "load I5" ,(+ 8 5) field | |
168 "Put in rI5 the contents of cell no. M. | |
169 Uses a + when there is no sign in subfield. Subfield is left padded with | |
170 zeros to make a word. Index registers only have 2 bytes and a sign, Trying | |
171 to set anything more that that will result in undefined behavior." | |
172 2) | |
173 | |
174 (LD6 loading "load I6" ,(+ 8 6) field | |
175 "Put in rI6 the contents of cell no. M. | |
176 Uses a + when there is no sign in subfield. Subfield is left padded with | |
177 zeros to make a word. Index registers only have 2 bytes and a sign, Trying | |
178 to set anything more that that will result in undefined behavior." | |
179 2) | |
180 | |
181 (LDAN loading "load A negative" 16 field | |
182 "Put in rA the contents of cell no. M, with opposite sign. | |
183 Uses a + when there is no sign in subfield, otherwise use the opposite sign. | |
184 Subfield is left padded with zeros to make a word." | |
185 2) | |
186 | |
187 (LDXN loading "load X negative" 23 field | |
188 "Put in rX the contents of cell no. M, with opposite sign. | |
189 Uses a + when there is no sign in subfield, otherwise use the opposite sign. | |
190 Subfield is left padded with zeros to make a word." | |
191 2) | |
192 | |
193 (LD1N loading "load I1 negative" ,(+ 16 1) field | |
194 "Put in rI1 the contents of cell no. M, with opposite sign. | |
195 Uses a + when there is no sign in subfield, otherwise use the opposite sign. | |
196 Subfield is left padded with zeros to make a word. Index registers only | |
197 have 2 bytes and a sign, Trying to set anything more that that will result | |
198 in undefined behavior." | |
199 2) | |
200 | |
201 (LD2N loading "load I2 negative" ,(+ 16 2) field | |
202 "Put in rI2 the contents of cell no. M, with opposite sign. | |
203 Uses a + when there is no sign in subfield, otherwise use the opposite sign. | |
204 Subfield is left padded with zeros to make a word. Index registers only | |
205 have 2 bytes and a sign, Trying to set anything more that that will result | |
206 in undefined behavior." | |
207 2) | |
208 | |
209 (LD3N loading "load I3 negative" ,(+ 16 3) field | |
210 "Put in rI3 the contents of cell no. M, with opposite sign. | |
211 Uses a + when there is no sign in subfield, otherwise use the opposite sign. | |
212 Subfield is left padded with zeros to make a word. Index registers only | |
213 have 2 bytes and a sign, Trying to set anything more that that will result | |
214 in undefined behavior." | |
215 2) | |
216 | |
217 (LD4N loading "load I4 negative" ,(+ 16 4) field | |
218 "Put in rI4 the contents of cell no. M, with opposite sign. | |
219 Uses a + when there is no sign in subfield, otherwise use the opposite sign. | |
220 Subfield is left padded with zeros to make a word. Index registers only | |
221 have 2 bytes and a sign, Trying to set anything more that that will result | |
222 in undefined behavior." | |
223 2) | |
224 | |
225 (LD5N loading "load I5 negative" ,(+ 16 5) field | |
226 "Put in rI5 the contents of cell no. M, with opposite sign. | |
227 Uses a + when there is no sign in subfield, otherwise use the opposite sign. | |
228 Subfield is left padded with zeros to make a word. Index registers only | |
229 have 2 bytes and a sign, Trying to set anything more that that will result | |
230 in undefined behavior." | |
231 2) | |
232 | |
233 (LD6N loading "load I6 negative" ,(+ 16 6) field | |
234 "Put in rI6 the contents of cell no. M, with opposite sign. | |
235 Uses a + when there is no sign in subfield, otherwise use the opposite sign. | |
236 Subfield is left padded with zeros to make a word. Index registers only | |
237 have 2 bytes and a sign, Trying to set anything more that that will result | |
238 in undefined behavior." | |
239 2) | |
240 | |
241 (STA storing "store A" 24 field | |
242 "Store in cell Nr. M the contents of rA. | |
243 The modification of the operation code represents the subfield of the | |
244 memory cell that is to be overwritten with bytes from a register. These | |
245 bytes are taken beginning by the rightmost side of the register. The | |
246 sign of the memory cell is not changed, unless it is part of the subfield." | |
247 2) | |
248 | |
249 (STX storing "store X" 31 field | |
250 "Store in cell Nr. M the contents of rX. | |
251 The modification of the operation code represents the subfield of the | |
252 memory cell that is to be overwritten with bytes from a register. These | |
253 bytes are taken beginning by the rightmost side of the register. The | |
254 sign of the memory cell is not changed, unless it is part of the subfield." | |
255 2) | |
256 | |
257 (ST1 storing "store I1" ,(+ 24 1) field | |
258 "Store in cell Nr. M the contents of rI1. | |
259 The modification of the operation code represents the subfield of the | |
260 memory cell that is to be overwritten with bytes from a register. These | |
261 bytes are taken beginning by the rightmost side of the register. The | |
262 sign of the memory cell is not changed, unless it is part of the subfield. | |
263 Because index registers only have 2 bytes and a sign, the rest of the bytes | |
264 are assumed to be 0." | |
265 2) | |
266 | |
267 (ST2 storing "store I2" ,(+ 24 2) field | |
268 "Store in cell Nr. M the contents of rI2. | |
269 The modification of the operation code represents the subfield of the | |
270 memory cell that is to be overwritten with bytes from a register. These | |
271 bytes are taken beginning by the rightmost side of the register. The | |
272 sign of the memory cell is not changed, unless it is part of the subfield. | |
273 Because index registers only have 2 bytes and a sign, the rest of the bytes | |
274 are assumed to be 0." | |
275 2) | |
276 | |
277 (ST3 storing "store I3" ,(+ 24 3) field | |
278 "Store in cell Nr. M the contents of rI3. | |
279 The modification of the operation code represents the subfield of the | |
280 memory cell that is to be overwritten with bytes from a register. These | |
281 bytes are taken beginning by the rightmost side of the register. The | |
282 sign of the memory cell is not changed, unless it is part of the subfield. | |
283 Because index registers only have 2 bytes and a sign, the rest of the bytes | |
284 are assumed to be 0." | |
285 2) | |
286 | |
287 (ST4 storing "store I4" ,(+ 24 4) field | |
288 "Store in cell Nr. M the contents of rI4. | |
289 The modification of the operation code represents the subfield of the | |
290 memory cell that is to be overwritten with bytes from a register. These | |
291 bytes are taken beginning by the rightmost side of the register. The | |
292 sign of the memory cell is not changed, unless it is part of the subfield. | |
293 Because index registers only have 2 bytes and a sign, the rest of the bytes | |
294 are assumed to be 0." | |
295 2) | |
296 | |
297 (ST5 storing "store I5" ,(+ 24 5) field | |
298 "Store in cell Nr. M the contents of rI5. | |
299 The modification of the operation code represents the subfield of the | |
300 memory cell that is to be overwritten with bytes from a register. These | |
301 bytes are taken beginning by the rightmost side of the register. The | |
302 sign of the memory cell is not changed, unless it is part of the subfield. | |
303 Because index registers only have 2 bytes and a sign, the rest of the bytes | |
304 are assumed to be 0." | |
305 2) | |
306 | |
307 (ST6 storing "store I6" ,(+ 24 6) field | |
308 "Store in cell Nr. M the contents of rI6. | |
309 The modification of the operation code represents the subfield of the | |
310 memory cell that is to be overwritten with bytes from a register. These | |
311 bytes are taken beginning by the rightmost side of the register. The | |
312 sign of the memory cell is not changed, unless it is part of the subfield. | |
313 Because index registers only have 2 bytes and a sign, the rest of the bytes | |
314 are assumed to be 0." | |
315 2) | |
316 | |
317 (STJ storing "store J" 32 field | |
318 "Store in cell Nr. M the contents of rJ. | |
319 The modification of the operation code represents the subfield of the | |
320 memory cell that is to be overwritten with bytes from a register. These | |
321 bytes are taken beginning by the rightmost side of the register. The sign | |
322 of rJ is always +, sign of the memory cell is not changed, unless it is | |
323 part of the subfield. The default field for STJ is (0:2)." | |
324 2) | |
325 | |
326 (STZ storing "store zero" 33 field | |
327 "Store in cell Nr. M '+ 0'. | |
328 The modification of the operation code represents the subfield of the | |
329 memory cell that is to be overwritten with zeros." | |
330 2) | |
331 | |
332 (ADD arithmetic "add" 1 field | |
333 "Add to A the contents of cell Nr. M. | |
334 Subfield is padded with zero to make a word. | |
335 If the result is to large, the operation result modulo 1,073,741,823 (the | |
336 maximum value storable in a MIX word) is stored in `rA', and the overflow | |
337 toggle is set to TRUE." | |
338 2) | |
339 | |
340 (SUB arithmetic "subtract" 2 field | |
341 "Subtract to A the contents of cell Nr. M. | |
342 Subfield is padded with zero to make a word. | |
343 If the result is to large, the operation result modulo 1,073,741,823 (the | |
344 maximum value storable in a MIX word) is stored in `rA', and the overflow | |
345 toggle is set to TRUE." | |
346 2) | |
347 | |
348 (MUL arithmetic "multiply" 3 field | |
349 "Multiplies the contents of cell Nr. M with A, result is 10 bytes and stored in rA and rX. | |
350 The sign is + if the sign of rA and cell M where the same, otherwise, it is -" | |
351 10) | |
352 | |
353 (DIV arithmetic "divide" 4 field | |
354 "Both rA and rX are taken together and divided by cell Nr. M, quotient is placed in rA, remainder in rX. | |
355 The sign is taken from rA, and after the divide the sign of rA is set to + when | |
356 both the sign of rA and M where the same. Divide by zero and overflow of rA | |
357 result in undefined behavior." | |
358 12) | |
359 | |
360 (ENTA address-transfer "enter A" 48 | |
361 "Literal value is stored in rA. | |
362 Indexed, stores value of index in rA." | |
363 1) | |
364 | |
365 (ENTX address-transfer "enter X" 55 | |
366 "Literal value is stored in rX. | |
367 Indexed, stores value of index in rX." | |
368 1) | |
369 | |
370 (ENT1 address-transfer "Enter rI1" ,(+ 48 1) | |
371 "Literal value is stored in rI1. | |
372 Indexed, stores value of index in rI1." | |
373 1) | |
374 | |
375 (ENT2 address-transfer "Enter rI2" ,(+ 48 2) | |
376 "Literal value is stored in rI2. | |
377 Indexed, stores value of index in rI2." | |
378 1) | |
379 | |
380 (ENT3 address-transfer "Enter rI3" ,(+ 48 3) | |
381 "Literal value is stored in rI3. | |
382 Indexed, stores value of index in rI3." | |
383 1) | |
384 | |
385 (ENT4 address-transfer "Enter rI4" ,(+ 48 4) | |
386 "Literal value is stored in rI4. | |
387 Indexed, stores value of index in rI4." | |
388 1) | |
389 | |
390 (ENT5 address-transfer "Enter rI5" ,(+ 48 5) | |
391 "Literal value is stored in rI5. | |
392 Indexed, stores value of index in rI5." | |
393 1) | |
394 | |
395 (ENT6 address-transfer "Enter rI6" ,(+ 48 6) | |
396 "Literal value is stored in rI6. | |
397 Indexed, stores value of index in rI6." | |
398 1) | |
399 | |
400 (ENNA address-transfer "enter negative A" 48 | |
401 "Literal value is stored in rA with opposite sign. | |
402 Indexed, stores value of index in rA with opposite sign." | |
403 1) | |
404 | |
405 (ENNX address-transfer "enter negative X" 55 | |
406 "Literal value is stored in rX with opposite sign. | |
407 Indexed, stores value of index in rX with opposite sign." | |
408 1) | |
409 | |
410 (ENN1 address-transfer "Enter negative rI1" ,(+ 48 1) | |
411 "Literal value is stored in rI1 with opposite sign. | |
412 Indexed, stores value of index in rI1 with opposite sign." | |
413 1) | |
414 | |
415 (ENN2 address-transfer "Enter negative rI2" ,(+ 48 2) | |
416 "Literal value is stored in rI2 with opposite sign. | |
417 Indexed, stores value of index in rI2 with opposite sign." | |
418 1) | |
419 | |
420 (ENN3 address-transfer "Enter negative rI3" ,(+ 48 3) | |
421 "Literal value is stored in rI3 with opposite sign. | |
422 Indexed, stores value of index in rI3 with opposite sign." | |
423 1) | |
424 | |
425 (ENN4 address-transfer "Enter negative rI4" ,(+ 48 4) | |
426 "Literal value is stored in rI4 with opposite sign. | |
427 Indexed, stores value of index in rI4 with opposite sign." | |
428 1) | |
429 | |
430 (ENN5 address-transfer "Enter negative rI5" ,(+ 48 5) | |
431 "Literal value is stored in rI5 with opposite sign. | |
432 Indexed, stores value of index in rI5 with opposite sign." | |
433 1) | |
434 | |
435 (ENN6 address-transfer "Enter negative rI6" ,(+ 48 6) | |
436 "Literal value is stored in rI6 with opposite sign. | |
437 Indexed, stores value of index in rI6 with opposite sign." | |
438 1) | |
439 | |
440 (INCA address-transfer "increase A" 48 | |
441 "Increase register A with the literal value of M. | |
442 On overflow the overflow toggle is set." | |
443 1) | |
444 | |
445 (INCX address-transfer "increase X" 55 | |
446 "Increase register X with the literal value of M. | |
447 On overflow the overflow toggle is set." | |
448 1) | |
449 | |
450 (INC1 address-transfer "increase I1" ,(+ 48 1) | |
451 "Increase register I1 with the literal value of M. | |
452 The result is undefined when the result does not fit in | |
453 2 bytes." | |
454 1) | |
455 | |
456 (INC2 address-transfer "increase I2" ,(+ 48 2) | |
457 "Increase register I2 with the literal value of M. | |
458 The result is undefined when the result does not fit in | |
459 2 bytes." | |
460 1) | |
461 | |
462 (INC3 address-transfer "increase I3" ,(+ 48 3) | |
463 "Increase register I3 with the literal value of M. | |
464 The result is undefined when the result does not fit in | |
465 2 bytes." | |
466 1) | |
467 | |
468 (INC4 address-transfer "increase I4" ,(+ 48 4) | |
469 "Increase register I4 with the literal value of M. | |
470 The result is undefined when the result does not fit in | |
471 2 bytes." | |
472 1) | |
473 | |
474 (INC5 address-transfer "increase I5" ,(+ 48 5) | |
475 "Increase register I5 with the literal value of M. | |
476 The result is undefined when the result does not fit in | |
477 2 bytes." | |
478 1) | |
479 | |
480 (INC6 address-transfer "increase I6" ,(+ 48 6) | |
481 "Increase register I6 with the literal value of M. | |
482 The result is undefined when the result does not fit in | |
483 2 bytes." | |
484 1) | |
485 | |
486 (DECA address-transfer "decrease A" 48 | |
487 "Decrease register A with the literal value of M. | |
488 On overflow the overflow toggle is set." | |
489 1) | |
490 | |
491 (DECX address-transfer "decrease X" 55 | |
492 "Decrease register X with the literal value of M. | |
493 On overflow the overflow toggle is set." | |
494 1) | |
495 | |
496 (DEC1 address-transfer "decrease I1" ,(+ 48 1) | |
497 "Decrease register I1 with the literal value of M. | |
498 The result is undefined when the result does not fit in | |
499 2 bytes." | |
500 1) | |
501 | |
502 (DEC2 address-transfer "decrease I2" ,(+ 48 2) | |
503 "Decrease register I2 with the literal value of M. | |
504 The result is undefined when the result does not fit in | |
505 2 bytes." | |
506 1) | |
507 | |
508 (DEC3 address-transfer "decrease I3" ,(+ 48 3) | |
509 "Decrease register I3 with the literal value of M. | |
510 The result is undefined when the result does not fit in | |
511 2 bytes." | |
512 1) | |
513 | |
514 (DEC4 address-transfer "decrease I4" ,(+ 48 4) | |
515 "Decrease register I4 with the literal value of M. | |
516 The result is undefined when the result does not fit in | |
517 2 bytes." | |
518 1) | |
519 | |
520 (DEC5 address-transfer "decrease I5" ,(+ 48 5) | |
521 "Decrease register I5 with the literal value of M. | |
522 The result is undefined when the result does not fit in | |
523 2 bytes." | |
524 1) | |
525 | |
526 (DEC6 address-transfer "decrease I6" ,(+ 48 6) | |
527 "Decrease register I6 with the literal value of M. | |
528 The result is undefined when the result does not fit in | |
529 2 bytes." | |
530 1) | |
531 | |
532 (CMPA comparison "compare A" 56 field | |
533 "Compare contents of A with contents of M. | |
534 The field specifier works on both fields. The comparison indicator | |
535 is set to LESS, EQUAL or GREATER depending on the outcome." | |
536 2) | |
537 | |
538 | |
539 (CMPX comparison "compare X" 63 field | |
540 "Compare contents of rX with contents of M. | |
541 The field specifier works on both fields. The comparison indicator | |
542 is set to LESS, EQUAL or GREATER depending on the outcome." | |
543 2) | |
544 | |
545 | |
546 (CMP1 comparison "compare I1" ,(+ 56 1) field | |
547 "Compare contents of rI1 with contents of M. | |
548 The field specifier works on both fields. The comparison indicator | |
549 is set to LESS, EQUAL or GREATER depending on the outcome. Bit 1,2 and 3 | |
550 have a value of 0." | |
551 2) | |
552 | |
553 | |
554 (CMP2 comparison "compare I2" ,(+ 56 2) field | |
555 "Compare contents of rI2 with contents of M. | |
556 The field specifier works on both fields. The comparison indicator | |
557 is set to LESS, EQUAL or GREATER depending on the outcome. Bit 1,2 and 3 | |
558 have a value of 0." | |
559 2) | |
560 | |
561 | |
562 (CMP3 comparison "compare I3" ,(+ 56 3) field | |
563 "Compare contents of rI3 with contents of M. | |
564 The field specifier works on both fields. The comparison indicator | |
565 is set to LESS, EQUAL or GREATER depending on the outcome. Bit 1,2 and 3 | |
566 have a value of 0." | |
567 2) | |
568 | |
569 | |
570 (CMP4 comparison "compare I4" ,(+ 56 4) field | |
571 "Compare contents of rI4 with contents of M. | |
572 The field specifier works on both fields. The comparison indicator | |
573 is set to LESS, EQUAL or GREATER depending on the outcome. Bit 1,2 and 3 | |
574 have a value of 0." | |
575 2) | |
576 | |
577 | |
578 (CMP5 comparison "compare I5" ,(+ 56 5) field | |
579 "Compare contents of rI5 with contents of M. | |
580 The field specifier works on both fields. The comparison indicator | |
581 is set to LESS, EQUAL or GREATER depending on the outcome. Bit 1,2 and 3 | |
582 have a value of 0." | |
583 2) | |
584 | |
585 | |
586 (CMP6 comparison "compare I6" ,(+ 56 6) field | |
587 "Compare contents of rI6 with contents of M. | |
588 The field specifier works on both fields. The comparison indicator | |
589 is set to LESS, EQUAL or GREATER depending on the outcome. Bit 1,2 and 3 | |
590 have a value of 0." | |
591 2) | |
592 | |
593 (JMP jump "jump" 39 | |
594 "Unconditional jump. | |
595 Register J is set to the value of the next instruction that would have | |
596 been executed when there was no jump." | |
597 1) | |
598 | |
599 (JSJ jump "jump, save J" 39 | |
600 "Unconditional jump, but rJ is not modified." | |
601 1) | |
602 | |
603 (JOV jump "jump on overflow" 39 | |
604 "Jump if OV is set (and turn it off). | |
605 Register J is set to the value of the next instruction that would have | |
606 been executed when there was no jump." | |
607 1) | |
608 | |
609 (JNOV jump "Jump on no overflow" 39 | |
610 "Jump if OV is not set (and turn it off). | |
611 Register J is set to the value of the next instruction that would have | |
612 been executed when there was no jump." | |
613 1) | |
614 | |
615 (JL jump "Jump on less" 39 | |
616 "Jump if '[CM] = L'. | |
617 Register J is set to the value of the next instruction that would have | |
618 been executed when there was no jump." | |
619 1) | |
620 | |
621 | |
622 (JE jump "Jump on equal" 39 | |
623 "Jump if '[CM] = E'. | |
624 Register J is set to the value of the next instruction that would have | |
625 been executed when there was no jump." | |
626 1) | |
627 | |
628 | |
629 (JG jump "Jump on greater" 39 | |
630 "Jump if '[CM] = G'. | |
631 Register J is set to the value of the next instruction that would have | |
632 been executed when there was no jump." | |
633 1) | |
634 | |
635 | |
636 (JGE jump "Jump on not less" 39 | |
637 "Jump if '[CM]' does not equal 'L'. | |
638 Register J is set to the value of the next instruction that would have | |
639 been executed when there was no jump." | |
640 1) | |
641 | |
642 | |
643 (JNE jump "Jump on not equal" 39 | |
644 "Jump if '[CM]' does not equal 'E'. | |
645 Register J is set to the value of the next instruction that would have | |
646 been executed when there was no jump." | |
647 1) | |
648 | |
649 | |
650 (JLE jump "Jump on not greater" 39 | |
651 "Jump if '[CM]' does not equal 'G'. | |
652 Register J is set to the value of the next instruction that would have | |
653 been executed when there was no jump." | |
654 1) | |
655 | |
656 (JAN jump "jump A negative" 40 | |
657 "Jump if the content of rA is negative. | |
658 Register J is set to the value of the next instruction that would have | |
659 been executed when there was no jump." | |
660 1) | |
661 | |
662 | |
663 (JAZ jump "jump A zero" 40 | |
664 "Jump if the content of rA is zero. | |
665 Register J is set to the value of the next instruction that would have | |
666 been executed when there was no jump." | |
667 1) | |
668 | |
669 | |
670 (JAP jump "jump A positive" 40 | |
671 "Jump if the content of rA is positive. | |
672 Register J is set to the value of the next instruction that would have | |
673 been executed when there was no jump." | |
674 1) | |
675 | |
676 | |
677 (JANN jump "jump A non-negative" 40 | |
678 "Jump if the content of rA is non-negative. | |
679 Register J is set to the value of the next instruction that would have | |
680 been executed when there was no jump." | |
681 1) | |
682 | |
683 | |
684 (JANZ jump "jump A non-zero" 40 | |
685 "Jump if the content of rA is non-zero. | |
686 Register J is set to the value of the next instruction that would have | |
687 been executed when there was no jump." | |
688 1) | |
689 | |
690 | |
691 (JANP jump "jump A non-positive" 40 | |
692 "Jump if the content of rA is non-positive. | |
693 Register J is set to the value of the next instruction that would have | |
694 been executed when there was no jump." | |
695 1) | |
696 | |
697 (JXN jump "jump X negative" 47 | |
698 "Jump if the content of rX is negative. | |
699 Register J is set to the value of the next instruction that would have | |
700 been executed when there was no jump." | |
701 1) | |
702 | |
703 | |
704 (JXZ jump "jump X zero" 47 | |
705 "Jump if the content of rX is zero. | |
706 Register J is set to the value of the next instruction that would have | |
707 been executed when there was no jump." | |
708 1) | |
709 | |
710 | |
711 (JXP jump "jump X positive" 47 | |
712 "Jump if the content of rX is positive. | |
713 Register J is set to the value of the next instruction that would have | |
714 been executed when there was no jump." | |
715 1) | |
716 | |
717 | |
718 (JXNN jump "jump X non-negative" 47 | |
719 "Jump if the content of rX is non-negative. | |
720 Register J is set to the value of the next instruction that would have | |
721 been executed when there was no jump." | |
722 1) | |
723 | |
724 | |
725 (JXNZ jump "jump X non-zero" 47 | |
726 "Jump if the content of rX is non-zero. | |
727 Register J is set to the value of the next instruction that would have | |
728 been executed when there was no jump." | |
729 1) | |
730 | |
731 | |
732 (JXNP jump "jump X non-positive" 47 | |
733 "Jump if the content of rX is non-positive. | |
734 Register J is set to the value of the next instruction that would have | |
735 been executed when there was no jump." | |
736 1) | |
737 | |
738 (J1N jump "jump I1 negative" ,(+ 40 1) | |
739 "Jump if the content of rI1 is negative. | |
740 Register J is set to the value of the next instruction that would have | |
741 been executed when there was no jump." | |
742 1) | |
743 | |
744 | |
745 (J1Z jump "jump I1 zero" ,(+ 40 1) | |
746 "Jump if the content of rI1 is zero. | |
747 Register J is set to the value of the next instruction that would have | |
748 been executed when there was no jump." | |
749 1) | |
750 | |
751 | |
752 (J1P jump "jump I1 positive" ,(+ 40 1) | |
753 "Jump if the content of rI1 is positive. | |
754 Register J is set to the value of the next instruction that would have | |
755 been executed when there was no jump." | |
756 1) | |
757 | |
758 | |
759 (J1NN jump "jump I1 non-negative" ,(+ 40 1) | |
760 "Jump if the content of rI1 is non-negative. | |
761 Register J is set to the value of the next instruction that would have | |
762 been executed when there was no jump." | |
763 1) | |
764 | |
765 | |
766 (J1NZ jump "jump I1 non-zero" ,(+ 40 1) | |
767 "Jump if the content of rI1 is non-zero. | |
768 Register J is set to the value of the next instruction that would have | |
769 been executed when there was no jump." | |
770 1) | |
771 | |
772 | |
773 (J1NP jump "jump I1 non-positive" ,(+ 40 1) | |
774 "Jump if the content of rI1 is non-positive. | |
775 Register J is set to the value of the next instruction that would have | |
776 been executed when there was no jump." | |
777 1) | |
778 | |
779 (J2N jump "jump I2 negative" ,(+ 40 1) | |
780 "Jump if the content of rI2 is negative. | |
781 Register J is set to the value of the next instruction that would have | |
782 been executed when there was no jump." | |
783 1) | |
784 | |
785 | |
786 (J2Z jump "jump I2 zero" ,(+ 40 1) | |
787 "Jump if the content of rI2 is zero. | |
788 Register J is set to the value of the next instruction that would have | |
789 been executed when there was no jump." | |
790 1) | |
791 | |
792 | |
793 (J2P jump "jump I2 positive" ,(+ 40 1) | |
794 "Jump if the content of rI2 is positive. | |
795 Register J is set to the value of the next instruction that would have | |
796 been executed when there was no jump." | |
797 1) | |
798 | |
799 | |
800 (J2NN jump "jump I2 non-negative" ,(+ 40 1) | |
801 "Jump if the content of rI2 is non-negative. | |
802 Register J is set to the value of the next instruction that would have | |
803 been executed when there was no jump." | |
804 1) | |
805 | |
806 | |
807 (J2NZ jump "jump I2 non-zero" ,(+ 40 1) | |
808 "Jump if the content of rI2 is non-zero. | |
809 Register J is set to the value of the next instruction that would have | |
810 been executed when there was no jump." | |
811 1) | |
812 | |
813 | |
814 (J2NP jump "jump I2 non-positive" ,(+ 40 1) | |
815 "Jump if the content of rI2 is non-positive. | |
816 Register J is set to the value of the next instruction that would have | |
817 been executed when there was no jump." | |
818 1) | |
819 | |
820 | |
821 (J3N jump "jump I3 negative" ,(+ 40 1) | |
822 "Jump if the content of rI3 is negative. | |
823 Register J is set to the value of the next instruction that would have | |
824 been executed when there was no jump." | |
825 1) | |
826 | |
827 | |
828 (J3Z jump "jump I3 zero" ,(+ 40 1) | |
829 "Jump if the content of rI3 is zero. | |
830 Register J is set to the value of the next instruction that would have | |
831 been executed when there was no jump." | |
832 1) | |
833 | |
834 | |
835 (J3P jump "jump I3 positive" ,(+ 40 1) | |
836 "Jump if the content of rI3 is positive. | |
837 Register J is set to the value of the next instruction that would have | |
838 been executed when there was no jump." | |
839 1) | |
840 | |
841 | |
842 (J3NN jump "jump I3 non-negative" ,(+ 40 1) | |
843 "Jump if the content of rI3 is non-negative. | |
844 Register J is set to the value of the next instruction that would have | |
845 been executed when there was no jump." | |
846 1) | |
847 | |
848 | |
849 (J3NZ jump "jump I3 non-zero" ,(+ 40 1) | |
850 "Jump if the content of rI3 is non-zero. | |
851 Register J is set to the value of the next instruction that would have | |
852 been executed when there was no jump." | |
853 1) | |
854 | |
855 | |
856 (J3NP jump "jump I3 non-positive" ,(+ 40 1) | |
857 "Jump if the content of rI3 is non-positive. | |
858 Register J is set to the value of the next instruction that would have | |
859 been executed when there was no jump." | |
860 1) | |
861 | |
862 | |
863 (J4N jump "jump I4 negative" ,(+ 40 1) | |
864 "Jump if the content of rI4 is negative. | |
865 Register J is set to the value of the next instruction that would have | |
866 been executed when there was no jump." | |
867 1) | |
868 | |
869 | |
870 (J4Z jump "jump I4 zero" ,(+ 40 1) | |
871 "Jump if the content of rI4 is zero. | |
872 Register J is set to the value of the next instruction that would have | |
873 been executed when there was no jump." | |
874 1) | |
875 | |
876 | |
877 (J4P jump "jump I4 positive" ,(+ 40 1) | |
878 "Jump if the content of rI4 is positive. | |
879 Register J is set to the value of the next instruction that would have | |
880 been executed when there was no jump." | |
881 1) | |
882 | |
883 | |
884 (J4NN jump "jump I4 non-negative" ,(+ 40 1) | |
885 "Jump if the content of rI4 is non-negative. | |
886 Register J is set to the value of the next instruction that would have | |
887 been executed when there was no jump." | |
888 1) | |
889 | |
890 | |
891 (J4NZ jump "jump I4 non-zero" ,(+ 40 1) | |
892 "Jump if the content of rI4 is non-zero. | |
893 Register J is set to the value of the next instruction that would have | |
894 been executed when there was no jump." | |
895 1) | |
896 | |
897 | |
898 (J4NP jump "jump I4 non-positive" ,(+ 40 1) | |
899 "Jump if the content of rI4 is non-positive. | |
900 Register J is set to the value of the next instruction that would have | |
901 been executed when there was no jump." | |
902 1) | |
903 | |
904 | |
905 (J5N jump "jump I5 negative" ,(+ 40 1) | |
906 "Jump if the content of rI5 is negative. | |
907 Register J is set to the value of the next instruction that would have | |
908 been executed when there was no jump." | |
909 1) | |
910 | |
911 | |
912 (J5Z jump "jump I5 zero" ,(+ 40 1) | |
913 "Jump if the content of rI5 is zero. | |
914 Register J is set to the value of the next instruction that would have | |
915 been executed when there was no jump." | |
916 1) | |
917 | |
918 | |
919 (J5P jump "jump I5 positive" ,(+ 40 1) | |
920 "Jump if the content of rI5 is positive. | |
921 Register J is set to the value of the next instruction that would have | |
922 been executed when there was no jump." | |
923 1) | |
924 | |
925 | |
926 (J5NN jump "jump I5 non-negative" ,(+ 40 1) | |
927 "Jump if the content of rI5 is non-negative. | |
928 Register J is set to the value of the next instruction that would have | |
929 been executed when there was no jump." | |
930 1) | |
931 | |
932 | |
933 (J5NZ jump "jump I5 non-zero" ,(+ 40 1) | |
934 "Jump if the content of rI5 is non-zero. | |
935 Register J is set to the value of the next instruction that would have | |
936 been executed when there was no jump." | |
937 1) | |
938 | |
939 | |
940 (J5NP jump "jump I5 non-positive" ,(+ 40 1) | |
941 "Jump if the content of rI5 is non-positive. | |
942 Register J is set to the value of the next instruction that would have | |
943 been executed when there was no jump." | |
944 1) | |
945 | |
946 | |
947 (J6N jump "jump I6 negative" ,(+ 40 1) | |
948 "Jump if the content of rI6 is negative. | |
949 Register J is set to the value of the next instruction that would have | |
950 been executed when there was no jump." | |
951 1) | |
952 | |
953 | |
954 (J6Z jump "jump I6 zero" ,(+ 40 1) | |
955 "Jump if the content of rI6 is zero. | |
956 Register J is set to the value of the next instruction that would have | |
957 been executed when there was no jump." | |
958 1) | |
959 | |
960 | |
961 (J6P jump "jump I6 positive" ,(+ 40 1) | |
962 "Jump if the content of rI6 is positive. | |
963 Register J is set to the value of the next instruction that would have | |
964 been executed when there was no jump." | |
965 1) | |
966 | |
967 | |
968 (J6NN jump "jump I6 non-negative" ,(+ 40 1) | |
969 "Jump if the content of rI6 is non-negative. | |
970 Register J is set to the value of the next instruction that would have | |
971 been executed when there was no jump." | |
972 1) | |
973 | |
974 | |
975 (J6NZ jump "jump I6 non-zero" ,(+ 40 1) | |
976 "Jump if the content of rI6 is non-zero. | |
977 Register J is set to the value of the next instruction that would have | |
978 been executed when there was no jump." | |
979 1) | |
980 | |
981 | |
982 (J6NP jump "jump I6 non-positive" ,(+ 40 1) | |
983 "Jump if the content of rI6 is non-positive. | |
984 Register J is set to the value of the next instruction that would have | |
985 been executed when there was no jump." | |
986 1) | |
987 | |
988 (SLA miscellaneous "shift left A" 6 | |
989 "Shift to A, M bytes left. | |
990 Hero's will be added to the right." | |
991 2) | |
992 | |
993 | |
994 (SRA miscellaneous "shift right A" 6 | |
995 "Shift to A, M bytes right. | |
996 Zeros will be added to the left." | |
997 2) | |
998 | |
999 | |
1000 (SLAX miscellaneous "shift left AX" 6 | |
1001 "Shift AX, M bytes left. | |
1002 Zeros will be added to the right." | |
1003 2) | |
1004 | |
1005 | |
1006 | |
1007 (SRAX miscellaneous "shift right AX" 6 | |
1008 "Shift AX, M bytes right. | |
1009 Zeros will be added to the left." | |
1010 2) | |
1011 | |
1012 | |
1013 (SLC miscellaneous "shift left AX circularly" 6 | |
1014 "Shift AX, M bytes left circularly. | |
1015 The bytes that fall off to the left will be added to the right." | |
1016 2) | |
1017 | |
1018 | |
1019 (SRC miscellaneous "shift right AX circularly" 6 | |
1020 "Shift AX, M bytes right circularly. | |
1021 The bytes that fall off to the right will be added to the left." | |
1022 2) | |
1023 | |
1024 (MOVE miscellaneous "move" 7 number | |
1025 "Move MOD words from M to the location stored in rI1." | |
1026 (+ 1 (* 2 number))) | |
1027 | |
1028 (NOP miscellaneous "no operation" 0 ignored | |
1029 "No operation, M and F are not used by the machine." | |
1030 1) | |
1031 | |
1032 (HLT miscellaneous "halt" 5 | |
1033 "Halt. | |
1034 Stop instruction fetching." | |
1035 1) | |
1036 | |
1037 (IN input-output "input" 36 unit | |
1038 "Transfer a block of words from the specified unit to memory. | |
1039 The transfer starts at address M." | |
1040 1) | |
1041 | |
1042 (OUT input-output "output" 37 unit | |
1043 "Transfer a block of words from memory. | |
1044 The transfer starts at address M to the specified unit." | |
1045 1) | |
1046 | |
1047 (IOC input-output "input-output control" 35 unit | |
1048 "Perform a control operation. | |
1049 The control operation is given by M on the specified unit." | |
1050 1) | |
1051 | |
1052 (JRED input-output "jump ready" 38 unit | |
1053 "Jump to M if the specified unit is ready." | |
1054 1) | |
1055 | |
1056 | |
1057 (JBUS input-output "jump busy" 34 unit | |
1058 "Jump to M if the specified unit is busy." | |
1059 1) | |
1060 | |
1061 (NUM conversion "convert to numeric" 5 | |
1062 "Convert rAX to its numerical value and store it in rA. | |
1063 the register rAX is assumed to contain a character representation of | |
1064 a number." | |
1065 10) | |
1066 | |
1067 (CHAR conversion "convert to characters" 5 | |
1068 "Convert the number stored in rA to a character representation. | |
1069 The converted character representation is stored in rAX." | |
1070 10)) | |
1071 | |
153 "Alist that contains all the possible operation codes for mix. | 1072 "Alist that contains all the possible operation codes for mix. |
154 Each elt has the form | 1073 Each elt has the form |
155 (OP-CODE GROUP FULL-NAME C-BYTE F-BYTE DESCRIPTION EXECUTION-TIME) | 1074 (OP-CODE GROUP FULL-NAME C-BYTE F-BYTE DESCRIPTION EXECUTION-TIME) |
156 Where OP-CODE is the text of the opcode as an symbol, | 1075 Where OP-CODE is the text of the opcode as an symbol, |
157 FULL-NAME is the human readable name as a string, | 1076 FULL-NAME is the human readable name as a string, |
160 or a number, | 1079 or a number, |
161 DESCRIPTION contains an string with a description about the operation code and | 1080 DESCRIPTION contains an string with a description about the operation code and |
162 EXECUTION-TIME holds info about the time it takes, number or string.") | 1081 EXECUTION-TIME holds info about the time it takes, number or string.") |
163 ;; (makunbound 'mixal-operation-codes-alist) | 1082 ;; (makunbound 'mixal-operation-codes-alist) |
164 | 1083 |
165 (defun mixal-add-operation-code (op-code group full-name C-byte F-byte | 1084 |
166 description execution-time) | 1085 ;;; Font-locking: |
167 "Add an operation code to `mixal-operation-codes-alist'." | 1086 (defvar mixal-font-lock-syntactic-keywords |
168 (setq mixal-operation-codes-alist | 1087 ;; Normal comments start with a * in column 0 and end at end of line. |
169 (cons (list op-code group full-name C-byte F-byte | 1088 '(("^\\*" (0 '(11))) ;(string-to-syntax "<") == '(11) |
170 description execution-time) | 1089 ;; Every line can end with a comment which is placed after the operand. |
171 mixal-operation-codes-alist))) | 1090 ;; I assume here that mnemonics without operands can not have a comment. |
172 | 1091 ("^[[:alnum:]]*[ \t]+[[:alnum:]]+[ \t]+[^ \n\t]+[ \t]*\\([ \t]\\)[^\n \t]" |
173 ;; now add each operation code | 1092 (1 '(11))))) |
174 | 1093 |
175 (mixal-add-operation-code | 1094 (defvar mixal-font-lock-keywords |
176 'LDA 'loading "load A" 8 'field | 1095 `(("^\\([A-Z0-9a-z]+\\)" |
177 "Put in rA the contents of cell no. M. | 1096 (1 mixal-font-lock-label-face)) |
178 Uses a + when there is no sign in subfield. Subfield is left padded with | 1097 (,(regexp-opt (mapcar (lambda (x) (symbol-name (car x))) |
179 zeros to make a word." | 1098 mixal-operation-codes-alist) 'words) |
180 2) | 1099 . mixal-font-lock-operation-code-face) |
181 | 1100 (,(regexp-opt mixal-assembly-pseudoinstructions 'words) |
182 (mixal-add-operation-code | 1101 . mixal-font-lock-assembly-pseudoinstruction-face) |
183 'LDX 'loading "load X" 15 'field | 1102 ("^[A-Z0-9a-z]*[ \t]+[A-ZO-9a-z]+[ \t]+\\(=.*=\\)" |
184 "Put in rX the contents of cell no. M. | 1103 (1 font-lock-constant-face))) |
185 Uses a + when there is no sign in subfield. Subfield is left padded with | 1104 "Keyword highlighting specification for `mixal-mode'.") |
186 zeros to make a word." | 1105 ;; (makunbound 'mixal-font-lock-keywords) |
187 2) | |
188 | |
189 (mixal-add-operation-code | |
190 'LD1 'loading "load I1" (+ 8 1) 'field | |
191 "Put in rI1 the contents of cell no. M. | |
192 Uses a + when there is no sign in subfield. Subfield is left padded with | |
193 zeros to make a word. Index registers only have 2 bytes and a sign, Trying | |
194 to set anything more that that will result in undefined behavior." | |
195 2) | |
196 | |
197 (mixal-add-operation-code | |
198 'LD2 'loading "load I2" (+ 8 2) 'field | |
199 "Put in rI2 the contents of cell no. M. | |
200 Uses a + when there is no sign in subfield. Subfield is left padded with | |
201 zeros to make a word. Index registers only have 2 bytes and a sign, Trying | |
202 to set anything more that that will result in undefined behavior." | |
203 2) | |
204 | |
205 (mixal-add-operation-code | |
206 'LD3 'loading "load I3" (+ 8 3) 'field | |
207 "Put in rI3 the contents of cell no. M. | |
208 Uses a + when there is no sign in subfield. Subfield is left padded with | |
209 zeros to make a word. Index registers only have 2 bytes and a sign, Trying | |
210 to set anything more that that will result in undefined behavior." | |
211 2) | |
212 | |
213 (mixal-add-operation-code | |
214 'LD4 'loading "load I4" (+ 8 4) 'field | |
215 "Put in rI4 the contents of cell no. M. | |
216 Uses a + when there is no sign in subfield. Subfield is left padded with | |
217 zeros to make a word. Index registers only have 2 bytes and a sign, Trying | |
218 to set anything more that that will result in undefined behavior." | |
219 2) | |
220 | |
221 (mixal-add-operation-code | |
222 'LD5 'loading "load I5" (+ 8 5) 'field | |
223 "Put in rI5 the contents of cell no. M. | |
224 Uses a + when there is no sign in subfield. Subfield is left padded with | |
225 zeros to make a word. Index registers only have 2 bytes and a sign, Trying | |
226 to set anything more that that will result in undefined behavior." | |
227 2) | |
228 | |
229 (mixal-add-operation-code | |
230 'LD6 'loading "load I6" (+ 8 6) 'field | |
231 "Put in rI6 the contents of cell no. M. | |
232 Uses a + when there is no sign in subfield. Subfield is left padded with | |
233 zeros to make a word. Index registers only have 2 bytes and a sign, Trying | |
234 to set anything more that that will result in undefined behavior." | |
235 2) | |
236 | |
237 (mixal-add-operation-code | |
238 'LDAN 'loading "load A negative" 16 'field | |
239 "Put in rA the contents of cell no. M, with opposite sign. | |
240 Uses a + when there is no sign in subfield, otherwise use the opposite sign. | |
241 Subfield is left padded with zeros to make a word." | |
242 2) | |
243 | |
244 (mixal-add-operation-code | |
245 'LDXN 'loading "load X negative" 23 'field | |
246 "Put in rX the contents of cell no. M, with opposite sign. | |
247 Uses a + when there is no sign in subfield, otherwise use the opposite sign. | |
248 Subfield is left padded with zeros to make a word." | |
249 2) | |
250 | |
251 (mixal-add-operation-code | |
252 'LD1N 'loading "load I1 negative" (+ 16 1) 'field | |
253 "Put in rI1 the contents of cell no. M, with opposite sign. | |
254 Uses a + when there is no sign in subfield, otherwise use the opposite sign. | |
255 Subfield is left padded with zeros to make a word. Index registers only | |
256 have 2 bytes and a sign, Trying to set anything more that that will result | |
257 in undefined behavior." | |
258 2) | |
259 | |
260 (mixal-add-operation-code | |
261 'LD2N 'loading "load I2 negative" (+ 16 2) 'field | |
262 "Put in rI2 the contents of cell no. M, with opposite sign. | |
263 Uses a + when there is no sign in subfield, otherwise use the opposite sign. | |
264 Subfield is left padded with zeros to make a word. Index registers only | |
265 have 2 bytes and a sign, Trying to set anything more that that will result | |
266 in undefined behavior." | |
267 2) | |
268 | |
269 (mixal-add-operation-code | |
270 'LD3N 'loading "load I3 negative" (+ 16 3) 'field | |
271 "Put in rI3 the contents of cell no. M, with opposite sign. | |
272 Uses a + when there is no sign in subfield, otherwise use the opposite sign. | |
273 Subfield is left padded with zeros to make a word. Index registers only | |
274 have 2 bytes and a sign, Trying to set anything more that that will result | |
275 in undefined behavior." | |
276 2) | |
277 | |
278 (mixal-add-operation-code | |
279 'LD4N 'loading "load I4 negative" (+ 16 4) 'field | |
280 "Put in rI4 the contents of cell no. M, with opposite sign. | |
281 Uses a + when there is no sign in subfield, otherwise use the opposite sign. | |
282 Subfield is left padded with zeros to make a word. Index registers only | |
283 have 2 bytes and a sign, Trying to set anything more that that will result | |
284 in undefined behavior." | |
285 2) | |
286 | |
287 (mixal-add-operation-code | |
288 'LD5N 'loading "load I5 negative" (+ 16 5) 'field | |
289 "Put in rI5 the contents of cell no. M, with opposite sign. | |
290 Uses a + when there is no sign in subfield, otherwise use the opposite sign. | |
291 Subfield is left padded with zeros to make a word. Index registers only | |
292 have 2 bytes and a sign, Trying to set anything more that that will result | |
293 in undefined behavior." | |
294 2) | |
295 | |
296 (mixal-add-operation-code | |
297 'LD6N 'loading "load I6 negative" (+ 16 6) 'field | |
298 "Put in rI6 the contents of cell no. M, with opposite sign. | |
299 Uses a + when there is no sign in subfield, otherwise use the opposite sign. | |
300 Subfield is left padded with zeros to make a word. Index registers only | |
301 have 2 bytes and a sign, Trying to set anything more that that will result | |
302 in undefined behavior." | |
303 2) | |
304 | |
305 (mixal-add-operation-code | |
306 'STA 'storing "store A" 24 'field | |
307 "Store in cell Nr. M the contents of rA. | |
308 The modification of the operation code represents the subfield of the | |
309 memory cell that is to be overwritten with bytes from a register. These | |
310 bytes are taken beginning by the rightmost side of the register. The | |
311 sign of the memory cell is not changed, unless it is part of the subfield." | |
312 2) | |
313 | |
314 (mixal-add-operation-code | |
315 'STX 'storing "store X" 31 'field | |
316 "Store in cell Nr. M the contents of rX. | |
317 The modification of the operation code represents the subfield of the | |
318 memory cell that is to be overwritten with bytes from a register. These | |
319 bytes are taken beginning by the rightmost side of the register. The | |
320 sign of the memory cell is not changed, unless it is part of the subfield." | |
321 2) | |
322 | |
323 (mixal-add-operation-code | |
324 'ST1 'storing "store I1" (+ 24 1) 'field | |
325 "Store in cell Nr. M the contents of rI1. | |
326 The modification of the operation code represents the subfield of the | |
327 memory cell that is to be overwritten with bytes from a register. These | |
328 bytes are taken beginning by the rightmost side of the register. The | |
329 sign of the memory cell is not changed, unless it is part of the subfield. | |
330 Because index registers only have 2 bytes and a sign, the rest of the bytes | |
331 are assumed to be 0." | |
332 2) | |
333 | |
334 (mixal-add-operation-code | |
335 'ST2 'storing "store I2" (+ 24 2) 'field | |
336 "Store in cell Nr. M the contents of rI2. | |
337 The modification of the operation code represents the subfield of the | |
338 memory cell that is to be overwritten with bytes from a register. These | |
339 bytes are taken beginning by the rightmost side of the register. The | |
340 sign of the memory cell is not changed, unless it is part of the subfield. | |
341 Because index registers only have 2 bytes and a sign, the rest of the bytes | |
342 are assumed to be 0." | |
343 2) | |
344 | |
345 (mixal-add-operation-code | |
346 'ST3 'storing "store I3" (+ 24 3) 'field | |
347 "Store in cell Nr. M the contents of rI3. | |
348 The modification of the operation code represents the subfield of the | |
349 memory cell that is to be overwritten with bytes from a register. These | |
350 bytes are taken beginning by the rightmost side of the register. The | |
351 sign of the memory cell is not changed, unless it is part of the subfield. | |
352 Because index registers only have 2 bytes and a sign, the rest of the bytes | |
353 are assumed to be 0." | |
354 2) | |
355 | |
356 (mixal-add-operation-code | |
357 'ST4 'storing "store I4" (+ 24 4) 'field | |
358 "Store in cell Nr. M the contents of rI4. | |
359 The modification of the operation code represents the subfield of the | |
360 memory cell that is to be overwritten with bytes from a register. These | |
361 bytes are taken beginning by the rightmost side of the register. The | |
362 sign of the memory cell is not changed, unless it is part of the subfield. | |
363 Because index registers only have 2 bytes and a sign, the rest of the bytes | |
364 are assumed to be 0." | |
365 2) | |
366 | |
367 (mixal-add-operation-code | |
368 'ST5 'storing "store I5" (+ 24 5) 'field | |
369 "Store in cell Nr. M the contents of rI5. | |
370 The modification of the operation code represents the subfield of the | |
371 memory cell that is to be overwritten with bytes from a register. These | |
372 bytes are taken beginning by the rightmost side of the register. The | |
373 sign of the memory cell is not changed, unless it is part of the subfield. | |
374 Because index registers only have 2 bytes and a sign, the rest of the bytes | |
375 are assumed to be 0." | |
376 2) | |
377 | |
378 (mixal-add-operation-code | |
379 'ST6 'storing "store I6" (+ 24 6) 'field | |
380 "Store in cell Nr. M the contents of rI6. | |
381 The modification of the operation code represents the subfield of the | |
382 memory cell that is to be overwritten with bytes from a register. These | |
383 bytes are taken beginning by the rightmost side of the register. The | |
384 sign of the memory cell is not changed, unless it is part of the subfield. | |
385 Because index registers only have 2 bytes and a sign, the rest of the bytes | |
386 are assumed to be 0." | |
387 2) | |
388 | |
389 (mixal-add-operation-code | |
390 'STJ 'storing "store J" 32 'field | |
391 "Store in cell Nr. M the contents of rJ. | |
392 The modification of the operation code represents the subfield of the | |
393 memory cell that is to be overwritten with bytes from a register. These | |
394 bytes are taken beginning by the rightmost side of the register. The sign | |
395 of rJ is always +, sign of the memory cell is not changed, unless it is | |
396 part of the subfield. The default field for STJ is (0:2)." | |
397 2) | |
398 | |
399 (mixal-add-operation-code | |
400 'STZ 'storing "store zero" 33 'field | |
401 "Store in cell Nr. M '+ 0'. | |
402 The modification of the operation code represents the subfield of the | |
403 memory cell that is to be overwritten with zeros." | |
404 2) | |
405 | |
406 (mixal-add-operation-code | |
407 'ADD 'arithmetic "add" 1 'field | |
408 "Add to A the contents of cell Nr. M. | |
409 Subfield is padded with zero to make a word. | |
410 If the result is to large, the operation result modulo 1,073,741,823 (the | |
411 maximum value storable in a MIX word) is stored in `rA', and the overflow | |
412 toggle is set to TRUE." | |
413 2) | |
414 | |
415 (mixal-add-operation-code | |
416 'SUB 'arithmetic "subtract" 2 'field | |
417 "Subtract to A the contents of cell Nr. M. | |
418 Subfield is padded with zero to make a word. | |
419 If the result is to large, the operation result modulo 1,073,741,823 (the | |
420 maximum value storable in a MIX word) is stored in `rA', and the overflow | |
421 toggle is set to TRUE." | |
422 2) | |
423 | |
424 (mixal-add-operation-code | |
425 'MUL 'arithmetic "multiply" 3 'field | |
426 "Multiplies the contents of cell Nr. M with A, result is 10 bytes and stored in rA and rX. | |
427 The sign is + if the sign of rA and cell M where the same, otherwise, it is -" | |
428 10) | |
429 | |
430 (mixal-add-operation-code | |
431 'DIV 'arithmetic "divide" 4 'field | |
432 "Both rA and rX are taken together and divided by cell Nr. M, quotient is placed in rA, remainder in rX. | |
433 The sign is taken from rA, and after the divide the sign of rA is set to + when | |
434 both the sign of rA and M where the same. Divide by zero and overflow of rA result | |
435 in undefined behavior." | |
436 12) | |
437 | |
438 (mixal-add-operation-code | |
439 'ENTA 'address-transfer "enter A" 48 2 | |
440 "Literal value is stored in rA. | |
441 Indexed, stores value of index in rA." | |
442 1) | |
443 | |
444 (mixal-add-operation-code | |
445 'ENTX 'address-transfer "enter X" 55 2 | |
446 "Literal value is stored in rX. | |
447 Indexed, stores value of index in rX." | |
448 1) | |
449 | |
450 (mixal-add-operation-code | |
451 'ENT1 'address-transfer "Enter rI1" (+ 48 1) 2 | |
452 "Literal value is stored in rI1. | |
453 Indexed, stores value of index in rI1." | |
454 1) | |
455 | |
456 (mixal-add-operation-code | |
457 'ENT2 'address-transfer "Enter rI2" (+ 48 2) 2 | |
458 "Literal value is stored in rI2. | |
459 Indexed, stores value of index in rI2." | |
460 1) | |
461 | |
462 (mixal-add-operation-code | |
463 'ENT3 'address-transfer "Enter rI3" (+ 48 3) 2 | |
464 "Literal value is stored in rI3. | |
465 Indexed, stores value of index in rI3." | |
466 1) | |
467 | |
468 (mixal-add-operation-code | |
469 'ENT4 'address-transfer "Enter rI4" (+ 48 4) 2 | |
470 "Literal value is stored in rI4. | |
471 Indexed, stores value of index in rI4." | |
472 1) | |
473 | |
474 (mixal-add-operation-code | |
475 'ENT5 'address-transfer "Enter rI5" (+ 48 5) 2 | |
476 "Literal value is stored in rI5. | |
477 Indexed, stores value of index in rI5." | |
478 1) | |
479 | |
480 (mixal-add-operation-code | |
481 'ENT6 'address-transfer "Enter rI6" (+ 48 6) 2 | |
482 "Literal value is stored in rI6. | |
483 Indexed, stores value of index in rI6." | |
484 1) | |
485 | |
486 (mixal-add-operation-code | |
487 'ENNA 'address-transfer "enter negative A" 48 3 | |
488 "Literal value is stored in rA with opposite sign. | |
489 Indexed, stores value of index in rA with opposite sign." | |
490 1) | |
491 | |
492 (mixal-add-operation-code | |
493 'ENNX 'address-transfer "enter negative X" 55 3 | |
494 "Literal value is stored in rX with opposite sign. | |
495 Indexed, stores value of index in rX with opposite sign." | |
496 1) | |
497 | |
498 (mixal-add-operation-code | |
499 'ENN1 'address-transfer "Enter negative rI1" (+ 48 1) 3 | |
500 "Literal value is stored in rI1 with opposite sign. | |
501 Indexed, stores value of index in rI1 with opposite sign." | |
502 1) | |
503 | |
504 (mixal-add-operation-code | |
505 'ENN2 'address-transfer "Enter negative rI2" (+ 48 2) 3 | |
506 "Literal value is stored in rI2 with opposite sign. | |
507 Indexed, stores value of index in rI2 with opposite sign." | |
508 1) | |
509 | |
510 (mixal-add-operation-code | |
511 'ENN3 'address-transfer "Enter negative rI3" (+ 48 3) 3 | |
512 "Literal value is stored in rI3 with opposite sign. | |
513 Indexed, stores value of index in rI3 with opposite sign." | |
514 1) | |
515 | |
516 (mixal-add-operation-code | |
517 'ENN4 'address-transfer "Enter negative rI4" (+ 48 4) 3 | |
518 "Literal value is stored in rI4 with opposite sign. | |
519 Indexed, stores value of index in rI4 with opposite sign." | |
520 1) | |
521 | |
522 (mixal-add-operation-code | |
523 'ENN5 'address-transfer "Enter negative rI5" (+ 48 5) 3 | |
524 "Literal value is stored in rI5 with opposite sign. | |
525 Indexed, stores value of index in rI5 with opposite sign." | |
526 1) | |
527 | |
528 (mixal-add-operation-code | |
529 'ENN6 'address-transfer "Enter negative rI6" (+ 48 6) 3 | |
530 "Literal value is stored in rI6 with opposite sign. | |
531 Indexed, stores value of index in rI6 with opposite sign." | |
532 1) | |
533 | |
534 (mixal-add-operation-code | |
535 'INCA 'address-transfer "increase A" 48 0 | |
536 "Increase register A with the literal value of M. | |
537 On overflow the overflow toggle is set." | |
538 1) | |
539 | |
540 (mixal-add-operation-code | |
541 'INCX 'address-transfer "increase X" 55 0 | |
542 "Increase register X with the literal value of M. | |
543 On overflow the overflow toggle is set." | |
544 1) | |
545 | |
546 (mixal-add-operation-code | |
547 'INC1 'address-transfer "increase I1" (+ 48 1) 0 | |
548 "Increase register I1 with the literal value of M. | |
549 The result is undefined when the result does not fit in | |
550 2 bytes." | |
551 1) | |
552 | |
553 (mixal-add-operation-code | |
554 'INC2 'address-transfer "increase I2" (+ 48 2) 0 | |
555 "Increase register I2 with the literal value of M. | |
556 The result is undefined when the result does not fit in | |
557 2 bytes." | |
558 1) | |
559 | |
560 (mixal-add-operation-code | |
561 'INC3 'address-transfer "increase I3" (+ 48 3) 0 | |
562 "Increase register I3 with the literal value of M. | |
563 The result is undefined when the result does not fit in | |
564 2 bytes." | |
565 1) | |
566 | |
567 (mixal-add-operation-code | |
568 'INC4 'address-transfer "increase I4" (+ 48 4) 0 | |
569 "Increase register I4 with the literal value of M. | |
570 The result is undefined when the result does not fit in | |
571 2 bytes." | |
572 1) | |
573 | |
574 (mixal-add-operation-code | |
575 'INC5 'address-transfer "increase I5" (+ 48 5) 0 | |
576 "Increase register I5 with the literal value of M. | |
577 The result is undefined when the result does not fit in | |
578 2 bytes." | |
579 1) | |
580 | |
581 (mixal-add-operation-code | |
582 'INC6 'address-transfer "increase I6" (+ 48 6) 0 | |
583 "Increase register I6 with the literal value of M. | |
584 The result is undefined when the result does not fit in | |
585 2 bytes." | |
586 1) | |
587 | |
588 (mixal-add-operation-code | |
589 'DECA 'address-transfer "decrease A" 48 1 | |
590 "Decrease register A with the literal value of M. | |
591 On overflow the overflow toggle is set." | |
592 1) | |
593 | |
594 (mixal-add-operation-code | |
595 'DECX 'address-transfer "decrease X" 55 1 | |
596 "Decrease register X with the literal value of M. | |
597 On overflow the overflow toggle is set." | |
598 1) | |
599 | |
600 (mixal-add-operation-code | |
601 'DEC1 'address-transfer "decrease I1" (+ 48 1) 1 | |
602 "Decrease register I1 with the literal value of M. | |
603 The result is undefined when the result does not fit in | |
604 2 bytes." | |
605 1) | |
606 | |
607 (mixal-add-operation-code | |
608 'DEC2 'address-transfer "decrease I2" (+ 48 2) 1 | |
609 "Decrease register I2 with the literal value of M. | |
610 The result is undefined when the result does not fit in | |
611 2 bytes." | |
612 1) | |
613 | |
614 (mixal-add-operation-code | |
615 'DEC3 'address-transfer "decrease I3" (+ 48 3) 1 | |
616 "Decrease register I3 with the literal value of M. | |
617 The result is undefined when the result does not fit in | |
618 2 bytes." | |
619 1) | |
620 | |
621 (mixal-add-operation-code | |
622 'DEC4 'address-transfer "decrease I4" (+ 48 4) 1 | |
623 "Decrease register I4 with the literal value of M. | |
624 The result is undefined when the result does not fit in | |
625 2 bytes." | |
626 1) | |
627 | |
628 (mixal-add-operation-code | |
629 'DEC5 'address-transfer "decrease I5" (+ 48 5) 1 | |
630 "Decrease register I5 with the literal value of M. | |
631 The result is undefined when the result does not fit in | |
632 2 bytes." | |
633 1) | |
634 | |
635 (mixal-add-operation-code | |
636 'DEC6 'address-transfer "decrease I6" (+ 48 6) 1 | |
637 "Decrease register I6 with the literal value of M. | |
638 The result is undefined when the result does not fit in | |
639 2 bytes." | |
640 1) | |
641 | |
642 (mixal-add-operation-code | |
643 'CMPA 'comparison "compare A" 56 'field | |
644 "Compare contents of A with contents of M. | |
645 The field specifier works on both fields. The comparison indicator | |
646 is set to LESS, EQUAL or GREATER depending on the outcome." | |
647 2) | |
648 | |
649 | |
650 (mixal-add-operation-code | |
651 'CMPX 'comparison "compare X" 63 'field | |
652 "Compare contents of rX with contents of M. | |
653 The field specifier works on both fields. The comparison indicator | |
654 is set to LESS, EQUAL or GREATER depending on the outcome." | |
655 2) | |
656 | |
657 | |
658 (mixal-add-operation-code | |
659 'CMP1 'comparison "compare I1" (+ 56 1) 'field | |
660 "Compare contents of rI1 with contents of M. | |
661 The field specifier works on both fields. The comparison indicator | |
662 is set to LESS, EQUAL or GREATER depending on the outcome. Bit 1,2 and 3 | |
663 have a value of 0." | |
664 2) | |
665 | |
666 | |
667 (mixal-add-operation-code | |
668 'CMP2 'comparison "compare I2" (+ 56 2) 'field | |
669 "Compare contents of rI2 with contents of M. | |
670 The field specifier works on both fields. The comparison indicator | |
671 is set to LESS, EQUAL or GREATER depending on the outcome. Bit 1,2 and 3 | |
672 have a value of 0." | |
673 2) | |
674 | |
675 | |
676 (mixal-add-operation-code | |
677 'CMP3 'comparison "compare I3" (+ 56 3) 'field | |
678 "Compare contents of rI3 with contents of M. | |
679 The field specifier works on both fields. The comparison indicator | |
680 is set to LESS, EQUAL or GREATER depending on the outcome. Bit 1,2 and 3 | |
681 have a value of 0." | |
682 2) | |
683 | |
684 | |
685 (mixal-add-operation-code | |
686 'CMP4 'comparison "compare I4" (+ 56 4) 'field | |
687 "Compare contents of rI4 with contents of M. | |
688 The field specifier works on both fields. The comparison indicator | |
689 is set to LESS, EQUAL or GREATER depending on the outcome. Bit 1,2 and 3 | |
690 have a value of 0." | |
691 2) | |
692 | |
693 | |
694 (mixal-add-operation-code | |
695 'CMP5 'comparison "compare I5" (+ 56 5) 'field | |
696 "Compare contents of rI5 with contents of M. | |
697 The field specifier works on both fields. The comparison indicator | |
698 is set to LESS, EQUAL or GREATER depending on the outcome. Bit 1,2 and 3 | |
699 have a value of 0." | |
700 2) | |
701 | |
702 | |
703 (mixal-add-operation-code | |
704 'CMP6 'comparison "compare I6" (+ 56 6) 'field | |
705 "Compare contents of rI6 with contents of M. | |
706 The field specifier works on both fields. The comparison indicator | |
707 is set to LESS, EQUAL or GREATER depending on the outcome. Bit 1,2 and 3 | |
708 have a value of 0." | |
709 2) | |
710 | |
711 (mixal-add-operation-code | |
712 'JMP 'jump "jump" 39 0 | |
713 "Unconditional jump. | |
714 Register J is set to the value of the next instruction that would have | |
715 been executed when there was no jump." | |
716 1) | |
717 | |
718 (mixal-add-operation-code | |
719 'JSJ 'jump "jump, save J" 39 1 | |
720 "Unconditional jump, but rJ is not modified." | |
721 1) | |
722 | |
723 (mixal-add-operation-code | |
724 'JOV 'jump "jump on overflow" 39 2 | |
725 "Jump if OV is set (and turn it off). | |
726 Register J is set to the value of the next instruction that would have | |
727 been executed when there was no jump." | |
728 1) | |
729 | |
730 (mixal-add-operation-code | |
731 'JNOV 'jump "Jump on no overflow" 39 3 | |
732 "Jump if OV is not set (and turn it off). | |
733 Register J is set to the value of the next instruction that would have | |
734 been executed when there was no jump." | |
735 1) | |
736 | |
737 (mixal-add-operation-code | |
738 'JL 'jump "Jump on less" 39 4 | |
739 "Jump if '[CM] = L'. | |
740 Register J is set to the value of the next instruction that would have | |
741 been executed when there was no jump." | |
742 1) | |
743 | |
744 | |
745 (mixal-add-operation-code | |
746 'JE 'jump "Jump on equal" 39 5 | |
747 "Jump if '[CM] = E'. | |
748 Register J is set to the value of the next instruction that would have | |
749 been executed when there was no jump." | |
750 1) | |
751 | |
752 | |
753 (mixal-add-operation-code | |
754 'JG 'jump "Jump on greater" 39 6 | |
755 "Jump if '[CM] = G'. | |
756 Register J is set to the value of the next instruction that would have | |
757 been executed when there was no jump." | |
758 1) | |
759 | |
760 | |
761 (mixal-add-operation-code | |
762 'JGE 'jump "Jump on not less" 39 7 | |
763 "Jump if '[CM]' does not equal 'L'. | |
764 Register J is set to the value of the next instruction that would have | |
765 been executed when there was no jump." | |
766 1) | |
767 | |
768 | |
769 (mixal-add-operation-code | |
770 'JNE 'jump "Jump on not equal" 39 8 | |
771 "Jump if '[CM]' does not equal 'E'. | |
772 Register J is set to the value of the next instruction that would have | |
773 been executed when there was no jump." | |
774 1) | |
775 | |
776 | |
777 (mixal-add-operation-code | |
778 'JLE 'jump "Jump on not greater" 39 9 | |
779 "Jump if '[CM]' does not equal 'G'. | |
780 Register J is set to the value of the next instruction that would have | |
781 been executed when there was no jump." | |
782 1) | |
783 | |
784 (mixal-add-operation-code | |
785 'JAN 'jump "jump A negative" 40 0 | |
786 "Jump if the content of rA is negative. | |
787 Register J is set to the value of the next instruction that would have | |
788 been executed when there was no jump." | |
789 1) | |
790 | |
791 | |
792 (mixal-add-operation-code | |
793 'JAZ 'jump "jump A zero" 40 1 | |
794 "Jump if the content of rA is zero. | |
795 Register J is set to the value of the next instruction that would have | |
796 been executed when there was no jump." | |
797 1) | |
798 | |
799 | |
800 (mixal-add-operation-code | |
801 'JAP 'jump "jump A positive" 40 2 | |
802 "Jump if the content of rA is positive. | |
803 Register J is set to the value of the next instruction that would have | |
804 been executed when there was no jump." | |
805 1) | |
806 | |
807 | |
808 (mixal-add-operation-code | |
809 'JANN 'jump "jump A non-negative" 40 3 | |
810 "Jump if the content of rA is non-negative. | |
811 Register J is set to the value of the next instruction that would have | |
812 been executed when there was no jump." | |
813 1) | |
814 | |
815 | |
816 (mixal-add-operation-code | |
817 'JANZ 'jump "jump A non-zero" 40 4 | |
818 "Jump if the content of rA is non-zero. | |
819 Register J is set to the value of the next instruction that would have | |
820 been executed when there was no jump." | |
821 1) | |
822 | |
823 | |
824 (mixal-add-operation-code | |
825 'JANP 'jump "jump A non-positive" 40 5 | |
826 "Jump if the content of rA is non-positive. | |
827 Register J is set to the value of the next instruction that would have | |
828 been executed when there was no jump." | |
829 1) | |
830 | |
831 (mixal-add-operation-code | |
832 'JXN 'jump "jump X negative" 47 0 | |
833 "Jump if the content of rX is negative. | |
834 Register J is set to the value of the next instruction that would have | |
835 been executed when there was no jump." | |
836 1) | |
837 | |
838 | |
839 (mixal-add-operation-code | |
840 'JXZ 'jump "jump X zero" 47 1 | |
841 "Jump if the content of rX is zero. | |
842 Register J is set to the value of the next instruction that would have | |
843 been executed when there was no jump." | |
844 1) | |
845 | |
846 | |
847 (mixal-add-operation-code | |
848 'JXP 'jump "jump X positive" 47 2 | |
849 "Jump if the content of rX is positive. | |
850 Register J is set to the value of the next instruction that would have | |
851 been executed when there was no jump." | |
852 1) | |
853 | |
854 | |
855 (mixal-add-operation-code | |
856 'JXNN 'jump "jump X non-negative" 47 3 | |
857 "Jump if the content of rX is non-negative. | |
858 Register J is set to the value of the next instruction that would have | |
859 been executed when there was no jump." | |
860 1) | |
861 | |
862 | |
863 (mixal-add-operation-code | |
864 'JXNZ 'jump "jump X non-zero" 47 4 | |
865 "Jump if the content of rX is non-zero. | |
866 Register J is set to the value of the next instruction that would have | |
867 been executed when there was no jump." | |
868 1) | |
869 | |
870 | |
871 (mixal-add-operation-code | |
872 'JXNP 'jump "jump X non-positive" 47 5 | |
873 "Jump if the content of rX is non-positive. | |
874 Register J is set to the value of the next instruction that would have | |
875 been executed when there was no jump." | |
876 1) | |
877 | |
878 (mixal-add-operation-code | |
879 'J1N 'jump "jump I1 negative" (+ 40 1) 0 | |
880 "Jump if the content of rI1 is negative. | |
881 Register J is set to the value of the next instruction that would have | |
882 been executed when there was no jump." | |
883 1) | |
884 | |
885 | |
886 (mixal-add-operation-code | |
887 'J1Z 'jump "jump I1 zero" (+ 40 1) 1 | |
888 "Jump if the content of rI1 is zero. | |
889 Register J is set to the value of the next instruction that would have | |
890 been executed when there was no jump." | |
891 1) | |
892 | |
893 | |
894 (mixal-add-operation-code | |
895 'J1P 'jump "jump I1 positive" (+ 40 1) 2 | |
896 "Jump if the content of rI1 is positive. | |
897 Register J is set to the value of the next instruction that would have | |
898 been executed when there was no jump." | |
899 1) | |
900 | |
901 | |
902 (mixal-add-operation-code | |
903 'J1NN 'jump "jump I1 non-negative" (+ 40 1) 3 | |
904 "Jump if the content of rI1 is non-negative. | |
905 Register J is set to the value of the next instruction that would have | |
906 been executed when there was no jump." | |
907 1) | |
908 | |
909 | |
910 (mixal-add-operation-code | |
911 'J1NZ 'jump "jump I1 non-zero" (+ 40 1) 4 | |
912 "Jump if the content of rI1 is non-zero. | |
913 Register J is set to the value of the next instruction that would have | |
914 been executed when there was no jump." | |
915 1) | |
916 | |
917 | |
918 (mixal-add-operation-code | |
919 'J1NP 'jump "jump I1 non-positive" (+ 40 1) 5 | |
920 "Jump if the content of rI1 is non-positive. | |
921 Register J is set to the value of the next instruction that would have | |
922 been executed when there was no jump." | |
923 1) | |
924 | |
925 (mixal-add-operation-code | |
926 'J2N 'jump "jump I2 negative" (+ 40 1) 0 | |
927 "Jump if the content of rI2 is negative. | |
928 Register J is set to the value of the next instruction that would have | |
929 been executed when there was no jump." | |
930 1) | |
931 | |
932 | |
933 (mixal-add-operation-code | |
934 'J2Z 'jump "jump I2 zero" (+ 40 1) 1 | |
935 "Jump if the content of rI2 is zero. | |
936 Register J is set to the value of the next instruction that would have | |
937 been executed when there was no jump." | |
938 1) | |
939 | |
940 | |
941 (mixal-add-operation-code | |
942 'J2P 'jump "jump I2 positive" (+ 40 1) 2 | |
943 "Jump if the content of rI2 is positive. | |
944 Register J is set to the value of the next instruction that would have | |
945 been executed when there was no jump." | |
946 1) | |
947 | |
948 | |
949 (mixal-add-operation-code | |
950 'J2NN 'jump "jump I2 non-negative" (+ 40 1) 3 | |
951 "Jump if the content of rI2 is non-negative. | |
952 Register J is set to the value of the next instruction that would have | |
953 been executed when there was no jump." | |
954 1) | |
955 | |
956 | |
957 (mixal-add-operation-code | |
958 'J2NZ 'jump "jump I2 non-zero" (+ 40 1) 4 | |
959 "Jump if the content of rI2 is non-zero. | |
960 Register J is set to the value of the next instruction that would have | |
961 been executed when there was no jump." | |
962 1) | |
963 | |
964 | |
965 (mixal-add-operation-code | |
966 'J2NP 'jump "jump I2 non-positive" (+ 40 1) 5 | |
967 "Jump if the content of rI2 is non-positive. | |
968 Register J is set to the value of the next instruction that would have | |
969 been executed when there was no jump." | |
970 1) | |
971 | |
972 | |
973 (mixal-add-operation-code | |
974 'J3N 'jump "jump I3 negative" (+ 40 1) 0 | |
975 "Jump if the content of rI3 is negative. | |
976 Register J is set to the value of the next instruction that would have | |
977 been executed when there was no jump." | |
978 1) | |
979 | |
980 | |
981 (mixal-add-operation-code | |
982 'J3Z 'jump "jump I3 zero" (+ 40 1) 1 | |
983 "Jump if the content of rI3 is zero. | |
984 Register J is set to the value of the next instruction that would have | |
985 been executed when there was no jump." | |
986 1) | |
987 | |
988 | |
989 (mixal-add-operation-code | |
990 'J3P 'jump "jump I3 positive" (+ 40 1) 2 | |
991 "Jump if the content of rI3 is positive. | |
992 Register J is set to the value of the next instruction that would have | |
993 been executed when there was no jump." | |
994 1) | |
995 | |
996 | |
997 (mixal-add-operation-code | |
998 'J3NN 'jump "jump I3 non-negative" (+ 40 1) 3 | |
999 "Jump if the content of rI3 is non-negative. | |
1000 Register J is set to the value of the next instruction that would have | |
1001 been executed when there was no jump." | |
1002 1) | |
1003 | |
1004 | |
1005 (mixal-add-operation-code | |
1006 'J3NZ 'jump "jump I3 non-zero" (+ 40 1) 4 | |
1007 "Jump if the content of rI3 is non-zero. | |
1008 Register J is set to the value of the next instruction that would have | |
1009 been executed when there was no jump." | |
1010 1) | |
1011 | |
1012 | |
1013 (mixal-add-operation-code | |
1014 'J3NP 'jump "jump I3 non-positive" (+ 40 1) 5 | |
1015 "Jump if the content of rI3 is non-positive. | |
1016 Register J is set to the value of the next instruction that would have | |
1017 been executed when there was no jump." | |
1018 1) | |
1019 | |
1020 | |
1021 (mixal-add-operation-code | |
1022 'J4N 'jump "jump I4 negative" (+ 40 1) 0 | |
1023 "Jump if the content of rI4 is negative. | |
1024 Register J is set to the value of the next instruction that would have | |
1025 been executed when there was no jump." | |
1026 1) | |
1027 | |
1028 | |
1029 (mixal-add-operation-code | |
1030 'J4Z 'jump "jump I4 zero" (+ 40 1) 1 | |
1031 "Jump if the content of rI4 is zero. | |
1032 Register J is set to the value of the next instruction that would have | |
1033 been executed when there was no jump." | |
1034 1) | |
1035 | |
1036 | |
1037 (mixal-add-operation-code | |
1038 'J4P 'jump "jump I4 positive" (+ 40 1) 2 | |
1039 "Jump if the content of rI4 is positive. | |
1040 Register J is set to the value of the next instruction that would have | |
1041 been executed when there was no jump." | |
1042 1) | |
1043 | |
1044 | |
1045 (mixal-add-operation-code | |
1046 'J4NN 'jump "jump I4 non-negative" (+ 40 1) 3 | |
1047 "Jump if the content of rI4 is non-negative. | |
1048 Register J is set to the value of the next instruction that would have | |
1049 been executed when there was no jump." | |
1050 1) | |
1051 | |
1052 | |
1053 (mixal-add-operation-code | |
1054 'J4NZ 'jump "jump I4 non-zero" (+ 40 1) 4 | |
1055 "Jump if the content of rI4 is non-zero. | |
1056 Register J is set to the value of the next instruction that would have | |
1057 been executed when there was no jump." | |
1058 1) | |
1059 | |
1060 | |
1061 (mixal-add-operation-code | |
1062 'J4NP 'jump "jump I4 non-positive" (+ 40 1) 5 | |
1063 "Jump if the content of rI4 is non-positive. | |
1064 Register J is set to the value of the next instruction that would have | |
1065 been executed when there was no jump." | |
1066 1) | |
1067 | |
1068 | |
1069 (mixal-add-operation-code | |
1070 'J5N 'jump "jump I5 negative" (+ 40 1) 0 | |
1071 "Jump if the content of rI5 is negative. | |
1072 Register J is set to the value of the next instruction that would have | |
1073 been executed when there was no jump." | |
1074 1) | |
1075 | |
1076 | |
1077 (mixal-add-operation-code | |
1078 'J5Z 'jump "jump I5 zero" (+ 40 1) 1 | |
1079 "Jump if the content of rI5 is zero. | |
1080 Register J is set to the value of the next instruction that would have | |
1081 been executed when there was no jump." | |
1082 1) | |
1083 | |
1084 | |
1085 (mixal-add-operation-code | |
1086 'J5P 'jump "jump I5 positive" (+ 40 1) 2 | |
1087 "Jump if the content of rI5 is positive. | |
1088 Register J is set to the value of the next instruction that would have | |
1089 been executed when there was no jump." | |
1090 1) | |
1091 | |
1092 | |
1093 (mixal-add-operation-code | |
1094 'J5NN 'jump "jump I5 non-negative" (+ 40 1) 3 | |
1095 "Jump if the content of rI5 is non-negative. | |
1096 Register J is set to the value of the next instruction that would have | |
1097 been executed when there was no jump." | |
1098 1) | |
1099 | |
1100 | |
1101 (mixal-add-operation-code | |
1102 'J5NZ 'jump "jump I5 non-zero" (+ 40 1) 4 | |
1103 "Jump if the content of rI5 is non-zero. | |
1104 Register J is set to the value of the next instruction that would have | |
1105 been executed when there was no jump." | |
1106 1) | |
1107 | |
1108 | |
1109 (mixal-add-operation-code | |
1110 'J5NP 'jump "jump I5 non-positive" (+ 40 1) 5 | |
1111 "Jump if the content of rI5 is non-positive. | |
1112 Register J is set to the value of the next instruction that would have | |
1113 been executed when there was no jump." | |
1114 1) | |
1115 | |
1116 | |
1117 (mixal-add-operation-code | |
1118 'J6N 'jump "jump I6 negative" (+ 40 1) 0 | |
1119 "Jump if the content of rI6 is negative. | |
1120 Register J is set to the value of the next instruction that would have | |
1121 been executed when there was no jump." | |
1122 1) | |
1123 | |
1124 | |
1125 (mixal-add-operation-code | |
1126 'J6Z 'jump "jump I6 zero" (+ 40 1) 1 | |
1127 "Jump if the content of rI6 is zero. | |
1128 Register J is set to the value of the next instruction that would have | |
1129 been executed when there was no jump." | |
1130 1) | |
1131 | |
1132 | |
1133 (mixal-add-operation-code | |
1134 'J6P 'jump "jump I6 positive" (+ 40 1) 2 | |
1135 "Jump if the content of rI6 is positive. | |
1136 Register J is set to the value of the next instruction that would have | |
1137 been executed when there was no jump." | |
1138 1) | |
1139 | |
1140 | |
1141 (mixal-add-operation-code | |
1142 'J6NN 'jump "jump I6 non-negative" (+ 40 1) 3 | |
1143 "Jump if the content of rI6 is non-negative. | |
1144 Register J is set to the value of the next instruction that would have | |
1145 been executed when there was no jump." | |
1146 1) | |
1147 | |
1148 | |
1149 (mixal-add-operation-code | |
1150 'J6NZ 'jump "jump I6 non-zero" (+ 40 1) 4 | |
1151 "Jump if the content of rI6 is non-zero. | |
1152 Register J is set to the value of the next instruction that would have | |
1153 been executed when there was no jump." | |
1154 1) | |
1155 | |
1156 | |
1157 (mixal-add-operation-code | |
1158 'J6NP 'jump "jump I6 non-positive" (+ 40 1) 5 | |
1159 "Jump if the content of rI6 is non-positive. | |
1160 Register J is set to the value of the next instruction that would have | |
1161 been executed when there was no jump." | |
1162 1) | |
1163 | |
1164 (mixal-add-operation-code | |
1165 'SLA 'miscellaneous "shift left A" 6 0 | |
1166 "Shift to A, M bytes left. | |
1167 Hero's will be added to the right." | |
1168 2) | |
1169 | |
1170 | |
1171 (mixal-add-operation-code | |
1172 'SRA 'miscellaneous "shift right A" 6 1 | |
1173 "Shift to A, M bytes right. | |
1174 Zeros will be added to the left." | |
1175 2) | |
1176 | |
1177 | |
1178 (mixal-add-operation-code | |
1179 'SLAX 'miscellaneous "shift left AX" 6 2 | |
1180 "Shift AX, M bytes left. | |
1181 Zeros will be added to the right." | |
1182 2) | |
1183 | |
1184 | |
1185 | |
1186 (mixal-add-operation-code | |
1187 'SRAX 'miscellaneous "shift right AX" 6 3 | |
1188 "Shift AX, M bytes right. | |
1189 Zeros will be added to the left." | |
1190 2) | |
1191 | |
1192 | |
1193 (mixal-add-operation-code | |
1194 'SLC 'miscellaneous "shift left AX circularly" 6 4 | |
1195 "Shift AX, M bytes left circularly. | |
1196 The bytes that fall off to the left will be added to the right." | |
1197 2) | |
1198 | |
1199 | |
1200 (mixal-add-operation-code | |
1201 'SRC 'miscellaneous "shift right AX circularly" 6 4 | |
1202 "Shift AX, M bytes right circularly. | |
1203 The bytes that fall off to the right will be added to the left." | |
1204 2) | |
1205 | |
1206 (mixal-add-operation-code | |
1207 'MOVE 'miscellaneous "move" 7 'number | |
1208 "Move MOD words from M to the location stored in rI1." | |
1209 '(+ 1 (* 2 number))) | |
1210 | |
1211 (mixal-add-operation-code | |
1212 'NOP 'miscellaneous "no operation" 0 'ignored | |
1213 "No operation, M and F are not used by the machine." | |
1214 1) | |
1215 | |
1216 (mixal-add-operation-code | |
1217 'HLT 'miscellaneous "halt" 5 2 | |
1218 "Halt. | |
1219 Stop instruction fetching." | |
1220 1) | |
1221 | |
1222 (mixal-add-operation-code | |
1223 'IN 'input-output "input" 36 'unit | |
1224 "Transfer a block of words from the specified unit to memory. | |
1225 The transfer starts at address M." | |
1226 1) | |
1227 | |
1228 (mixal-add-operation-code | |
1229 'OUT 'input-output "output" 37 'unit | |
1230 "Transfer a block of words from memory. | |
1231 The transfer starts at address M to the specified unit." | |
1232 1) | |
1233 | |
1234 (mixal-add-operation-code | |
1235 'IOC 'input-output "input-output control" 35 'unit | |
1236 "Perform a control operation. | |
1237 The control operation is given by M on the specified unit." | |
1238 1) | |
1239 | |
1240 (mixal-add-operation-code | |
1241 'JRED 'input-output "jump ready" 38 'unit | |
1242 "Jump to M if the specified unit is ready." | |
1243 1) | |
1244 | |
1245 | |
1246 (mixal-add-operation-code | |
1247 'JBUS 'input-output "jump busy" 34 'unit | |
1248 "Jump to M if the specified unit is busy." | |
1249 1) | |
1250 | |
1251 (mixal-add-operation-code | |
1252 'NUM 'conversion "convert to numeric" 5 0 | |
1253 "Convert rAX to its numerical value and store it in rA. | |
1254 the register rAX is assumed to contain a character representation of | |
1255 a number." | |
1256 10) | |
1257 | |
1258 (mixal-add-operation-code | |
1259 'CHAR 'conversion "convert to characters" 5 1 | |
1260 "Convert the number stored in rA to a character representation. | |
1261 The converted character representation is stored in rAX." | |
1262 10) | |
1263 | 1106 |
1264 (defvar mixal-describe-operation-code-history nil | 1107 (defvar mixal-describe-operation-code-history nil |
1265 "History list for describe operation code.") | 1108 "History list for describe operation code.") |
1266 | 1109 |
1267 (defun mixal-describe-operation-code (&optional op-code) | 1110 (defun mixal-describe-operation-code (op-code) |
1268 "Display the full documentation of OP-CODE." | 1111 "Display the full documentation of OP-CODE." |
1269 (interactive) | 1112 (interactive |
1270 ;; We like to provide completion and history, so do it ourself | 1113 (list |
1271 ;; (interactive "?bla")? | |
1272 (unless op-code | |
1273 (let* ((completion-ignore-case t) | 1114 (let* ((completion-ignore-case t) |
1274 ;; we already have a list, but it is not in the right format | 1115 ;; we already have a list, but it is not in the right format |
1275 ;; transform it to a valid table so completition can use it | 1116 ;; transform it to a valid table so completition can use it |
1276 (table (mapcar '(lambda (elm) | 1117 (table (mapcar '(lambda (elm) |
1277 (cons (symbol-name (car elm)) nil)) | 1118 (cons (symbol-name (car elm)) nil)) |
1278 mixal-operation-codes-alist)) | 1119 mixal-operation-codes-alist)) |
1279 ;; prompt is different depending on we are close to a valid op-code | 1120 ;; prompt is different depending on we are close to a valid op-code |
1280 (have-default (member (current-word) mixal-operation-codes)) | 1121 (have-default (assq (intern-soft (current-word)) |
1122 mixal-operation-codes-alist)) | |
1281 (prompt (concat "Describe operation code " | 1123 (prompt (concat "Describe operation code " |
1282 (if have-default | 1124 (if have-default |
1283 (concat "(default " (current-word) "): ") | 1125 (concat "(default " (current-word) "): ") |
1284 ": ")))) | 1126 ": ")))) |
1285 ;; as the operation code to the user | 1127 ;; As the operation code to the user. |
1286 (setq op-code (completing-read prompt table nil t nil | 1128 (completing-read prompt table nil t nil |
1287 'mixal-describe-operation-code-history | 1129 'mixal-describe-operation-code-history |
1288 (current-word))))) | 1130 (current-word))))) |
1289 ;; get the info on the op-code and output it to the help buffer | 1131 ;; get the info on the op-code and output it to the help buffer |
1290 (let ((op-code-help (assq (intern-soft op-code) mixal-operation-codes-alist))) | 1132 (let ((op-code-help (assq (intern-soft op-code) mixal-operation-codes-alist))) |
1291 (when op-code-help | 1133 (when op-code-help |
1292 (with-output-to-temp-buffer (buffer-name (get-buffer-create "*Help*")) | 1134 (with-output-to-temp-buffer (buffer-name (get-buffer-create "*Help*")) |
1293 (princ op-code) (princ " is an mix operation code\n\n") | 1135 (princ op-code) (princ " is an mix operation code\n\n") |
1315 ;;;###autoload | 1157 ;;;###autoload |
1316 (define-derived-mode mixal-mode fundamental-mode "mixal" | 1158 (define-derived-mode mixal-mode fundamental-mode "mixal" |
1317 "Major mode for the mixal asm language. | 1159 "Major mode for the mixal asm language. |
1318 \\{mixal-mode-map}" | 1160 \\{mixal-mode-map}" |
1319 (set (make-local-variable 'comment-start) "*") | 1161 (set (make-local-variable 'comment-start) "*") |
1320 (set (make-local-variable 'comment-start-skip) "*") | 1162 (set (make-local-variable 'comment-start-skip) "^\\*[ \t]*") |
1321 (set (make-local-variable 'font-lock-defaults) '(mixal-font-lock-keywords)) | 1163 (set (make-local-variable 'font-lock-defaults) |
1164 `(mixal-font-lock-keywords nil nil nil nil | |
1165 (font-lock-syntactic-keywords . ,mixal-font-lock-syntactic-keywords) | |
1166 (parse-sexp-lookup-properties . t))) | |
1322 ;; might add an indent function in the future | 1167 ;; might add an indent function in the future |
1323 ;; (set (make-local-variable 'indent-line-function) 'mixal-indent-line) | 1168 ;; (set (make-local-variable 'indent-line-function) 'mixal-indent-line) |
1324 (set (make-local-variable 'compile-command) (concat "mixasm " | 1169 (set (make-local-variable 'compile-command) (concat "mixasm " |
1325 buffer-file-name)) | 1170 buffer-file-name)) |
1326 ;; mixasm will do strange when there is no final newline, | 1171 ;; mixasm will do strange when there is no final newline, |