comparison lisp/progmodes/verilog-mode.el @ 92148:f991f10f15ec

Merge from emacs--rel--22 Revision: [e-mail]/emacs--devo--0--patch-1074

92147:773ae07da318

;; (This section is required to appease checkdoc.)

;;; Code:

;; This variable will always hold the version number of the mode
(defconst verilog-mode-version "383"
  "Version of this Verilog mode.")
(defconst verilog-mode-release-date "2008-01-07-GNU"
  "Release date of this Verilog mode.")
(defconst verilog-mode-release-emacs t
  "If non-nil, this version of Verilog mode was released with Emacs itself.")

(defun verilog-version ()

      (error nil))
    (condition-case nil
        (if (fboundp 'store-match-data)
            nil ;; fab
          (defmacro store-match-data (&rest args) nil))
      (error nil))
    (condition-case nil
        (if (boundp 'current-menubar)
            nil ;; great
          (progn
            (defmacro add-submenu (&rest args) nil))
          )
      (error nil))
    (condition-case nil
        (if (fboundp 'char-before)
            nil ;; great
          (defmacro char-before (&rest body)

    (define-key map "\C-c\C-h" 'verilog-header)
    map)
  "Keymap used in Verilog mode.")

;; menus
(defvar verilog-xemacs-menu
  `("Verilog"
    ("Choose Compilation Action"
     ["None"
      (progn
	(setq verilog-tool nil)

	(verilog-set-compile-command))
      :style radio
      :selected (equal verilog-tool `verilog-compiler)]
     )
    ("Move"
     ,(if (featurep 'xemacs)
	  (progn
	    ["Beginning of function"		verilog-beg-of-defun t]
	    ["End of function"			verilog-end-of-defun t]
	    ["Mark function"			verilog-mark-defun t])
	["Beginning of function"		beginning-of-defun t]
	["End of function"			end-of-defun t]
	["Mark function"			mark-defun t])

     ["Goto function/module"		verilog-goto-defun t]
     ["Move to beginning of block"	electric-verilog-backward-sexp t]
     ["Move to end of block"		electric-verilog-forward-sexp t]
     )
    ("Comments"

     )
    "----"
    ["Submit bug report"		verilog-submit-bug-report t]
    ["Version and FAQ"			verilog-faq t]
    ["Customize Verilog Mode..."	verilog-customize t]
    ["Customize Verilog Fonts & Colors"	verilog-font-customize t]
    )
  "Emacs menu for Verilog mode."
  )
(defvar verilog-statement-menu
  '("Statements"
    ["Header"		verilog-sk-header  t]
    ["Comment"		verilog-sk-comment t]
    "----"
    ["Module"		verilog-sk-module t]

    ["While"		verilog-sk-while t]
    ["Fork"		verilog-sk-fork t]
    ["Repeat"		verilog-sk-repeat t]
    ["Case"		verilog-sk-case t]
    ["Casex"		verilog-sk-casex t]
    ["Casez"		verilog-sk-casez t]
    )
  "Menu for statement templates in Verilog.")

(easy-menu-define verilog-menu verilog-mode-map "Menu for Verilog mode"
		  verilog-xemacs-menu)
(easy-menu-define verilog-stmt-menu verilog-mode-map "Menu for statement templates in Verilog."
		  verilog-statement-menu)

(defvar verilog-mode-abbrev-table nil
  "Abbrev table in use in Verilog-mode buffers.")

(define-abbrev-table 'verilog-mode-abbrev-table ())

;; verilog-forward-sexp and verilog-calc-indent

(defconst verilog-beg-block-re-ordered
  ( concat "\\<"
	   "\\(begin\\)"		;1
	   "\\|\\(randcase\\|\\(unique\\s-+\\|priority\\s-+\\)?case[xz]?\\)" ; 2
;;	   "\\|\\(randcase\\|case[xz]?\\)" ; 2
	   "\\|\\(fork\\)"		;3
	   "\\|\\(class\\)"		;4
	   "\\|\\(table\\)"		;5
	   "\\|\\(specify\\)"		;6
	   "\\|\\(function\\)"		;7
	   "\\|\\(task\\)"		;8
	   "\\|\\(generate\\)"		;9
	   "\\|\\(covergroup\\)"	;10
	   "\\|\\(property\\)"		;11
	   "\\|\\(\\(rand\\)?sequence\\)"  ;12
	   "\\|\\(clocking\\)"          ;13
	   "\\>"))

(defconst verilog-end-block-ordered-rry
  [ "\\(\\<begin\\>\\)\\|\\(\\<end\\>\\)\\|\\(\\<endcase\\>\\)\\|\\(\\<join\\(_any\\|_none\\)?\\>\\)"
    "\\(\\<randcase\\>\\|\\<case[xz]?\\>\\)\\|\\(\\<endcase\\>\\)"

       ))))
(defconst verilog-declaration-core-re
  (eval-when-compile
    (verilog-regexp-words
     `(
       ;; integer_atom_type
       "byte" "shortint" "int" "longint" "integer" "time"
       ;; integer_vector_type
       "bit" "logic" "reg"
       ;; non_integer_type

  (eval-when-compile (verilog-regexp-words `("endmodule" "endclass" "endprogram" "endinterface" "endpackage" "endprimitive" "endconfig"))))
(defconst verilog-zero-indent-re
  (concat verilog-defun-re "\\|" verilog-end-defun-re))

(defconst verilog-behavioral-block-beg-re
  (concat "\\(\\<initial\\>\\|\\<final\\>\\|\\<always\\>\\|\\<always_comb\\>\\|\\<always_ff\\>\\|"
	  "\\<always_latch\\>\\|\\<function\\>\\|\\<task\\>\\)"))

(defconst verilog-indent-re
  (eval-when-compile
    (verilog-regexp-words
     `(

  (eval-when-compile
    (verilog-regexp-words
     `(
       "endmodule" "endprimitive" "endinterface" "endpackage" "endprogram" "endclass"
       ))))
(defconst verilog-extended-case-re "\\(unique\\s-+\\|priority\\s-+\\)?case[xz]?")
(defconst verilog-extended-complete-re
  (concat "\\(\\<extern\\s-+\\|\\<virtual\\s-+\\|\\<protected\\s-+\\)*\\(\\<function\\>\\|\\<task\\>\\)"
	  "\\|\\(\\<typedef\\>\\s-+\\)*\\(\\<struct\\>\\|\\<union\\>\\|\\<class\\>\\)"
	  "\\|" verilog-extended-case-re ))

     (:foreground "orange1" :bold t ))
    (t (:italic t)))
  "Font lock mode face used to highlight AMS keywords."
  :group 'font-lock-highlighting-faces)

(let* ((verilog-type-font-keywords
	(eval-when-compile
	  (verilog-regexp-opt
	   '(
	     "and" "bit" "buf" "bufif0" "bufif1" "cmos" "defparam"

       (verilog-font-keywords
	(eval-when-compile
	  (verilog-regexp-opt
	   '(
	     "assign" "begin" "case" "casex" "casez" "randcase" "deassign"
	     "default" "disable" "else" "end" "endcase" "endfunction"
	     "endgenerate" "endinterface" "endmodule" "endprimitive"
	     "endspecify" "endtable" "endtask" "final" "for" "force" "return" "break"
	     "continue" "forever" "fork" "function" "generate" "if" "iff" "initial"
	     "interface" "join" "join_any" "join_none" "macromodule" "module" "negedge"
	     "package" "endpackage" "always" "always_comb" "always_ff"
	     "always_latch" "posedge" "primitive" "priority" "release"
	     "repeat" "specify" "table" "task" "unique" "wait" "while"
	     "class" "program" "endclass" "endprogram"
	     ) nil  ))))

  (setq verilog-font-lock-keywords
	(list
	 ;; Fontify all builtin keywords
	 (concat "\\<\\(" verilog-font-keywords "\\|"
		       ;; And user/system tasks and functions
		       "\\$[a-zA-Z][a-zA-Z0-9_\\$]*"
		       "\\)\\>")
	 ;; Fontify all types
	 (cons (concat "\\<\\(" verilog-type-font-keywords "\\)\\>")
	       'font-lock-type-face)
	 ;; Fontify IEEE-P1800 keywords appropriately
	 (if verilog-highlight-p1800-keywords
	     (cons (concat "\\<\\(" verilog-p1800-keywords "\\)\\>")
		   'verilog-font-lock-p1800-face)

    (if (not (looking-at "\\<"))
	(forward-word -1))
    (cond
     ((verilog-skip-forward-comment-or-string)
      (verilog-forward-syntactic-ws))
     ((looking-at verilog-beg-block-re-ordered);; begin|case|fork|class|table|specify|function|task|generate|covergroup|property|sequence|clocking
      (cond
       ((match-end 1) ; end
	;; Search forward for matching begin
	(setq reg "\\(\\<begin\\>\\)\\|\\(\\<end\\>\\)" ))
       ((match-end 2) ; endcase
	;; Search forward for matching case
	(setq reg "\\(\\<randcase\\>\\|\\(\\<unique\\>\\s-+\\|\\<priority\\>\\s-+\\)?\\<case[xz]?\\>[^:]\\)\\|\\(\\<endcase\\>\\)" ))
       ((match-end 3) ; join
	;; Search forward for matching fork
	(setq reg "\\(\\<fork\\>\\)\\|\\(\\<join\\(_any\\|_none\\)?\\>\\)" ))
       ((match-end 4) ; endclass
	;; Search forward for matching class
	(setq reg "\\(\\<class\\>\\)\\|\\(\\<endclass\\>\\)" ))
       ((match-end 5) ; endtable
	;; Search forward for matching table
	(setq reg "\\(\\<table\\>\\)\\|\\(\\<endtable\\>\\)" ))
       ((match-end 6) ; endspecify
	;; Search forward for matching specify
	(setq reg "\\(\\<specify\\>\\)\\|\\(\\<endspecify\\>\\)" ))
       ((match-end 7) ; endfunction
	;; Search forward for matching function
	(setq reg "\\(\\<function\\>\\)\\|\\(\\<endfunction\\>\\)" ))
       ((match-end 8) ; endtask
	;; Search forward for matching task
	(setq reg "\\(\\<task\\>\\)\\|\\(\\<endtask\\>\\)" ))
       ((match-end 9) ; endgenerate
	;; Search forward for matching generate
	(setq reg "\\(\\<generate\\>\\)\\|\\(\\<endgenerate\\>\\)" ))
       ((match-end 10) ; endgroup
	;; Search forward for matching covergroup
	(setq reg "\\(\\<covergroup\\>\\)\\|\\(\\<endgroup\\>\\)" ))
       ((match-end 11) ; endproperty
	;; Search forward for matching property
	(setq reg "\\(\\<property\\>\\)\\|\\(\\<endproperty\\>\\)" ))
       ((match-end 12) ; endsequence
	;; Search forward for matching sequence
	(setq reg "\\(\\<\\(rand\\)?sequence\\>\\)\\|\\(\\<endsequence\\>\\)" )
	(setq md 3)) ; 3 to get to endsequence in the reg above
       ((match-end 13) ; endclocking
	;; Search forward for matching clocking
	(setq reg "\\(\\<clocking\\>\\)\\|\\(\\<endclocking\\>\\)" )))
      (if (forward-word 1)
	  (catch 'skip
	    (let ((nest 1))
	      (while (verilog-re-search-forward reg nil 'move)
		(cond
		 ((match-end md) ; the closer in reg, so we are climbing out

  (when (boundp 'hack-local-variables-hook)  ;; Also modify any file-local-variables
    (add-hook 'hack-local-variables-hook 'verilog-modify-compile-command t))

  ;; Setting up menus
  (when (featurep 'xemacs)
    (when (and current-menubar
	       (not (assoc "Verilog" current-menubar)))
      ;; (set-buffer-menubar (copy-sequence current-menubar))
      (add-submenu nil verilog-xemacs-menu)
      (add-submenu nil verilog-stmt-menu)))

  ;; Stuff for GNU emacs
  (set (make-local-variable 'font-lock-defaults)
       '((verilog-font-lock-keywords verilog-font-lock-keywords-1
                                     verilog-font-lock-keywords-2

(defun verilog-mark-defun ()
  "Mark the current Verilog function (or procedure).
This puts the mark at the end, and point at the beginning."
  (interactive)
  (when (featurep 'xemacs)
    (push-mark (point))
    (verilog-end-of-defun)
    (push-mark (point))
    (verilog-beg-of-defun)
    (if (fboundp 'zmacs-activate-region)
	(zmacs-activate-region))))

(defun verilog-comment-region (start end)
  ; checkdoc-params: (start end)
  "Put the region into a Verilog comment.
The comments that are in this area are \"deformed\":

	    (verilog-beg-of-statement)
	    (if (looking-at verilog-extended-case-re)
		(throw 'nesting 'case)
	      (goto-char here)))
	  (throw 'nesting 'case))

	 ;; need to consider typedef struct here...
	 ((looking-at "\\<class\\|struct\\|function\\|task\\|property\\>")
					; *sigh* These words have an optional prefix:
					; extern {virtual|protected}? function a();

    t
    (forward-word -1)
    (cond
     ((looking-at "\\<else\\>")
      t)
     ((looking-at verilog-indent-re)
      nil)
     (t
      (let
	  ((back (point)))

      (re-search-backward "//" nil t)
      (current-column)))))

;;

(defun verilog-pretty-declarations ()
  "Line up declarations around point."
  (interactive)
  (save-excursion
    (if (progn
	  (verilog-beg-of-statement-1)

		  (verilog-do-indent (verilog-calculate-indent))
		  (verilog-forward-ws&directives)
		  (current-column))))
	  (goto-char end)
	  (goto-char start)
	  (if (> (- end start) 100)
	      (message "Lining up declarations..(please stand by)"))
	  ;; Get the beginning of line indent first
	  (while (progn (setq e (marker-position edpos))
			(< (point) e))
	    (cond

	  (goto-char start)
	  (while (progn (setq e (marker-position edpos))
			(setq r (- e (point)))
			(> r 0))
	    (setq e (point))
	    (message "%d" r)
	    (cond
	     ((or (and verilog-indent-declaration-macros
		       (looking-at verilog-declaration-re-1-macro))
		  (looking-at verilog-declaration-re-1-no-macro))
	      (let ((p (match-end 0)))

	     (t		; Must be comment or white space
	      (goto-char e)
	      (verilog-forward-ws&directives)
	      (forward-line -1)))
	    (forward-line 1))
	  (message "")))))

(defun verilog-pretty-expr (&optional myre)
  "Line up expressions around point, or optional regexp MYRE."
  (interactive "sRegular Expression: ((<|:)?=) ")
  (save-excursion
    (if (or (eq myre nil)
	    (string-equal myre ""))
	(setq myre "\\(<\\|:\\)?="))
;    (setq myre (concat "\\(^[^;" myre "]*\\)\\([" myre "]\\)"))
    (setq myre (concat "\\(^[^;#:?=]*\\)\\([" myre "]\\)"))
    (beginning-of-line)
    (if (and (not (looking-at (concat "^\\s-*" verilog-complete-reg)))
	     (looking-at myre))
	(let* ((here (point))
	       (e) (r)
	       (start
		(progn
		  (beginning-of-line)
		  (setq e (point))
		  (verilog-backward-syntactic-ws)
		  (beginning-of-line)
		  (while (and (not (looking-at (concat "^\\s-*" verilog-complete-reg)))
			      (looking-at myre)
			      (not (bobp)))
		    (setq e (point))
		    (verilog-backward-syntactic-ws)
		    (beginning-of-line)
		    ) ;Ack, need to grok `define
		  e))
	       (end
		(progn
		  (goto-char here)
		  (end-of-line)
		  (setq e (point))	;Might be on last line
		  (verilog-forward-syntactic-ws)
		  (beginning-of-line)
		  (while (and (not (looking-at
				    (concat "^\\s-*" verilog-complete-reg)))
			      (looking-at myre))
		    (end-of-line)
		    (setq e (point))
		    (verilog-forward-syntactic-ws)
		    (beginning-of-line))
		  e))
	       (edpos (set-marker (make-marker) end))
	       (ind))
	  (goto-char start)
	  (verilog-do-indent (verilog-calculate-indent))
	  (if (> (- end start) 100)
	      (message "Lining up expressions..(please stand by)"))

	  ;; Set indent to minimum throughout region
	  (while (< (point) (marker-position edpos))
	    (beginning-of-line)
	    (verilog-just-one-space myre)
	    (end-of-line)
	    (verilog-forward-syntactic-ws))

	  ;; Now find biggest prefix
	  (setq ind (verilog-get-lineup-indent-2 myre start edpos))

	  ;; Now indent each line.
	  (goto-char start)
	  (while (progn (setq e (marker-position edpos))
			(setq r (- e (point)))
			(> r 0))
	    (setq e (point))
	    (message "%d" r)
	    (cond
	     ((looking-at myre)
	      (goto-char (match-end 1))
	      (if (eq (char-after) ?=)
		  (indent-to (1+ ind))	; line up the = of the <= with surrounding =
		(indent-to ind)))
	     ((verilog-continued-line-1 start)
	      (goto-char e)
	      (indent-line-to ind))
	     (t		; Must be comment or white space
	      (goto-char e)
	      (verilog-forward-ws&directives)
	      (forward-line -1)))
	    (forward-line 1))
	  (message "")))))

(defun verilog-just-one-space (myre)
  "Remove extra spaces around regular expression MYRE."
  (interactive)
  (if (and (not(looking-at verilog-complete-reg))

	(progn
	  (goto-char p2)
	  (if (looking-at "\\s-") (just-one-space))
	  (goto-char p1)
	  (forward-char -1)
	  (if (looking-at "\\s-") (just-one-space)))))
  (message ""))

(defun verilog-indent-declaration (baseind)
  "Indent current lines as declaration.
Line up the variable names based on previous declaration's indentation.
BASEIND is the base indent to offset everything."

    (let ((ind 0) e)
      (goto-char b)
      ;; Get rightmost position
      (while (progn (setq e (marker-position edpos))
		    (< (point) e))
	(if (verilog-re-search-forward myre e 'move)
	    (progn
	      (goto-char (match-end 0))
	      (verilog-backward-syntactic-ws)
	      (if (> (current-column) ind)
		  (setq ind (current-column)))
	      (goto-char (match-end 0)))))
      (if (> ind 0)
	  (1+ ind)
	;; No lineup-string found
	(goto-char b)
	(end-of-line)

	    (beginning-of-line))
	  pt)
	(verilog-goto-defun-file label))))

;; Eliminate compile warning
(eval-when-compile
  (if (not (boundp 'occur-pos-list))
      (defvar occur-pos-list nil "Backward compatibility occur positions.")))

(defun verilog-showscopes ()
  "List all scopes in this module."
  (interactive)
  (let ((buffer (current-buffer))

	(verilog-modi-cache-add-wires modi sig-list)
	(verilog-insert-indent "// End of automatics\n")
	(when nil	;; Too slow on huge modules, plus makes everyone's module change
	  (beginning-of-line)
	  (setq pnt (point))
	  (verilog-pretty-declarations)
	  (goto-char pnt)
	  (verilog-pretty-expr "//"))))))

(defun verilog-auto-output ()
  "Expand AUTOOUTPUT statements, as part of \\[verilog-auto].

  > "always @ ( /*AUTOSENSE*/ ) begin\n"
  > "case (" '(verilog-sk-prompt-state-selector) ") " \n
  > ("case selector: " str ": begin" \n > "next_" verilog-sk-state " = " _ ";" \n > (- verilog-indent-level-behavioral) "end" \n )
  resume: >  (- verilog-case-indent) "endcase" (progn (electric-verilog-terminate-line) nil)
  > (- verilog-indent-level-behavioral) "end" (progn (electric-verilog-terminate-line) nil))

;; Eliminate compile warning
(eval-when-compile
  (if (not (boundp 'mode-popup-menu))
      (defvar mode-popup-menu nil "Compatibility with XEmacs.")))

;; ---- add menu 'Statements' in Verilog mode (MH)
(defun verilog-add-statement-menu ()
  "Add the menu 'Statements' to the menu bar in Verilog mode."
  (if (featurep 'xemacs)
      (progn
	(easy-menu-add verilog-stmt-menu)
	(easy-menu-add verilog-menu)
	(setq mode-popup-menu (cons "Verilog Mode" verilog-stmt-menu)))))

(add-hook 'verilog-mode-hook 'verilog-add-statement-menu)



;;
;; Include file loading with mouse/return event
;;

92148:f991f10f15ec

;; (This section is required to appease checkdoc.)

;;; Code:

;; This variable will always hold the version number of the mode
(defconst verilog-mode-version "399"
  "Version of this Verilog mode.")
(defconst verilog-mode-release-date "2008-02-19-GNU"
  "Release date of this Verilog mode.")
(defconst verilog-mode-release-emacs t
  "If non-nil, this version of Verilog mode was released with Emacs itself.")

(defun verilog-version ()

      (error nil))
    (condition-case nil
        (if (fboundp 'store-match-data)
            nil ;; fab
          (defmacro store-match-data (&rest args) nil))
      (error nil))
    (condition-case nil
        (if (fboundp 'char-before)
            nil ;; great
          (defmacro char-before (&rest body)

    (define-key map "\C-c\C-h" 'verilog-header)
    map)
  "Keymap used in Verilog mode.")

;; menus
(easy-menu-define
  verilog-menu verilog-mode-map "Menu for Verilog mode"
  `("Verilog"
    ("Choose Compilation Action"
     ["None"
      (progn
	(setq verilog-tool nil)

	(verilog-set-compile-command))
      :style radio
      :selected (equal verilog-tool `verilog-compiler)]
     )
    ("Move"
     ["Beginning of function"           verilog-beg-of-defun
      :keys "C-M-a"]
     ["End of function"                 verilog-end-of-defun
      :keys "C-M-e"]
     ["Mark function"                   verilog-mark-defun
      :keys "C-M-h"]
     ["Goto function/module"		verilog-goto-defun t]
     ["Move to beginning of block"	electric-verilog-backward-sexp t]
     ["Move to end of block"		electric-verilog-forward-sexp t]
     )
    ("Comments"

     )
    "----"
    ["Submit bug report"		verilog-submit-bug-report t]
    ["Version and FAQ"			verilog-faq t]
    ["Customize Verilog Mode..."	verilog-customize t]
    ["Customize Verilog Fonts & Colors"	verilog-font-customize t]))

(easy-menu-define
  verilog-stmt-menu verilog-mode-map "Menu for statement templates in Verilog."
  '("Statements"
    ["Header"		verilog-sk-header  t]
    ["Comment"		verilog-sk-comment t]
    "----"
    ["Module"		verilog-sk-module t]

    ["While"		verilog-sk-while t]
    ["Fork"		verilog-sk-fork t]
    ["Repeat"		verilog-sk-repeat t]
    ["Case"		verilog-sk-case t]
    ["Casex"		verilog-sk-casex t]
    ["Casez"		verilog-sk-casez t]))

(defvar verilog-mode-abbrev-table nil
  "Abbrev table in use in Verilog-mode buffers.")

(define-abbrev-table 'verilog-mode-abbrev-table ())

;; verilog-forward-sexp and verilog-calc-indent

(defconst verilog-beg-block-re-ordered
  ( concat "\\<"
	   "\\(begin\\)"		;1
	   "\\|\\(randcase\\|\\(unique\\s-+\\|priority\\s-+\\)?case[xz]?\\)" ; 2,3
	   "\\|\\(\\(disable\\s-+\\)?fork\\)" ;4
	   "\\|\\(class\\)"		;5
	   "\\|\\(table\\)"		;6
	   "\\|\\(specify\\)"		;7
	   "\\|\\(function\\)"		;8
	   "\\|\\(task\\)"		;9
	   "\\|\\(generate\\)"		;10
	   "\\|\\(covergroup\\)"	;11
	   "\\|\\(property\\)"		;12
	   "\\|\\(\\(rand\\)?sequence\\)" ;13
	   "\\|\\(clocking\\)"          ;14
	   "\\>"))

(defconst verilog-end-block-ordered-rry
  [ "\\(\\<begin\\>\\)\\|\\(\\<end\\>\\)\\|\\(\\<endcase\\>\\)\\|\\(\\<join\\(_any\\|_none\\)?\\>\\)"
    "\\(\\<randcase\\>\\|\\<case[xz]?\\>\\)\\|\\(\\<endcase\\>\\)"

       ))))
(defconst verilog-declaration-core-re
  (eval-when-compile
    (verilog-regexp-words
     `(
       ;; port direction (by themselves)
       "inout" "input" "output"
       ;; integer_atom_type
       "byte" "shortint" "int" "longint" "integer" "time"
       ;; integer_vector_type
       "bit" "logic" "reg"
       ;; non_integer_type

  (eval-when-compile (verilog-regexp-words `("endmodule" "endclass" "endprogram" "endinterface" "endpackage" "endprimitive" "endconfig"))))
(defconst verilog-zero-indent-re
  (concat verilog-defun-re "\\|" verilog-end-defun-re))

(defconst verilog-behavioral-block-beg-re
  (eval-when-compile (verilog-regexp-words `("initial" "final" "always" "always_comb" "always_latch" "always_ff"
					     "function" "task"))))

(defconst verilog-indent-re
  (eval-when-compile
    (verilog-regexp-words
     `(

  (eval-when-compile
    (verilog-regexp-words
     `(
       "endmodule" "endprimitive" "endinterface" "endpackage" "endprogram" "endclass"
       ))))
(defconst verilog-disable-fork-re "disable\\s-+fork")
(defconst verilog-extended-case-re "\\(unique\\s-+\\|priority\\s-+\\)?case[xz]?")
(defconst verilog-extended-complete-re
  (concat "\\(\\<extern\\s-+\\|\\<virtual\\s-+\\|\\<protected\\s-+\\)*\\(\\<function\\>\\|\\<task\\>\\)"
	  "\\|\\(\\<typedef\\>\\s-+\\)*\\(\\<struct\\>\\|\\<union\\>\\|\\<class\\>\\)"
	  "\\|" verilog-extended-case-re ))

     (:foreground "orange1" :bold t ))
    (t (:italic t)))
  "Font lock mode face used to highlight AMS keywords."
  :group 'font-lock-highlighting-faces)

(defvar verilog-font-grouping-keywords-face
  'verilog-font-lock-grouping-keywords-face
  "Font to use for Verilog Grouping Keywords (such as begin..end).")
(defface verilog-font-lock-grouping-keywords-face
  '((((class color)
      (background light))
     (:foreground "red4" :bold t ))
    (((class color)
      (background dark))
     (:foreground "red4" :bold t ))
    (t (:italic t)))
  "Font lock mode face used to highlight verilog grouping keywords."
  :group 'font-lock-highlighting-faces)

(let* ((verilog-type-font-keywords
	(eval-when-compile
	  (verilog-regexp-opt
	   '(
	     "and" "bit" "buf" "bufif0" "bufif1" "cmos" "defparam"

       (verilog-font-keywords
	(eval-when-compile
	  (verilog-regexp-opt
	   '(
	     "assign" "case" "casex" "casez" "randcase" "deassign"
	     "default" "disable" "else" "endcase" "endfunction"
	     "endgenerate" "endinterface" "endmodule" "endprimitive"
	     "endspecify" "endtable" "endtask" "final" "for" "force" "return" "break"
	     "continue" "forever" "fork" "function" "generate" "if" "iff" "initial"
	     "interface" "join" "join_any" "join_none" "macromodule" "module" "negedge"
	     "package" "endpackage" "always" "always_comb" "always_ff"
	     "always_latch" "posedge" "primitive" "priority" "release"
	     "repeat" "specify" "table" "task" "unique" "wait" "while"
	     "class" "program" "endclass" "endprogram"
	     ) nil  )))

       (verilog-font-grouping-keywords
	(eval-when-compile
	  (verilog-regexp-opt
	   '( "begin" "end" ) nil  ))))

  (setq verilog-font-lock-keywords
	(list
	 ;; Fontify all builtin keywords
	 (concat "\\<\\(" verilog-font-keywords "\\|"
		       ;; And user/system tasks and functions
		       "\\$[a-zA-Z][a-zA-Z0-9_\\$]*"
		       "\\)\\>")
	 ;; Fontify all types
	 (cons (concat "\\(\\<" verilog-font-grouping-keywords "\\)\\>") 
	       'verilog-font-lock-ams-face)
	 (cons (concat "\\<\\(" verilog-type-font-keywords "\\)\\>") 
	       'font-lock-type-face)
	 ;; Fontify IEEE-P1800 keywords appropriately
	 (if verilog-highlight-p1800-keywords
	     (cons (concat "\\<\\(" verilog-p1800-keywords "\\)\\>")
		   'verilog-font-lock-p1800-face)

    (if (not (looking-at "\\<"))
	(forward-word -1))
    (cond
     ((verilog-skip-forward-comment-or-string)
      (verilog-forward-syntactic-ws))
     ((looking-at verilog-beg-block-re-ordered) ;; begin|(case)|xx|(fork)|class|table|specify|function|task|generate|covergroup|property|sequence|clocking
      (cond
       ((match-end 1) ; end
	;; Search forward for matching begin
	(setq reg "\\(\\<begin\\>\\)\\|\\(\\<end\\>\\)" ))
       ((match-end 2) ; endcase
	;; Search forward for matching case
	(setq reg "\\(\\<randcase\\>\\|\\(\\<unique\\>\\s-+\\|\\<priority\\>\\s-+\\)?\\<case[xz]?\\>[^:]\\)\\|\\(\\<endcase\\>\\)" )
	(setq md 3) ;; ender is third item in regexp
	)
       ((match-end 4) ; join
	;; might be "disable fork"
	(if (or 
	     (looking-at verilog-disable-fork-re)
	     (and (looking-at "fork")
		  (progn
		    (forward-word -1)
		    (looking-at verilog-disable-fork-re))))
	    (progn
	      (goto-char (match-end 0))
	      (forward-word)
	      (setq reg nil))
	  (progn
	    ;; Search forward for matching fork
	    (setq reg "\\(\\<fork\\>\\)\\|\\(\\<join\\(_any\\|_none\\)?\\>\\)" ))))
       ((match-end 5) ; endclass
	;; Search forward for matching class
	(setq reg "\\(\\<class\\>\\)\\|\\(\\<endclass\\>\\)" ))
       ((match-end 6) ; endtable
	;; Search forward for matching table
	(setq reg "\\(\\<table\\>\\)\\|\\(\\<endtable\\>\\)" ))
       ((match-end 7) ; endspecify
	;; Search forward for matching specify
	(setq reg "\\(\\<specify\\>\\)\\|\\(\\<endspecify\\>\\)" ))
       ((match-end 8) ; endfunction
	;; Search forward for matching function
	(setq reg "\\(\\<function\\>\\)\\|\\(\\<endfunction\\>\\)" ))
       ((match-end 9) ; endtask
	;; Search forward for matching task
	(setq reg "\\(\\<task\\>\\)\\|\\(\\<endtask\\>\\)" ))
       ((match-end 10) ; endgenerate
	;; Search forward for matching generate
	(setq reg "\\(\\<generate\\>\\)\\|\\(\\<endgenerate\\>\\)" ))
       ((match-end 11) ; endgroup
	;; Search forward for matching covergroup
	(setq reg "\\(\\<covergroup\\>\\)\\|\\(\\<endgroup\\>\\)" ))
       ((match-end 12) ; endproperty
	;; Search forward for matching property
	(setq reg "\\(\\<property\\>\\)\\|\\(\\<endproperty\\>\\)" ))
       ((match-end 13) ; endsequence
	;; Search forward for matching sequence
	(setq reg "\\(\\<\\(rand\\)?sequence\\>\\)\\|\\(\\<endsequence\\>\\)" )
	(setq md 3)) ; 3 to get to endsequence in the reg above
       ((match-end 14) ; endclocking
	;; Search forward for matching clocking
	(setq reg "\\(\\<clocking\\>\\)\\|\\(\\<endclocking\\>\\)" )))
      (if (and reg
	       (forward-word 1))
	  (catch 'skip
	    (let ((nest 1))
	      (while (verilog-re-search-forward reg nil 'move)
		(cond
		 ((match-end md) ; the closer in reg, so we are climbing out

  (when (boundp 'hack-local-variables-hook)  ;; Also modify any file-local-variables
    (add-hook 'hack-local-variables-hook 'verilog-modify-compile-command t))

  ;; Setting up menus
  (when (featurep 'xemacs)
    (easy-menu-add verilog-stmt-menu)
    (easy-menu-add verilog-menu)
    (setq mode-popup-menu (cons "Verilog Mode" verilog-stmt-menu)))

  ;; Stuff for GNU emacs
  (set (make-local-variable 'font-lock-defaults)
       '((verilog-font-lock-keywords verilog-font-lock-keywords-1
                                     verilog-font-lock-keywords-2

(defun verilog-mark-defun ()
  "Mark the current Verilog function (or procedure).
This puts the mark at the end, and point at the beginning."
  (interactive)
  (if (featurep 'xemacs)
      (progn
	(push-mark (point))
	(verilog-end-of-defun)
	(push-mark (point))
	(verilog-beg-of-defun)
	(if (fboundp 'zmacs-activate-region)
	    (zmacs-activate-region)))
    (mark-defun)))

(defun verilog-comment-region (start end)
  ; checkdoc-params: (start end)
  "Put the region into a Verilog comment.
The comments that are in this area are \"deformed\":

	    (verilog-beg-of-statement)
	    (if (looking-at verilog-extended-case-re)
		(throw 'nesting 'case)
	      (goto-char here)))
	  (throw 'nesting 'case))
	 
	 ((match-end 4)  ; *sigh* could be "disable fork"
	  (let ((here (point)))
	    (verilog-beg-of-statement)
	    (if (looking-at verilog-disable-fork-re)
		t ; is disable fork, this is a normal statement
	      (progn ; or is fork, starts a new block
		(goto-char here)
		(throw 'nesting 'block)))))


	 ;; need to consider typedef struct here...
	 ((looking-at "\\<class\\|struct\\|function\\|task\\|property\\>")
					; *sigh* These words have an optional prefix:
					; extern {virtual|protected}? function a();

    t
    (forward-word -1)
    (cond
     ((looking-at "\\<else\\>")
      t)
     ((looking-at verilog-behavioral-block-beg-re)
      t)
     ((looking-at verilog-indent-re)
      nil)
     (t
      (let
	  ((back (point)))

      (re-search-backward "//" nil t)
      (current-column)))))

;;

(defun verilog-pretty-declarations (&optional quiet)
  "Line up declarations around point."
  (interactive)
  (save-excursion
    (if (progn
	  (verilog-beg-of-statement-1)

		  (verilog-do-indent (verilog-calculate-indent))
		  (verilog-forward-ws&directives)
		  (current-column))))
	  (goto-char end)
	  (goto-char start)
	  (if (and (not quiet)
		   (> (- end start) 100))
	      (message "Lining up declarations..(please stand by)"))
	  ;; Get the beginning of line indent first
	  (while (progn (setq e (marker-position edpos))
			(< (point) e))
	    (cond

	  (goto-char start)
	  (while (progn (setq e (marker-position edpos))
			(setq r (- e (point)))
			(> r 0))
	    (setq e (point))
	    (unless quiet (message "%d" r))
	    (cond
	     ((or (and verilog-indent-declaration-macros
		       (looking-at verilog-declaration-re-1-macro))
		  (looking-at verilog-declaration-re-1-no-macro))
	      (let ((p (match-end 0)))

	     (t		; Must be comment or white space
	      (goto-char e)
	      (verilog-forward-ws&directives)
	      (forward-line -1)))
	    (forward-line 1))
	  (unless quiet (message ""))))))

(defun verilog-pretty-expr (&optional quiet myre)
  "Line up expressions around point, or optional regexp MYRE."
  (interactive "sRegular Expression: ((<|:)?=) ")
  (save-excursion
    (if (or (eq myre nil)
	    (string-equal myre ""))
	(setq myre "\\(<\\|:\\)?="))
    (setq myre (concat "\\(^[^;#:<=>]*\\)\\(" myre "\\)"))
    (let ((rexp(concat "^\\s-*" verilog-complete-reg)))
      (beginning-of-line)
      (if (and (not (looking-at rexp ))
	       (looking-at myre))
	  (let* ((here (point))
		 (e) (r)
		 (start
		  (progn
		    (beginning-of-line)
		    (setq e (point))
		    (verilog-backward-syntactic-ws)
		    (beginning-of-line)
		    (while (and (not (looking-at rexp ))
				(looking-at myre)
				(not (bobp))
				)
		      (setq e (point))
		      (verilog-backward-syntactic-ws)
		      (beginning-of-line)
		      ) ;Ack, need to grok `define
		    e))
		 (end
		  (progn
		    (goto-char here)
		    (end-of-line)
		    (setq e (point))	;Might be on last line
		    (verilog-forward-syntactic-ws)
		    (beginning-of-line)
		    (while (and (not (looking-at rexp ))
				(looking-at myre))
		      (end-of-line)
		      (setq e (point))
		      (verilog-forward-syntactic-ws)
		      (beginning-of-line)
		      )
		    e))
		 (edpos (set-marker (make-marker) end))
		 (ind)
		 )
	    (goto-char start)
	    (verilog-do-indent (verilog-calculate-indent))
	    (if (and (not quiet)
		     (> (- end start) 100))
		(message "Lining up expressions..(please stand by)"))

	    ;; Set indent to minimum throughout region
	    (while (< (point) (marker-position edpos))
	      (beginning-of-line)
	      (verilog-just-one-space myre)
	      (end-of-line)
	      (verilog-forward-syntactic-ws)
	      )

	    ;; Now find biggest prefix
	    (setq ind (verilog-get-lineup-indent-2 myre start edpos))

	    ;; Now indent each line.
	    (goto-char start)
	    (while (progn (setq e (marker-position edpos))
			  (setq r (- e (point)))
			  (> r 0))
	      (setq e (point))
	      (if (not quiet) (message "%d" r))
	      (cond
	       ((looking-at myre)
		(goto-char (match-end 1))
		(if (not (verilog-parenthesis-depth)) ;; ignore parenthsized exprs
		    (if (eq (char-after) ?=)
			(indent-to (1+ ind))	; line up the = of the <= with surrounding =
		      (indent-to ind)
		      )))
	       ((verilog-continued-line-1 start)
		(goto-char e)
		(indent-line-to ind))
	       (t		; Must be comment or white space
		(goto-char e)
		(verilog-forward-ws&directives)
		(forward-line -1))
	       )
	      (forward-line 1))
	    (unless quiet (message ""))
	    )))))

(defun verilog-just-one-space (myre)
  "Remove extra spaces around regular expression MYRE."
  (interactive)
  (if (and (not(looking-at verilog-complete-reg))

	(progn
	  (goto-char p2)
	  (if (looking-at "\\s-") (just-one-space))
	  (goto-char p1)
	  (forward-char -1)
	  (if (looking-at "\\s-") (just-one-space))
	  ))))

(defun verilog-indent-declaration (baseind)
  "Indent current lines as declaration.
Line up the variable names based on previous declaration's indentation.
BASEIND is the base indent to offset everything."

    (let ((ind 0) e)
      (goto-char b)
      ;; Get rightmost position
      (while (progn (setq e (marker-position edpos))
		    (< (point) e))
	(if (and (verilog-re-search-forward myre e 'move)
		 (not (verilog-parenthesis-depth))) ;; skip parenthsized exprs
	    (progn
	      (goto-char (match-beginning 2))
	      (verilog-backward-syntactic-ws)
	      (if (> (current-column) ind)
		  (setq ind (current-column)))
	      (goto-char (match-end 0)))
	  ))
      (if (> ind 0)
	  (1+ ind)
	;; No lineup-string found
	(goto-char b)
	(end-of-line)

	    (beginning-of-line))
	  pt)
	(verilog-goto-defun-file label))))

;; Eliminate compile warning
(defvar occur-pos-list)

(defun verilog-showscopes ()
  "List all scopes in this module."
  (interactive)
  (let ((buffer (current-buffer))

	(verilog-modi-cache-add-wires modi sig-list)
	(verilog-insert-indent "// End of automatics\n")
	(when nil	;; Too slow on huge modules, plus makes everyone's module change
	  (beginning-of-line)
	  (setq pnt (point))
	  (verilog-pretty-declarations quiet)
	  (goto-char pnt)
	  (verilog-pretty-expr "//"))))))

(defun verilog-auto-output ()
  "Expand AUTOOUTPUT statements, as part of \\[verilog-auto].

  > "always @ ( /*AUTOSENSE*/ ) begin\n"
  > "case (" '(verilog-sk-prompt-state-selector) ") " \n
  > ("case selector: " str ": begin" \n > "next_" verilog-sk-state " = " _ ";" \n > (- verilog-indent-level-behavioral) "end" \n )
  resume: >  (- verilog-case-indent) "endcase" (progn (electric-verilog-terminate-line) nil)
  > (- verilog-indent-level-behavioral) "end" (progn (electric-verilog-terminate-line) nil))


;;
;; Include file loading with mouse/return event
;;