annotate ppc/vc1dsp_altivec.c @ 8001:038bb3b45b34 libavcodec

Avoid code duplication between mace3_decode_frame() and mace6_decode_frame()
author vitor
date Sun, 05 Oct 2008 20:06:40 +0000
parents f7cbb7733146
children 7cee7292d5cc
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 /*
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2 * VC-1 and WMV3 decoder - DSP functions AltiVec-optimized
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3 * Copyright (c) 2006 Konstantin Shishkov
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4 *
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5 * This file is part of FFmpeg.
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6 *
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7 * FFmpeg is free software; you can redistribute it and/or
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8 * modify it under the terms of the GNU Lesser General Public
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9 * License as published by the Free Software Foundation; either
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10 * version 2.1 of the License, or (at your option) any later version.
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11 *
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12 * FFmpeg is distributed in the hope that it will be useful,
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13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 * Lesser General Public License for more details.
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16 *
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17 * You should have received a copy of the GNU Lesser General Public
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18 * License along with FFmpeg; if not, write to the Free Software
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19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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20 */
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21
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22 #include "libavcodec/dsputil.h"
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23
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24 #include "gcc_fixes.h"
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25
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26 #include "util_altivec.h"
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27
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28 // main steps of 8x8 transform
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29 #define STEP8(s0, s1, s2, s3, s4, s5, s6, s7, vec_rnd) \
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30 do { \
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31 t0 = vec_sl(vec_add(s0, s4), vec_2); \
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32 t0 = vec_add(vec_sl(t0, vec_1), t0); \
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33 t0 = vec_add(t0, vec_rnd); \
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34 t1 = vec_sl(vec_sub(s0, s4), vec_2); \
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35 t1 = vec_add(vec_sl(t1, vec_1), t1); \
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36 t1 = vec_add(t1, vec_rnd); \
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37 t2 = vec_add(vec_sl(s6, vec_2), vec_sl(s6, vec_1)); \
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38 t2 = vec_add(t2, vec_sl(s2, vec_4)); \
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39 t3 = vec_add(vec_sl(s2, vec_2), vec_sl(s2, vec_1)); \
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40 t3 = vec_sub(t3, vec_sl(s6, vec_4)); \
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41 t4 = vec_add(t0, t2); \
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42 t5 = vec_add(t1, t3); \
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43 t6 = vec_sub(t1, t3); \
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44 t7 = vec_sub(t0, t2); \
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45 \
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46 t0 = vec_sl(vec_add(s1, s3), vec_4); \
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47 t0 = vec_add(t0, vec_sl(s5, vec_3)); \
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48 t0 = vec_add(t0, vec_sl(s7, vec_2)); \
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49 t0 = vec_add(t0, vec_sub(s5, s3)); \
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50 \
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51 t1 = vec_sl(vec_sub(s1, s5), vec_4); \
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52 t1 = vec_sub(t1, vec_sl(s7, vec_3)); \
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53 t1 = vec_sub(t1, vec_sl(s3, vec_2)); \
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54 t1 = vec_sub(t1, vec_add(s1, s7)); \
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55 \
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56 t2 = vec_sl(vec_sub(s7, s3), vec_4); \
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57 t2 = vec_add(t2, vec_sl(s1, vec_3)); \
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58 t2 = vec_add(t2, vec_sl(s5, vec_2)); \
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59 t2 = vec_add(t2, vec_sub(s1, s7)); \
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60 \
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61 t3 = vec_sl(vec_sub(s5, s7), vec_4); \
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62 t3 = vec_sub(t3, vec_sl(s3, vec_3)); \
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63 t3 = vec_add(t3, vec_sl(s1, vec_2)); \
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64 t3 = vec_sub(t3, vec_add(s3, s5)); \
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65 \
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66 s0 = vec_add(t4, t0); \
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67 s1 = vec_add(t5, t1); \
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68 s2 = vec_add(t6, t2); \
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69 s3 = vec_add(t7, t3); \
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70 s4 = vec_sub(t7, t3); \
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71 s5 = vec_sub(t6, t2); \
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72 s6 = vec_sub(t5, t1); \
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73 s7 = vec_sub(t4, t0); \
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74 }while(0)
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75
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76 #define SHIFT_HOR8(s0, s1, s2, s3, s4, s5, s6, s7) \
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77 do { \
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78 s0 = vec_sra(s0, vec_3); \
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79 s1 = vec_sra(s1, vec_3); \
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80 s2 = vec_sra(s2, vec_3); \
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81 s3 = vec_sra(s3, vec_3); \
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82 s4 = vec_sra(s4, vec_3); \
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83 s5 = vec_sra(s5, vec_3); \
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84 s6 = vec_sra(s6, vec_3); \
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85 s7 = vec_sra(s7, vec_3); \
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86 }while(0)
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87
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88 #define SHIFT_VERT8(s0, s1, s2, s3, s4, s5, s6, s7) \
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89 do { \
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90 s0 = vec_sra(s0, vec_7); \
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91 s1 = vec_sra(s1, vec_7); \
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92 s2 = vec_sra(s2, vec_7); \
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93 s3 = vec_sra(s3, vec_7); \
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94 s4 = vec_sra(vec_add(s4, vec_1s), vec_7); \
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95 s5 = vec_sra(vec_add(s5, vec_1s), vec_7); \
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96 s6 = vec_sra(vec_add(s6, vec_1s), vec_7); \
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97 s7 = vec_sra(vec_add(s7, vec_1s), vec_7); \
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98 }while(0)
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99
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100 /* main steps of 4x4 transform */
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101 #define STEP4(s0, s1, s2, s3, vec_rnd) \
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102 do { \
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103 t1 = vec_add(vec_sl(s0, vec_4), s0); \
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104 t1 = vec_add(t1, vec_rnd); \
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105 t2 = vec_add(vec_sl(s2, vec_4), s2); \
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106 t0 = vec_add(t1, t2); \
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107 t1 = vec_sub(t1, t2); \
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108 t3 = vec_sl(vec_sub(s3, s1), vec_1); \
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109 t3 = vec_add(t3, vec_sl(t3, vec_2)); \
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110 t2 = vec_add(t3, vec_sl(s1, vec_5)); \
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111 t3 = vec_add(t3, vec_sl(s3, vec_3)); \
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112 t3 = vec_add(t3, vec_sl(s3, vec_2)); \
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113 s0 = vec_add(t0, t2); \
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114 s1 = vec_sub(t1, t3); \
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115 s2 = vec_add(t1, t3); \
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116 s3 = vec_sub(t0, t2); \
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117 }while (0)
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118
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119 #define SHIFT_HOR4(s0, s1, s2, s3) \
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120 s0 = vec_sra(s0, vec_3); \
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121 s1 = vec_sra(s1, vec_3); \
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122 s2 = vec_sra(s2, vec_3); \
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123 s3 = vec_sra(s3, vec_3);
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124
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125 #define SHIFT_VERT4(s0, s1, s2, s3) \
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126 s0 = vec_sra(s0, vec_7); \
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127 s1 = vec_sra(s1, vec_7); \
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128 s2 = vec_sra(s2, vec_7); \
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129 s3 = vec_sra(s3, vec_7);
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130
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131 /** Do inverse transform on 8x8 block
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132 */
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133 static void vc1_inv_trans_8x8_altivec(DCTELEM block[64])
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134 {
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135 vector signed short src0, src1, src2, src3, src4, src5, src6, src7;
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136 vector signed int s0, s1, s2, s3, s4, s5, s6, s7;
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137 vector signed int s8, s9, sA, sB, sC, sD, sE, sF;
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138 vector signed int t0, t1, t2, t3, t4, t5, t6, t7;
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139 const vector signed int vec_64 = vec_sl(vec_splat_s32(4), vec_splat_u32(4));
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140 const vector unsigned int vec_7 = vec_splat_u32(7);
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141 const vector unsigned int vec_4 = vec_splat_u32(4);
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142 const vector signed int vec_4s = vec_splat_s32(4);
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143 const vector unsigned int vec_3 = vec_splat_u32(3);
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144 const vector unsigned int vec_2 = vec_splat_u32(2);
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145 const vector signed int vec_1s = vec_splat_s32(1);
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146 const vector unsigned int vec_1 = vec_splat_u32(1);
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147
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148
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149 src0 = vec_ld( 0, block);
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150 src1 = vec_ld( 16, block);
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151 src2 = vec_ld( 32, block);
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152 src3 = vec_ld( 48, block);
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153 src4 = vec_ld( 64, block);
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154 src5 = vec_ld( 80, block);
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155 src6 = vec_ld( 96, block);
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diff changeset
156 src7 = vec_ld(112, block);
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157
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158 TRANSPOSE8(src0, src1, src2, src3, src4, src5, src6, src7);
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159 s0 = vec_unpackl(src0);
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160 s1 = vec_unpackl(src1);
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161 s2 = vec_unpackl(src2);
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162 s3 = vec_unpackl(src3);
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163 s4 = vec_unpackl(src4);
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164 s5 = vec_unpackl(src5);
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165 s6 = vec_unpackl(src6);
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166 s7 = vec_unpackl(src7);
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167 s8 = vec_unpackh(src0);
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168 s9 = vec_unpackh(src1);
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169 sA = vec_unpackh(src2);
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170 sB = vec_unpackh(src3);
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171 sC = vec_unpackh(src4);
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172 sD = vec_unpackh(src5);
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173 sE = vec_unpackh(src6);
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174 sF = vec_unpackh(src7);
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175 STEP8(s0, s1, s2, s3, s4, s5, s6, s7, vec_4s);
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176 SHIFT_HOR8(s0, s1, s2, s3, s4, s5, s6, s7);
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177 STEP8(s8, s9, sA, sB, sC, sD, sE, sF, vec_4s);
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178 SHIFT_HOR8(s8, s9, sA, sB, sC, sD, sE, sF);
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179 src0 = vec_pack(s8, s0);
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180 src1 = vec_pack(s9, s1);
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181 src2 = vec_pack(sA, s2);
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182 src3 = vec_pack(sB, s3);
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183 src4 = vec_pack(sC, s4);
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184 src5 = vec_pack(sD, s5);
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185 src6 = vec_pack(sE, s6);
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186 src7 = vec_pack(sF, s7);
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187 TRANSPOSE8(src0, src1, src2, src3, src4, src5, src6, src7);
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188
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189 s0 = vec_unpackl(src0);
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190 s1 = vec_unpackl(src1);
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191 s2 = vec_unpackl(src2);
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192 s3 = vec_unpackl(src3);
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193 s4 = vec_unpackl(src4);
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194 s5 = vec_unpackl(src5);
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195 s6 = vec_unpackl(src6);
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196 s7 = vec_unpackl(src7);
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197 s8 = vec_unpackh(src0);
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198 s9 = vec_unpackh(src1);
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199 sA = vec_unpackh(src2);
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200 sB = vec_unpackh(src3);
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201 sC = vec_unpackh(src4);
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202 sD = vec_unpackh(src5);
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203 sE = vec_unpackh(src6);
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204 sF = vec_unpackh(src7);
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205 STEP8(s0, s1, s2, s3, s4, s5, s6, s7, vec_64);
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206 SHIFT_VERT8(s0, s1, s2, s3, s4, s5, s6, s7);
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207 STEP8(s8, s9, sA, sB, sC, sD, sE, sF, vec_64);
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208 SHIFT_VERT8(s8, s9, sA, sB, sC, sD, sE, sF);
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209 src0 = vec_pack(s8, s0);
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210 src1 = vec_pack(s9, s1);
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211 src2 = vec_pack(sA, s2);
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212 src3 = vec_pack(sB, s3);
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213 src4 = vec_pack(sC, s4);
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214 src5 = vec_pack(sD, s5);
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215 src6 = vec_pack(sE, s6);
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216 src7 = vec_pack(sF, s7);
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217
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218 vec_st(src0, 0, block);
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219 vec_st(src1, 16, block);
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220 vec_st(src2, 32, block);
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221 vec_st(src3, 48, block);
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222 vec_st(src4, 64, block);
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223 vec_st(src5, 80, block);
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224 vec_st(src6, 96, block);
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225 vec_st(src7,112, block);
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226 }
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227
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228 /** Do inverse transform on 8x4 part of block
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229 */
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230 static void vc1_inv_trans_8x4_altivec(uint8_t *dest, int stride, DCTELEM *block)
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231 {
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232 vector signed short src0, src1, src2, src3, src4, src5, src6, src7;
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233 vector signed int s0, s1, s2, s3, s4, s5, s6, s7;
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234 vector signed int s8, s9, sA, sB, sC, sD, sE, sF;
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235 vector signed int t0, t1, t2, t3, t4, t5, t6, t7;
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236 const vector signed int vec_64 = vec_sl(vec_splat_s32(4), vec_splat_u32(4));
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237 const vector unsigned int vec_7 = vec_splat_u32(7);
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238 const vector unsigned int vec_5 = vec_splat_u32(5);
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239 const vector unsigned int vec_4 = vec_splat_u32(4);
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240 const vector signed int vec_4s = vec_splat_s32(4);
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241 const vector unsigned int vec_3 = vec_splat_u32(3);
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242 const vector unsigned int vec_2 = vec_splat_u32(2);
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243 const vector unsigned int vec_1 = vec_splat_u32(1);
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244 vector unsigned char tmp;
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245 vector signed short tmp2, tmp3;
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246 vector unsigned char perm0, perm1, p0, p1, p;
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247
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248 src0 = vec_ld( 0, block);
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249 src1 = vec_ld( 16, block);
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250 src2 = vec_ld( 32, block);
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251 src3 = vec_ld( 48, block);
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252 src4 = vec_ld( 64, block);
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253 src5 = vec_ld( 80, block);
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254 src6 = vec_ld( 96, block);
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255 src7 = vec_ld(112, block);
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256
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257 TRANSPOSE8(src0, src1, src2, src3, src4, src5, src6, src7);
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258 s0 = vec_unpackl(src0);
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259 s1 = vec_unpackl(src1);
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260 s2 = vec_unpackl(src2);
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261 s3 = vec_unpackl(src3);
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262 s4 = vec_unpackl(src4);
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263 s5 = vec_unpackl(src5);
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264 s6 = vec_unpackl(src6);
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265 s7 = vec_unpackl(src7);
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266 s8 = vec_unpackh(src0);
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267 s9 = vec_unpackh(src1);
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268 sA = vec_unpackh(src2);
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269 sB = vec_unpackh(src3);
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270 sC = vec_unpackh(src4);
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271 sD = vec_unpackh(src5);
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272 sE = vec_unpackh(src6);
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273 sF = vec_unpackh(src7);
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274 STEP8(s0, s1, s2, s3, s4, s5, s6, s7, vec_4s);
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275 SHIFT_HOR8(s0, s1, s2, s3, s4, s5, s6, s7);
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276 STEP8(s8, s9, sA, sB, sC, sD, sE, sF, vec_4s);
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277 SHIFT_HOR8(s8, s9, sA, sB, sC, sD, sE, sF);
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278 src0 = vec_pack(s8, s0);
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279 src1 = vec_pack(s9, s1);
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280 src2 = vec_pack(sA, s2);
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281 src3 = vec_pack(sB, s3);
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282 src4 = vec_pack(sC, s4);
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283 src5 = vec_pack(sD, s5);
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284 src6 = vec_pack(sE, s6);
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285 src7 = vec_pack(sF, s7);
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286 TRANSPOSE8(src0, src1, src2, src3, src4, src5, src6, src7);
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287
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288 s0 = vec_unpackh(src0);
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289 s1 = vec_unpackh(src1);
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290 s2 = vec_unpackh(src2);
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291 s3 = vec_unpackh(src3);
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292 s8 = vec_unpackl(src0);
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293 s9 = vec_unpackl(src1);
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294 sA = vec_unpackl(src2);
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295 sB = vec_unpackl(src3);
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296 STEP4(s0, s1, s2, s3, vec_64);
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297 SHIFT_VERT4(s0, s1, s2, s3);
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298 STEP4(s8, s9, sA, sB, vec_64);
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299 SHIFT_VERT4(s8, s9, sA, sB);
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300 src0 = vec_pack(s0, s8);
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301 src1 = vec_pack(s1, s9);
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302 src2 = vec_pack(s2, sA);
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303 src3 = vec_pack(s3, sB);
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304
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305 p0 = vec_lvsl (0, dest);
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306 p1 = vec_lvsl (stride, dest);
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307 p = vec_splat_u8 (-1);
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308 perm0 = vec_mergeh (p, p0);
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309 perm1 = vec_mergeh (p, p1);
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310
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311 #define ADD(dest,src,perm) \
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312 /* *(uint64_t *)&tmp = *(uint64_t *)dest; */ \
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313 tmp = vec_ld (0, dest); \
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1ba8ee13e5b9 Make strict altivec parsers happy (gcc-4.3 and others)
lu_zero
parents: 6000
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314 tmp2 = (vector signed short)vec_perm (tmp, vec_splat_u8(0), perm); \
5999
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kostya
parents: 5997
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315 tmp3 = vec_adds (tmp2, src); \
f22faee96323 Update Altivec variant of vc1_inv_trans_8x4
kostya
parents: 5997
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316 tmp = vec_packsu (tmp3, tmp3); \
f22faee96323 Update Altivec variant of vc1_inv_trans_8x4
kostya
parents: 5997
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317 vec_ste ((vector unsigned int)tmp, 0, (unsigned int *)dest); \
f22faee96323 Update Altivec variant of vc1_inv_trans_8x4
kostya
parents: 5997
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318 vec_ste ((vector unsigned int)tmp, 4, (unsigned int *)dest);
f22faee96323 Update Altivec variant of vc1_inv_trans_8x4
kostya
parents: 5997
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319
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kostya
parents: 5997
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320 ADD (dest, src0, perm0) dest += stride;
f22faee96323 Update Altivec variant of vc1_inv_trans_8x4
kostya
parents: 5997
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321 ADD (dest, src1, perm1) dest += stride;
f22faee96323 Update Altivec variant of vc1_inv_trans_8x4
kostya
parents: 5997
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322 ADD (dest, src2, perm0) dest += stride;
f22faee96323 Update Altivec variant of vc1_inv_trans_8x4
kostya
parents: 5997
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323 ADD (dest, src3, perm1)
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f52e3f60481b Some AltiVec optimizations for VC-1
kostya
parents:
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324 }
f52e3f60481b Some AltiVec optimizations for VC-1
kostya
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325
f52e3f60481b Some AltiVec optimizations for VC-1
kostya
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326
f52e3f60481b Some AltiVec optimizations for VC-1
kostya
parents:
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327 void vc1dsp_init_altivec(DSPContext* dsp, AVCodecContext *avctx) {
f52e3f60481b Some AltiVec optimizations for VC-1
kostya
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328 dsp->vc1_inv_trans_8x8 = vc1_inv_trans_8x8_altivec;
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f22faee96323 Update Altivec variant of vc1_inv_trans_8x4
kostya
parents: 5997
diff changeset
329 dsp->vc1_inv_trans_8x4 = vc1_inv_trans_8x4_altivec;
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kostya
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330 }