Mercurial > libavcodec.hg
annotate i386/dsputil_mmx.c @ 7678:081c54b62e56 libavcodec
document some dsp alignments
author | lorenm |
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date | Sun, 24 Aug 2008 04:03:02 +0000 |
parents | bb76ecde9318 |
children | dbb5ab337349 |
rev | line source |
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0 | 1 /* |
2 * MMX optimized DSP utils | |
429 | 3 * Copyright (c) 2000, 2001 Fabrice Bellard. |
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4 * Copyright (c) 2002-2004 Michael Niedermayer <michaelni@gmx.at> |
0 | 5 * |
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6 * This file is part of FFmpeg. |
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7 * |
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8 * FFmpeg is free software; you can redistribute it and/or |
429 | 9 * modify it under the terms of the GNU Lesser General Public |
10 * License as published by the Free Software Foundation; either | |
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11 * version 2.1 of the License, or (at your option) any later version. |
0 | 12 * |
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13 * FFmpeg is distributed in the hope that it will be useful, |
0 | 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
429 | 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
16 * Lesser General Public License for more details. | |
0 | 17 * |
429 | 18 * You should have received a copy of the GNU Lesser General Public |
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19 * License along with FFmpeg; if not, write to the Free Software |
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20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
0 | 21 * |
22 * MMX optimization by Nick Kurshev <nickols_k@mail.ru> | |
23 */ | |
24 | |
6763 | 25 #include "libavutil/x86_cpu.h" |
26 #include "libavcodec/dsputil.h" | |
27 #include "libavcodec/h263.h" | |
28 #include "libavcodec/mpegvideo.h" | |
29 #include "libavcodec/simple_idct.h" | |
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30 #include "dsputil_mmx.h" |
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31 #include "mmx.h" |
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32 #include "vp3dsp_mmx.h" |
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33 #include "vp3dsp_sse2.h" |
6585 | 34 #include "idct_xvid.h" |
0 | 35 |
1729 | 36 //#undef NDEBUG |
37 //#include <assert.h> | |
38 | |
4197 | 39 int mm_flags; /* multimedia extension flags */ |
936 | 40 |
0 | 41 /* pixel operations */ |
5947 | 42 DECLARE_ALIGNED_8 (const uint64_t, ff_bone) = 0x0101010101010101ULL; |
43 DECLARE_ALIGNED_8 (const uint64_t, ff_wtwo) = 0x0002000200020002ULL; | |
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44 |
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45 DECLARE_ALIGNED_16(const uint64_t, ff_pdw_80000000[2]) = |
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46 {0x8000000080000000ULL, 0x8000000080000000ULL}; |
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47 |
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48 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_3 ) = 0x0003000300030003ULL; |
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49 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_4 ) = 0x0004000400040004ULL; |
6331 | 50 DECLARE_ALIGNED_16(const xmm_t, ff_pw_5 ) = {0x0005000500050005ULL, 0x0005000500050005ULL}; |
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51 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_8 ) = 0x0008000800080008ULL; |
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52 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_15 ) = 0x000F000F000F000FULL; |
6331 | 53 DECLARE_ALIGNED_16(const xmm_t, ff_pw_16 ) = {0x0010001000100010ULL, 0x0010001000100010ULL}; |
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54 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_20 ) = 0x0014001400140014ULL; |
6557 | 55 DECLARE_ALIGNED_16(const xmm_t, ff_pw_28 ) = {0x001C001C001C001CULL, 0x001C001C001C001CULL}; |
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56 DECLARE_ALIGNED_16(const xmm_t, ff_pw_32 ) = {0x0020002000200020ULL, 0x0020002000200020ULL}; |
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57 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_42 ) = 0x002A002A002A002AULL; |
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58 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_64 ) = 0x0040004000400040ULL; |
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59 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_96 ) = 0x0060006000600060ULL; |
6333 | 60 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_128) = 0x0080008000800080ULL; |
6384 | 61 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_255) = 0x00ff00ff00ff00ffULL; |
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62 |
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63 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_1 ) = 0x0101010101010101ULL; |
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64 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_3 ) = 0x0303030303030303ULL; |
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65 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_7 ) = 0x0707070707070707ULL; |
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66 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_3F ) = 0x3F3F3F3F3F3F3F3FULL; |
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67 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_A1 ) = 0xA1A1A1A1A1A1A1A1ULL; |
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68 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_FC ) = 0xFCFCFCFCFCFCFCFCULL; |
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69 |
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70 DECLARE_ALIGNED_16(const double, ff_pd_1[2]) = { 1.0, 1.0 }; |
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71 DECLARE_ALIGNED_16(const double, ff_pd_2[2]) = { 2.0, 2.0 }; |
5737 | 72 |
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73 #define JUMPALIGN() asm volatile (ASMALIGN(3)::) |
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74 #define MOVQ_ZERO(regd) asm volatile ("pxor %%" #regd ", %%" #regd ::) |
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75 |
448 | 76 #define MOVQ_BFE(regd) \ |
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77 asm volatile ( \ |
448 | 78 "pcmpeqd %%" #regd ", %%" #regd " \n\t"\ |
79 "paddb %%" #regd ", %%" #regd " \n\t" ::) | |
80 | |
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81 #ifndef PIC |
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82 #define MOVQ_BONE(regd) asm volatile ("movq %0, %%" #regd " \n\t" ::"m"(ff_bone)) |
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83 #define MOVQ_WTWO(regd) asm volatile ("movq %0, %%" #regd " \n\t" ::"m"(ff_wtwo)) |
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84 #else |
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85 // for shared library it's better to use this way for accessing constants |
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86 // pcmpeqd -> -1 |
448 | 87 #define MOVQ_BONE(regd) \ |
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88 asm volatile ( \ |
448 | 89 "pcmpeqd %%" #regd ", %%" #regd " \n\t" \ |
90 "psrlw $15, %%" #regd " \n\t" \ | |
91 "packuswb %%" #regd ", %%" #regd " \n\t" ::) | |
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92 |
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93 #define MOVQ_WTWO(regd) \ |
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94 asm volatile ( \ |
448 | 95 "pcmpeqd %%" #regd ", %%" #regd " \n\t" \ |
96 "psrlw $15, %%" #regd " \n\t" \ | |
97 "psllw $1, %%" #regd " \n\t"::) | |
387 | 98 |
247
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99 #endif |
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100 |
448 | 101 // using regr as temporary and for the output result |
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102 // first argument is unmodifed and second is trashed |
471 | 103 // regfe is supposed to contain 0xfefefefefefefefe |
104 #define PAVGB_MMX_NO_RND(rega, regb, regr, regfe) \ | |
2979 | 105 "movq " #rega ", " #regr " \n\t"\ |
106 "pand " #regb ", " #regr " \n\t"\ | |
107 "pxor " #rega ", " #regb " \n\t"\ | |
108 "pand " #regfe "," #regb " \n\t"\ | |
109 "psrlq $1, " #regb " \n\t"\ | |
110 "paddb " #regb ", " #regr " \n\t" | |
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111 |
471 | 112 #define PAVGB_MMX(rega, regb, regr, regfe) \ |
2979 | 113 "movq " #rega ", " #regr " \n\t"\ |
114 "por " #regb ", " #regr " \n\t"\ | |
115 "pxor " #rega ", " #regb " \n\t"\ | |
116 "pand " #regfe "," #regb " \n\t"\ | |
117 "psrlq $1, " #regb " \n\t"\ | |
118 "psubb " #regb ", " #regr " \n\t" | |
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119 |
471 | 120 // mm6 is supposed to contain 0xfefefefefefefefe |
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121 #define PAVGBP_MMX_NO_RND(rega, regb, regr, regc, regd, regp) \ |
2979 | 122 "movq " #rega ", " #regr " \n\t"\ |
123 "movq " #regc ", " #regp " \n\t"\ | |
124 "pand " #regb ", " #regr " \n\t"\ | |
125 "pand " #regd ", " #regp " \n\t"\ | |
126 "pxor " #rega ", " #regb " \n\t"\ | |
127 "pxor " #regc ", " #regd " \n\t"\ | |
128 "pand %%mm6, " #regb " \n\t"\ | |
129 "pand %%mm6, " #regd " \n\t"\ | |
130 "psrlq $1, " #regb " \n\t"\ | |
131 "psrlq $1, " #regd " \n\t"\ | |
132 "paddb " #regb ", " #regr " \n\t"\ | |
133 "paddb " #regd ", " #regp " \n\t" | |
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134 |
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135 #define PAVGBP_MMX(rega, regb, regr, regc, regd, regp) \ |
2979 | 136 "movq " #rega ", " #regr " \n\t"\ |
137 "movq " #regc ", " #regp " \n\t"\ | |
138 "por " #regb ", " #regr " \n\t"\ | |
139 "por " #regd ", " #regp " \n\t"\ | |
140 "pxor " #rega ", " #regb " \n\t"\ | |
141 "pxor " #regc ", " #regd " \n\t"\ | |
142 "pand %%mm6, " #regb " \n\t"\ | |
143 "pand %%mm6, " #regd " \n\t"\ | |
144 "psrlq $1, " #regd " \n\t"\ | |
145 "psrlq $1, " #regb " \n\t"\ | |
146 "psubb " #regb ", " #regr " \n\t"\ | |
147 "psubb " #regd ", " #regp " \n\t" | |
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148 |
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149 /***********************************/ |
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150 /* MMX no rounding */ |
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151 #define DEF(x, y) x ## _no_rnd_ ## y ##_mmx |
448 | 152 #define SET_RND MOVQ_WONE |
2979 | 153 #define PAVGBP(a, b, c, d, e, f) PAVGBP_MMX_NO_RND(a, b, c, d, e, f) |
154 #define PAVGB(a, b, c, e) PAVGB_MMX_NO_RND(a, b, c, e) | |
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155 |
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156 #include "dsputil_mmx_rnd.h" |
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157 |
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158 #undef DEF |
448 | 159 #undef SET_RND |
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160 #undef PAVGBP |
471 | 161 #undef PAVGB |
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162 /***********************************/ |
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163 /* MMX rounding */ |
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164 |
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165 #define DEF(x, y) x ## _ ## y ##_mmx |
448 | 166 #define SET_RND MOVQ_WTWO |
2979 | 167 #define PAVGBP(a, b, c, d, e, f) PAVGBP_MMX(a, b, c, d, e, f) |
168 #define PAVGB(a, b, c, e) PAVGB_MMX(a, b, c, e) | |
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169 |
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170 #include "dsputil_mmx_rnd.h" |
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171 |
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172 #undef DEF |
448 | 173 #undef SET_RND |
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174 #undef PAVGBP |
471 | 175 #undef PAVGB |
387 | 176 |
0 | 177 /***********************************/ |
178 /* 3Dnow specific */ | |
179 | |
180 #define DEF(x) x ## _3dnow | |
181 #define PAVGB "pavgusb" | |
182 | |
183 #include "dsputil_mmx_avg.h" | |
184 | |
185 #undef DEF | |
186 #undef PAVGB | |
187 | |
188 /***********************************/ | |
189 /* MMX2 specific */ | |
190 | |
386 | 191 #define DEF(x) x ## _mmx2 |
0 | 192 |
193 /* Introduced only in MMX2 set */ | |
194 #define PAVGB "pavgb" | |
195 | |
196 #include "dsputil_mmx_avg.h" | |
197 | |
198 #undef DEF | |
199 #undef PAVGB | |
200 | |
6327 | 201 #define put_no_rnd_pixels16_mmx put_pixels16_mmx |
202 #define put_no_rnd_pixels8_mmx put_pixels8_mmx | |
6321 | 203 #define put_pixels16_mmx2 put_pixels16_mmx |
204 #define put_pixels8_mmx2 put_pixels8_mmx | |
205 #define put_pixels4_mmx2 put_pixels4_mmx | |
206 #define put_no_rnd_pixels16_mmx2 put_no_rnd_pixels16_mmx | |
207 #define put_no_rnd_pixels8_mmx2 put_no_rnd_pixels8_mmx | |
208 #define put_pixels16_3dnow put_pixels16_mmx | |
209 #define put_pixels8_3dnow put_pixels8_mmx | |
210 #define put_pixels4_3dnow put_pixels4_mmx | |
211 #define put_no_rnd_pixels16_3dnow put_no_rnd_pixels16_mmx | |
212 #define put_no_rnd_pixels8_3dnow put_no_rnd_pixels8_mmx | |
213 | |
0 | 214 /***********************************/ |
215 /* standard MMX */ | |
216 | |
1064 | 217 void put_pixels_clamped_mmx(const DCTELEM *block, uint8_t *pixels, int line_size) |
0 | 218 { |
219 const DCTELEM *p; | |
1064 | 220 uint8_t *pix; |
0 | 221 |
222 /* read the pixels */ | |
223 p = block; | |
224 pix = pixels; | |
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225 /* unrolled loop */ |
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226 asm volatile( |
2979 | 227 "movq %3, %%mm0 \n\t" |
228 "movq 8%3, %%mm1 \n\t" | |
229 "movq 16%3, %%mm2 \n\t" | |
230 "movq 24%3, %%mm3 \n\t" | |
231 "movq 32%3, %%mm4 \n\t" | |
232 "movq 40%3, %%mm5 \n\t" | |
233 "movq 48%3, %%mm6 \n\t" | |
234 "movq 56%3, %%mm7 \n\t" | |
235 "packuswb %%mm1, %%mm0 \n\t" | |
236 "packuswb %%mm3, %%mm2 \n\t" | |
237 "packuswb %%mm5, %%mm4 \n\t" | |
238 "packuswb %%mm7, %%mm6 \n\t" | |
239 "movq %%mm0, (%0) \n\t" | |
240 "movq %%mm2, (%0, %1) \n\t" | |
241 "movq %%mm4, (%0, %1, 2) \n\t" | |
242 "movq %%mm6, (%0, %2) \n\t" | |
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243 ::"r" (pix), "r" ((x86_reg)line_size), "r" ((x86_reg)line_size*3), "m"(*p) |
2979 | 244 :"memory"); |
0 | 245 pix += line_size*4; |
246 p += 32; | |
247
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247 |
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248 // if here would be an exact copy of the code above |
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249 // compiler would generate some very strange code |
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250 // thus using "r" |
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251 asm volatile( |
2979 | 252 "movq (%3), %%mm0 \n\t" |
253 "movq 8(%3), %%mm1 \n\t" | |
254 "movq 16(%3), %%mm2 \n\t" | |
255 "movq 24(%3), %%mm3 \n\t" | |
256 "movq 32(%3), %%mm4 \n\t" | |
257 "movq 40(%3), %%mm5 \n\t" | |
258 "movq 48(%3), %%mm6 \n\t" | |
259 "movq 56(%3), %%mm7 \n\t" | |
260 "packuswb %%mm1, %%mm0 \n\t" | |
261 "packuswb %%mm3, %%mm2 \n\t" | |
262 "packuswb %%mm5, %%mm4 \n\t" | |
263 "packuswb %%mm7, %%mm6 \n\t" | |
264 "movq %%mm0, (%0) \n\t" | |
265 "movq %%mm2, (%0, %1) \n\t" | |
266 "movq %%mm4, (%0, %1, 2) \n\t" | |
267 "movq %%mm6, (%0, %2) \n\t" | |
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268 ::"r" (pix), "r" ((x86_reg)line_size), "r" ((x86_reg)line_size*3), "r"(p) |
2979 | 269 :"memory"); |
0 | 270 } |
271 | |
3089 | 272 static DECLARE_ALIGNED_8(const unsigned char, vector128[8]) = |
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273 { 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80 }; |
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274 |
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275 void put_signed_pixels_clamped_mmx(const DCTELEM *block, uint8_t *pixels, int line_size) |
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276 { |
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277 int i; |
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278 |
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279 movq_m2r(*vector128, mm1); |
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280 for (i = 0; i < 8; i++) { |
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281 movq_m2r(*(block), mm0); |
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282 packsswb_m2r(*(block + 4), mm0); |
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283 block += 8; |
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284 paddb_r2r(mm1, mm0); |
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285 movq_r2m(mm0, *pixels); |
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286 pixels += line_size; |
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287 } |
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288 } |
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289 |
1064 | 290 void add_pixels_clamped_mmx(const DCTELEM *block, uint8_t *pixels, int line_size) |
0 | 291 { |
292 const DCTELEM *p; | |
1064 | 293 uint8_t *pix; |
0 | 294 int i; |
295 | |
296 /* read the pixels */ | |
297 p = block; | |
298 pix = pixels; | |
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299 MOVQ_ZERO(mm7); |
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300 i = 4; |
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301 do { |
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302 asm volatile( |
2979 | 303 "movq (%2), %%mm0 \n\t" |
304 "movq 8(%2), %%mm1 \n\t" | |
305 "movq 16(%2), %%mm2 \n\t" | |
306 "movq 24(%2), %%mm3 \n\t" | |
307 "movq %0, %%mm4 \n\t" | |
308 "movq %1, %%mm6 \n\t" | |
309 "movq %%mm4, %%mm5 \n\t" | |
310 "punpcklbw %%mm7, %%mm4 \n\t" | |
311 "punpckhbw %%mm7, %%mm5 \n\t" | |
312 "paddsw %%mm4, %%mm0 \n\t" | |
313 "paddsw %%mm5, %%mm1 \n\t" | |
314 "movq %%mm6, %%mm5 \n\t" | |
315 "punpcklbw %%mm7, %%mm6 \n\t" | |
316 "punpckhbw %%mm7, %%mm5 \n\t" | |
317 "paddsw %%mm6, %%mm2 \n\t" | |
318 "paddsw %%mm5, %%mm3 \n\t" | |
319 "packuswb %%mm1, %%mm0 \n\t" | |
320 "packuswb %%mm3, %%mm2 \n\t" | |
321 "movq %%mm0, %0 \n\t" | |
322 "movq %%mm2, %1 \n\t" | |
323 :"+m"(*pix), "+m"(*(pix+line_size)) | |
324 :"r"(p) | |
325 :"memory"); | |
0 | 326 pix += line_size*2; |
327 p += 16; | |
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328 } while (--i); |
0 | 329 } |
330 | |
2209 | 331 static void put_pixels4_mmx(uint8_t *block, const uint8_t *pixels, int line_size, int h) |
332 { | |
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333 asm volatile( |
2979 | 334 "lea (%3, %3), %%"REG_a" \n\t" |
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335 ASMALIGN(3) |
2979 | 336 "1: \n\t" |
337 "movd (%1), %%mm0 \n\t" | |
338 "movd (%1, %3), %%mm1 \n\t" | |
339 "movd %%mm0, (%2) \n\t" | |
340 "movd %%mm1, (%2, %3) \n\t" | |
341 "add %%"REG_a", %1 \n\t" | |
342 "add %%"REG_a", %2 \n\t" | |
343 "movd (%1), %%mm0 \n\t" | |
344 "movd (%1, %3), %%mm1 \n\t" | |
345 "movd %%mm0, (%2) \n\t" | |
346 "movd %%mm1, (%2, %3) \n\t" | |
347 "add %%"REG_a", %1 \n\t" | |
348 "add %%"REG_a", %2 \n\t" | |
349 "subl $4, %0 \n\t" | |
350 "jnz 1b \n\t" | |
351 : "+g"(h), "+r" (pixels), "+r" (block) | |
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352 : "r"((x86_reg)line_size) |
2979 | 353 : "%"REG_a, "memory" |
354 ); | |
2209 | 355 } |
356 | |
1064 | 357 static void put_pixels8_mmx(uint8_t *block, const uint8_t *pixels, int line_size, int h) |
0 | 358 { |
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359 asm volatile( |
2979 | 360 "lea (%3, %3), %%"REG_a" \n\t" |
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361 ASMALIGN(3) |
2979 | 362 "1: \n\t" |
363 "movq (%1), %%mm0 \n\t" | |
364 "movq (%1, %3), %%mm1 \n\t" | |
365 "movq %%mm0, (%2) \n\t" | |
366 "movq %%mm1, (%2, %3) \n\t" | |
367 "add %%"REG_a", %1 \n\t" | |
368 "add %%"REG_a", %2 \n\t" | |
369 "movq (%1), %%mm0 \n\t" | |
370 "movq (%1, %3), %%mm1 \n\t" | |
371 "movq %%mm0, (%2) \n\t" | |
372 "movq %%mm1, (%2, %3) \n\t" | |
373 "add %%"REG_a", %1 \n\t" | |
374 "add %%"REG_a", %2 \n\t" | |
375 "subl $4, %0 \n\t" | |
376 "jnz 1b \n\t" | |
377 : "+g"(h), "+r" (pixels), "+r" (block) | |
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378 : "r"((x86_reg)line_size) |
2979 | 379 : "%"REG_a, "memory" |
380 ); | |
0 | 381 } |
382 | |
1064 | 383 static void put_pixels16_mmx(uint8_t *block, const uint8_t *pixels, int line_size, int h) |
651 | 384 { |
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385 asm volatile( |
2979 | 386 "lea (%3, %3), %%"REG_a" \n\t" |
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387 ASMALIGN(3) |
2979 | 388 "1: \n\t" |
389 "movq (%1), %%mm0 \n\t" | |
390 "movq 8(%1), %%mm4 \n\t" | |
391 "movq (%1, %3), %%mm1 \n\t" | |
392 "movq 8(%1, %3), %%mm5 \n\t" | |
393 "movq %%mm0, (%2) \n\t" | |
394 "movq %%mm4, 8(%2) \n\t" | |
395 "movq %%mm1, (%2, %3) \n\t" | |
396 "movq %%mm5, 8(%2, %3) \n\t" | |
397 "add %%"REG_a", %1 \n\t" | |
398 "add %%"REG_a", %2 \n\t" | |
399 "movq (%1), %%mm0 \n\t" | |
400 "movq 8(%1), %%mm4 \n\t" | |
401 "movq (%1, %3), %%mm1 \n\t" | |
402 "movq 8(%1, %3), %%mm5 \n\t" | |
403 "movq %%mm0, (%2) \n\t" | |
404 "movq %%mm4, 8(%2) \n\t" | |
405 "movq %%mm1, (%2, %3) \n\t" | |
406 "movq %%mm5, 8(%2, %3) \n\t" | |
407 "add %%"REG_a", %1 \n\t" | |
408 "add %%"REG_a", %2 \n\t" | |
409 "subl $4, %0 \n\t" | |
410 "jnz 1b \n\t" | |
411 : "+g"(h), "+r" (pixels), "+r" (block) | |
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412 : "r"((x86_reg)line_size) |
2979 | 413 : "%"REG_a, "memory" |
414 ); | |
651 | 415 } |
416 | |
6331 | 417 static void put_pixels16_sse2(uint8_t *block, const uint8_t *pixels, int line_size, int h) |
418 { | |
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419 asm volatile( |
6331 | 420 "1: \n\t" |
421 "movdqu (%1), %%xmm0 \n\t" | |
422 "movdqu (%1,%3), %%xmm1 \n\t" | |
423 "movdqu (%1,%3,2), %%xmm2 \n\t" | |
424 "movdqu (%1,%4), %%xmm3 \n\t" | |
425 "movdqa %%xmm0, (%2) \n\t" | |
426 "movdqa %%xmm1, (%2,%3) \n\t" | |
427 "movdqa %%xmm2, (%2,%3,2) \n\t" | |
428 "movdqa %%xmm3, (%2,%4) \n\t" | |
429 "subl $4, %0 \n\t" | |
430 "lea (%1,%3,4), %1 \n\t" | |
431 "lea (%2,%3,4), %2 \n\t" | |
432 "jnz 1b \n\t" | |
433 : "+g"(h), "+r" (pixels), "+r" (block) | |
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434 : "r"((x86_reg)line_size), "r"((x86_reg)3L*line_size) |
6331 | 435 : "memory" |
436 ); | |
437 } | |
438 | |
439 static void avg_pixels16_sse2(uint8_t *block, const uint8_t *pixels, int line_size, int h) | |
440 { | |
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441 asm volatile( |
6331 | 442 "1: \n\t" |
443 "movdqu (%1), %%xmm0 \n\t" | |
444 "movdqu (%1,%3), %%xmm1 \n\t" | |
445 "movdqu (%1,%3,2), %%xmm2 \n\t" | |
446 "movdqu (%1,%4), %%xmm3 \n\t" | |
447 "pavgb (%2), %%xmm0 \n\t" | |
448 "pavgb (%2,%3), %%xmm1 \n\t" | |
449 "pavgb (%2,%3,2), %%xmm2 \n\t" | |
450 "pavgb (%2,%4), %%xmm3 \n\t" | |
451 "movdqa %%xmm0, (%2) \n\t" | |
452 "movdqa %%xmm1, (%2,%3) \n\t" | |
453 "movdqa %%xmm2, (%2,%3,2) \n\t" | |
454 "movdqa %%xmm3, (%2,%4) \n\t" | |
455 "subl $4, %0 \n\t" | |
456 "lea (%1,%3,4), %1 \n\t" | |
457 "lea (%2,%3,4), %2 \n\t" | |
458 "jnz 1b \n\t" | |
459 : "+g"(h), "+r" (pixels), "+r" (block) | |
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460 : "r"((x86_reg)line_size), "r"((x86_reg)3L*line_size) |
6331 | 461 : "memory" |
462 ); | |
463 } | |
464 | |
296 | 465 static void clear_blocks_mmx(DCTELEM *blocks) |
466 { | |
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467 asm volatile( |
2979 | 468 "pxor %%mm7, %%mm7 \n\t" |
469 "mov $-128*6, %%"REG_a" \n\t" | |
470 "1: \n\t" | |
471 "movq %%mm7, (%0, %%"REG_a") \n\t" | |
472 "movq %%mm7, 8(%0, %%"REG_a") \n\t" | |
473 "movq %%mm7, 16(%0, %%"REG_a") \n\t" | |
474 "movq %%mm7, 24(%0, %%"REG_a") \n\t" | |
475 "add $32, %%"REG_a" \n\t" | |
476 " js 1b \n\t" | |
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477 : : "r" (((uint8_t *)blocks)+128*6) |
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478 : "%"REG_a |
296 | 479 ); |
480 } | |
481 | |
866 | 482 static void add_bytes_mmx(uint8_t *dst, uint8_t *src, int w){ |
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483 x86_reg i=0; |
866 | 484 asm volatile( |
7087 | 485 "jmp 2f \n\t" |
2979 | 486 "1: \n\t" |
487 "movq (%1, %0), %%mm0 \n\t" | |
488 "movq (%2, %0), %%mm1 \n\t" | |
489 "paddb %%mm0, %%mm1 \n\t" | |
490 "movq %%mm1, (%2, %0) \n\t" | |
491 "movq 8(%1, %0), %%mm0 \n\t" | |
492 "movq 8(%2, %0), %%mm1 \n\t" | |
493 "paddb %%mm0, %%mm1 \n\t" | |
494 "movq %%mm1, 8(%2, %0) \n\t" | |
495 "add $16, %0 \n\t" | |
7087 | 496 "2: \n\t" |
2979 | 497 "cmp %3, %0 \n\t" |
7087 | 498 " js 1b \n\t" |
866 | 499 : "+r" (i) |
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500 : "r"(src), "r"(dst), "r"((x86_reg)w-15) |
866 | 501 ); |
502 for(; i<w; i++) | |
503 dst[i+0] += src[i+0]; | |
504 } | |
505 | |
6384 | 506 static void add_bytes_l2_mmx(uint8_t *dst, uint8_t *src1, uint8_t *src2, int w){ |
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507 x86_reg i=0; |
6384 | 508 asm volatile( |
7087 | 509 "jmp 2f \n\t" |
6384 | 510 "1: \n\t" |
511 "movq (%2, %0), %%mm0 \n\t" | |
512 "movq 8(%2, %0), %%mm1 \n\t" | |
513 "paddb (%3, %0), %%mm0 \n\t" | |
514 "paddb 8(%3, %0), %%mm1 \n\t" | |
515 "movq %%mm0, (%1, %0) \n\t" | |
516 "movq %%mm1, 8(%1, %0) \n\t" | |
517 "add $16, %0 \n\t" | |
7087 | 518 "2: \n\t" |
6384 | 519 "cmp %4, %0 \n\t" |
7087 | 520 " js 1b \n\t" |
6384 | 521 : "+r" (i) |
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522 : "r"(dst), "r"(src1), "r"(src2), "r"((x86_reg)w-15) |
6384 | 523 ); |
524 for(; i<w; i++) | |
525 dst[i] = src1[i] + src2[i]; | |
526 } | |
527 | |
1648 | 528 #define H263_LOOP_FILTER \ |
2979 | 529 "pxor %%mm7, %%mm7 \n\t"\ |
530 "movq %0, %%mm0 \n\t"\ | |
531 "movq %0, %%mm1 \n\t"\ | |
532 "movq %3, %%mm2 \n\t"\ | |
533 "movq %3, %%mm3 \n\t"\ | |
534 "punpcklbw %%mm7, %%mm0 \n\t"\ | |
535 "punpckhbw %%mm7, %%mm1 \n\t"\ | |
536 "punpcklbw %%mm7, %%mm2 \n\t"\ | |
537 "punpckhbw %%mm7, %%mm3 \n\t"\ | |
538 "psubw %%mm2, %%mm0 \n\t"\ | |
539 "psubw %%mm3, %%mm1 \n\t"\ | |
540 "movq %1, %%mm2 \n\t"\ | |
541 "movq %1, %%mm3 \n\t"\ | |
542 "movq %2, %%mm4 \n\t"\ | |
543 "movq %2, %%mm5 \n\t"\ | |
544 "punpcklbw %%mm7, %%mm2 \n\t"\ | |
545 "punpckhbw %%mm7, %%mm3 \n\t"\ | |
546 "punpcklbw %%mm7, %%mm4 \n\t"\ | |
547 "punpckhbw %%mm7, %%mm5 \n\t"\ | |
548 "psubw %%mm2, %%mm4 \n\t"\ | |
549 "psubw %%mm3, %%mm5 \n\t"\ | |
550 "psllw $2, %%mm4 \n\t"\ | |
551 "psllw $2, %%mm5 \n\t"\ | |
552 "paddw %%mm0, %%mm4 \n\t"\ | |
553 "paddw %%mm1, %%mm5 \n\t"\ | |
554 "pxor %%mm6, %%mm6 \n\t"\ | |
555 "pcmpgtw %%mm4, %%mm6 \n\t"\ | |
556 "pcmpgtw %%mm5, %%mm7 \n\t"\ | |
557 "pxor %%mm6, %%mm4 \n\t"\ | |
558 "pxor %%mm7, %%mm5 \n\t"\ | |
559 "psubw %%mm6, %%mm4 \n\t"\ | |
560 "psubw %%mm7, %%mm5 \n\t"\ | |
561 "psrlw $3, %%mm4 \n\t"\ | |
562 "psrlw $3, %%mm5 \n\t"\ | |
563 "packuswb %%mm5, %%mm4 \n\t"\ | |
564 "packsswb %%mm7, %%mm6 \n\t"\ | |
565 "pxor %%mm7, %%mm7 \n\t"\ | |
566 "movd %4, %%mm2 \n\t"\ | |
567 "punpcklbw %%mm2, %%mm2 \n\t"\ | |
568 "punpcklbw %%mm2, %%mm2 \n\t"\ | |
569 "punpcklbw %%mm2, %%mm2 \n\t"\ | |
570 "psubusb %%mm4, %%mm2 \n\t"\ | |
571 "movq %%mm2, %%mm3 \n\t"\ | |
572 "psubusb %%mm4, %%mm3 \n\t"\ | |
573 "psubb %%mm3, %%mm2 \n\t"\ | |
574 "movq %1, %%mm3 \n\t"\ | |
575 "movq %2, %%mm4 \n\t"\ | |
576 "pxor %%mm6, %%mm3 \n\t"\ | |
577 "pxor %%mm6, %%mm4 \n\t"\ | |
578 "paddusb %%mm2, %%mm3 \n\t"\ | |
579 "psubusb %%mm2, %%mm4 \n\t"\ | |
580 "pxor %%mm6, %%mm3 \n\t"\ | |
581 "pxor %%mm6, %%mm4 \n\t"\ | |
582 "paddusb %%mm2, %%mm2 \n\t"\ | |
583 "packsswb %%mm1, %%mm0 \n\t"\ | |
584 "pcmpgtb %%mm0, %%mm7 \n\t"\ | |
585 "pxor %%mm7, %%mm0 \n\t"\ | |
586 "psubb %%mm7, %%mm0 \n\t"\ | |
587 "movq %%mm0, %%mm1 \n\t"\ | |
588 "psubusb %%mm2, %%mm0 \n\t"\ | |
589 "psubb %%mm0, %%mm1 \n\t"\ | |
590 "pand %5, %%mm1 \n\t"\ | |
591 "psrlw $2, %%mm1 \n\t"\ | |
592 "pxor %%mm7, %%mm1 \n\t"\ | |
593 "psubb %%mm7, %%mm1 \n\t"\ | |
594 "movq %0, %%mm5 \n\t"\ | |
595 "movq %3, %%mm6 \n\t"\ | |
596 "psubb %%mm1, %%mm5 \n\t"\ | |
597 "paddb %%mm1, %%mm6 \n\t" | |
1648 | 598 |
1647 | 599 static void h263_v_loop_filter_mmx(uint8_t *src, int stride, int qscale){ |
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600 if(ENABLE_ANY_H263) { |
1647 | 601 const int strength= ff_h263_loop_filter_strength[qscale]; |
602 | |
603 asm volatile( | |
2967 | 604 |
1648 | 605 H263_LOOP_FILTER |
2967 | 606 |
2979 | 607 "movq %%mm3, %1 \n\t" |
608 "movq %%mm4, %2 \n\t" | |
609 "movq %%mm5, %0 \n\t" | |
610 "movq %%mm6, %3 \n\t" | |
1647 | 611 : "+m" (*(uint64_t*)(src - 2*stride)), |
612 "+m" (*(uint64_t*)(src - 1*stride)), | |
613 "+m" (*(uint64_t*)(src + 0*stride)), | |
614 "+m" (*(uint64_t*)(src + 1*stride)) | |
615 : "g" (2*strength), "m"(ff_pb_FC) | |
616 ); | |
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617 } |
1647 | 618 } |
619 | |
1648 | 620 static inline void transpose4x4(uint8_t *dst, uint8_t *src, int dst_stride, int src_stride){ |
621 asm volatile( //FIXME could save 1 instruction if done as 8x4 ... | |
2979 | 622 "movd %4, %%mm0 \n\t" |
623 "movd %5, %%mm1 \n\t" | |
624 "movd %6, %%mm2 \n\t" | |
625 "movd %7, %%mm3 \n\t" | |
626 "punpcklbw %%mm1, %%mm0 \n\t" | |
627 "punpcklbw %%mm3, %%mm2 \n\t" | |
628 "movq %%mm0, %%mm1 \n\t" | |
629 "punpcklwd %%mm2, %%mm0 \n\t" | |
630 "punpckhwd %%mm2, %%mm1 \n\t" | |
631 "movd %%mm0, %0 \n\t" | |
632 "punpckhdq %%mm0, %%mm0 \n\t" | |
633 "movd %%mm0, %1 \n\t" | |
634 "movd %%mm1, %2 \n\t" | |
635 "punpckhdq %%mm1, %%mm1 \n\t" | |
636 "movd %%mm1, %3 \n\t" | |
2967 | 637 |
1648 | 638 : "=m" (*(uint32_t*)(dst + 0*dst_stride)), |
639 "=m" (*(uint32_t*)(dst + 1*dst_stride)), | |
640 "=m" (*(uint32_t*)(dst + 2*dst_stride)), | |
641 "=m" (*(uint32_t*)(dst + 3*dst_stride)) | |
642 : "m" (*(uint32_t*)(src + 0*src_stride)), | |
643 "m" (*(uint32_t*)(src + 1*src_stride)), | |
644 "m" (*(uint32_t*)(src + 2*src_stride)), | |
645 "m" (*(uint32_t*)(src + 3*src_stride)) | |
646 ); | |
647 } | |
648 | |
649 static void h263_h_loop_filter_mmx(uint8_t *src, int stride, int qscale){ | |
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650 if(ENABLE_ANY_H263) { |
1648 | 651 const int strength= ff_h263_loop_filter_strength[qscale]; |
6181 | 652 DECLARE_ALIGNED(8, uint64_t, temp[4]); |
1648 | 653 uint8_t *btemp= (uint8_t*)temp; |
2967 | 654 |
1648 | 655 src -= 2; |
656 | |
657 transpose4x4(btemp , src , 8, stride); | |
658 transpose4x4(btemp+4, src + 4*stride, 8, stride); | |
659 asm volatile( | |
660 H263_LOOP_FILTER // 5 3 4 6 | |
2967 | 661 |
1648 | 662 : "+m" (temp[0]), |
663 "+m" (temp[1]), | |
664 "+m" (temp[2]), | |
665 "+m" (temp[3]) | |
666 : "g" (2*strength), "m"(ff_pb_FC) | |
667 ); | |
668 | |
669 asm volatile( | |
2979 | 670 "movq %%mm5, %%mm1 \n\t" |
671 "movq %%mm4, %%mm0 \n\t" | |
672 "punpcklbw %%mm3, %%mm5 \n\t" | |
673 "punpcklbw %%mm6, %%mm4 \n\t" | |
674 "punpckhbw %%mm3, %%mm1 \n\t" | |
675 "punpckhbw %%mm6, %%mm0 \n\t" | |
676 "movq %%mm5, %%mm3 \n\t" | |
677 "movq %%mm1, %%mm6 \n\t" | |
678 "punpcklwd %%mm4, %%mm5 \n\t" | |
679 "punpcklwd %%mm0, %%mm1 \n\t" | |
680 "punpckhwd %%mm4, %%mm3 \n\t" | |
681 "punpckhwd %%mm0, %%mm6 \n\t" | |
682 "movd %%mm5, (%0) \n\t" | |
683 "punpckhdq %%mm5, %%mm5 \n\t" | |
684 "movd %%mm5, (%0,%2) \n\t" | |
685 "movd %%mm3, (%0,%2,2) \n\t" | |
686 "punpckhdq %%mm3, %%mm3 \n\t" | |
687 "movd %%mm3, (%0,%3) \n\t" | |
688 "movd %%mm1, (%1) \n\t" | |
689 "punpckhdq %%mm1, %%mm1 \n\t" | |
690 "movd %%mm1, (%1,%2) \n\t" | |
691 "movd %%mm6, (%1,%2,2) \n\t" | |
692 "punpckhdq %%mm6, %%mm6 \n\t" | |
693 "movd %%mm6, (%1,%3) \n\t" | |
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694 :: "r" (src), |
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695 "r" (src + 4*stride), |
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696 "r" ((x86_reg) stride ), |
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697 "r" ((x86_reg)(3*stride)) |
1648 | 698 ); |
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699 } |
1648 | 700 } |
701 | |
6437 | 702 /* draw the edges of width 'w' of an image of size width, height |
703 this mmx version can only handle w==8 || w==16 */ | |
704 static void draw_edges_mmx(uint8_t *buf, int wrap, int width, int height, int w) | |
705 { | |
706 uint8_t *ptr, *last_line; | |
707 int i; | |
708 | |
709 last_line = buf + (height - 1) * wrap; | |
710 /* left and right */ | |
711 ptr = buf; | |
712 if(w==8) | |
713 { | |
714 asm volatile( | |
715 "1: \n\t" | |
716 "movd (%0), %%mm0 \n\t" | |
717 "punpcklbw %%mm0, %%mm0 \n\t" | |
718 "punpcklwd %%mm0, %%mm0 \n\t" | |
719 "punpckldq %%mm0, %%mm0 \n\t" | |
720 "movq %%mm0, -8(%0) \n\t" | |
721 "movq -8(%0, %2), %%mm1 \n\t" | |
722 "punpckhbw %%mm1, %%mm1 \n\t" | |
723 "punpckhwd %%mm1, %%mm1 \n\t" | |
724 "punpckhdq %%mm1, %%mm1 \n\t" | |
725 "movq %%mm1, (%0, %2) \n\t" | |
726 "add %1, %0 \n\t" | |
727 "cmp %3, %0 \n\t" | |
728 " jb 1b \n\t" | |
729 : "+r" (ptr) | |
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730 : "r" ((x86_reg)wrap), "r" ((x86_reg)width), "r" (ptr + wrap*height) |
6437 | 731 ); |
732 } | |
733 else | |
734 { | |
735 asm volatile( | |
736 "1: \n\t" | |
737 "movd (%0), %%mm0 \n\t" | |
738 "punpcklbw %%mm0, %%mm0 \n\t" | |
739 "punpcklwd %%mm0, %%mm0 \n\t" | |
740 "punpckldq %%mm0, %%mm0 \n\t" | |
741 "movq %%mm0, -8(%0) \n\t" | |
742 "movq %%mm0, -16(%0) \n\t" | |
743 "movq -8(%0, %2), %%mm1 \n\t" | |
744 "punpckhbw %%mm1, %%mm1 \n\t" | |
745 "punpckhwd %%mm1, %%mm1 \n\t" | |
746 "punpckhdq %%mm1, %%mm1 \n\t" | |
747 "movq %%mm1, (%0, %2) \n\t" | |
748 "movq %%mm1, 8(%0, %2) \n\t" | |
749 "add %1, %0 \n\t" | |
750 "cmp %3, %0 \n\t" | |
751 " jb 1b \n\t" | |
752 : "+r" (ptr) | |
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753 : "r" ((x86_reg)wrap), "r" ((x86_reg)width), "r" (ptr + wrap*height) |
6437 | 754 ); |
755 } | |
756 | |
757 for(i=0;i<w;i+=4) { | |
758 /* top and bottom (and hopefully also the corners) */ | |
759 ptr= buf - (i + 1) * wrap - w; | |
760 asm volatile( | |
761 "1: \n\t" | |
762 "movq (%1, %0), %%mm0 \n\t" | |
763 "movq %%mm0, (%0) \n\t" | |
764 "movq %%mm0, (%0, %2) \n\t" | |
765 "movq %%mm0, (%0, %2, 2) \n\t" | |
766 "movq %%mm0, (%0, %3) \n\t" | |
767 "add $8, %0 \n\t" | |
768 "cmp %4, %0 \n\t" | |
769 " jb 1b \n\t" | |
770 : "+r" (ptr) | |
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771 : "r" ((x86_reg)buf - (x86_reg)ptr - w), "r" ((x86_reg)-wrap), "r" ((x86_reg)-wrap*3), "r" (ptr+width+2*w) |
6437 | 772 ); |
773 ptr= last_line + (i + 1) * wrap - w; | |
774 asm volatile( | |
775 "1: \n\t" | |
776 "movq (%1, %0), %%mm0 \n\t" | |
777 "movq %%mm0, (%0) \n\t" | |
778 "movq %%mm0, (%0, %2) \n\t" | |
779 "movq %%mm0, (%0, %2, 2) \n\t" | |
780 "movq %%mm0, (%0, %3) \n\t" | |
781 "add $8, %0 \n\t" | |
782 "cmp %4, %0 \n\t" | |
783 " jb 1b \n\t" | |
784 : "+r" (ptr) | |
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785 : "r" ((x86_reg)last_line - (x86_reg)ptr - w), "r" ((x86_reg)wrap), "r" ((x86_reg)wrap*3), "r" (ptr+width+2*w) |
6437 | 786 ); |
787 } | |
788 } | |
789 | |
6384 | 790 #define PAETH(cpu, abs3)\ |
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791 static void add_png_paeth_prediction_##cpu(uint8_t *dst, uint8_t *src, uint8_t *top, int w, int bpp)\ |
6384 | 792 {\ |
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793 x86_reg i = -bpp;\ |
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794 x86_reg end = w-3;\ |
6384 | 795 asm volatile(\ |
796 "pxor %%mm7, %%mm7 \n"\ | |
797 "movd (%1,%0), %%mm0 \n"\ | |
798 "movd (%2,%0), %%mm1 \n"\ | |
799 "punpcklbw %%mm7, %%mm0 \n"\ | |
800 "punpcklbw %%mm7, %%mm1 \n"\ | |
801 "add %4, %0 \n"\ | |
802 "1: \n"\ | |
803 "movq %%mm1, %%mm2 \n"\ | |
804 "movd (%2,%0), %%mm1 \n"\ | |
805 "movq %%mm2, %%mm3 \n"\ | |
806 "punpcklbw %%mm7, %%mm1 \n"\ | |
807 "movq %%mm2, %%mm4 \n"\ | |
808 "psubw %%mm1, %%mm3 \n"\ | |
809 "psubw %%mm0, %%mm4 \n"\ | |
810 "movq %%mm3, %%mm5 \n"\ | |
811 "paddw %%mm4, %%mm5 \n"\ | |
812 abs3\ | |
813 "movq %%mm4, %%mm6 \n"\ | |
814 "pminsw %%mm5, %%mm6 \n"\ | |
815 "pcmpgtw %%mm6, %%mm3 \n"\ | |
816 "pcmpgtw %%mm5, %%mm4 \n"\ | |
817 "movq %%mm4, %%mm6 \n"\ | |
818 "pand %%mm3, %%mm4 \n"\ | |
819 "pandn %%mm3, %%mm6 \n"\ | |
820 "pandn %%mm0, %%mm3 \n"\ | |
821 "movd (%3,%0), %%mm0 \n"\ | |
822 "pand %%mm1, %%mm6 \n"\ | |
823 "pand %%mm4, %%mm2 \n"\ | |
824 "punpcklbw %%mm7, %%mm0 \n"\ | |
825 "movq %6, %%mm5 \n"\ | |
826 "paddw %%mm6, %%mm0 \n"\ | |
827 "paddw %%mm2, %%mm3 \n"\ | |
828 "paddw %%mm3, %%mm0 \n"\ | |
829 "pand %%mm5, %%mm0 \n"\ | |
830 "movq %%mm0, %%mm3 \n"\ | |
831 "packuswb %%mm3, %%mm3 \n"\ | |
832 "movd %%mm3, (%1,%0) \n"\ | |
833 "add %4, %0 \n"\ | |
834 "cmp %5, %0 \n"\ | |
835 "jle 1b \n"\ | |
836 :"+r"(i)\ | |
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837 :"r"(dst), "r"(top), "r"(src), "r"((x86_reg)bpp), "g"(end),\ |
6384 | 838 "m"(ff_pw_255)\ |
839 :"memory"\ | |
840 );\ | |
841 } | |
842 | |
843 #define ABS3_MMX2\ | |
844 "psubw %%mm5, %%mm7 \n"\ | |
845 "pmaxsw %%mm7, %%mm5 \n"\ | |
846 "pxor %%mm6, %%mm6 \n"\ | |
847 "pxor %%mm7, %%mm7 \n"\ | |
848 "psubw %%mm3, %%mm6 \n"\ | |
849 "psubw %%mm4, %%mm7 \n"\ | |
850 "pmaxsw %%mm6, %%mm3 \n"\ | |
851 "pmaxsw %%mm7, %%mm4 \n"\ | |
852 "pxor %%mm7, %%mm7 \n" | |
853 | |
854 #define ABS3_SSSE3\ | |
855 "pabsw %%mm3, %%mm3 \n"\ | |
856 "pabsw %%mm4, %%mm4 \n"\ | |
857 "pabsw %%mm5, %%mm5 \n" | |
858 | |
859 PAETH(mmx2, ABS3_MMX2) | |
860 #ifdef HAVE_SSSE3 | |
861 PAETH(ssse3, ABS3_SSSE3) | |
862 #endif | |
863 | |
954 | 864 #define QPEL_V_LOW(m3,m4,m5,m6, pw_20, pw_3, rnd, in0, in1, in2, in7, out, OP)\ |
2979 | 865 "paddw " #m4 ", " #m3 " \n\t" /* x1 */\ |
866 "movq "MANGLE(ff_pw_20)", %%mm4 \n\t" /* 20 */\ | |
867 "pmullw " #m3 ", %%mm4 \n\t" /* 20x1 */\ | |
868 "movq "#in7", " #m3 " \n\t" /* d */\ | |
869 "movq "#in0", %%mm5 \n\t" /* D */\ | |
870 "paddw " #m3 ", %%mm5 \n\t" /* x4 */\ | |
871 "psubw %%mm5, %%mm4 \n\t" /* 20x1 - x4 */\ | |
872 "movq "#in1", %%mm5 \n\t" /* C */\ | |
873 "movq "#in2", %%mm6 \n\t" /* B */\ | |
874 "paddw " #m6 ", %%mm5 \n\t" /* x3 */\ | |
875 "paddw " #m5 ", %%mm6 \n\t" /* x2 */\ | |
876 "paddw %%mm6, %%mm6 \n\t" /* 2x2 */\ | |
877 "psubw %%mm6, %%mm5 \n\t" /* -2x2 + x3 */\ | |
878 "pmullw "MANGLE(ff_pw_3)", %%mm5 \n\t" /* -6x2 + 3x3 */\ | |
879 "paddw " #rnd ", %%mm4 \n\t" /* x2 */\ | |
880 "paddw %%mm4, %%mm5 \n\t" /* 20x1 - 6x2 + 3x3 - x4 */\ | |
881 "psraw $5, %%mm5 \n\t"\ | |
882 "packuswb %%mm5, %%mm5 \n\t"\ | |
954 | 883 OP(%%mm5, out, %%mm7, d) |
884 | |
959 | 885 #define QPEL_BASE(OPNAME, ROUNDER, RND, OP_MMX2, OP_3DNOW)\ |
1057 | 886 static void OPNAME ## mpeg4_qpel16_h_lowpass_mmx2(uint8_t *dst, uint8_t *src, int dstStride, int srcStride, int h){\ |
954 | 887 uint64_t temp;\ |
888 \ | |
889 asm volatile(\ | |
2979 | 890 "pxor %%mm7, %%mm7 \n\t"\ |
891 "1: \n\t"\ | |
892 "movq (%0), %%mm0 \n\t" /* ABCDEFGH */\ | |
893 "movq %%mm0, %%mm1 \n\t" /* ABCDEFGH */\ | |
894 "movq %%mm0, %%mm2 \n\t" /* ABCDEFGH */\ | |
895 "punpcklbw %%mm7, %%mm0 \n\t" /* 0A0B0C0D */\ | |
896 "punpckhbw %%mm7, %%mm1 \n\t" /* 0E0F0G0H */\ | |
897 "pshufw $0x90, %%mm0, %%mm5 \n\t" /* 0A0A0B0C */\ | |
898 "pshufw $0x41, %%mm0, %%mm6 \n\t" /* 0B0A0A0B */\ | |
899 "movq %%mm2, %%mm3 \n\t" /* ABCDEFGH */\ | |
900 "movq %%mm2, %%mm4 \n\t" /* ABCDEFGH */\ | |
901 "psllq $8, %%mm2 \n\t" /* 0ABCDEFG */\ | |
902 "psllq $16, %%mm3 \n\t" /* 00ABCDEF */\ | |
903 "psllq $24, %%mm4 \n\t" /* 000ABCDE */\ | |
904 "punpckhbw %%mm7, %%mm2 \n\t" /* 0D0E0F0G */\ | |
905 "punpckhbw %%mm7, %%mm3 \n\t" /* 0C0D0E0F */\ | |
906 "punpckhbw %%mm7, %%mm4 \n\t" /* 0B0C0D0E */\ | |
907 "paddw %%mm3, %%mm5 \n\t" /* b */\ | |
908 "paddw %%mm2, %%mm6 \n\t" /* c */\ | |
909 "paddw %%mm5, %%mm5 \n\t" /* 2b */\ | |
910 "psubw %%mm5, %%mm6 \n\t" /* c - 2b */\ | |
911 "pshufw $0x06, %%mm0, %%mm5 \n\t" /* 0C0B0A0A */\ | |
912 "pmullw "MANGLE(ff_pw_3)", %%mm6 \n\t" /* 3c - 6b */\ | |
913 "paddw %%mm4, %%mm0 \n\t" /* a */\ | |
914 "paddw %%mm1, %%mm5 \n\t" /* d */\ | |
915 "pmullw "MANGLE(ff_pw_20)", %%mm0 \n\t" /* 20a */\ | |
916 "psubw %%mm5, %%mm0 \n\t" /* 20a - d */\ | |
917 "paddw %6, %%mm6 \n\t"\ | |
918 "paddw %%mm6, %%mm0 \n\t" /* 20a - 6b + 3c - d */\ | |
919 "psraw $5, %%mm0 \n\t"\ | |
920 "movq %%mm0, %5 \n\t"\ | |
954 | 921 /* mm1=EFGH, mm2=DEFG, mm3=CDEF, mm4=BCDE, mm7=0 */\ |
922 \ | |
2979 | 923 "movq 5(%0), %%mm0 \n\t" /* FGHIJKLM */\ |
924 "movq %%mm0, %%mm5 \n\t" /* FGHIJKLM */\ | |
925 "movq %%mm0, %%mm6 \n\t" /* FGHIJKLM */\ | |
926 "psrlq $8, %%mm0 \n\t" /* GHIJKLM0 */\ | |
927 "psrlq $16, %%mm5 \n\t" /* HIJKLM00 */\ | |
928 "punpcklbw %%mm7, %%mm0 \n\t" /* 0G0H0I0J */\ | |
929 "punpcklbw %%mm7, %%mm5 \n\t" /* 0H0I0J0K */\ | |
930 "paddw %%mm0, %%mm2 \n\t" /* b */\ | |
931 "paddw %%mm5, %%mm3 \n\t" /* c */\ | |
932 "paddw %%mm2, %%mm2 \n\t" /* 2b */\ | |
933 "psubw %%mm2, %%mm3 \n\t" /* c - 2b */\ | |
934 "movq %%mm6, %%mm2 \n\t" /* FGHIJKLM */\ | |
935 "psrlq $24, %%mm6 \n\t" /* IJKLM000 */\ | |
936 "punpcklbw %%mm7, %%mm2 \n\t" /* 0F0G0H0I */\ | |
937 "punpcklbw %%mm7, %%mm6 \n\t" /* 0I0J0K0L */\ | |
938 "pmullw "MANGLE(ff_pw_3)", %%mm3 \n\t" /* 3c - 6b */\ | |
939 "paddw %%mm2, %%mm1 \n\t" /* a */\ | |
940 "paddw %%mm6, %%mm4 \n\t" /* d */\ | |
941 "pmullw "MANGLE(ff_pw_20)", %%mm1 \n\t" /* 20a */\ | |
942 "psubw %%mm4, %%mm3 \n\t" /* - 6b +3c - d */\ | |
943 "paddw %6, %%mm1 \n\t"\ | |
944 "paddw %%mm1, %%mm3 \n\t" /* 20a - 6b +3c - d */\ | |
945 "psraw $5, %%mm3 \n\t"\ | |
946 "movq %5, %%mm1 \n\t"\ | |
947 "packuswb %%mm3, %%mm1 \n\t"\ | |
959 | 948 OP_MMX2(%%mm1, (%1),%%mm4, q)\ |
954 | 949 /* mm0= GHIJ, mm2=FGHI, mm5=HIJK, mm6=IJKL, mm7=0 */\ |
950 \ | |
2979 | 951 "movq 9(%0), %%mm1 \n\t" /* JKLMNOPQ */\ |
952 "movq %%mm1, %%mm4 \n\t" /* JKLMNOPQ */\ | |
953 "movq %%mm1, %%mm3 \n\t" /* JKLMNOPQ */\ | |
954 "psrlq $8, %%mm1 \n\t" /* KLMNOPQ0 */\ | |
955 "psrlq $16, %%mm4 \n\t" /* LMNOPQ00 */\ | |
956 "punpcklbw %%mm7, %%mm1 \n\t" /* 0K0L0M0N */\ | |
957 "punpcklbw %%mm7, %%mm4 \n\t" /* 0L0M0N0O */\ | |
958 "paddw %%mm1, %%mm5 \n\t" /* b */\ | |
959 "paddw %%mm4, %%mm0 \n\t" /* c */\ | |
960 "paddw %%mm5, %%mm5 \n\t" /* 2b */\ | |
961 "psubw %%mm5, %%mm0 \n\t" /* c - 2b */\ | |
962 "movq %%mm3, %%mm5 \n\t" /* JKLMNOPQ */\ | |
963 "psrlq $24, %%mm3 \n\t" /* MNOPQ000 */\ | |
964 "pmullw "MANGLE(ff_pw_3)", %%mm0 \n\t" /* 3c - 6b */\ | |
965 "punpcklbw %%mm7, %%mm3 \n\t" /* 0M0N0O0P */\ | |
966 "paddw %%mm3, %%mm2 \n\t" /* d */\ | |
967 "psubw %%mm2, %%mm0 \n\t" /* -6b + 3c - d */\ | |
968 "movq %%mm5, %%mm2 \n\t" /* JKLMNOPQ */\ | |
969 "punpcklbw %%mm7, %%mm2 \n\t" /* 0J0K0L0M */\ | |
970 "punpckhbw %%mm7, %%mm5 \n\t" /* 0N0O0P0Q */\ | |
971 "paddw %%mm2, %%mm6 \n\t" /* a */\ | |
972 "pmullw "MANGLE(ff_pw_20)", %%mm6 \n\t" /* 20a */\ | |
973 "paddw %6, %%mm0 \n\t"\ | |
974 "paddw %%mm6, %%mm0 \n\t" /* 20a - 6b + 3c - d */\ | |
975 "psraw $5, %%mm0 \n\t"\ | |
954 | 976 /* mm1=KLMN, mm2=JKLM, mm3=MNOP, mm4=LMNO, mm5=NOPQ mm7=0 */\ |
977 \ | |
2979 | 978 "paddw %%mm5, %%mm3 \n\t" /* a */\ |
979 "pshufw $0xF9, %%mm5, %%mm6 \n\t" /* 0O0P0Q0Q */\ | |
980 "paddw %%mm4, %%mm6 \n\t" /* b */\ | |
981 "pshufw $0xBE, %%mm5, %%mm4 \n\t" /* 0P0Q0Q0P */\ | |
982 "pshufw $0x6F, %%mm5, %%mm5 \n\t" /* 0Q0Q0P0O */\ | |
983 "paddw %%mm1, %%mm4 \n\t" /* c */\ | |
984 "paddw %%mm2, %%mm5 \n\t" /* d */\ | |
985 "paddw %%mm6, %%mm6 \n\t" /* 2b */\ | |
986 "psubw %%mm6, %%mm4 \n\t" /* c - 2b */\ | |
987 "pmullw "MANGLE(ff_pw_20)", %%mm3 \n\t" /* 20a */\ | |
988 "pmullw "MANGLE(ff_pw_3)", %%mm4 \n\t" /* 3c - 6b */\ | |
989 "psubw %%mm5, %%mm3 \n\t" /* -6b + 3c - d */\ | |
990 "paddw %6, %%mm4 \n\t"\ | |
991 "paddw %%mm3, %%mm4 \n\t" /* 20a - 6b + 3c - d */\ | |
992 "psraw $5, %%mm4 \n\t"\ | |
993 "packuswb %%mm4, %%mm0 \n\t"\ | |
959 | 994 OP_MMX2(%%mm0, 8(%1), %%mm4, q)\ |
954 | 995 \ |
2979 | 996 "add %3, %0 \n\t"\ |
997 "add %4, %1 \n\t"\ | |
998 "decl %2 \n\t"\ | |
999 " jnz 1b \n\t"\ | |
6513
713c4fd84e0b
Hardcode register to prevent aparent miscompilation.
michael
parents:
6512
diff
changeset
|
1000 : "+a"(src), "+c"(dst), "+D"(h)\ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1001 : "d"((x86_reg)srcStride), "S"((x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(temp), "m"(ROUNDER)\ |
966 | 1002 : "memory"\ |
954 | 1003 );\ |
1004 }\ | |
1005 \ | |
1006 static void OPNAME ## mpeg4_qpel16_h_lowpass_3dnow(uint8_t *dst, uint8_t *src, int dstStride, int srcStride, int h){\ | |
1007 int i;\ | |
1008 int16_t temp[16];\ | |
1009 /* quick HACK, XXX FIXME MUST be optimized */\ | |
1010 for(i=0; i<h; i++)\ | |
1011 {\ | |
1012 temp[ 0]= (src[ 0]+src[ 1])*20 - (src[ 0]+src[ 2])*6 + (src[ 1]+src[ 3])*3 - (src[ 2]+src[ 4]);\ | |
1013 temp[ 1]= (src[ 1]+src[ 2])*20 - (src[ 0]+src[ 3])*6 + (src[ 0]+src[ 4])*3 - (src[ 1]+src[ 5]);\ | |
1014 temp[ 2]= (src[ 2]+src[ 3])*20 - (src[ 1]+src[ 4])*6 + (src[ 0]+src[ 5])*3 - (src[ 0]+src[ 6]);\ | |
1015 temp[ 3]= (src[ 3]+src[ 4])*20 - (src[ 2]+src[ 5])*6 + (src[ 1]+src[ 6])*3 - (src[ 0]+src[ 7]);\ | |
1016 temp[ 4]= (src[ 4]+src[ 5])*20 - (src[ 3]+src[ 6])*6 + (src[ 2]+src[ 7])*3 - (src[ 1]+src[ 8]);\ | |
1017 temp[ 5]= (src[ 5]+src[ 6])*20 - (src[ 4]+src[ 7])*6 + (src[ 3]+src[ 8])*3 - (src[ 2]+src[ 9]);\ | |
1018 temp[ 6]= (src[ 6]+src[ 7])*20 - (src[ 5]+src[ 8])*6 + (src[ 4]+src[ 9])*3 - (src[ 3]+src[10]);\ | |
1019 temp[ 7]= (src[ 7]+src[ 8])*20 - (src[ 6]+src[ 9])*6 + (src[ 5]+src[10])*3 - (src[ 4]+src[11]);\ | |
1020 temp[ 8]= (src[ 8]+src[ 9])*20 - (src[ 7]+src[10])*6 + (src[ 6]+src[11])*3 - (src[ 5]+src[12]);\ | |
1021 temp[ 9]= (src[ 9]+src[10])*20 - (src[ 8]+src[11])*6 + (src[ 7]+src[12])*3 - (src[ 6]+src[13]);\ | |
1022 temp[10]= (src[10]+src[11])*20 - (src[ 9]+src[12])*6 + (src[ 8]+src[13])*3 - (src[ 7]+src[14]);\ | |
1023 temp[11]= (src[11]+src[12])*20 - (src[10]+src[13])*6 + (src[ 9]+src[14])*3 - (src[ 8]+src[15]);\ | |
1024 temp[12]= (src[12]+src[13])*20 - (src[11]+src[14])*6 + (src[10]+src[15])*3 - (src[ 9]+src[16]);\ | |
1025 temp[13]= (src[13]+src[14])*20 - (src[12]+src[15])*6 + (src[11]+src[16])*3 - (src[10]+src[16]);\ | |
1026 temp[14]= (src[14]+src[15])*20 - (src[13]+src[16])*6 + (src[12]+src[16])*3 - (src[11]+src[15]);\ | |
1027 temp[15]= (src[15]+src[16])*20 - (src[14]+src[16])*6 + (src[13]+src[15])*3 - (src[12]+src[14]);\ | |
1028 asm volatile(\ | |
2979 | 1029 "movq (%0), %%mm0 \n\t"\ |
1030 "movq 8(%0), %%mm1 \n\t"\ | |
1031 "paddw %2, %%mm0 \n\t"\ | |
1032 "paddw %2, %%mm1 \n\t"\ | |
1033 "psraw $5, %%mm0 \n\t"\ | |
1034 "psraw $5, %%mm1 \n\t"\ | |
1035 "packuswb %%mm1, %%mm0 \n\t"\ | |
959 | 1036 OP_3DNOW(%%mm0, (%1), %%mm1, q)\ |
2979 | 1037 "movq 16(%0), %%mm0 \n\t"\ |
1038 "movq 24(%0), %%mm1 \n\t"\ | |
1039 "paddw %2, %%mm0 \n\t"\ | |
1040 "paddw %2, %%mm1 \n\t"\ | |
1041 "psraw $5, %%mm0 \n\t"\ | |
1042 "psraw $5, %%mm1 \n\t"\ | |
1043 "packuswb %%mm1, %%mm0 \n\t"\ | |
959 | 1044 OP_3DNOW(%%mm0, 8(%1), %%mm1, q)\ |
954 | 1045 :: "r"(temp), "r"(dst), "m"(ROUNDER)\ |
966 | 1046 : "memory"\ |
954 | 1047 );\ |
1048 dst+=dstStride;\ | |
1049 src+=srcStride;\ | |
1050 }\ | |
1051 }\ | |
1052 \ | |
1057 | 1053 static void OPNAME ## mpeg4_qpel8_h_lowpass_mmx2(uint8_t *dst, uint8_t *src, int dstStride, int srcStride, int h){\ |
959 | 1054 asm volatile(\ |
2979 | 1055 "pxor %%mm7, %%mm7 \n\t"\ |
1056 "1: \n\t"\ | |
1057 "movq (%0), %%mm0 \n\t" /* ABCDEFGH */\ | |
1058 "movq %%mm0, %%mm1 \n\t" /* ABCDEFGH */\ | |
1059 "movq %%mm0, %%mm2 \n\t" /* ABCDEFGH */\ | |
1060 "punpcklbw %%mm7, %%mm0 \n\t" /* 0A0B0C0D */\ | |
1061 "punpckhbw %%mm7, %%mm1 \n\t" /* 0E0F0G0H */\ | |
1062 "pshufw $0x90, %%mm0, %%mm5 \n\t" /* 0A0A0B0C */\ | |
1063 "pshufw $0x41, %%mm0, %%mm6 \n\t" /* 0B0A0A0B */\ | |
1064 "movq %%mm2, %%mm3 \n\t" /* ABCDEFGH */\ | |
1065 "movq %%mm2, %%mm4 \n\t" /* ABCDEFGH */\ | |
1066 "psllq $8, %%mm2 \n\t" /* 0ABCDEFG */\ | |
1067 "psllq $16, %%mm3 \n\t" /* 00ABCDEF */\ | |
1068 "psllq $24, %%mm4 \n\t" /* 000ABCDE */\ | |
1069 "punpckhbw %%mm7, %%mm2 \n\t" /* 0D0E0F0G */\ | |
1070 "punpckhbw %%mm7, %%mm3 \n\t" /* 0C0D0E0F */\ | |
1071 "punpckhbw %%mm7, %%mm4 \n\t" /* 0B0C0D0E */\ | |
1072 "paddw %%mm3, %%mm5 \n\t" /* b */\ | |
1073 "paddw %%mm2, %%mm6 \n\t" /* c */\ | |
1074 "paddw %%mm5, %%mm5 \n\t" /* 2b */\ | |
1075 "psubw %%mm5, %%mm6 \n\t" /* c - 2b */\ | |
1076 "pshufw $0x06, %%mm0, %%mm5 \n\t" /* 0C0B0A0A */\ | |
1077 "pmullw "MANGLE(ff_pw_3)", %%mm6 \n\t" /* 3c - 6b */\ | |
1078 "paddw %%mm4, %%mm0 \n\t" /* a */\ | |
1079 "paddw %%mm1, %%mm5 \n\t" /* d */\ | |
1080 "pmullw "MANGLE(ff_pw_20)", %%mm0 \n\t" /* 20a */\ | |
1081 "psubw %%mm5, %%mm0 \n\t" /* 20a - d */\ | |
6512 | 1082 "paddw %5, %%mm6 \n\t"\ |
2979 | 1083 "paddw %%mm6, %%mm0 \n\t" /* 20a - 6b + 3c - d */\ |
1084 "psraw $5, %%mm0 \n\t"\ | |
959 | 1085 /* mm1=EFGH, mm2=DEFG, mm3=CDEF, mm4=BCDE, mm7=0 */\ |
1086 \ | |
2979 | 1087 "movd 5(%0), %%mm5 \n\t" /* FGHI */\ |
1088 "punpcklbw %%mm7, %%mm5 \n\t" /* 0F0G0H0I */\ | |
1089 "pshufw $0xF9, %%mm5, %%mm6 \n\t" /* 0G0H0I0I */\ | |
1090 "paddw %%mm5, %%mm1 \n\t" /* a */\ | |
1091 "paddw %%mm6, %%mm2 \n\t" /* b */\ | |
1092 "pshufw $0xBE, %%mm5, %%mm6 \n\t" /* 0H0I0I0H */\ | |
1093 "pshufw $0x6F, %%mm5, %%mm5 \n\t" /* 0I0I0H0G */\ | |
1094 "paddw %%mm6, %%mm3 \n\t" /* c */\ | |
1095 "paddw %%mm5, %%mm4 \n\t" /* d */\ | |
1096 "paddw %%mm2, %%mm2 \n\t" /* 2b */\ | |
1097 "psubw %%mm2, %%mm3 \n\t" /* c - 2b */\ | |
1098 "pmullw "MANGLE(ff_pw_20)", %%mm1 \n\t" /* 20a */\ | |
1099 "pmullw "MANGLE(ff_pw_3)", %%mm3 \n\t" /* 3c - 6b */\ | |
1100 "psubw %%mm4, %%mm3 \n\t" /* -6b + 3c - d */\ | |
6512 | 1101 "paddw %5, %%mm1 \n\t"\ |
2979 | 1102 "paddw %%mm1, %%mm3 \n\t" /* 20a - 6b + 3c - d */\ |
1103 "psraw $5, %%mm3 \n\t"\ | |
1104 "packuswb %%mm3, %%mm0 \n\t"\ | |
959 | 1105 OP_MMX2(%%mm0, (%1), %%mm4, q)\ |
1106 \ | |
2979 | 1107 "add %3, %0 \n\t"\ |
1108 "add %4, %1 \n\t"\ | |
1109 "decl %2 \n\t"\ | |
1110 " jnz 1b \n\t"\ | |
6513
713c4fd84e0b
Hardcode register to prevent aparent miscompilation.
michael
parents:
6512
diff
changeset
|
1111 : "+a"(src), "+c"(dst), "+d"(h)\ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1112 : "S"((x86_reg)srcStride), "D"((x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(ROUNDER)\ |
966 | 1113 : "memory"\ |
959 | 1114 );\ |
1115 }\ | |
1116 \ | |
1117 static void OPNAME ## mpeg4_qpel8_h_lowpass_3dnow(uint8_t *dst, uint8_t *src, int dstStride, int srcStride, int h){\ | |
1118 int i;\ | |
1119 int16_t temp[8];\ | |
1120 /* quick HACK, XXX FIXME MUST be optimized */\ | |
1121 for(i=0; i<h; i++)\ | |
1122 {\ | |
1123 temp[ 0]= (src[ 0]+src[ 1])*20 - (src[ 0]+src[ 2])*6 + (src[ 1]+src[ 3])*3 - (src[ 2]+src[ 4]);\ | |
1124 temp[ 1]= (src[ 1]+src[ 2])*20 - (src[ 0]+src[ 3])*6 + (src[ 0]+src[ 4])*3 - (src[ 1]+src[ 5]);\ | |
1125 temp[ 2]= (src[ 2]+src[ 3])*20 - (src[ 1]+src[ 4])*6 + (src[ 0]+src[ 5])*3 - (src[ 0]+src[ 6]);\ | |
1126 temp[ 3]= (src[ 3]+src[ 4])*20 - (src[ 2]+src[ 5])*6 + (src[ 1]+src[ 6])*3 - (src[ 0]+src[ 7]);\ | |
1127 temp[ 4]= (src[ 4]+src[ 5])*20 - (src[ 3]+src[ 6])*6 + (src[ 2]+src[ 7])*3 - (src[ 1]+src[ 8]);\ | |
1128 temp[ 5]= (src[ 5]+src[ 6])*20 - (src[ 4]+src[ 7])*6 + (src[ 3]+src[ 8])*3 - (src[ 2]+src[ 8]);\ | |
1129 temp[ 6]= (src[ 6]+src[ 7])*20 - (src[ 5]+src[ 8])*6 + (src[ 4]+src[ 8])*3 - (src[ 3]+src[ 7]);\ | |
1130 temp[ 7]= (src[ 7]+src[ 8])*20 - (src[ 6]+src[ 8])*6 + (src[ 5]+src[ 7])*3 - (src[ 4]+src[ 6]);\ | |
1131 asm volatile(\ | |
2979 | 1132 "movq (%0), %%mm0 \n\t"\ |
1133 "movq 8(%0), %%mm1 \n\t"\ | |
1134 "paddw %2, %%mm0 \n\t"\ | |
1135 "paddw %2, %%mm1 \n\t"\ | |
1136 "psraw $5, %%mm0 \n\t"\ | |
1137 "psraw $5, %%mm1 \n\t"\ | |
1138 "packuswb %%mm1, %%mm0 \n\t"\ | |
959 | 1139 OP_3DNOW(%%mm0, (%1), %%mm1, q)\ |
1140 :: "r"(temp), "r"(dst), "m"(ROUNDER)\ | |
966 | 1141 :"memory"\ |
959 | 1142 );\ |
1143 dst+=dstStride;\ | |
1144 src+=srcStride;\ | |
1145 }\ | |
1146 } | |
1147 | |
1148 #define QPEL_OP(OPNAME, ROUNDER, RND, OP, MMX)\ | |
1149 \ | |
1150 static void OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(uint8_t *dst, uint8_t *src, int dstStride, int srcStride){\ | |
954 | 1151 uint64_t temp[17*4];\ |
1152 uint64_t *temp_ptr= temp;\ | |
1153 int count= 17;\ | |
1154 \ | |
1155 /*FIXME unroll */\ | |
1156 asm volatile(\ | |
2979 | 1157 "pxor %%mm7, %%mm7 \n\t"\ |
1158 "1: \n\t"\ | |
1159 "movq (%0), %%mm0 \n\t"\ | |
1160 "movq (%0), %%mm1 \n\t"\ | |
1161 "movq 8(%0), %%mm2 \n\t"\ | |
1162 "movq 8(%0), %%mm3 \n\t"\ | |
1163 "punpcklbw %%mm7, %%mm0 \n\t"\ | |
1164 "punpckhbw %%mm7, %%mm1 \n\t"\ | |
1165 "punpcklbw %%mm7, %%mm2 \n\t"\ | |
1166 "punpckhbw %%mm7, %%mm3 \n\t"\ | |
1167 "movq %%mm0, (%1) \n\t"\ | |
1168 "movq %%mm1, 17*8(%1) \n\t"\ | |
1169 "movq %%mm2, 2*17*8(%1) \n\t"\ | |
1170 "movq %%mm3, 3*17*8(%1) \n\t"\ | |
1171 "add $8, %1 \n\t"\ | |
1172 "add %3, %0 \n\t"\ | |
1173 "decl %2 \n\t"\ | |
1174 " jnz 1b \n\t"\ | |
954 | 1175 : "+r" (src), "+r" (temp_ptr), "+r"(count)\ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1176 : "r" ((x86_reg)srcStride)\ |
966 | 1177 : "memory"\ |
954 | 1178 );\ |
1179 \ | |
1180 temp_ptr= temp;\ | |
1181 count=4;\ | |
1182 \ | |
1183 /*FIXME reorder for speed */\ | |
1184 asm volatile(\ | |
2979 | 1185 /*"pxor %%mm7, %%mm7 \n\t"*/\ |
1186 "1: \n\t"\ | |
1187 "movq (%0), %%mm0 \n\t"\ | |
1188 "movq 8(%0), %%mm1 \n\t"\ | |
1189 "movq 16(%0), %%mm2 \n\t"\ | |
1190 "movq 24(%0), %%mm3 \n\t"\ | |
961 | 1191 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 16(%0), 8(%0), (%0), 32(%0), (%1), OP)\ |
1192 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 8(%0), (%0), (%0), 40(%0), (%1, %3), OP)\ | |
2979 | 1193 "add %4, %1 \n\t"\ |
961 | 1194 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, (%0), (%0), 8(%0), 48(%0), (%1), OP)\ |
954 | 1195 \ |
961 | 1196 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, (%0), 8(%0), 16(%0), 56(%0), (%1, %3), OP)\ |
2979 | 1197 "add %4, %1 \n\t"\ |
961 | 1198 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 8(%0), 16(%0), 24(%0), 64(%0), (%1), OP)\ |
1199 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 16(%0), 24(%0), 32(%0), 72(%0), (%1, %3), OP)\ | |
2979 | 1200 "add %4, %1 \n\t"\ |
961 | 1201 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, 24(%0), 32(%0), 40(%0), 80(%0), (%1), OP)\ |
1202 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, 32(%0), 40(%0), 48(%0), 88(%0), (%1, %3), OP)\ | |
2979 | 1203 "add %4, %1 \n\t"\ |
961 | 1204 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 40(%0), 48(%0), 56(%0), 96(%0), (%1), OP)\ |
1205 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 48(%0), 56(%0), 64(%0),104(%0), (%1, %3), OP)\ | |
2979 | 1206 "add %4, %1 \n\t"\ |
961 | 1207 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, 56(%0), 64(%0), 72(%0),112(%0), (%1), OP)\ |
1208 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, 64(%0), 72(%0), 80(%0),120(%0), (%1, %3), OP)\ | |
2979 | 1209 "add %4, %1 \n\t"\ |
961 | 1210 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 72(%0), 80(%0), 88(%0),128(%0), (%1), OP)\ |
954 | 1211 \ |
961 | 1212 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 80(%0), 88(%0), 96(%0),128(%0), (%1, %3), OP)\ |
2979 | 1213 "add %4, %1 \n\t" \ |
961 | 1214 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, 88(%0), 96(%0),104(%0),120(%0), (%1), OP)\ |
1215 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, 96(%0),104(%0),112(%0),112(%0), (%1, %3), OP)\ | |
954 | 1216 \ |
2979 | 1217 "add $136, %0 \n\t"\ |
1218 "add %6, %1 \n\t"\ | |
1219 "decl %2 \n\t"\ | |
1220 " jnz 1b \n\t"\ | |
958
9bb668034ecf
slowdown / gcc 2.95.* bug workaround (this should be reversed as soon as gcc 2.95.* support is droped)
michaelni
parents:
954
diff
changeset
|
1221 \ |
967 | 1222 : "+r"(temp_ptr), "+r"(dst), "+g"(count)\ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1223 : "r"((x86_reg)dstStride), "r"(2*(x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(ROUNDER), "g"(4-14*(x86_reg)dstStride)\ |
966 | 1224 :"memory"\ |
954 | 1225 );\ |
1226 }\ | |
1227 \ | |
1057 | 1228 static void OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(uint8_t *dst, uint8_t *src, int dstStride, int srcStride){\ |
2209 | 1229 uint64_t temp[9*2];\ |
954 | 1230 uint64_t *temp_ptr= temp;\ |
1231 int count= 9;\ | |
1232 \ | |
1233 /*FIXME unroll */\ | |
1234 asm volatile(\ | |
2979 | 1235 "pxor %%mm7, %%mm7 \n\t"\ |
1236 "1: \n\t"\ | |
1237 "movq (%0), %%mm0 \n\t"\ | |
1238 "movq (%0), %%mm1 \n\t"\ | |
1239 "punpcklbw %%mm7, %%mm0 \n\t"\ | |
1240 "punpckhbw %%mm7, %%mm1 \n\t"\ | |
1241 "movq %%mm0, (%1) \n\t"\ | |
1242 "movq %%mm1, 9*8(%1) \n\t"\ | |
1243 "add $8, %1 \n\t"\ | |
1244 "add %3, %0 \n\t"\ | |
1245 "decl %2 \n\t"\ | |
1246 " jnz 1b \n\t"\ | |
954 | 1247 : "+r" (src), "+r" (temp_ptr), "+r"(count)\ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1248 : "r" ((x86_reg)srcStride)\ |
966 | 1249 : "memory"\ |
954 | 1250 );\ |
1251 \ | |
1252 temp_ptr= temp;\ | |
1253 count=2;\ | |
1254 \ | |
1255 /*FIXME reorder for speed */\ | |
1256 asm volatile(\ | |
2979 | 1257 /*"pxor %%mm7, %%mm7 \n\t"*/\ |
1258 "1: \n\t"\ | |
1259 "movq (%0), %%mm0 \n\t"\ | |
1260 "movq 8(%0), %%mm1 \n\t"\ | |
1261 "movq 16(%0), %%mm2 \n\t"\ | |
1262 "movq 24(%0), %%mm3 \n\t"\ | |
961 | 1263 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 16(%0), 8(%0), (%0), 32(%0), (%1), OP)\ |
1264 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 8(%0), (%0), (%0), 40(%0), (%1, %3), OP)\ | |
2979 | 1265 "add %4, %1 \n\t"\ |
961 | 1266 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, (%0), (%0), 8(%0), 48(%0), (%1), OP)\ |
954 | 1267 \ |
961 | 1268 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, (%0), 8(%0), 16(%0), 56(%0), (%1, %3), OP)\ |
2979 | 1269 "add %4, %1 \n\t"\ |
961 | 1270 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 8(%0), 16(%0), 24(%0), 64(%0), (%1), OP)\ |
954 | 1271 \ |
961 | 1272 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 16(%0), 24(%0), 32(%0), 64(%0), (%1, %3), OP)\ |
2979 | 1273 "add %4, %1 \n\t"\ |
961 | 1274 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, 24(%0), 32(%0), 40(%0), 56(%0), (%1), OP)\ |
1275 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, 32(%0), 40(%0), 48(%0), 48(%0), (%1, %3), OP)\ | |
954 | 1276 \ |
2979 | 1277 "add $72, %0 \n\t"\ |
1278 "add %6, %1 \n\t"\ | |
1279 "decl %2 \n\t"\ | |
1280 " jnz 1b \n\t"\ | |
954 | 1281 \ |
961 | 1282 : "+r"(temp_ptr), "+r"(dst), "+g"(count)\ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1283 : "r"((x86_reg)dstStride), "r"(2*(x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(ROUNDER), "g"(4-6*(x86_reg)dstStride)\ |
966 | 1284 : "memory"\ |
1285 );\ | |
959 | 1286 }\ |
954 | 1287 \ |
1064 | 1288 static void OPNAME ## qpel8_mc00_ ## MMX (uint8_t *dst, uint8_t *src, int stride){\ |
6321 | 1289 OPNAME ## pixels8_ ## MMX(dst, src, stride, 8);\ |
954 | 1290 }\ |
1291 \ | |
1064 | 1292 static void OPNAME ## qpel8_mc10_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1293 uint64_t temp[8];\ |
954 | 1294 uint8_t * const half= (uint8_t*)temp;\ |
1295 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(half, src, 8, stride, 8);\ | |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1296 OPNAME ## pixels8_l2_ ## MMX(dst, src, half, stride, stride, 8);\ |
954 | 1297 }\ |
1298 \ | |
1064 | 1299 static void OPNAME ## qpel8_mc20_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1300 OPNAME ## mpeg4_qpel8_h_lowpass_ ## MMX(dst, src, stride, stride, 8);\ |
1301 }\ | |
1302 \ | |
1064 | 1303 static void OPNAME ## qpel8_mc30_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1304 uint64_t temp[8];\ |
954 | 1305 uint8_t * const half= (uint8_t*)temp;\ |
1306 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(half, src, 8, stride, 8);\ | |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1307 OPNAME ## pixels8_l2_ ## MMX(dst, src+1, half, stride, stride, 8);\ |
954 | 1308 }\ |
1309 \ | |
1064 | 1310 static void OPNAME ## qpel8_mc01_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1311 uint64_t temp[8];\ |
954 | 1312 uint8_t * const half= (uint8_t*)temp;\ |
959 | 1313 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(half, src, 8, stride);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1314 OPNAME ## pixels8_l2_ ## MMX(dst, src, half, stride, stride, 8);\ |
954 | 1315 }\ |
1316 \ | |
1064 | 1317 static void OPNAME ## qpel8_mc02_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
959 | 1318 OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(dst, src, stride, stride);\ |
954 | 1319 }\ |
1320 \ | |
1064 | 1321 static void OPNAME ## qpel8_mc03_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1322 uint64_t temp[8];\ |
954 | 1323 uint8_t * const half= (uint8_t*)temp;\ |
959 | 1324 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(half, src, 8, stride);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1325 OPNAME ## pixels8_l2_ ## MMX(dst, src+stride, half, stride, stride, 8);\ |
954 | 1326 }\ |
1064 | 1327 static void OPNAME ## qpel8_mc11_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1328 uint64_t half[8 + 9];\ |
1329 uint8_t * const halfH= ((uint8_t*)half) + 64;\ | |
1330 uint8_t * const halfHV= ((uint8_t*)half);\ | |
954 | 1331 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1332 put ## RND ## pixels8_l2_ ## MMX(halfH, src, halfH, 8, stride, 9);\ |
959 | 1333 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1334 OPNAME ## pixels8_l2_ ## MMX(dst, halfH, halfHV, stride, 8, 8);\ |
954 | 1335 }\ |
1064 | 1336 static void OPNAME ## qpel8_mc31_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1337 uint64_t half[8 + 9];\ |
1338 uint8_t * const halfH= ((uint8_t*)half) + 64;\ | |
1339 uint8_t * const halfHV= ((uint8_t*)half);\ | |
954 | 1340 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1341 put ## RND ## pixels8_l2_ ## MMX(halfH, src+1, halfH, 8, stride, 9);\ |
959 | 1342 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1343 OPNAME ## pixels8_l2_ ## MMX(dst, halfH, halfHV, stride, 8, 8);\ |
954 | 1344 }\ |
1064 | 1345 static void OPNAME ## qpel8_mc13_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1346 uint64_t half[8 + 9];\ |
1347 uint8_t * const halfH= ((uint8_t*)half) + 64;\ | |
1348 uint8_t * const halfHV= ((uint8_t*)half);\ | |
954 | 1349 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1350 put ## RND ## pixels8_l2_ ## MMX(halfH, src, halfH, 8, stride, 9);\ |
959 | 1351 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1352 OPNAME ## pixels8_l2_ ## MMX(dst, halfH+8, halfHV, stride, 8, 8);\ |
954 | 1353 }\ |
1064 | 1354 static void OPNAME ## qpel8_mc33_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1355 uint64_t half[8 + 9];\ |
1356 uint8_t * const halfH= ((uint8_t*)half) + 64;\ | |
1357 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1358 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1359 put ## RND ## pixels8_l2_ ## MMX(halfH, src+1, halfH, 8, stride, 9);\ |
959 | 1360 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1361 OPNAME ## pixels8_l2_ ## MMX(dst, halfH+8, halfHV, stride, 8, 8);\ |
954 | 1362 }\ |
1064 | 1363 static void OPNAME ## qpel8_mc21_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1364 uint64_t half[8 + 9];\ |
954 | 1365 uint8_t * const halfH= ((uint8_t*)half) + 64;\ |
1366 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1367 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
959 | 1368 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1369 OPNAME ## pixels8_l2_ ## MMX(dst, halfH, halfHV, stride, 8, 8);\ |
954 | 1370 }\ |
1064 | 1371 static void OPNAME ## qpel8_mc23_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1372 uint64_t half[8 + 9];\ |
954 | 1373 uint8_t * const halfH= ((uint8_t*)half) + 64;\ |
1374 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1375 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
959 | 1376 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1377 OPNAME ## pixels8_l2_ ## MMX(dst, halfH+8, halfHV, stride, 8, 8);\ |
954 | 1378 }\ |
1064 | 1379 static void OPNAME ## qpel8_mc12_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1380 uint64_t half[8 + 9];\ |
1381 uint8_t * const halfH= ((uint8_t*)half);\ | |
954 | 1382 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1383 put ## RND ## pixels8_l2_ ## MMX(halfH, src, halfH, 8, stride, 9);\ |
984 | 1384 OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(dst, halfH, stride, 8);\ |
954 | 1385 }\ |
1064 | 1386 static void OPNAME ## qpel8_mc32_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1387 uint64_t half[8 + 9];\ |
1388 uint8_t * const halfH= ((uint8_t*)half);\ | |
954 | 1389 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1390 put ## RND ## pixels8_l2_ ## MMX(halfH, src+1, halfH, 8, stride, 9);\ |
984 | 1391 OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(dst, halfH, stride, 8);\ |
954 | 1392 }\ |
1064 | 1393 static void OPNAME ## qpel8_mc22_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1394 uint64_t half[9];\ |
954 | 1395 uint8_t * const halfH= ((uint8_t*)half);\ |
1396 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
959 | 1397 OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(dst, halfH, stride, 8);\ |
954 | 1398 }\ |
1064 | 1399 static void OPNAME ## qpel16_mc00_ ## MMX (uint8_t *dst, uint8_t *src, int stride){\ |
6321 | 1400 OPNAME ## pixels16_ ## MMX(dst, src, stride, 16);\ |
954 | 1401 }\ |
1402 \ | |
1064 | 1403 static void OPNAME ## qpel16_mc10_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1404 uint64_t temp[32];\ |
1405 uint8_t * const half= (uint8_t*)temp;\ | |
1406 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(half, src, 16, stride, 16);\ | |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1407 OPNAME ## pixels16_l2_ ## MMX(dst, src, half, stride, stride, 16);\ |
954 | 1408 }\ |
1409 \ | |
1064 | 1410 static void OPNAME ## qpel16_mc20_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1411 OPNAME ## mpeg4_qpel16_h_lowpass_ ## MMX(dst, src, stride, stride, 16);\ |
1412 }\ | |
1413 \ | |
1064 | 1414 static void OPNAME ## qpel16_mc30_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1415 uint64_t temp[32];\ |
1416 uint8_t * const half= (uint8_t*)temp;\ | |
1417 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(half, src, 16, stride, 16);\ | |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1418 OPNAME ## pixels16_l2_ ## MMX(dst, src+1, half, stride, stride, 16);\ |
954 | 1419 }\ |
1420 \ | |
1064 | 1421 static void OPNAME ## qpel16_mc01_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1422 uint64_t temp[32];\ |
1423 uint8_t * const half= (uint8_t*)temp;\ | |
959 | 1424 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(half, src, 16, stride);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
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diff
changeset
|
1425 OPNAME ## pixels16_l2_ ## MMX(dst, src, half, stride, stride, 16);\ |
954 | 1426 }\ |
1427 \ | |
1064 | 1428 static void OPNAME ## qpel16_mc02_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
959 | 1429 OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(dst, src, stride, stride);\ |
954 | 1430 }\ |
1431 \ | |
1064 | 1432 static void OPNAME ## qpel16_mc03_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1433 uint64_t temp[32];\ |
1434 uint8_t * const half= (uint8_t*)temp;\ | |
959 | 1435 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(half, src, 16, stride);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
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diff
changeset
|
1436 OPNAME ## pixels16_l2_ ## MMX(dst, src+stride, half, stride, stride, 16);\ |
954 | 1437 }\ |
1064 | 1438 static void OPNAME ## qpel16_mc11_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1439 uint64_t half[16*2 + 17*2];\ |
1440 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1441 uint8_t * const halfHV= ((uint8_t*)half);\ | |
954 | 1442 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
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diff
changeset
|
1443 put ## RND ## pixels16_l2_ ## MMX(halfH, src, halfH, 16, stride, 17);\ |
959 | 1444 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
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diff
changeset
|
1445 OPNAME ## pixels16_l2_ ## MMX(dst, halfH, halfHV, stride, 16, 16);\ |
954 | 1446 }\ |
1064 | 1447 static void OPNAME ## qpel16_mc31_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1448 uint64_t half[16*2 + 17*2];\ |
1449 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1450 uint8_t * const halfHV= ((uint8_t*)half);\ | |
954 | 1451 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
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diff
changeset
|
1452 put ## RND ## pixels16_l2_ ## MMX(halfH, src+1, halfH, 16, stride, 17);\ |
959 | 1453 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
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diff
changeset
|
1454 OPNAME ## pixels16_l2_ ## MMX(dst, halfH, halfHV, stride, 16, 16);\ |
954 | 1455 }\ |
1064 | 1456 static void OPNAME ## qpel16_mc13_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1457 uint64_t half[16*2 + 17*2];\ |
1458 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1459 uint8_t * const halfHV= ((uint8_t*)half);\ | |
954 | 1460 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
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|
1461 put ## RND ## pixels16_l2_ ## MMX(halfH, src, halfH, 16, stride, 17);\ |
959 | 1462 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ |
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22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
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|
1463 OPNAME ## pixels16_l2_ ## MMX(dst, halfH+16, halfHV, stride, 16, 16);\ |
954 | 1464 }\ |
1064 | 1465 static void OPNAME ## qpel16_mc33_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1466 uint64_t half[16*2 + 17*2];\ |
1467 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1468 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1469 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
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10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
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|
1470 put ## RND ## pixels16_l2_ ## MMX(halfH, src+1, halfH, 16, stride, 17);\ |
959 | 1471 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ |
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10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
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|
1472 OPNAME ## pixels16_l2_ ## MMX(dst, halfH+16, halfHV, stride, 16, 16);\ |
954 | 1473 }\ |
1064 | 1474 static void OPNAME ## qpel16_mc21_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1475 uint64_t half[16*2 + 17*2];\ |
1476 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1477 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1478 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
959 | 1479 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ |
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10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
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|
1480 OPNAME ## pixels16_l2_ ## MMX(dst, halfH, halfHV, stride, 16, 16);\ |
954 | 1481 }\ |
1064 | 1482 static void OPNAME ## qpel16_mc23_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1483 uint64_t half[16*2 + 17*2];\ |
1484 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1485 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1486 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
959 | 1487 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ |
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10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
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|
1488 OPNAME ## pixels16_l2_ ## MMX(dst, halfH+16, halfHV, stride, 16, 16);\ |
954 | 1489 }\ |
1064 | 1490 static void OPNAME ## qpel16_mc12_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1491 uint64_t half[17*2];\ |
1492 uint8_t * const halfH= ((uint8_t*)half);\ | |
954 | 1493 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ |
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10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
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|
1494 put ## RND ## pixels16_l2_ ## MMX(halfH, src, halfH, 16, stride, 17);\ |
984 | 1495 OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(dst, halfH, stride, 16);\ |
954 | 1496 }\ |
1064 | 1497 static void OPNAME ## qpel16_mc32_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1498 uint64_t half[17*2];\ |
1499 uint8_t * const halfH= ((uint8_t*)half);\ | |
954 | 1500 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ |
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10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
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|
1501 put ## RND ## pixels16_l2_ ## MMX(halfH, src+1, halfH, 16, stride, 17);\ |
984 | 1502 OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(dst, halfH, stride, 16);\ |
954 | 1503 }\ |
1064 | 1504 static void OPNAME ## qpel16_mc22_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1505 uint64_t half[17*2];\ |
1506 uint8_t * const halfH= ((uint8_t*)half);\ | |
1507 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
959 | 1508 OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(dst, halfH, stride, 16);\ |
954 | 1509 } |
1510 | |
2979 | 1511 #define PUT_OP(a,b,temp, size) "mov" #size " " #a ", " #b " \n\t" |
959 | 1512 #define AVG_3DNOW_OP(a,b,temp, size) \ |
2979 | 1513 "mov" #size " " #b ", " #temp " \n\t"\ |
1514 "pavgusb " #temp ", " #a " \n\t"\ | |
1515 "mov" #size " " #a ", " #b " \n\t" | |
959 | 1516 #define AVG_MMX2_OP(a,b,temp, size) \ |
2979 | 1517 "mov" #size " " #b ", " #temp " \n\t"\ |
1518 "pavgb " #temp ", " #a " \n\t"\ | |
1519 "mov" #size " " #a ", " #b " \n\t" | |
959 | 1520 |
1521 QPEL_BASE(put_ , ff_pw_16, _ , PUT_OP, PUT_OP) | |
1522 QPEL_BASE(avg_ , ff_pw_16, _ , AVG_MMX2_OP, AVG_3DNOW_OP) | |
1523 QPEL_BASE(put_no_rnd_, ff_pw_15, _no_rnd_, PUT_OP, PUT_OP) | |
1524 QPEL_OP(put_ , ff_pw_16, _ , PUT_OP, 3dnow) | |
1525 QPEL_OP(avg_ , ff_pw_16, _ , AVG_3DNOW_OP, 3dnow) | |
1526 QPEL_OP(put_no_rnd_, ff_pw_15, _no_rnd_, PUT_OP, 3dnow) | |
954 | 1527 QPEL_OP(put_ , ff_pw_16, _ , PUT_OP, mmx2) |
959 | 1528 QPEL_OP(avg_ , ff_pw_16, _ , AVG_MMX2_OP, mmx2) |
954 | 1529 QPEL_OP(put_no_rnd_, ff_pw_15, _no_rnd_, PUT_OP, mmx2) |
1530 | |
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1531 /***********************************/ |
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1532 /* bilinear qpel: not compliant to any spec, only for -lavdopts fast */ |
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|
1533 |
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|
1534 #define QPEL_2TAP_XY(OPNAME, SIZE, MMX, XY, HPEL)\ |
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|
1535 static void OPNAME ## 2tap_qpel ## SIZE ## _mc ## XY ## _ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
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|
1536 OPNAME ## pixels ## SIZE ## HPEL(dst, src, stride, SIZE);\ |
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|
1537 } |
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|
1538 #define QPEL_2TAP_L3(OPNAME, SIZE, MMX, XY, S0, S1, S2)\ |
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|
1539 static void OPNAME ## 2tap_qpel ## SIZE ## _mc ## XY ## _ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
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|
1540 OPNAME ## 2tap_qpel ## SIZE ## _l3_ ## MMX(dst, src+S0, stride, SIZE, S1, S2);\ |
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|
1541 } |
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|
1542 |
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|
1543 #define QPEL_2TAP(OPNAME, SIZE, MMX)\ |
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|
1544 QPEL_2TAP_XY(OPNAME, SIZE, MMX, 20, _x2_ ## MMX)\ |
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|
1545 QPEL_2TAP_XY(OPNAME, SIZE, MMX, 02, _y2_ ## MMX)\ |
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|
1546 QPEL_2TAP_XY(OPNAME, SIZE, MMX, 22, _xy2_mmx)\ |
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|
1547 static const qpel_mc_func OPNAME ## 2tap_qpel ## SIZE ## _mc00_ ## MMX =\ |
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|
1548 OPNAME ## qpel ## SIZE ## _mc00_ ## MMX;\ |
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|
1549 static const qpel_mc_func OPNAME ## 2tap_qpel ## SIZE ## _mc21_ ## MMX =\ |
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|
1550 OPNAME ## 2tap_qpel ## SIZE ## _mc20_ ## MMX;\ |
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|
1551 static const qpel_mc_func OPNAME ## 2tap_qpel ## SIZE ## _mc12_ ## MMX =\ |
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|
1552 OPNAME ## 2tap_qpel ## SIZE ## _mc02_ ## MMX;\ |
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|
1553 static void OPNAME ## 2tap_qpel ## SIZE ## _mc32_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
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|
1554 OPNAME ## pixels ## SIZE ## _y2_ ## MMX(dst, src+1, stride, SIZE);\ |
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|
1555 }\ |
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|
1556 static void OPNAME ## 2tap_qpel ## SIZE ## _mc23_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
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|
1557 OPNAME ## pixels ## SIZE ## _x2_ ## MMX(dst, src+stride, stride, SIZE);\ |
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|
1558 }\ |
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|
1559 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 10, 0, 1, 0)\ |
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|
1560 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 30, 1, -1, 0)\ |
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|
1561 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 01, 0, stride, 0)\ |
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|
1562 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 03, stride, -stride, 0)\ |
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|
1563 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 11, 0, stride, 1)\ |
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|
1564 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 31, 1, stride, -1)\ |
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|
1565 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 13, stride, -stride, 1)\ |
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|
1566 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 33, stride+1, -stride, -1)\ |
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|
1567 |
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|
1568 QPEL_2TAP(put_, 16, mmx2) |
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|
1569 QPEL_2TAP(avg_, 16, mmx2) |
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|
1570 QPEL_2TAP(put_, 8, mmx2) |
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|
1571 QPEL_2TAP(avg_, 8, mmx2) |
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|
1572 QPEL_2TAP(put_, 16, 3dnow) |
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|
1573 QPEL_2TAP(avg_, 16, 3dnow) |
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|
1574 QPEL_2TAP(put_, 8, 3dnow) |
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|
1575 QPEL_2TAP(avg_, 8, 3dnow) |
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|
1576 |
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|
1577 |
393 | 1578 #if 0 |
247
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
1579 static void just_return() { return; } |
393 | 1580 #endif |
247
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
1581 |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1582 static void gmc_mmx(uint8_t *dst, uint8_t *src, int stride, int h, int ox, int oy, |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1583 int dxx, int dxy, int dyx, int dyy, int shift, int r, int width, int height){ |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1584 const int w = 8; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1585 const int ix = ox>>(16+shift); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1586 const int iy = oy>>(16+shift); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1587 const int oxs = ox>>4; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1588 const int oys = oy>>4; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1589 const int dxxs = dxx>>4; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1590 const int dxys = dxy>>4; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1591 const int dyxs = dyx>>4; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1592 const int dyys = dyy>>4; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1593 const uint16_t r4[4] = {r,r,r,r}; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1594 const uint16_t dxy4[4] = {dxys,dxys,dxys,dxys}; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1595 const uint16_t dyy4[4] = {dyys,dyys,dyys,dyys}; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1596 const uint64_t shift2 = 2*shift; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1597 uint8_t edge_buf[(h+1)*stride]; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1598 int x, y; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1599 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1600 const int dxw = (dxx-(1<<(16+shift)))*(w-1); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1601 const int dyh = (dyy-(1<<(16+shift)))*(h-1); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1602 const int dxh = dxy*(h-1); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1603 const int dyw = dyx*(w-1); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1604 if( // non-constant fullpel offset (3% of blocks) |
6196
166bef5cad01
add parenthesis, fix warning: i386/dsputil_mmx.c:2618: warning: suggest parentheses around arithmetic in operand of |
bcoudurier
parents:
6195
diff
changeset
|
1605 ((ox^(ox+dxw)) | (ox^(ox+dxh)) | (ox^(ox+dxw+dxh)) | |
166bef5cad01
add parenthesis, fix warning: i386/dsputil_mmx.c:2618: warning: suggest parentheses around arithmetic in operand of |
bcoudurier
parents:
6195
diff
changeset
|
1606 (oy^(oy+dyw)) | (oy^(oy+dyh)) | (oy^(oy+dyw+dyh))) >> (16+shift) |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1607 // uses more than 16 bits of subpel mv (only at huge resolution) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1608 || (dxx|dxy|dyx|dyy)&15 ) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1609 { |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1610 //FIXME could still use mmx for some of the rows |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1611 ff_gmc_c(dst, src, stride, h, ox, oy, dxx, dxy, dyx, dyy, shift, r, width, height); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1612 return; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1613 } |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1614 |
3250 | 1615 src += ix + iy*stride; |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1616 if( (unsigned)ix >= width-w || |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1617 (unsigned)iy >= height-h ) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1618 { |
3250 | 1619 ff_emulated_edge_mc(edge_buf, src, stride, w+1, h+1, ix, iy, width, height); |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1620 src = edge_buf; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1621 } |
3250 | 1622 |
1623 asm volatile( | |
1624 "movd %0, %%mm6 \n\t" | |
1625 "pxor %%mm7, %%mm7 \n\t" | |
1626 "punpcklwd %%mm6, %%mm6 \n\t" | |
1627 "punpcklwd %%mm6, %%mm6 \n\t" | |
1628 :: "r"(1<<shift) | |
1629 ); | |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1630 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1631 for(x=0; x<w; x+=4){ |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1632 uint16_t dx4[4] = { oxs - dxys + dxxs*(x+0), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1633 oxs - dxys + dxxs*(x+1), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1634 oxs - dxys + dxxs*(x+2), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1635 oxs - dxys + dxxs*(x+3) }; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1636 uint16_t dy4[4] = { oys - dyys + dyxs*(x+0), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1637 oys - dyys + dyxs*(x+1), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1638 oys - dyys + dyxs*(x+2), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1639 oys - dyys + dyxs*(x+3) }; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1640 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1641 for(y=0; y<h; y++){ |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1642 asm volatile( |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1643 "movq %0, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1644 "movq %1, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1645 "paddw %2, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1646 "paddw %3, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1647 "movq %%mm4, %0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1648 "movq %%mm5, %1 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1649 "psrlw $12, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1650 "psrlw $12, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1651 : "+m"(*dx4), "+m"(*dy4) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1652 : "m"(*dxy4), "m"(*dyy4) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1653 ); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1654 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1655 asm volatile( |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1656 "movq %%mm6, %%mm2 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1657 "movq %%mm6, %%mm1 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1658 "psubw %%mm4, %%mm2 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1659 "psubw %%mm5, %%mm1 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1660 "movq %%mm2, %%mm0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1661 "movq %%mm4, %%mm3 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1662 "pmullw %%mm1, %%mm0 \n\t" // (s-dx)*(s-dy) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1663 "pmullw %%mm5, %%mm3 \n\t" // dx*dy |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1664 "pmullw %%mm5, %%mm2 \n\t" // (s-dx)*dy |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1665 "pmullw %%mm4, %%mm1 \n\t" // dx*(s-dy) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1666 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1667 "movd %4, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1668 "movd %3, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1669 "punpcklbw %%mm7, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1670 "punpcklbw %%mm7, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1671 "pmullw %%mm5, %%mm3 \n\t" // src[1,1] * dx*dy |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1672 "pmullw %%mm4, %%mm2 \n\t" // src[0,1] * (s-dx)*dy |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1673 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1674 "movd %2, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1675 "movd %1, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1676 "punpcklbw %%mm7, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1677 "punpcklbw %%mm7, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1678 "pmullw %%mm5, %%mm1 \n\t" // src[1,0] * dx*(s-dy) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1679 "pmullw %%mm4, %%mm0 \n\t" // src[0,0] * (s-dx)*(s-dy) |
3250 | 1680 "paddw %5, %%mm1 \n\t" |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1681 "paddw %%mm3, %%mm2 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1682 "paddw %%mm1, %%mm0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1683 "paddw %%mm2, %%mm0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1684 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1685 "psrlw %6, %%mm0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1686 "packuswb %%mm0, %%mm0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1687 "movd %%mm0, %0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1688 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1689 : "=m"(dst[x+y*stride]) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1690 : "m"(src[0]), "m"(src[1]), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1691 "m"(src[stride]), "m"(src[stride+1]), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1692 "m"(*r4), "m"(shift2) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1693 ); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1694 src += stride; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1695 } |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1696 src += 4-h*stride; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1697 } |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1698 } |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1699 |
3215
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1700 #define PREFETCH(name, op) \ |
4172 | 1701 static void name(void *mem, int stride, int h){\ |
3215
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1702 const uint8_t *p= mem;\ |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1703 do{\ |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1704 asm volatile(#op" %0" :: "m"(*p));\ |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1705 p+= stride;\ |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1706 }while(--h);\ |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1707 } |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1708 PREFETCH(prefetch_mmx2, prefetcht0) |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1709 PREFETCH(prefetch_3dnow, prefetch) |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1710 #undef PREFETCH |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1711 |
2754 | 1712 #include "h264dsp_mmx.c" |
2967 | 1713 |
6009 | 1714 /* CAVS specific */ |
3524 | 1715 void ff_cavsdsp_init_mmx2(DSPContext* c, AVCodecContext *avctx); |
6522
dfa76e0734e5
Add missed call to ff_cavsdsp_init_3dnow() in dsputil_init_mmx()
zuxy
parents:
6513
diff
changeset
|
1716 void ff_cavsdsp_init_3dnow(DSPContext* c, AVCodecContext *avctx); |
3524 | 1717 |
1718 void ff_put_cavs_qpel8_mc00_mmx2(uint8_t *dst, uint8_t *src, int stride) { | |
1719 put_pixels8_mmx(dst, src, stride, 8); | |
1720 } | |
1721 void ff_avg_cavs_qpel8_mc00_mmx2(uint8_t *dst, uint8_t *src, int stride) { | |
1722 avg_pixels8_mmx(dst, src, stride, 8); | |
1723 } | |
1724 void ff_put_cavs_qpel16_mc00_mmx2(uint8_t *dst, uint8_t *src, int stride) { | |
1725 put_pixels16_mmx(dst, src, stride, 16); | |
1726 } | |
1727 void ff_avg_cavs_qpel16_mc00_mmx2(uint8_t *dst, uint8_t *src, int stride) { | |
1728 avg_pixels16_mmx(dst, src, stride, 16); | |
1729 } | |
1730 | |
5948 | 1731 /* VC1 specific */ |
1732 void ff_vc1dsp_init_mmx(DSPContext* dsp, AVCodecContext *avctx); | |
1733 | |
1734 void ff_put_vc1_mspel_mc00_mmx(uint8_t *dst, const uint8_t *src, int stride, int rnd) { | |
1735 put_pixels8_mmx(dst, src, stride, 8); | |
1736 } | |
1737 | |
1092 | 1738 /* external functions, from idct_mmx.c */ |
1739 void ff_mmx_idct(DCTELEM *block); | |
1740 void ff_mmxext_idct(DCTELEM *block); | |
1741 | |
1742 /* XXX: those functions should be suppressed ASAP when all IDCTs are | |
1743 converted */ | |
4020
723818b5de0f
Put libmpeg2 IDCT functions under CONFIG_GPL, fixes link failure
diego
parents:
4001
diff
changeset
|
1744 #ifdef CONFIG_GPL |
1092 | 1745 static void ff_libmpeg2mmx_idct_put(uint8_t *dest, int line_size, DCTELEM *block) |
1746 { | |
1747 ff_mmx_idct (block); | |
1748 put_pixels_clamped_mmx(block, dest, line_size); | |
1749 } | |
1750 static void ff_libmpeg2mmx_idct_add(uint8_t *dest, int line_size, DCTELEM *block) | |
1751 { | |
1752 ff_mmx_idct (block); | |
1753 add_pixels_clamped_mmx(block, dest, line_size); | |
1754 } | |
1755 static void ff_libmpeg2mmx2_idct_put(uint8_t *dest, int line_size, DCTELEM *block) | |
1756 { | |
1757 ff_mmxext_idct (block); | |
1758 put_pixels_clamped_mmx(block, dest, line_size); | |
1759 } | |
1760 static void ff_libmpeg2mmx2_idct_add(uint8_t *dest, int line_size, DCTELEM *block) | |
1761 { | |
1762 ff_mmxext_idct (block); | |
1763 add_pixels_clamped_mmx(block, dest, line_size); | |
1764 } | |
4020
723818b5de0f
Put libmpeg2 IDCT functions under CONFIG_GPL, fixes link failure
diego
parents:
4001
diff
changeset
|
1765 #endif |
2868 | 1766 static void ff_idct_xvid_mmx_put(uint8_t *dest, int line_size, DCTELEM *block) |
1767 { | |
1768 ff_idct_xvid_mmx (block); | |
1769 put_pixels_clamped_mmx(block, dest, line_size); | |
1770 } | |
1771 static void ff_idct_xvid_mmx_add(uint8_t *dest, int line_size, DCTELEM *block) | |
1772 { | |
1773 ff_idct_xvid_mmx (block); | |
1774 add_pixels_clamped_mmx(block, dest, line_size); | |
1775 } | |
1776 static void ff_idct_xvid_mmx2_put(uint8_t *dest, int line_size, DCTELEM *block) | |
1777 { | |
1778 ff_idct_xvid_mmx2 (block); | |
1779 put_pixels_clamped_mmx(block, dest, line_size); | |
1780 } | |
1781 static void ff_idct_xvid_mmx2_add(uint8_t *dest, int line_size, DCTELEM *block) | |
1782 { | |
1783 ff_idct_xvid_mmx2 (block); | |
1784 add_pixels_clamped_mmx(block, dest, line_size); | |
1785 } | |
2967 | 1786 |
3541
3fbddeb13686
10l, vorbis_inverse_coupling_sse() was really 3dnow
lorenm
parents:
3536
diff
changeset
|
1787 static void vorbis_inverse_coupling_3dnow(float *mag, float *ang, int blocksize) |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1788 { |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1789 int i; |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1790 asm volatile("pxor %%mm7, %%mm7":); |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1791 for(i=0; i<blocksize; i+=2) { |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1792 asm volatile( |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1793 "movq %0, %%mm0 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1794 "movq %1, %%mm1 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1795 "movq %%mm0, %%mm2 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1796 "movq %%mm1, %%mm3 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1797 "pfcmpge %%mm7, %%mm2 \n\t" // m <= 0.0 |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1798 "pfcmpge %%mm7, %%mm3 \n\t" // a <= 0.0 |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1799 "pslld $31, %%mm2 \n\t" // keep only the sign bit |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1800 "pxor %%mm2, %%mm1 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1801 "movq %%mm3, %%mm4 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1802 "pand %%mm1, %%mm3 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1803 "pandn %%mm1, %%mm4 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1804 "pfadd %%mm0, %%mm3 \n\t" // a = m + ((a<0) & (a ^ sign(m))) |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1805 "pfsub %%mm4, %%mm0 \n\t" // m = m + ((a>0) & (a ^ sign(m))) |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1806 "movq %%mm3, %1 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1807 "movq %%mm0, %0 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1808 :"+m"(mag[i]), "+m"(ang[i]) |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1809 ::"memory" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1810 ); |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1811 } |
3561 | 1812 asm volatile("femms"); |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1813 } |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1814 static void vorbis_inverse_coupling_sse(float *mag, float *ang, int blocksize) |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1815 { |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1816 int i; |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1817 |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1818 asm volatile( |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1819 "movaps %0, %%xmm5 \n\t" |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1820 ::"m"(ff_pdw_80000000[0]) |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1821 ); |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1822 for(i=0; i<blocksize; i+=4) { |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1823 asm volatile( |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1824 "movaps %0, %%xmm0 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1825 "movaps %1, %%xmm1 \n\t" |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1826 "xorps %%xmm2, %%xmm2 \n\t" |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1827 "xorps %%xmm3, %%xmm3 \n\t" |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1828 "cmpleps %%xmm0, %%xmm2 \n\t" // m <= 0.0 |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1829 "cmpleps %%xmm1, %%xmm3 \n\t" // a <= 0.0 |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1830 "andps %%xmm5, %%xmm2 \n\t" // keep only the sign bit |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1831 "xorps %%xmm2, %%xmm1 \n\t" |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1832 "movaps %%xmm3, %%xmm4 \n\t" |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1833 "andps %%xmm1, %%xmm3 \n\t" |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1834 "andnps %%xmm1, %%xmm4 \n\t" |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1835 "addps %%xmm0, %%xmm3 \n\t" // a = m + ((a<0) & (a ^ sign(m))) |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1836 "subps %%xmm4, %%xmm0 \n\t" // m = m + ((a>0) & (a ^ sign(m))) |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1837 "movaps %%xmm3, %1 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1838 "movaps %%xmm0, %0 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1839 :"+m"(mag[i]), "+m"(ang[i]) |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1840 ::"memory" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1841 ); |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1842 } |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1843 } |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1844 |
7563 | 1845 #define IF1(x) x |
1846 #define IF0(x) | |
1847 | |
1848 #define MIX5(mono,stereo)\ | |
1849 asm volatile(\ | |
1850 "movss 0(%2), %%xmm5 \n"\ | |
1851 "movss 8(%2), %%xmm6 \n"\ | |
1852 "movss 24(%2), %%xmm7 \n"\ | |
1853 "shufps $0, %%xmm5, %%xmm5 \n"\ | |
1854 "shufps $0, %%xmm6, %%xmm6 \n"\ | |
1855 "shufps $0, %%xmm7, %%xmm7 \n"\ | |
1856 "1: \n"\ | |
1857 "movaps (%0,%1), %%xmm0 \n"\ | |
1858 "movaps 0x400(%0,%1), %%xmm1 \n"\ | |
1859 "movaps 0x800(%0,%1), %%xmm2 \n"\ | |
1860 "movaps 0xc00(%0,%1), %%xmm3 \n"\ | |
1861 "movaps 0x1000(%0,%1), %%xmm4 \n"\ | |
1862 "mulps %%xmm5, %%xmm0 \n"\ | |
1863 "mulps %%xmm6, %%xmm1 \n"\ | |
1864 "mulps %%xmm5, %%xmm2 \n"\ | |
1865 "mulps %%xmm7, %%xmm3 \n"\ | |
1866 "mulps %%xmm7, %%xmm4 \n"\ | |
1867 stereo("addps %%xmm1, %%xmm0 \n")\ | |
1868 "addps %%xmm1, %%xmm2 \n"\ | |
1869 "addps %%xmm3, %%xmm0 \n"\ | |
1870 "addps %%xmm4, %%xmm2 \n"\ | |
1871 mono("addps %%xmm2, %%xmm0 \n")\ | |
1872 "movaps %%xmm0, (%0,%1) \n"\ | |
1873 stereo("movaps %%xmm2, 0x400(%0,%1) \n")\ | |
1874 "add $16, %0 \n"\ | |
1875 "jl 1b \n"\ | |
1876 :"+&r"(i)\ | |
1877 :"r"(samples[0]+len), "r"(matrix)\ | |
1878 :"memory"\ | |
1879 ); | |
1880 | |
1881 #define MIX_MISC(stereo)\ | |
1882 asm volatile(\ | |
1883 "1: \n"\ | |
1884 "movaps (%3,%0), %%xmm0 \n"\ | |
1885 stereo("movaps %%xmm0, %%xmm1 \n")\ | |
1886 "mulps %%xmm6, %%xmm0 \n"\ | |
1887 stereo("mulps %%xmm7, %%xmm1 \n")\ | |
1888 "lea 1024(%3,%0), %1 \n"\ | |
1889 "mov %5, %2 \n"\ | |
1890 "2: \n"\ | |
1891 "movaps (%1), %%xmm2 \n"\ | |
1892 stereo("movaps %%xmm2, %%xmm3 \n")\ | |
1893 "mulps (%4,%2), %%xmm2 \n"\ | |
1894 stereo("mulps 16(%4,%2), %%xmm3 \n")\ | |
1895 "addps %%xmm2, %%xmm0 \n"\ | |
1896 stereo("addps %%xmm3, %%xmm1 \n")\ | |
1897 "add $1024, %1 \n"\ | |
1898 "add $32, %2 \n"\ | |
1899 "jl 2b \n"\ | |
1900 "movaps %%xmm0, (%3,%0) \n"\ | |
1901 stereo("movaps %%xmm1, 1024(%3,%0) \n")\ | |
1902 "add $16, %0 \n"\ | |
1903 "jl 1b \n"\ | |
1904 :"+&r"(i), "=&r"(j), "=&r"(k)\ | |
1905 :"r"(samples[0]+len), "r"(matrix_simd+in_ch), "g"((intptr_t)-32*(in_ch-1))\ | |
1906 :"memory"\ | |
1907 ); | |
1908 | |
1909 static void ac3_downmix_sse(float (*samples)[256], float (*matrix)[2], int out_ch, int in_ch, int len) | |
1910 { | |
1911 int (*matrix_cmp)[2] = (int(*)[2])matrix; | |
1912 intptr_t i,j,k; | |
1913 | |
1914 i = -len*sizeof(float); | |
1915 if(in_ch == 5 && out_ch == 2 && !(matrix_cmp[0][1]|matrix_cmp[2][0]|matrix_cmp[3][1]|matrix_cmp[4][0]|(matrix_cmp[1][0]^matrix_cmp[1][1])|(matrix_cmp[0][0]^matrix_cmp[2][1]))) { | |
1916 MIX5(IF0,IF1); | |
1917 } else if(in_ch == 5 && out_ch == 1 && matrix_cmp[0][0]==matrix_cmp[2][0] && matrix_cmp[3][0]==matrix_cmp[4][0]) { | |
1918 MIX5(IF1,IF0); | |
1919 } else { | |
1920 DECLARE_ALIGNED_16(float, matrix_simd[in_ch][2][4]); | |
1921 j = 2*in_ch*sizeof(float); | |
1922 asm volatile( | |
1923 "1: \n" | |
1924 "sub $8, %0 \n" | |
1925 "movss (%2,%0), %%xmm6 \n" | |
1926 "movss 4(%2,%0), %%xmm7 \n" | |
1927 "shufps $0, %%xmm6, %%xmm6 \n" | |
1928 "shufps $0, %%xmm7, %%xmm7 \n" | |
1929 "movaps %%xmm6, (%1,%0,4) \n" | |
1930 "movaps %%xmm7, 16(%1,%0,4) \n" | |
1931 "jg 1b \n" | |
1932 :"+&r"(j) | |
1933 :"r"(matrix_simd), "r"(matrix) | |
1934 :"memory" | |
1935 ); | |
1936 if(out_ch == 2) { | |
1937 MIX_MISC(IF1); | |
1938 } else { | |
1939 MIX_MISC(IF0); | |
1940 } | |
1941 } | |
1942 } | |
1943 | |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1944 static void vector_fmul_3dnow(float *dst, const float *src, int len){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1945 x86_reg i = (len-4)*4; |
3574 | 1946 asm volatile( |
1947 "1: \n\t" | |
1948 "movq (%1,%0), %%mm0 \n\t" | |
1949 "movq 8(%1,%0), %%mm1 \n\t" | |
1950 "pfmul (%2,%0), %%mm0 \n\t" | |
1951 "pfmul 8(%2,%0), %%mm1 \n\t" | |
1952 "movq %%mm0, (%1,%0) \n\t" | |
1953 "movq %%mm1, 8(%1,%0) \n\t" | |
1954 "sub $16, %0 \n\t" | |
1955 "jge 1b \n\t" | |
1956 "femms \n\t" | |
1957 :"+r"(i) | |
1958 :"r"(dst), "r"(src) | |
1959 :"memory" | |
1960 ); | |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1961 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1962 static void vector_fmul_sse(float *dst, const float *src, int len){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1963 x86_reg i = (len-8)*4; |
3574 | 1964 asm volatile( |
1965 "1: \n\t" | |
1966 "movaps (%1,%0), %%xmm0 \n\t" | |
1967 "movaps 16(%1,%0), %%xmm1 \n\t" | |
1968 "mulps (%2,%0), %%xmm0 \n\t" | |
1969 "mulps 16(%2,%0), %%xmm1 \n\t" | |
1970 "movaps %%xmm0, (%1,%0) \n\t" | |
1971 "movaps %%xmm1, 16(%1,%0) \n\t" | |
1972 "sub $32, %0 \n\t" | |
1973 "jge 1b \n\t" | |
1974 :"+r"(i) | |
1975 :"r"(dst), "r"(src) | |
1976 :"memory" | |
1977 ); | |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1978 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1979 |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1980 static void vector_fmul_reverse_3dnow2(float *dst, const float *src0, const float *src1, int len){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1981 x86_reg i = len*4-16; |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1982 asm volatile( |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1983 "1: \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1984 "pswapd 8(%1), %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1985 "pswapd (%1), %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1986 "pfmul (%3,%0), %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1987 "pfmul 8(%3,%0), %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1988 "movq %%mm0, (%2,%0) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1989 "movq %%mm1, 8(%2,%0) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1990 "add $16, %1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1991 "sub $16, %0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1992 "jge 1b \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1993 :"+r"(i), "+r"(src1) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1994 :"r"(dst), "r"(src0) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1995 ); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1996 asm volatile("femms"); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1997 } |
3569
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1998 static void vector_fmul_reverse_sse(float *dst, const float *src0, const float *src1, int len){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1999 x86_reg i = len*4-32; |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2000 asm volatile( |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2001 "1: \n\t" |
3569
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2002 "movaps 16(%1), %%xmm0 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2003 "movaps (%1), %%xmm1 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2004 "shufps $0x1b, %%xmm0, %%xmm0 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2005 "shufps $0x1b, %%xmm1, %%xmm1 \n\t" |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2006 "mulps (%3,%0), %%xmm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2007 "mulps 16(%3,%0), %%xmm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2008 "movaps %%xmm0, (%2,%0) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2009 "movaps %%xmm1, 16(%2,%0) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2010 "add $32, %1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2011 "sub $32, %0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2012 "jge 1b \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2013 :"+r"(i), "+r"(src1) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2014 :"r"(dst), "r"(src0) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2015 ); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2016 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2017 |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2018 static void vector_fmul_add_add_3dnow(float *dst, const float *src0, const float *src1, |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2019 const float *src2, int src3, int len, int step){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
2020 x86_reg i = (len-4)*4; |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2021 if(step == 2 && src3 == 0){ |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2022 dst += (len-4)*2; |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2023 asm volatile( |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2024 "1: \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2025 "movq (%2,%0), %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2026 "movq 8(%2,%0), %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2027 "pfmul (%3,%0), %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2028 "pfmul 8(%3,%0), %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2029 "pfadd (%4,%0), %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2030 "pfadd 8(%4,%0), %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2031 "movd %%mm0, (%1) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2032 "movd %%mm1, 16(%1) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2033 "psrlq $32, %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2034 "psrlq $32, %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2035 "movd %%mm0, 8(%1) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2036 "movd %%mm1, 24(%1) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2037 "sub $32, %1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2038 "sub $16, %0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2039 "jge 1b \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2040 :"+r"(i), "+r"(dst) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2041 :"r"(src0), "r"(src1), "r"(src2) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2042 :"memory" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2043 ); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2044 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2045 else if(step == 1 && src3 == 0){ |
3574 | 2046 asm volatile( |
2047 "1: \n\t" | |
2048 "movq (%2,%0), %%mm0 \n\t" | |
2049 "movq 8(%2,%0), %%mm1 \n\t" | |
2050 "pfmul (%3,%0), %%mm0 \n\t" | |
2051 "pfmul 8(%3,%0), %%mm1 \n\t" | |
2052 "pfadd (%4,%0), %%mm0 \n\t" | |
2053 "pfadd 8(%4,%0), %%mm1 \n\t" | |
2054 "movq %%mm0, (%1,%0) \n\t" | |
2055 "movq %%mm1, 8(%1,%0) \n\t" | |
2056 "sub $16, %0 \n\t" | |
2057 "jge 1b \n\t" | |
2058 :"+r"(i) | |
2059 :"r"(dst), "r"(src0), "r"(src1), "r"(src2) | |
2060 :"memory" | |
2061 ); | |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2062 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2063 else |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2064 ff_vector_fmul_add_add_c(dst, src0, src1, src2, src3, len, step); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2065 asm volatile("femms"); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2066 } |
3569
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2067 static void vector_fmul_add_add_sse(float *dst, const float *src0, const float *src1, |
3574 | 2068 const float *src2, int src3, int len, int step){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
2069 x86_reg i = (len-8)*4; |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2070 if(step == 2 && src3 == 0){ |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2071 dst += (len-8)*2; |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2072 asm volatile( |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2073 "1: \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2074 "movaps (%2,%0), %%xmm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2075 "movaps 16(%2,%0), %%xmm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2076 "mulps (%3,%0), %%xmm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2077 "mulps 16(%3,%0), %%xmm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2078 "addps (%4,%0), %%xmm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2079 "addps 16(%4,%0), %%xmm1 \n\t" |
3569
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2080 "movss %%xmm0, (%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2081 "movss %%xmm1, 32(%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2082 "movhlps %%xmm0, %%xmm2 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2083 "movhlps %%xmm1, %%xmm3 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2084 "movss %%xmm2, 16(%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2085 "movss %%xmm3, 48(%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2086 "shufps $0xb1, %%xmm0, %%xmm0 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2087 "shufps $0xb1, %%xmm1, %%xmm1 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2088 "movss %%xmm0, 8(%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2089 "movss %%xmm1, 40(%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2090 "movhlps %%xmm0, %%xmm2 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2091 "movhlps %%xmm1, %%xmm3 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2092 "movss %%xmm2, 24(%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2093 "movss %%xmm3, 56(%1) \n\t" |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2094 "sub $64, %1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2095 "sub $32, %0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2096 "jge 1b \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2097 :"+r"(i), "+r"(dst) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2098 :"r"(src0), "r"(src1), "r"(src2) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2099 :"memory" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2100 ); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2101 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2102 else if(step == 1 && src3 == 0){ |
3574 | 2103 asm volatile( |
2104 "1: \n\t" | |
2105 "movaps (%2,%0), %%xmm0 \n\t" | |
2106 "movaps 16(%2,%0), %%xmm1 \n\t" | |
2107 "mulps (%3,%0), %%xmm0 \n\t" | |
2108 "mulps 16(%3,%0), %%xmm1 \n\t" | |
2109 "addps (%4,%0), %%xmm0 \n\t" | |
2110 "addps 16(%4,%0), %%xmm1 \n\t" | |
2111 "movaps %%xmm0, (%1,%0) \n\t" | |
2112 "movaps %%xmm1, 16(%1,%0) \n\t" | |
2113 "sub $32, %0 \n\t" | |
2114 "jge 1b \n\t" | |
2115 :"+r"(i) | |
2116 :"r"(dst), "r"(src0), "r"(src1), "r"(src2) | |
2117 :"memory" | |
2118 ); | |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2119 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2120 else |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2121 ff_vector_fmul_add_add_c(dst, src0, src1, src2, src3, len, step); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2122 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2123 |
7263 | 2124 static void vector_fmul_window_3dnow2(float *dst, const float *src0, const float *src1, |
2125 const float *win, float add_bias, int len){ | |
2126 #ifdef HAVE_6REGS | |
2127 if(add_bias == 0){ | |
2128 x86_reg i = -len*4; | |
2129 x86_reg j = len*4-8; | |
2130 asm volatile( | |
2131 "1: \n" | |
2132 "pswapd (%5,%1), %%mm1 \n" | |
2133 "movq (%5,%0), %%mm0 \n" | |
2134 "pswapd (%4,%1), %%mm5 \n" | |
2135 "movq (%3,%0), %%mm4 \n" | |
2136 "movq %%mm0, %%mm2 \n" | |
2137 "movq %%mm1, %%mm3 \n" | |
2138 "pfmul %%mm4, %%mm2 \n" // src0[len+i]*win[len+i] | |
2139 "pfmul %%mm5, %%mm3 \n" // src1[ j]*win[len+j] | |
2140 "pfmul %%mm4, %%mm1 \n" // src0[len+i]*win[len+j] | |
2141 "pfmul %%mm5, %%mm0 \n" // src1[ j]*win[len+i] | |
2142 "pfadd %%mm3, %%mm2 \n" | |
2143 "pfsub %%mm0, %%mm1 \n" | |
2144 "pswapd %%mm2, %%mm2 \n" | |
2145 "movq %%mm1, (%2,%0) \n" | |
2146 "movq %%mm2, (%2,%1) \n" | |
2147 "sub $8, %1 \n" | |
2148 "add $8, %0 \n" | |
2149 "jl 1b \n" | |
2150 "femms \n" | |
2151 :"+r"(i), "+r"(j) | |
2152 :"r"(dst+len), "r"(src0+len), "r"(src1), "r"(win+len) | |
2153 ); | |
2154 }else | |
2155 #endif | |
2156 ff_vector_fmul_window_c(dst, src0, src1, win, add_bias, len); | |
2157 } | |
2158 | |
7261 | 2159 static void vector_fmul_window_sse(float *dst, const float *src0, const float *src1, |
2160 const float *win, float add_bias, int len){ | |
2161 #ifdef HAVE_6REGS | |
2162 if(add_bias == 0){ | |
7263 | 2163 x86_reg i = -len*4; |
2164 x86_reg j = len*4-16; | |
7261 | 2165 asm volatile( |
2166 "1: \n" | |
7263 | 2167 "movaps (%5,%1), %%xmm1 \n" |
7261 | 2168 "movaps (%5,%0), %%xmm0 \n" |
7263 | 2169 "movaps (%4,%1), %%xmm5 \n" |
2170 "movaps (%3,%0), %%xmm4 \n" | |
2171 "shufps $0x1b, %%xmm1, %%xmm1 \n" | |
2172 "shufps $0x1b, %%xmm5, %%xmm5 \n" | |
7261 | 2173 "movaps %%xmm0, %%xmm2 \n" |
2174 "movaps %%xmm1, %%xmm3 \n" | |
7263 | 2175 "mulps %%xmm4, %%xmm2 \n" // src0[len+i]*win[len+i] |
2176 "mulps %%xmm5, %%xmm3 \n" // src1[ j]*win[len+j] | |
2177 "mulps %%xmm4, %%xmm1 \n" // src0[len+i]*win[len+j] | |
2178 "mulps %%xmm5, %%xmm0 \n" // src1[ j]*win[len+i] | |
2179 "addps %%xmm3, %%xmm2 \n" | |
2180 "subps %%xmm0, %%xmm1 \n" | |
7261 | 2181 "shufps $0x1b, %%xmm2, %%xmm2 \n" |
7263 | 2182 "movaps %%xmm1, (%2,%0) \n" |
2183 "movaps %%xmm2, (%2,%1) \n" | |
7261 | 2184 "sub $16, %1 \n" |
2185 "add $16, %0 \n" | |
2186 "jl 1b \n" | |
2187 :"+r"(i), "+r"(j) | |
7263 | 2188 :"r"(dst+len), "r"(src0+len), "r"(src1), "r"(win+len) |
7261 | 2189 ); |
2190 }else | |
2191 #endif | |
2192 ff_vector_fmul_window_c(dst, src0, src1, win, add_bias, len); | |
2193 } | |
2194 | |
7564 | 2195 static void int32_to_float_fmul_scalar_sse(float *dst, const int *src, float mul, int len) |
2196 { | |
2197 x86_reg i = -4*len; | |
2198 asm volatile( | |
2199 "movss %3, %%xmm4 \n" | |
2200 "shufps $0, %%xmm4, %%xmm4 \n" | |
2201 "1: \n" | |
2202 "cvtpi2ps (%2,%0), %%xmm0 \n" | |
2203 "cvtpi2ps 8(%2,%0), %%xmm1 \n" | |
2204 "cvtpi2ps 16(%2,%0), %%xmm2 \n" | |
2205 "cvtpi2ps 24(%2,%0), %%xmm3 \n" | |
2206 "movlhps %%xmm1, %%xmm0 \n" | |
2207 "movlhps %%xmm3, %%xmm2 \n" | |
2208 "mulps %%xmm4, %%xmm0 \n" | |
2209 "mulps %%xmm4, %%xmm2 \n" | |
2210 "movaps %%xmm0, (%1,%0) \n" | |
2211 "movaps %%xmm2, 16(%1,%0) \n" | |
2212 "add $32, %0 \n" | |
2213 "jl 1b \n" | |
2214 :"+r"(i) | |
7567
75841957d08b
gcc chokes on xmm constraints, so pessimize int32_to_float_fmul_scalar_sse a little
lorenm
parents:
7565
diff
changeset
|
2215 :"r"(dst+len), "r"(src+len), "m"(mul) |
7564 | 2216 ); |
2217 } | |
2218 | |
2219 static void int32_to_float_fmul_scalar_sse2(float *dst, const int *src, float mul, int len) | |
2220 { | |
2221 x86_reg i = -4*len; | |
2222 asm volatile( | |
2223 "movss %3, %%xmm4 \n" | |
2224 "shufps $0, %%xmm4, %%xmm4 \n" | |
2225 "1: \n" | |
2226 "cvtdq2ps (%2,%0), %%xmm0 \n" | |
2227 "cvtdq2ps 16(%2,%0), %%xmm1 \n" | |
2228 "mulps %%xmm4, %%xmm0 \n" | |
2229 "mulps %%xmm4, %%xmm1 \n" | |
2230 "movaps %%xmm0, (%1,%0) \n" | |
2231 "movaps %%xmm1, 16(%1,%0) \n" | |
2232 "add $32, %0 \n" | |
2233 "jl 1b \n" | |
2234 :"+r"(i) | |
7567
75841957d08b
gcc chokes on xmm constraints, so pessimize int32_to_float_fmul_scalar_sse a little
lorenm
parents:
7565
diff
changeset
|
2235 :"r"(dst+len), "r"(src+len), "m"(mul) |
7564 | 2236 ); |
2237 } | |
2238 | |
7218 | 2239 static void float_to_int16_3dnow(int16_t *dst, const float *src, long len){ |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2240 // not bit-exact: pf2id uses different rounding than C and SSE |
7217
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2241 asm volatile( |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2242 "add %0 , %0 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2243 "lea (%2,%0,2) , %2 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2244 "add %0 , %1 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2245 "neg %0 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2246 "1: \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2247 "pf2id (%2,%0,2) , %%mm0 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2248 "pf2id 8(%2,%0,2) , %%mm1 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2249 "pf2id 16(%2,%0,2) , %%mm2 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2250 "pf2id 24(%2,%0,2) , %%mm3 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2251 "packssdw %%mm1 , %%mm0 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2252 "packssdw %%mm3 , %%mm2 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2253 "movq %%mm0 , (%1,%0) \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2254 "movq %%mm2 , 8(%1,%0) \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2255 "add $16 , %0 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2256 " js 1b \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2257 "femms \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2258 :"+r"(len), "+r"(dst), "+r"(src) |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2259 ); |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2260 } |
7218 | 2261 static void float_to_int16_sse(int16_t *dst, const float *src, long len){ |
7219
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2262 asm volatile( |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2263 "add %0 , %0 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2264 "lea (%2,%0,2) , %2 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2265 "add %0 , %1 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2266 "neg %0 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2267 "1: \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2268 "cvtps2pi (%2,%0,2) , %%mm0 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2269 "cvtps2pi 8(%2,%0,2) , %%mm1 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2270 "cvtps2pi 16(%2,%0,2) , %%mm2 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2271 "cvtps2pi 24(%2,%0,2) , %%mm3 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2272 "packssdw %%mm1 , %%mm0 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2273 "packssdw %%mm3 , %%mm2 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2274 "movq %%mm0 , (%1,%0) \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2275 "movq %%mm2 , 8(%1,%0) \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2276 "add $16 , %0 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2277 " js 1b \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2278 "emms \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2279 :"+r"(len), "+r"(dst), "+r"(src) |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2280 ); |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2281 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2282 |
7226 | 2283 static void float_to_int16_sse2(int16_t *dst, const float *src, long len){ |
2284 asm volatile( | |
2285 "add %0 , %0 \n\t" | |
2286 "lea (%2,%0,2) , %2 \n\t" | |
2287 "add %0 , %1 \n\t" | |
2288 "neg %0 \n\t" | |
2289 "1: \n\t" | |
2290 "cvtps2dq (%2,%0,2) , %%xmm0 \n\t" | |
2291 "cvtps2dq 16(%2,%0,2) , %%xmm1 \n\t" | |
2292 "packssdw %%xmm1 , %%xmm0 \n\t" | |
2293 "movdqa %%xmm0 , (%1,%0) \n\t" | |
2294 "add $16 , %0 \n\t" | |
2295 " js 1b \n\t" | |
2296 :"+r"(len), "+r"(dst), "+r"(src) | |
2297 ); | |
2298 } | |
2299 | |
7568
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2300 #ifdef HAVE_YASM |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2301 void ff_float_to_int16_interleave6_sse(int16_t *dst, const float **src, int len); |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2302 void ff_float_to_int16_interleave6_3dnow(int16_t *dst, const float **src, int len); |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2303 void ff_float_to_int16_interleave6_3dn2(int16_t *dst, const float **src, int len); |
7565
474c7ae4b431
special case 6 channel version of float_to_int16_interleave
lorenm
parents:
7564
diff
changeset
|
2304 #else |
7568
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2305 #define ff_float_to_int16_interleave6_sse(a,b,c) float_to_int16_interleave_misc_sse(a,b,c,6) |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2306 #define ff_float_to_int16_interleave6_3dnow(a,b,c) float_to_int16_interleave_misc_3dnow(a,b,c,6) |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2307 #define ff_float_to_int16_interleave6_3dn2(a,b,c) float_to_int16_interleave_misc_3dnow(a,b,c,6) |
7565
474c7ae4b431
special case 6 channel version of float_to_int16_interleave
lorenm
parents:
7564
diff
changeset
|
2308 #endif |
7568
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2309 #define ff_float_to_int16_interleave6_sse2 ff_float_to_int16_interleave6_sse |
7565
474c7ae4b431
special case 6 channel version of float_to_int16_interleave
lorenm
parents:
7564
diff
changeset
|
2310 |
7261 | 2311 #define FLOAT_TO_INT16_INTERLEAVE(cpu, body) \ |
2312 /* gcc pessimizes register allocation if this is in the same function as float_to_int16_interleave_sse2*/\ | |
7565
474c7ae4b431
special case 6 channel version of float_to_int16_interleave
lorenm
parents:
7564
diff
changeset
|
2313 static av_noinline void float_to_int16_interleave_misc_##cpu(int16_t *dst, const float **src, long len, int channels){\ |
7286
e267f2519248
float_to_int16_interleave: change src to an array of pointers instead of assuming it's contiguous.
lorenm
parents:
7278
diff
changeset
|
2314 DECLARE_ALIGNED_16(int16_t, tmp[len]);\ |
7261 | 2315 int i,j,c;\ |
2316 for(c=0; c<channels; c++){\ | |
7286
e267f2519248
float_to_int16_interleave: change src to an array of pointers instead of assuming it's contiguous.
lorenm
parents:
7278
diff
changeset
|
2317 float_to_int16_##cpu(tmp, src[c], len);\ |
7261 | 2318 for(i=0, j=c; i<len; i++, j+=channels)\ |
7286
e267f2519248
float_to_int16_interleave: change src to an array of pointers instead of assuming it's contiguous.
lorenm
parents:
7278
diff
changeset
|
2319 dst[j] = tmp[i];\ |
7261 | 2320 }\ |
2321 }\ | |
2322 \ | |
7286
e267f2519248
float_to_int16_interleave: change src to an array of pointers instead of assuming it's contiguous.
lorenm
parents:
7278
diff
changeset
|
2323 static void float_to_int16_interleave_##cpu(int16_t *dst, const float **src, long len, int channels){\ |
7261 | 2324 if(channels==1)\ |
7286
e267f2519248
float_to_int16_interleave: change src to an array of pointers instead of assuming it's contiguous.
lorenm
parents:
7278
diff
changeset
|
2325 float_to_int16_##cpu(dst, src[0], len);\ |
7565
474c7ae4b431
special case 6 channel version of float_to_int16_interleave
lorenm
parents:
7564
diff
changeset
|
2326 else if(channels==2){\ |
7286
e267f2519248
float_to_int16_interleave: change src to an array of pointers instead of assuming it's contiguous.
lorenm
parents:
7278
diff
changeset
|
2327 const float *src0 = src[0];\ |
e267f2519248
float_to_int16_interleave: change src to an array of pointers instead of assuming it's contiguous.
lorenm
parents:
7278
diff
changeset
|
2328 const float *src1 = src[1];\ |
7261 | 2329 asm volatile(\ |
2330 "shl $2, %0 \n"\ | |
2331 "add %0, %1 \n"\ | |
2332 "add %0, %2 \n"\ | |
7286
e267f2519248
float_to_int16_interleave: change src to an array of pointers instead of assuming it's contiguous.
lorenm
parents:
7278
diff
changeset
|
2333 "add %0, %3 \n"\ |
7261 | 2334 "neg %0 \n"\ |
2335 body\ | |
7286
e267f2519248
float_to_int16_interleave: change src to an array of pointers instead of assuming it's contiguous.
lorenm
parents:
7278
diff
changeset
|
2336 :"+r"(len), "+r"(dst), "+r"(src0), "+r"(src1)\ |
7261 | 2337 );\ |
7565
474c7ae4b431
special case 6 channel version of float_to_int16_interleave
lorenm
parents:
7564
diff
changeset
|
2338 }else if(channels==6){\ |
7568
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2339 ff_float_to_int16_interleave6_##cpu(dst, src, len);\ |
7565
474c7ae4b431
special case 6 channel version of float_to_int16_interleave
lorenm
parents:
7564
diff
changeset
|
2340 }else\ |
474c7ae4b431
special case 6 channel version of float_to_int16_interleave
lorenm
parents:
7564
diff
changeset
|
2341 float_to_int16_interleave_misc_##cpu(dst, src, len, channels);\ |
7261 | 2342 } |
2343 | |
2344 FLOAT_TO_INT16_INTERLEAVE(3dnow, | |
2345 "1: \n" | |
2346 "pf2id (%2,%0), %%mm0 \n" | |
2347 "pf2id 8(%2,%0), %%mm1 \n" | |
2348 "pf2id (%3,%0), %%mm2 \n" | |
2349 "pf2id 8(%3,%0), %%mm3 \n" | |
2350 "packssdw %%mm1, %%mm0 \n" | |
2351 "packssdw %%mm3, %%mm2 \n" | |
2352 "movq %%mm0, %%mm1 \n" | |
2353 "punpcklwd %%mm2, %%mm0 \n" | |
2354 "punpckhwd %%mm2, %%mm1 \n" | |
2355 "movq %%mm0, (%1,%0)\n" | |
7278
6c140c15ee8c
10l, float_to_int16_interleave_sse/3dnow wrote the wrong samples
lorenm
parents:
7263
diff
changeset
|
2356 "movq %%mm1, 8(%1,%0)\n" |
7261 | 2357 "add $16, %0 \n" |
2358 "js 1b \n" | |
2359 "femms \n" | |
2360 ) | |
2361 | |
2362 FLOAT_TO_INT16_INTERLEAVE(sse, | |
2363 "1: \n" | |
2364 "cvtps2pi (%2,%0), %%mm0 \n" | |
2365 "cvtps2pi 8(%2,%0), %%mm1 \n" | |
2366 "cvtps2pi (%3,%0), %%mm2 \n" | |
2367 "cvtps2pi 8(%3,%0), %%mm3 \n" | |
2368 "packssdw %%mm1, %%mm0 \n" | |
2369 "packssdw %%mm3, %%mm2 \n" | |
2370 "movq %%mm0, %%mm1 \n" | |
2371 "punpcklwd %%mm2, %%mm0 \n" | |
2372 "punpckhwd %%mm2, %%mm1 \n" | |
2373 "movq %%mm0, (%1,%0)\n" | |
7278
6c140c15ee8c
10l, float_to_int16_interleave_sse/3dnow wrote the wrong samples
lorenm
parents:
7263
diff
changeset
|
2374 "movq %%mm1, 8(%1,%0)\n" |
7261 | 2375 "add $16, %0 \n" |
2376 "js 1b \n" | |
2377 "emms \n" | |
2378 ) | |
2379 | |
2380 FLOAT_TO_INT16_INTERLEAVE(sse2, | |
2381 "1: \n" | |
2382 "cvtps2dq (%2,%0), %%xmm0 \n" | |
2383 "cvtps2dq (%3,%0), %%xmm1 \n" | |
2384 "packssdw %%xmm1, %%xmm0 \n" | |
2385 "movhlps %%xmm0, %%xmm1 \n" | |
2386 "punpcklwd %%xmm1, %%xmm0 \n" | |
2387 "movdqa %%xmm0, (%1,%0) \n" | |
2388 "add $16, %0 \n" | |
2389 "js 1b \n" | |
2390 ) | |
2391 | |
7568
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2392 static void float_to_int16_interleave_3dn2(int16_t *dst, const float **src, long len, int channels){ |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2393 if(channels==6) |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2394 ff_float_to_int16_interleave6_3dn2(dst, src, len); |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2395 else |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2396 float_to_int16_interleave_3dnow(dst, src, len, channels); |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2397 } |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2398 |
7261 | 2399 |
6195
5f704e9cb518
fix prototypes, remove warning: i386/dsputil_mmx.c:3594: warning: assignment from incompatible pointer type
bcoudurier
parents:
6181
diff
changeset
|
2400 extern void ff_snow_horizontal_compose97i_sse2(IDWTELEM *b, int width); |
5f704e9cb518
fix prototypes, remove warning: i386/dsputil_mmx.c:3594: warning: assignment from incompatible pointer type
bcoudurier
parents:
6181
diff
changeset
|
2401 extern void ff_snow_horizontal_compose97i_mmx(IDWTELEM *b, int width); |
5f704e9cb518
fix prototypes, remove warning: i386/dsputil_mmx.c:3594: warning: assignment from incompatible pointer type
bcoudurier
parents:
6181
diff
changeset
|
2402 extern void ff_snow_vertical_compose97i_sse2(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, IDWTELEM *b3, IDWTELEM *b4, IDWTELEM *b5, int width); |
5f704e9cb518
fix prototypes, remove warning: i386/dsputil_mmx.c:3594: warning: assignment from incompatible pointer type
bcoudurier
parents:
6181
diff
changeset
|
2403 extern void ff_snow_vertical_compose97i_mmx(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, IDWTELEM *b3, IDWTELEM *b4, IDWTELEM *b5, int width); |
4436
d3e389536b0a
Add the const specifier as needed to reduce the number of warnings.
takis
parents:
4197
diff
changeset
|
2404 extern void ff_snow_inner_add_yblock_sse2(const uint8_t *obmc, const int obmc_stride, uint8_t * * block, int b_w, int b_h, |
3211
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents:
3210
diff
changeset
|
2405 int src_x, int src_y, int src_stride, slice_buffer * sb, int add, uint8_t * dst8); |
4436
d3e389536b0a
Add the const specifier as needed to reduce the number of warnings.
takis
parents:
4197
diff
changeset
|
2406 extern void ff_snow_inner_add_yblock_mmx(const uint8_t *obmc, const int obmc_stride, uint8_t * * block, int b_w, int b_h, |
3211
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents:
3210
diff
changeset
|
2407 int src_x, int src_y, int src_stride, slice_buffer * sb, int add, uint8_t * dst8); |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2408 |
7238
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2409 |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2410 static void add_int16_sse2(int16_t * v1, int16_t * v2, int order) |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2411 { |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2412 x86_reg o = -(order << 1); |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2413 v1 += order; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2414 v2 += order; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2415 asm volatile( |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2416 "1: \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2417 "movdqu (%1,%2), %%xmm0 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2418 "movdqu 16(%1,%2), %%xmm1 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2419 "paddw (%0,%2), %%xmm0 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2420 "paddw 16(%0,%2), %%xmm1 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2421 "movdqa %%xmm0, (%0,%2) \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2422 "movdqa %%xmm1, 16(%0,%2) \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2423 "add $32, %2 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2424 "js 1b \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2425 : "+r"(v1), "+r"(v2), "+r"(o) |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2426 ); |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2427 } |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2428 |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2429 static void sub_int16_sse2(int16_t * v1, int16_t * v2, int order) |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2430 { |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2431 x86_reg o = -(order << 1); |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2432 v1 += order; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2433 v2 += order; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2434 asm volatile( |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2435 "1: \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2436 "movdqa (%0,%2), %%xmm0 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2437 "movdqa 16(%0,%2), %%xmm2 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2438 "movdqu (%1,%2), %%xmm1 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2439 "movdqu 16(%1,%2), %%xmm3 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2440 "psubw %%xmm1, %%xmm0 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2441 "psubw %%xmm3, %%xmm2 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2442 "movdqa %%xmm0, (%0,%2) \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2443 "movdqa %%xmm2, 16(%0,%2) \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2444 "add $32, %2 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2445 "js 1b \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2446 : "+r"(v1), "+r"(v2), "+r"(o) |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2447 ); |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2448 } |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2449 |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2450 static int32_t scalarproduct_int16_sse2(int16_t * v1, int16_t * v2, int order, int shift) |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2451 { |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2452 int res = 0; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2453 DECLARE_ALIGNED_16(int64_t, sh); |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2454 x86_reg o = -(order << 1); |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2455 |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2456 v1 += order; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2457 v2 += order; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2458 sh = shift; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2459 asm volatile( |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2460 "pxor %%xmm7, %%xmm7 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2461 "1: \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2462 "movdqu (%0,%3), %%xmm0 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2463 "movdqu 16(%0,%3), %%xmm1 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2464 "pmaddwd (%1,%3), %%xmm0 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2465 "pmaddwd 16(%1,%3), %%xmm1 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2466 "paddd %%xmm0, %%xmm7 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2467 "paddd %%xmm1, %%xmm7 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2468 "add $32, %3 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2469 "js 1b \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2470 "movhlps %%xmm7, %%xmm2 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2471 "paddd %%xmm2, %%xmm7 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2472 "psrad %4, %%xmm7 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2473 "pshuflw $0x4E, %%xmm7,%%xmm2 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2474 "paddd %%xmm2, %%xmm7 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2475 "movd %%xmm7, %2 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2476 : "+r"(v1), "+r"(v2), "=r"(res), "+r"(o) |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2477 : "m"(sh) |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2478 ); |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2479 return res; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2480 } |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2481 |
1092 | 2482 void dsputil_init_mmx(DSPContext* c, AVCodecContext *avctx) |
0 | 2483 { |
4197 | 2484 mm_flags = mm_support(); |
1115 | 2485 |
1122 | 2486 if (avctx->dsp_mask) { |
2979 | 2487 if (avctx->dsp_mask & FF_MM_FORCE) |
4197 | 2488 mm_flags |= (avctx->dsp_mask & 0xffff); |
2979 | 2489 else |
4197 | 2490 mm_flags &= ~(avctx->dsp_mask & 0xffff); |
1122 | 2491 } |
1115 | 2492 |
631
47a8964ba5cd
be less verbose patch by (Lennert Buytenhek <buytenh at math dot leidenuniv dot nl>)
michaelni
parents:
629
diff
changeset
|
2493 #if 0 |
1868 | 2494 av_log(avctx, AV_LOG_INFO, "libavcodec: CPU flags:"); |
4197 | 2495 if (mm_flags & MM_MMX) |
1868 | 2496 av_log(avctx, AV_LOG_INFO, " mmx"); |
4197 | 2497 if (mm_flags & MM_MMXEXT) |
1868 | 2498 av_log(avctx, AV_LOG_INFO, " mmxext"); |
4197 | 2499 if (mm_flags & MM_3DNOW) |
1868 | 2500 av_log(avctx, AV_LOG_INFO, " 3dnow"); |
4197 | 2501 if (mm_flags & MM_SSE) |
1868 | 2502 av_log(avctx, AV_LOG_INFO, " sse"); |
4197 | 2503 if (mm_flags & MM_SSE2) |
1868 | 2504 av_log(avctx, AV_LOG_INFO, " sse2"); |
2505 av_log(avctx, AV_LOG_INFO, "\n"); | |
0 | 2506 #endif |
2507 | |
4197 | 2508 if (mm_flags & MM_MMX) { |
1092 | 2509 const int idct_algo= avctx->idct_algo; |
2510 | |
2256 | 2511 if(avctx->lowres==0){ |
2512 if(idct_algo==FF_IDCT_AUTO || idct_algo==FF_IDCT_SIMPLEMMX){ | |
2513 c->idct_put= ff_simple_idct_put_mmx; | |
2514 c->idct_add= ff_simple_idct_add_mmx; | |
2515 c->idct = ff_simple_idct_mmx; | |
2516 c->idct_permutation_type= FF_SIMPLE_IDCT_PERM; | |
3717
ea9fe1c9d126
Remove the LGPL exception clause as discussed on ffmpeg-devel
diego
parents:
3712
diff
changeset
|
2517 #ifdef CONFIG_GPL |
2256 | 2518 }else if(idct_algo==FF_IDCT_LIBMPEG2MMX){ |
4197 | 2519 if(mm_flags & MM_MMXEXT){ |
2256 | 2520 c->idct_put= ff_libmpeg2mmx2_idct_put; |
2521 c->idct_add= ff_libmpeg2mmx2_idct_add; | |
2522 c->idct = ff_mmxext_idct; | |
2523 }else{ | |
2524 c->idct_put= ff_libmpeg2mmx_idct_put; | |
2525 c->idct_add= ff_libmpeg2mmx_idct_add; | |
2526 c->idct = ff_mmx_idct; | |
2527 } | |
2528 c->idct_permutation_type= FF_LIBMPEG2_IDCT_PERM; | |
3717
ea9fe1c9d126
Remove the LGPL exception clause as discussed on ffmpeg-devel
diego
parents:
3712
diff
changeset
|
2529 #endif |
5007 | 2530 }else if((ENABLE_VP3_DECODER || ENABLE_VP5_DECODER || ENABLE_VP6_DECODER) && |
2531 idct_algo==FF_IDCT_VP3 && | |
3721
2000e401593d
disable vp3 mmx idct for theora files to avoid artifacts
aurel
parents:
3717
diff
changeset
|
2532 avctx->codec->id!=CODEC_ID_THEORA && |
3712
f7f75f718efb
Enables back the mmx/sse optimized version of the vp3 idct.
aurel
parents:
3666
diff
changeset
|
2533 !(avctx->flags & CODEC_FLAG_BITEXACT)){ |
4197 | 2534 if(mm_flags & MM_SSE2){ |
2696
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2535 c->idct_put= ff_vp3_idct_put_sse2; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2536 c->idct_add= ff_vp3_idct_add_sse2; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2537 c->idct = ff_vp3_idct_sse2; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2538 c->idct_permutation_type= FF_TRANSPOSE_IDCT_PERM; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2539 }else{ |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2540 ff_vp3_dsp_init_mmx(); |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2541 c->idct_put= ff_vp3_idct_put_mmx; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2542 c->idct_add= ff_vp3_idct_add_mmx; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2543 c->idct = ff_vp3_idct_mmx; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2544 c->idct_permutation_type= FF_PARTTRANS_IDCT_PERM; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2545 } |
3524 | 2546 }else if(idct_algo==FF_IDCT_CAVS){ |
2547 c->idct_permutation_type= FF_TRANSPOSE_IDCT_PERM; | |
2868 | 2548 }else if(idct_algo==FF_IDCT_XVIDMMX){ |
6601 | 2549 if(mm_flags & MM_SSE2){ |
2550 c->idct_put= ff_idct_xvid_sse2_put; | |
2551 c->idct_add= ff_idct_xvid_sse2_add; | |
2552 c->idct = ff_idct_xvid_sse2; | |
2553 c->idct_permutation_type= FF_SSE2_IDCT_PERM; | |
2554 }else if(mm_flags & MM_MMXEXT){ | |
2868 | 2555 c->idct_put= ff_idct_xvid_mmx2_put; |
2556 c->idct_add= ff_idct_xvid_mmx2_add; | |
2557 c->idct = ff_idct_xvid_mmx2; | |
2558 }else{ | |
2559 c->idct_put= ff_idct_xvid_mmx_put; | |
2560 c->idct_add= ff_idct_xvid_mmx_add; | |
2561 c->idct = ff_idct_xvid_mmx; | |
2562 } | |
1092 | 2563 } |
2564 } | |
1868 | 2565 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2566 c->put_pixels_clamped = put_pixels_clamped_mmx; |
1984
ef919e9ef73e
separate out put_signed_pixels_clamped() into its own function and
melanson
parents:
1977
diff
changeset
|
2567 c->put_signed_pixels_clamped = put_signed_pixels_clamped_mmx; |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2568 c->add_pixels_clamped = add_pixels_clamped_mmx; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2569 c->clear_blocks = clear_blocks_mmx; |
415 | 2570 |
6327 | 2571 #define SET_HPEL_FUNCS(PFX, IDX, SIZE, CPU) \ |
2572 c->PFX ## _pixels_tab[IDX][0] = PFX ## _pixels ## SIZE ## _ ## CPU; \ | |
2573 c->PFX ## _pixels_tab[IDX][1] = PFX ## _pixels ## SIZE ## _x2_ ## CPU; \ | |
2574 c->PFX ## _pixels_tab[IDX][2] = PFX ## _pixels ## SIZE ## _y2_ ## CPU; \ | |
2575 c->PFX ## _pixels_tab[IDX][3] = PFX ## _pixels ## SIZE ## _xy2_ ## CPU | |
2576 | |
2577 SET_HPEL_FUNCS(put, 0, 16, mmx); | |
2578 SET_HPEL_FUNCS(put_no_rnd, 0, 16, mmx); | |
2579 SET_HPEL_FUNCS(avg, 0, 16, mmx); | |
2580 SET_HPEL_FUNCS(avg_no_rnd, 0, 16, mmx); | |
2581 SET_HPEL_FUNCS(put, 1, 8, mmx); | |
2582 SET_HPEL_FUNCS(put_no_rnd, 1, 8, mmx); | |
2583 SET_HPEL_FUNCS(avg, 1, 8, mmx); | |
2584 SET_HPEL_FUNCS(avg_no_rnd, 1, 8, mmx); | |
2967 | 2585 |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
2586 c->gmc= gmc_mmx; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
2587 |
866 | 2588 c->add_bytes= add_bytes_mmx; |
6384 | 2589 c->add_bytes_l2= add_bytes_l2_mmx; |
1647 | 2590 |
6437 | 2591 c->draw_edges = draw_edges_mmx; |
2592 | |
5277
7b3fcb7c61ce
Avoid linking with h263.c functions when the relevant codecs
aurel
parents:
5255
diff
changeset
|
2593 if (ENABLE_ANY_H263) { |
5278 | 2594 c->h263_v_loop_filter= h263_v_loop_filter_mmx; |
2595 c->h263_h_loop_filter= h263_h_loop_filter_mmx; | |
5277
7b3fcb7c61ce
Avoid linking with h263.c functions when the relevant codecs
aurel
parents:
5255
diff
changeset
|
2596 } |
6057
03febc8f506f
add MMX version for put_no_rnd_h264_chroma_mc8_c, used in VC-1 decoding.
gpoirier
parents:
6056
diff
changeset
|
2597 c->put_h264_chroma_pixels_tab[0]= put_h264_chroma_mc8_mmx_rnd; |
2922
d772011258ec
faster h264_chroma_mc8_mmx, added h264_chroma_mc4_mmx.
lorenm
parents:
2902
diff
changeset
|
2598 c->put_h264_chroma_pixels_tab[1]= put_h264_chroma_mc4_mmx; |
6057
03febc8f506f
add MMX version for put_no_rnd_h264_chroma_mc8_c, used in VC-1 decoding.
gpoirier
parents:
6056
diff
changeset
|
2599 c->put_no_rnd_h264_chroma_pixels_tab[0]= put_h264_chroma_mc8_mmx_nornd; |
2967 | 2600 |
3173 | 2601 c->h264_idct_dc_add= |
2602 c->h264_idct_add= ff_h264_idct_add_mmx; | |
3174 | 2603 c->h264_idct8_dc_add= |
2604 c->h264_idct8_add= ff_h264_idct8_add_mmx; | |
6320 | 2605 if (mm_flags & MM_SSE2) |
2606 c->h264_idct8_add= ff_h264_idct8_add_sse2; | |
3173 | 2607 |
4197 | 2608 if (mm_flags & MM_MMXEXT) { |
3215
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
2609 c->prefetch = prefetch_mmx2; |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
2610 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2611 c->put_pixels_tab[0][1] = put_pixels16_x2_mmx2; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2612 c->put_pixels_tab[0][2] = put_pixels16_y2_mmx2; |
651 | 2613 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2614 c->avg_pixels_tab[0][0] = avg_pixels16_mmx2; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2615 c->avg_pixels_tab[0][1] = avg_pixels16_x2_mmx2; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2616 c->avg_pixels_tab[0][2] = avg_pixels16_y2_mmx2; |
415 | 2617 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2618 c->put_pixels_tab[1][1] = put_pixels8_x2_mmx2; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2619 c->put_pixels_tab[1][2] = put_pixels8_y2_mmx2; |
651 | 2620 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2621 c->avg_pixels_tab[1][0] = avg_pixels8_mmx2; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2622 c->avg_pixels_tab[1][1] = avg_pixels8_x2_mmx2; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2623 c->avg_pixels_tab[1][2] = avg_pixels8_y2_mmx2; |
1092 | 2624 |
3105
2d35fb3cb940
h264: special case dc-only idct. ~1% faster overall
lorenm
parents:
3089
diff
changeset
|
2625 c->h264_idct_dc_add= ff_h264_idct_dc_add_mmx2; |
2d35fb3cb940
h264: special case dc-only idct. ~1% faster overall
lorenm
parents:
3089
diff
changeset
|
2626 c->h264_idct8_dc_add= ff_h264_idct8_dc_add_mmx2; |
2745 | 2627 |
1092 | 2628 if(!(avctx->flags & CODEC_FLAG_BITEXACT)){ |
2629 c->put_no_rnd_pixels_tab[0][1] = put_no_rnd_pixels16_x2_mmx2; | |
2630 c->put_no_rnd_pixels_tab[0][2] = put_no_rnd_pixels16_y2_mmx2; | |
2631 c->put_no_rnd_pixels_tab[1][1] = put_no_rnd_pixels8_x2_mmx2; | |
2632 c->put_no_rnd_pixels_tab[1][2] = put_no_rnd_pixels8_y2_mmx2; | |
2633 c->avg_pixels_tab[0][3] = avg_pixels16_xy2_mmx2; | |
2634 c->avg_pixels_tab[1][3] = avg_pixels8_xy2_mmx2; | |
2635 } | |
959 | 2636 |
6327 | 2637 #define SET_QPEL_FUNCS(PFX, IDX, SIZE, CPU) \ |
2638 c->PFX ## _pixels_tab[IDX][ 0] = PFX ## SIZE ## _mc00_ ## CPU; \ | |
2639 c->PFX ## _pixels_tab[IDX][ 1] = PFX ## SIZE ## _mc10_ ## CPU; \ | |
2640 c->PFX ## _pixels_tab[IDX][ 2] = PFX ## SIZE ## _mc20_ ## CPU; \ | |
2641 c->PFX ## _pixels_tab[IDX][ 3] = PFX ## SIZE ## _mc30_ ## CPU; \ | |
2642 c->PFX ## _pixels_tab[IDX][ 4] = PFX ## SIZE ## _mc01_ ## CPU; \ | |
2643 c->PFX ## _pixels_tab[IDX][ 5] = PFX ## SIZE ## _mc11_ ## CPU; \ | |
2644 c->PFX ## _pixels_tab[IDX][ 6] = PFX ## SIZE ## _mc21_ ## CPU; \ | |
2645 c->PFX ## _pixels_tab[IDX][ 7] = PFX ## SIZE ## _mc31_ ## CPU; \ | |
2646 c->PFX ## _pixels_tab[IDX][ 8] = PFX ## SIZE ## _mc02_ ## CPU; \ | |
2647 c->PFX ## _pixels_tab[IDX][ 9] = PFX ## SIZE ## _mc12_ ## CPU; \ | |
2648 c->PFX ## _pixels_tab[IDX][10] = PFX ## SIZE ## _mc22_ ## CPU; \ | |
2649 c->PFX ## _pixels_tab[IDX][11] = PFX ## SIZE ## _mc32_ ## CPU; \ | |
2650 c->PFX ## _pixels_tab[IDX][12] = PFX ## SIZE ## _mc03_ ## CPU; \ | |
2651 c->PFX ## _pixels_tab[IDX][13] = PFX ## SIZE ## _mc13_ ## CPU; \ | |
2652 c->PFX ## _pixels_tab[IDX][14] = PFX ## SIZE ## _mc23_ ## CPU; \ | |
2653 c->PFX ## _pixels_tab[IDX][15] = PFX ## SIZE ## _mc33_ ## CPU | |
2654 | |
2655 SET_QPEL_FUNCS(put_qpel, 0, 16, mmx2); | |
2656 SET_QPEL_FUNCS(put_qpel, 1, 8, mmx2); | |
2657 SET_QPEL_FUNCS(put_no_rnd_qpel, 0, 16, mmx2); | |
2658 SET_QPEL_FUNCS(put_no_rnd_qpel, 1, 8, mmx2); | |
2659 SET_QPEL_FUNCS(avg_qpel, 0, 16, mmx2); | |
2660 SET_QPEL_FUNCS(avg_qpel, 1, 8, mmx2); | |
2661 | |
2662 SET_QPEL_FUNCS(put_h264_qpel, 0, 16, mmx2); | |
2663 SET_QPEL_FUNCS(put_h264_qpel, 1, 8, mmx2); | |
2664 SET_QPEL_FUNCS(put_h264_qpel, 2, 4, mmx2); | |
2665 SET_QPEL_FUNCS(avg_h264_qpel, 0, 16, mmx2); | |
2666 SET_QPEL_FUNCS(avg_h264_qpel, 1, 8, mmx2); | |
2667 SET_QPEL_FUNCS(avg_h264_qpel, 2, 4, mmx2); | |
2668 | |
2669 SET_QPEL_FUNCS(put_2tap_qpel, 0, 16, mmx2); | |
2670 SET_QPEL_FUNCS(put_2tap_qpel, 1, 8, mmx2); | |
2671 SET_QPEL_FUNCS(avg_2tap_qpel, 0, 16, mmx2); | |
2672 SET_QPEL_FUNCS(avg_2tap_qpel, 1, 8, mmx2); | |
2209 | 2673 |
6057
03febc8f506f
add MMX version for put_no_rnd_h264_chroma_mc8_c, used in VC-1 decoding.
gpoirier
parents:
6056
diff
changeset
|
2674 c->avg_h264_chroma_pixels_tab[0]= avg_h264_chroma_mc8_mmx2_rnd; |
2922
d772011258ec
faster h264_chroma_mc8_mmx, added h264_chroma_mc4_mmx.
lorenm
parents:
2902
diff
changeset
|
2675 c->avg_h264_chroma_pixels_tab[1]= avg_h264_chroma_mc4_mmx2; |
3213 | 2676 c->avg_h264_chroma_pixels_tab[2]= avg_h264_chroma_mc2_mmx2; |
2677 c->put_h264_chroma_pixels_tab[2]= put_h264_chroma_mc2_mmx2; | |
2633 | 2678 c->h264_v_loop_filter_luma= h264_v_loop_filter_luma_mmx2; |
2679 c->h264_h_loop_filter_luma= h264_h_loop_filter_luma_mmx2; | |
2680 c->h264_v_loop_filter_chroma= h264_v_loop_filter_chroma_mmx2; | |
2681 c->h264_h_loop_filter_chroma= h264_h_loop_filter_chroma_mmx2; | |
2707
360024d31dab
H.264 deblocking optimizations (mmx for chroma_bS4 case, convert existing cases to 8-bit math)
lorenm
parents:
2696
diff
changeset
|
2682 c->h264_v_loop_filter_chroma_intra= h264_v_loop_filter_chroma_intra_mmx2; |
360024d31dab
H.264 deblocking optimizations (mmx for chroma_bS4 case, convert existing cases to 8-bit math)
lorenm
parents:
2696
diff
changeset
|
2683 c->h264_h_loop_filter_chroma_intra= h264_h_loop_filter_chroma_intra_mmx2; |
3645
47821be55b6c
mmx implementation of deblocking strength decision.
lorenm
parents:
3576
diff
changeset
|
2684 c->h264_loop_filter_strength= h264_loop_filter_strength_mmx2; |
2633 | 2685 |
2902
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2686 c->weight_h264_pixels_tab[0]= ff_h264_weight_16x16_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2687 c->weight_h264_pixels_tab[1]= ff_h264_weight_16x8_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2688 c->weight_h264_pixels_tab[2]= ff_h264_weight_8x16_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2689 c->weight_h264_pixels_tab[3]= ff_h264_weight_8x8_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2690 c->weight_h264_pixels_tab[4]= ff_h264_weight_8x4_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2691 c->weight_h264_pixels_tab[5]= ff_h264_weight_4x8_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2692 c->weight_h264_pixels_tab[6]= ff_h264_weight_4x4_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2693 c->weight_h264_pixels_tab[7]= ff_h264_weight_4x2_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2694 |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2695 c->biweight_h264_pixels_tab[0]= ff_h264_biweight_16x16_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2696 c->biweight_h264_pixels_tab[1]= ff_h264_biweight_16x8_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2697 c->biweight_h264_pixels_tab[2]= ff_h264_biweight_8x16_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2698 c->biweight_h264_pixels_tab[3]= ff_h264_biweight_8x8_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2699 c->biweight_h264_pixels_tab[4]= ff_h264_biweight_8x4_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2700 c->biweight_h264_pixels_tab[5]= ff_h264_biweight_4x8_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2701 c->biweight_h264_pixels_tab[6]= ff_h264_biweight_4x4_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2702 c->biweight_h264_pixels_tab[7]= ff_h264_biweight_4x2_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2703 |
5949 | 2704 if (ENABLE_CAVS_DECODER) |
5950 | 2705 ff_cavsdsp_init_mmx2(c, avctx); |
5949 | 2706 |
2707 if (ENABLE_VC1_DECODER || ENABLE_WMV3_DECODER) | |
5950 | 2708 ff_vc1dsp_init_mmx(c, avctx); |
5933 | 2709 |
6384 | 2710 c->add_png_paeth_prediction= add_png_paeth_prediction_mmx2; |
4197 | 2711 } else if (mm_flags & MM_3DNOW) { |
3215
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
2712 c->prefetch = prefetch_3dnow; |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
2713 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2714 c->put_pixels_tab[0][1] = put_pixels16_x2_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2715 c->put_pixels_tab[0][2] = put_pixels16_y2_3dnow; |
393 | 2716 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2717 c->avg_pixels_tab[0][0] = avg_pixels16_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2718 c->avg_pixels_tab[0][1] = avg_pixels16_x2_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2719 c->avg_pixels_tab[0][2] = avg_pixels16_y2_3dnow; |
651 | 2720 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2721 c->put_pixels_tab[1][1] = put_pixels8_x2_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2722 c->put_pixels_tab[1][2] = put_pixels8_y2_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2723 |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2724 c->avg_pixels_tab[1][0] = avg_pixels8_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2725 c->avg_pixels_tab[1][1] = avg_pixels8_x2_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2726 c->avg_pixels_tab[1][2] = avg_pixels8_y2_3dnow; |
1092 | 2727 |
2728 if(!(avctx->flags & CODEC_FLAG_BITEXACT)){ | |
2729 c->put_no_rnd_pixels_tab[0][1] = put_no_rnd_pixels16_x2_3dnow; | |
2730 c->put_no_rnd_pixels_tab[0][2] = put_no_rnd_pixels16_y2_3dnow; | |
2731 c->put_no_rnd_pixels_tab[1][1] = put_no_rnd_pixels8_x2_3dnow; | |
2732 c->put_no_rnd_pixels_tab[1][2] = put_no_rnd_pixels8_y2_3dnow; | |
2733 c->avg_pixels_tab[0][3] = avg_pixels16_xy2_3dnow; | |
2734 c->avg_pixels_tab[1][3] = avg_pixels8_xy2_3dnow; | |
2735 } | |
984 | 2736 |
6327 | 2737 SET_QPEL_FUNCS(put_qpel, 0, 16, 3dnow); |
2738 SET_QPEL_FUNCS(put_qpel, 1, 8, 3dnow); | |
2739 SET_QPEL_FUNCS(put_no_rnd_qpel, 0, 16, 3dnow); | |
2740 SET_QPEL_FUNCS(put_no_rnd_qpel, 1, 8, 3dnow); | |
2741 SET_QPEL_FUNCS(avg_qpel, 0, 16, 3dnow); | |
2742 SET_QPEL_FUNCS(avg_qpel, 1, 8, 3dnow); | |
2743 | |
2744 SET_QPEL_FUNCS(put_h264_qpel, 0, 16, 3dnow); | |
2745 SET_QPEL_FUNCS(put_h264_qpel, 1, 8, 3dnow); | |
2746 SET_QPEL_FUNCS(put_h264_qpel, 2, 4, 3dnow); | |
2747 SET_QPEL_FUNCS(avg_h264_qpel, 0, 16, 3dnow); | |
2748 SET_QPEL_FUNCS(avg_h264_qpel, 1, 8, 3dnow); | |
2749 SET_QPEL_FUNCS(avg_h264_qpel, 2, 4, 3dnow); | |
2750 | |
2751 SET_QPEL_FUNCS(put_2tap_qpel, 0, 16, 3dnow); | |
2752 SET_QPEL_FUNCS(put_2tap_qpel, 1, 8, 3dnow); | |
2753 SET_QPEL_FUNCS(avg_2tap_qpel, 0, 16, 3dnow); | |
2754 SET_QPEL_FUNCS(avg_2tap_qpel, 1, 8, 3dnow); | |
3807
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
2755 |
6057
03febc8f506f
add MMX version for put_no_rnd_h264_chroma_mc8_c, used in VC-1 decoding.
gpoirier
parents:
6056
diff
changeset
|
2756 c->avg_h264_chroma_pixels_tab[0]= avg_h264_chroma_mc8_3dnow_rnd; |
2922
d772011258ec
faster h264_chroma_mc8_mmx, added h264_chroma_mc4_mmx.
lorenm
parents:
2902
diff
changeset
|
2757 c->avg_h264_chroma_pixels_tab[1]= avg_h264_chroma_mc4_3dnow; |
6522
dfa76e0734e5
Add missed call to ff_cavsdsp_init_3dnow() in dsputil_init_mmx()
zuxy
parents:
6513
diff
changeset
|
2758 |
dfa76e0734e5
Add missed call to ff_cavsdsp_init_3dnow() in dsputil_init_mmx()
zuxy
parents:
6513
diff
changeset
|
2759 if (ENABLE_CAVS_DECODER) |
dfa76e0734e5
Add missed call to ff_cavsdsp_init_3dnow() in dsputil_init_mmx()
zuxy
parents:
6513
diff
changeset
|
2760 ff_cavsdsp_init_3dnow(c, avctx); |
0 | 2761 } |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2762 |
6336
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2763 |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2764 #define H264_QPEL_FUNCS(x, y, CPU)\ |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2765 c->put_h264_qpel_pixels_tab[0][x+y*4] = put_h264_qpel16_mc##x##y##_##CPU;\ |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2766 c->put_h264_qpel_pixels_tab[1][x+y*4] = put_h264_qpel8_mc##x##y##_##CPU;\ |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2767 c->avg_h264_qpel_pixels_tab[0][x+y*4] = avg_h264_qpel16_mc##x##y##_##CPU;\ |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2768 c->avg_h264_qpel_pixels_tab[1][x+y*4] = avg_h264_qpel8_mc##x##y##_##CPU; |
6331 | 2769 if((mm_flags & MM_SSE2) && !(mm_flags & MM_3DNOW)){ |
2770 // these functions are slower than mmx on AMD, but faster on Intel | |
6336
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2771 /* FIXME works in most codecs, but crashes svq1 due to unaligned chroma |
6331 | 2772 c->put_pixels_tab[0][0] = put_pixels16_sse2; |
2773 c->avg_pixels_tab[0][0] = avg_pixels16_sse2; | |
6336
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2774 */ |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2775 H264_QPEL_FUNCS(0, 0, sse2); |
6331 | 2776 } |
6336
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2777 if(mm_flags & MM_SSE2){ |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2778 H264_QPEL_FUNCS(0, 1, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2779 H264_QPEL_FUNCS(0, 2, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2780 H264_QPEL_FUNCS(0, 3, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2781 H264_QPEL_FUNCS(1, 1, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2782 H264_QPEL_FUNCS(1, 2, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2783 H264_QPEL_FUNCS(1, 3, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2784 H264_QPEL_FUNCS(2, 1, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2785 H264_QPEL_FUNCS(2, 2, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2786 H264_QPEL_FUNCS(2, 3, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2787 H264_QPEL_FUNCS(3, 1, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2788 H264_QPEL_FUNCS(3, 2, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2789 H264_QPEL_FUNCS(3, 3, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2790 } |
6331 | 2791 #ifdef HAVE_SSSE3 |
2792 if(mm_flags & MM_SSSE3){ | |
6336
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2793 H264_QPEL_FUNCS(1, 0, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2794 H264_QPEL_FUNCS(1, 1, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2795 H264_QPEL_FUNCS(1, 2, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2796 H264_QPEL_FUNCS(1, 3, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2797 H264_QPEL_FUNCS(2, 0, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2798 H264_QPEL_FUNCS(2, 1, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2799 H264_QPEL_FUNCS(2, 2, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2800 H264_QPEL_FUNCS(2, 3, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2801 H264_QPEL_FUNCS(3, 0, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2802 H264_QPEL_FUNCS(3, 1, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2803 H264_QPEL_FUNCS(3, 2, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2804 H264_QPEL_FUNCS(3, 3, ssse3); |
6557 | 2805 c->put_no_rnd_h264_chroma_pixels_tab[0]= put_h264_chroma_mc8_ssse3_nornd; |
2806 c->put_h264_chroma_pixels_tab[0]= put_h264_chroma_mc8_ssse3_rnd; | |
2807 c->avg_h264_chroma_pixels_tab[0]= avg_h264_chroma_mc8_ssse3_rnd; | |
2808 c->put_h264_chroma_pixels_tab[1]= put_h264_chroma_mc4_ssse3; | |
2809 c->avg_h264_chroma_pixels_tab[1]= avg_h264_chroma_mc4_ssse3; | |
6384 | 2810 c->add_png_paeth_prediction= add_png_paeth_prediction_ssse3; |
6331 | 2811 } |
2812 #endif | |
2813 | |
4589
30261f4ed12d
Fix wrong conditional, Snow decoding, not encoding, was SIMD-accelerated.
diego
parents:
4436
diff
changeset
|
2814 #ifdef CONFIG_SNOW_DECODER |
5591 | 2815 if(mm_flags & MM_SSE2 & 0){ |
3210 | 2816 c->horizontal_compose97i = ff_snow_horizontal_compose97i_sse2; |
5602 | 2817 #ifdef HAVE_7REGS |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2818 c->vertical_compose97i = ff_snow_vertical_compose97i_sse2; |
5601
b26025b9586d
workaround gcc bug, untested as my gcc is not complaining
michael
parents:
5594
diff
changeset
|
2819 #endif |
3211
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents:
3210
diff
changeset
|
2820 c->inner_add_yblock = ff_snow_inner_add_yblock_sse2; |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2821 } |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2822 else{ |
5594
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5591
diff
changeset
|
2823 if(mm_flags & MM_MMXEXT){ |
3210 | 2824 c->horizontal_compose97i = ff_snow_horizontal_compose97i_mmx; |
5602 | 2825 #ifdef HAVE_7REGS |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2826 c->vertical_compose97i = ff_snow_vertical_compose97i_mmx; |
5601
b26025b9586d
workaround gcc bug, untested as my gcc is not complaining
michael
parents:
5594
diff
changeset
|
2827 #endif |
5594
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5591
diff
changeset
|
2828 } |
3211
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents:
3210
diff
changeset
|
2829 c->inner_add_yblock = ff_snow_inner_add_yblock_mmx; |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2830 } |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2831 #endif |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
2832 |
4197 | 2833 if(mm_flags & MM_3DNOW){ |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2834 c->vorbis_inverse_coupling = vorbis_inverse_coupling_3dnow; |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2835 c->vector_fmul = vector_fmul_3dnow; |
7261 | 2836 if(!(avctx->flags & CODEC_FLAG_BITEXACT)){ |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2837 c->float_to_int16 = float_to_int16_3dnow; |
7261 | 2838 c->float_to_int16_interleave = float_to_int16_interleave_3dnow; |
2839 } | |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2840 } |
7263 | 2841 if(mm_flags & MM_3DNOWEXT){ |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2842 c->vector_fmul_reverse = vector_fmul_reverse_3dnow2; |
7263 | 2843 c->vector_fmul_window = vector_fmul_window_3dnow2; |
7568
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2844 if(!(avctx->flags & CODEC_FLAG_BITEXACT)){ |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2845 c->float_to_int16_interleave = float_to_int16_interleave_3dn2; |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2846 } |
7263 | 2847 } |
4197 | 2848 if(mm_flags & MM_SSE){ |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
2849 c->vorbis_inverse_coupling = vorbis_inverse_coupling_sse; |
7563 | 2850 c->ac3_downmix = ac3_downmix_sse; |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2851 c->vector_fmul = vector_fmul_sse; |
3569
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2852 c->vector_fmul_reverse = vector_fmul_reverse_sse; |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2853 c->vector_fmul_add_add = vector_fmul_add_add_sse; |
7261 | 2854 c->vector_fmul_window = vector_fmul_window_sse; |
7564 | 2855 c->int32_to_float_fmul_scalar = int32_to_float_fmul_scalar_sse; |
7548 | 2856 c->float_to_int16 = float_to_int16_sse; |
2857 c->float_to_int16_interleave = float_to_int16_interleave_sse; | |
7226 | 2858 } |
4197 | 2859 if(mm_flags & MM_3DNOW) |
3574 | 2860 c->vector_fmul_add_add = vector_fmul_add_add_3dnow; // faster than sse |
7238
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2861 if(mm_flags & MM_SSE2){ |
7564 | 2862 c->int32_to_float_fmul_scalar = int32_to_float_fmul_scalar_sse2; |
7548 | 2863 c->float_to_int16 = float_to_int16_sse2; |
2864 c->float_to_int16_interleave = float_to_int16_interleave_sse2; | |
7238
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2865 c->add_int16 = add_int16_sse2; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2866 c->sub_int16 = sub_int16_sse2; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2867 c->scalarproduct_int16 = scalarproduct_int16_sse2; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2868 } |
0 | 2869 } |
2967 | 2870 |
6403
9a736918fd90
split encoding part of dsputil_mmx into its own file
aurel
parents:
6391
diff
changeset
|
2871 if (ENABLE_ENCODERS) |
9a736918fd90
split encoding part of dsputil_mmx into its own file
aurel
parents:
6391
diff
changeset
|
2872 dsputilenc_init_mmx(c, avctx); |
9a736918fd90
split encoding part of dsputil_mmx into its own file
aurel
parents:
6391
diff
changeset
|
2873 |
247
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2874 #if 0 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2875 // for speed testing |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2876 get_pixels = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2877 put_pixels_clamped = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2878 add_pixels_clamped = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2879 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2880 pix_abs16x16 = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2881 pix_abs16x16_x2 = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2882 pix_abs16x16_y2 = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2883 pix_abs16x16_xy2 = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2884 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2885 put_pixels_tab[0] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2886 put_pixels_tab[1] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2887 put_pixels_tab[2] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2888 put_pixels_tab[3] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2889 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2890 put_no_rnd_pixels_tab[0] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2891 put_no_rnd_pixels_tab[1] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2892 put_no_rnd_pixels_tab[2] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2893 put_no_rnd_pixels_tab[3] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2894 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2895 avg_pixels_tab[0] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2896 avg_pixels_tab[1] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2897 avg_pixels_tab[2] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2898 avg_pixels_tab[3] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2899 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2900 avg_no_rnd_pixels_tab[0] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2901 avg_no_rnd_pixels_tab[1] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2902 avg_no_rnd_pixels_tab[2] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2903 avg_no_rnd_pixels_tab[3] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2904 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2905 //av_fdct = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2906 //ff_idct = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2907 #endif |
0 | 2908 } |