annotate ppc/idct_altivec.c @ 6398:0a50abd54b7f libavcodec

Clarify which BSD license.
author michael
date Mon, 25 Feb 2008 14:59:04 +0000
parents 33674fb857b5
children f7cbb7733146
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1 /*
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2 * Copyright (c) 2001 Michel Lespinasse
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3 *
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4 * This file is part of FFmpeg.
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5 *
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6 * FFmpeg is free software; you can redistribute it and/or
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7 * modify it under the terms of the GNU Lesser General Public
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8 * License as published by the Free Software Foundation; either
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9 * version 2.1 of the License, or (at your option) any later version.
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10 *
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11 * FFmpeg is distributed in the hope that it will be useful,
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12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 * Lesser General Public License for more details.
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15 *
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16 * You should have received a copy of the GNU Lesser General Public
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17 * License along with FFmpeg; if not, write to the Free Software
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18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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19 */
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20
ace3ccd18dd2 Altivec Patch (Mark III) by (Dieter Shirley <dieters at schemasoft dot com>)
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21 /*
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22 * NOTE: This code is based on GPL code from the libmpeg2 project. The
ace3ccd18dd2 Altivec Patch (Mark III) by (Dieter Shirley <dieters at schemasoft dot com>)
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23 * author, Michel Lespinasses, has given explicit permission to release
ace3ccd18dd2 Altivec Patch (Mark III) by (Dieter Shirley <dieters at schemasoft dot com>)
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24 * under LGPL as part of ffmpeg.
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25 *
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26 */
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27
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28 /*
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29 * FFMpeg integration by Dieter Shirley
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30 *
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31 * This file is a direct copy of the altivec idct module from the libmpeg2
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32 * project. I've deleted all of the libmpeg2 specific code, renamed the functions and
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33 * re-ordered the function parameters. The only change to the IDCT function
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34 * itself was to factor out the partial transposition, and to perform a full
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35 * transpose at the end of the function.
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36 */
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37
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38
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39 #include <stdlib.h> /* malloc(), free() */
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40 #include <string.h>
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41 #include "dsputil.h"
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42
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43 #include "gcc_fixes.h"
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44
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45 #include "dsputil_ppc.h"
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46
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47 #define vector_s16_t vector signed short
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48 #define const_vector_s16_t const vector signed short
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49 #define vector_u16_t vector unsigned short
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50 #define vector_s8_t vector signed char
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51 #define vector_u8_t vector unsigned char
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52 #define vector_s32_t vector signed int
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53 #define vector_u32_t vector unsigned int
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54
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55 #define IDCT_HALF \
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56 /* 1st stage */ \
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57 t1 = vec_mradds (a1, vx7, vx1 ); \
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58 t8 = vec_mradds (a1, vx1, vec_subs (zero, vx7)); \
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59 t7 = vec_mradds (a2, vx5, vx3); \
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60 t3 = vec_mradds (ma2, vx3, vx5); \
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61 \
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62 /* 2nd stage */ \
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63 t5 = vec_adds (vx0, vx4); \
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64 t0 = vec_subs (vx0, vx4); \
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65 t2 = vec_mradds (a0, vx6, vx2); \
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66 t4 = vec_mradds (a0, vx2, vec_subs (zero, vx6)); \
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67 t6 = vec_adds (t8, t3); \
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68 t3 = vec_subs (t8, t3); \
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69 t8 = vec_subs (t1, t7); \
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70 t1 = vec_adds (t1, t7); \
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71 \
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72 /* 3rd stage */ \
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73 t7 = vec_adds (t5, t2); \
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74 t2 = vec_subs (t5, t2); \
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75 t5 = vec_adds (t0, t4); \
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76 t0 = vec_subs (t0, t4); \
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77 t4 = vec_subs (t8, t3); \
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78 t3 = vec_adds (t8, t3); \
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79 \
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80 /* 4th stage */ \
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81 vy0 = vec_adds (t7, t1); \
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82 vy7 = vec_subs (t7, t1); \
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83 vy1 = vec_mradds (c4, t3, t5); \
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84 vy6 = vec_mradds (mc4, t3, t5); \
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85 vy2 = vec_mradds (c4, t4, t0); \
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86 vy5 = vec_mradds (mc4, t4, t0); \
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87 vy3 = vec_adds (t2, t6); \
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88 vy4 = vec_subs (t2, t6);
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89
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90
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91 #define IDCT \
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92 vector_s16_t vx0, vx1, vx2, vx3, vx4, vx5, vx6, vx7; \
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93 vector_s16_t vy0, vy1, vy2, vy3, vy4, vy5, vy6, vy7; \
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94 vector_s16_t a0, a1, a2, ma2, c4, mc4, zero, bias; \
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95 vector_s16_t t0, t1, t2, t3, t4, t5, t6, t7, t8; \
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96 vector_u16_t shift; \
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97 \
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98 c4 = vec_splat (constants[0], 0); \
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99 a0 = vec_splat (constants[0], 1); \
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100 a1 = vec_splat (constants[0], 2); \
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101 a2 = vec_splat (constants[0], 3); \
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102 mc4 = vec_splat (constants[0], 4); \
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103 ma2 = vec_splat (constants[0], 5); \
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104 bias = (vector_s16_t)vec_splat ((vector_s32_t)constants[0], 3); \
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105 \
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106 zero = vec_splat_s16 (0); \
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107 shift = vec_splat_u16 (4); \
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108 \
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109 vx0 = vec_mradds (vec_sl (block[0], shift), constants[1], zero); \
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110 vx1 = vec_mradds (vec_sl (block[1], shift), constants[2], zero); \
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111 vx2 = vec_mradds (vec_sl (block[2], shift), constants[3], zero); \
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112 vx3 = vec_mradds (vec_sl (block[3], shift), constants[4], zero); \
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113 vx4 = vec_mradds (vec_sl (block[4], shift), constants[1], zero); \
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114 vx5 = vec_mradds (vec_sl (block[5], shift), constants[4], zero); \
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115 vx6 = vec_mradds (vec_sl (block[6], shift), constants[3], zero); \
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116 vx7 = vec_mradds (vec_sl (block[7], shift), constants[2], zero); \
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117 \
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118 IDCT_HALF \
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119 \
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120 vx0 = vec_mergeh (vy0, vy4); \
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121 vx1 = vec_mergel (vy0, vy4); \
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122 vx2 = vec_mergeh (vy1, vy5); \
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123 vx3 = vec_mergel (vy1, vy5); \
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124 vx4 = vec_mergeh (vy2, vy6); \
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125 vx5 = vec_mergel (vy2, vy6); \
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126 vx6 = vec_mergeh (vy3, vy7); \
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127 vx7 = vec_mergel (vy3, vy7); \
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128 \
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129 vy0 = vec_mergeh (vx0, vx4); \
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130 vy1 = vec_mergel (vx0, vx4); \
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131 vy2 = vec_mergeh (vx1, vx5); \
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132 vy3 = vec_mergel (vx1, vx5); \
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133 vy4 = vec_mergeh (vx2, vx6); \
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134 vy5 = vec_mergel (vx2, vx6); \
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135 vy6 = vec_mergeh (vx3, vx7); \
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136 vy7 = vec_mergel (vx3, vx7); \
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137 \
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138 vx0 = vec_adds (vec_mergeh (vy0, vy4), bias); \
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139 vx1 = vec_mergel (vy0, vy4); \
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140 vx2 = vec_mergeh (vy1, vy5); \
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141 vx3 = vec_mergel (vy1, vy5); \
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142 vx4 = vec_mergeh (vy2, vy6); \
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143 vx5 = vec_mergel (vy2, vy6); \
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144 vx6 = vec_mergeh (vy3, vy7); \
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145 vx7 = vec_mergel (vy3, vy7); \
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146 \
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147 IDCT_HALF \
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148 \
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149 shift = vec_splat_u16 (6); \
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150 vx0 = vec_sra (vy0, shift); \
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151 vx1 = vec_sra (vy1, shift); \
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152 vx2 = vec_sra (vy2, shift); \
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153 vx3 = vec_sra (vy3, shift); \
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154 vx4 = vec_sra (vy4, shift); \
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155 vx5 = vec_sra (vy5, shift); \
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156 vx6 = vec_sra (vy6, shift); \
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157 vx7 = vec_sra (vy7, shift);
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158
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159
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160 static const_vector_s16_t constants[5] = {
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161 (vector_s16_t) AVV(23170, 13573, 6518, 21895, -23170, -21895, 32, 31),
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162 (vector_s16_t) AVV(16384, 22725, 21407, 19266, 16384, 19266, 21407, 22725),
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163 (vector_s16_t) AVV(22725, 31521, 29692, 26722, 22725, 26722, 29692, 31521),
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164 (vector_s16_t) AVV(21407, 29692, 27969, 25172, 21407, 25172, 27969, 29692),
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165 (vector_s16_t) AVV(19266, 26722, 25172, 22654, 19266, 22654, 25172, 26722)
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166 };
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167
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168 void idct_put_altivec(uint8_t* dest, int stride, vector_s16_t* block)
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169 {
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170 POWERPC_PERF_DECLARE(altivec_idct_put_num, 1);
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171 vector_u8_t tmp;
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172
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173 #ifdef CONFIG_POWERPC_PERF
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174 POWERPC_PERF_START_COUNT(altivec_idct_put_num, 1);
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175 #endif
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176 IDCT
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177
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178 #define COPY(dest,src) \
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179 tmp = vec_packsu (src, src); \
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180 vec_ste ((vector_u32_t)tmp, 0, (unsigned int *)dest); \
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181 vec_ste ((vector_u32_t)tmp, 4, (unsigned int *)dest);
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182
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183 COPY (dest, vx0) dest += stride;
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184 COPY (dest, vx1) dest += stride;
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185 COPY (dest, vx2) dest += stride;
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186 COPY (dest, vx3) dest += stride;
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187 COPY (dest, vx4) dest += stride;
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188 COPY (dest, vx5) dest += stride;
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189 COPY (dest, vx6) dest += stride;
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190 COPY (dest, vx7)
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191
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192 POWERPC_PERF_STOP_COUNT(altivec_idct_put_num, 1);
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193 }
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194
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195 void idct_add_altivec(uint8_t* dest, int stride, vector_s16_t* block)
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196 {
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197 POWERPC_PERF_DECLARE(altivec_idct_add_num, 1);
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198 vector_u8_t tmp;
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199 vector_s16_t tmp2, tmp3;
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200 vector_u8_t perm0;
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201 vector_u8_t perm1;
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202 vector_u8_t p0, p1, p;
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203
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204 #ifdef CONFIG_POWERPC_PERF
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205 POWERPC_PERF_START_COUNT(altivec_idct_add_num, 1);
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206 #endif
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207
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208 IDCT
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209
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210 p0 = vec_lvsl (0, dest);
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211 p1 = vec_lvsl (stride, dest);
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212 p = vec_splat_u8 (-1);
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213 perm0 = vec_mergeh (p, p0);
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214 perm1 = vec_mergeh (p, p1);
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215
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216 #define ADD(dest,src,perm) \
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217 /* *(uint64_t *)&tmp = *(uint64_t *)dest; */ \
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218 tmp = vec_ld (0, dest); \
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219 tmp2 = (vector_s16_t)vec_perm (tmp, (vector_u8_t)zero, perm); \
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220 tmp3 = vec_adds (tmp2, src); \
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221 tmp = vec_packsu (tmp3, tmp3); \
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222 vec_ste ((vector_u32_t)tmp, 0, (unsigned int *)dest); \
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223 vec_ste ((vector_u32_t)tmp, 4, (unsigned int *)dest);
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224
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225 ADD (dest, vx0, perm0) dest += stride;
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226 ADD (dest, vx1, perm1) dest += stride;
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227 ADD (dest, vx2, perm0) dest += stride;
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228 ADD (dest, vx3, perm1) dest += stride;
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229 ADD (dest, vx4, perm0) dest += stride;
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230 ADD (dest, vx5, perm1) dest += stride;
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231 ADD (dest, vx6, perm0) dest += stride;
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232 ADD (dest, vx7, perm1)
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233
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234 POWERPC_PERF_STOP_COUNT(altivec_idct_add_num, 1);
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235 }
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236