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7542
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1 ;******************************************************************************
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2 ;* FFT transform with SSE/3DNow optimizations
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3 ;* Copyright (c) 2008 Loren Merritt
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4 ;*
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5 ;* This file is part of FFmpeg.
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6 ;*
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7 ;* FFmpeg is free software; you can redistribute it and/or
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8 ;* modify it under the terms of the GNU Lesser General Public
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9 ;* License as published by the Free Software Foundation; either
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10 ;* version 2.1 of the License, or (at your option) any later version.
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11 ;*
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12 ;* FFmpeg is distributed in the hope that it will be useful,
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13 ;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 ;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 ;* Lesser General Public License for more details.
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16 ;*
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17 ;* You should have received a copy of the GNU Lesser General Public
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18 ;* License along with FFmpeg; if not, write to the Free Software
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19 ;* 51, Inc., Foundation Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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20 ;******************************************************************************
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21
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22 ; These functions are not individually interchangeable with the C versions.
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23 ; While C takes arrays of FFTComplex, SSE/3DNow leave intermediate results
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24 ; in blocks as conventient to the vector size.
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25 ; i.e. {4x real, 4x imaginary, 4x real, ...} (or 2x respectively)
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26
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27 %include "x86inc.asm"
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28
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29 SECTION_RODATA
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30
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31 %define M_SQRT1_2 0.70710678118654752440
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32 ps_root2: times 4 dd M_SQRT1_2
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33 ps_root2mppm: dd -M_SQRT1_2, M_SQRT1_2, M_SQRT1_2, -M_SQRT1_2
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34 ps_m1p1: dd 1<<31, 0
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35
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36 %assign i 16
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37 %rep 13
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38 cextern ff_cos_ %+ i
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39 %assign i i<<1
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40 %endrep
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41
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42 %ifdef ARCH_X86_64
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43 %define pointer dq
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44 %else
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45 %define pointer dd
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46 %endif
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47
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48 %macro IF0 1+
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49 %endmacro
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50 %macro IF1 1+
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51 %1
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52 %endmacro
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53
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54 section .text align=16
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55
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56 %macro T2_3DN 4 ; z0, z1, mem0, mem1
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57 mova %1, %3
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58 mova %2, %1
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59 pfadd %1, %4
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60 pfsub %2, %4
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61 %endmacro
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62
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63 %macro T4_3DN 6 ; z0, z1, z2, z3, tmp0, tmp1
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64 mova %5, %3
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65 pfsub %3, %4
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66 pfadd %5, %4 ; {t6,t5}
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67 pxor %3, [ps_m1p1 GLOBAL] ; {t8,t7}
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68 mova %6, %1
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69 pswapd %3, %3
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70 pfadd %1, %5 ; {r0,i0}
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71 pfsub %6, %5 ; {r2,i2}
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72 mova %4, %2
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73 pfadd %2, %3 ; {r1,i1}
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74 pfsub %4, %3 ; {r3,i3}
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75 SWAP %3, %6
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76 %endmacro
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77
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78 ; in: %1={r0,i0,r1,i1} %2={r2,i2,r3,i3}
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79 ; out: %1={r0,r1,r2,r3} %2={i0,i1,i2,i3}
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80 %macro T4_SSE 3
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81 mova %3, %1
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82 shufps %1, %2, 0x64 ; {r0,i0,r3,i2}
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83 shufps %3, %2, 0xce ; {r1,i1,r2,i3}
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84 mova %2, %1
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85 addps %1, %3 ; {t1,t2,t6,t5}
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86 subps %2, %3 ; {t3,t4,t8,t7}
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87 mova %3, %1
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88 shufps %1, %2, 0x44 ; {t1,t2,t3,t4}
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89 shufps %3, %2, 0xbe ; {t6,t5,t7,t8}
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90 mova %2, %1
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91 addps %1, %3 ; {r0,i0,r1,i1}
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92 subps %2, %3 ; {r2,i2,r3,i3}
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93 mova %3, %1
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94 shufps %1, %2, 0x88 ; {r0,r1,r2,r3}
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95 shufps %3, %2, 0xdd ; {i0,i1,i2,i3}
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96 SWAP %2, %3
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97 %endmacro
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98
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99 %macro T8_SSE 6 ; r0,i0,r1,i1,t0,t1
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100 mova %5, %3
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101 shufps %3, %4, 0x44 ; {r4,i4,r6,i6}
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102 shufps %5, %4, 0xee ; {r5,i5,r7,i7}
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103 mova %6, %3
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104 subps %3, %5 ; {r5,i5,r7,i7}
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105 addps %6, %5 ; {t1,t2,t3,t4}
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106 mova %5, %3
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107 shufps %5, %5, 0xb1 ; {i5,r5,i7,r7}
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108 mulps %3, [ps_root2mppm GLOBAL] ; {-r5,i5,r7,-i7}
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109 mulps %5, [ps_root2 GLOBAL]
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110 addps %3, %5 ; {t8,t7,ta,t9}
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111 mova %5, %6
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112 shufps %6, %3, 0x36 ; {t3,t2,t9,t8}
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113 shufps %5, %3, 0x9c ; {t1,t4,t7,ta}
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114 mova %3, %6
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115 addps %6, %5 ; {t1,t2,t9,ta}
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116 subps %3, %5 ; {t6,t5,tc,tb}
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117 mova %5, %6
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118 shufps %6, %3, 0xd8 ; {t1,t9,t5,tb}
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119 shufps %5, %3, 0x8d ; {t2,ta,t6,tc}
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120 mova %3, %1
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121 mova %4, %2
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122 addps %1, %6 ; {r0,r1,r2,r3}
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123 addps %2, %5 ; {i0,i1,i2,i3}
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124 subps %3, %6 ; {r4,r5,r6,r7}
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125 subps %4, %5 ; {i4,i5,i6,i7}
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126 %endmacro
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127
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128 ; scheduled for cpu-bound sizes
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129 %macro PASS_SMALL 3 ; (to load m4-m7), wre, wim
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130 IF%1 mova m4, Z(4)
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131 IF%1 mova m5, Z(5)
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132 mova m0, %2 ; wre
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133 mova m2, m4
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134 mova m1, %3 ; wim
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135 mova m3, m5
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136 mulps m2, m0 ; r2*wre
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137 IF%1 mova m6, Z(6)
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138 mulps m3, m1 ; i2*wim
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139 IF%1 mova m7, Z(7)
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140 mulps m4, m1 ; r2*wim
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141 mulps m5, m0 ; i2*wre
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142 addps m2, m3 ; r2*wre + i2*wim
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143 mova m3, m1
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144 mulps m1, m6 ; r3*wim
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145 subps m5, m4 ; i2*wre - r2*wim
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146 mova m4, m0
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147 mulps m3, m7 ; i3*wim
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148 mulps m4, m6 ; r3*wre
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149 mulps m0, m7 ; i3*wre
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150 subps m4, m3 ; r3*wre - i3*wim
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151 mova m3, Z(0)
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152 addps m0, m1 ; i3*wre + r3*wim
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153 mova m1, m4
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154 addps m4, m2 ; t5
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155 subps m1, m2 ; t3
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156 subps m3, m4 ; r2
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157 addps m4, Z(0) ; r0
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158 mova m6, Z(2)
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159 mova Z(4), m3
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160 mova Z(0), m4
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161 mova m3, m5
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162 subps m5, m0 ; t4
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163 mova m4, m6
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164 subps m6, m5 ; r3
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165 addps m5, m4 ; r1
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166 mova Z(6), m6
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167 mova Z(2), m5
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168 mova m2, Z(3)
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169 addps m3, m0 ; t6
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170 subps m2, m1 ; i3
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171 mova m7, Z(1)
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172 addps m1, Z(3) ; i1
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173 mova Z(7), m2
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174 mova Z(3), m1
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175 mova m4, m7
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176 subps m7, m3 ; i2
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177 addps m3, m4 ; i0
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178 mova Z(5), m7
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179 mova Z(1), m3
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180 %endmacro
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181
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182 ; scheduled to avoid store->load aliasing
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183 %macro PASS_BIG 1 ; (!interleave)
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184 mova m4, Z(4) ; r2
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185 mova m5, Z(5) ; i2
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186 mova m2, m4
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187 mova m0, [wq] ; wre
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188 mova m3, m5
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189 mova m1, [wq+o1q] ; wim
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190 mulps m2, m0 ; r2*wre
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191 mova m6, Z(6) ; r3
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192 mulps m3, m1 ; i2*wim
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193 mova m7, Z(7) ; i3
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194 mulps m4, m1 ; r2*wim
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195 mulps m5, m0 ; i2*wre
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196 addps m2, m3 ; r2*wre + i2*wim
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197 mova m3, m1
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198 mulps m1, m6 ; r3*wim
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199 subps m5, m4 ; i2*wre - r2*wim
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200 mova m4, m0
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201 mulps m3, m7 ; i3*wim
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202 mulps m4, m6 ; r3*wre
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203 mulps m0, m7 ; i3*wre
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204 subps m4, m3 ; r3*wre - i3*wim
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205 mova m3, Z(0)
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206 addps m0, m1 ; i3*wre + r3*wim
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207 mova m1, m4
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208 addps m4, m2 ; t5
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209 subps m1, m2 ; t3
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210 subps m3, m4 ; r2
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211 addps m4, Z(0) ; r0
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212 mova m6, Z(2)
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213 mova Z(4), m3
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214 mova Z(0), m4
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215 mova m3, m5
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216 subps m5, m0 ; t4
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217 mova m4, m6
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218 subps m6, m5 ; r3
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219 addps m5, m4 ; r1
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220 IF%1 mova Z(6), m6
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221 IF%1 mova Z(2), m5
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222 mova m2, Z(3)
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223 addps m3, m0 ; t6
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224 subps m2, m1 ; i3
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225 mova m7, Z(1)
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226 addps m1, Z(3) ; i1
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227 IF%1 mova Z(7), m2
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228 IF%1 mova Z(3), m1
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229 mova m4, m7
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230 subps m7, m3 ; i2
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231 addps m3, m4 ; i0
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232 IF%1 mova Z(5), m7
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233 IF%1 mova Z(1), m3
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234 %if %1==0
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235 mova m4, m5 ; r1
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236 mova m0, m6 ; r3
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237 unpcklps m5, m1
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238 unpckhps m4, m1
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239 unpcklps m6, m2
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240 unpckhps m0, m2
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241 mova m1, Z(0)
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242 mova m2, Z(4)
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243 mova Z(2), m5
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244 mova Z(3), m4
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245 mova Z(6), m6
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246 mova Z(7), m0
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247 mova m5, m1 ; r0
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248 mova m4, m2 ; r2
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249 unpcklps m1, m3
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250 unpckhps m5, m3
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251 unpcklps m2, m7
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252 unpckhps m4, m7
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253 mova Z(0), m1
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254 mova Z(1), m5
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255 mova Z(4), m2
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256 mova Z(5), m4
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257 %endif
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258 %endmacro
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259
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260 %macro PUNPCK 3
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261 mova %3, %1
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262 punpckldq %1, %2
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263 punpckhdq %3, %2
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264 %endmacro
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265
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266 INIT_XMM
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267
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268 %define Z(x) [r0+mmsize*x]
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269
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270 align 16
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271 fft4_sse:
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272 mova m0, Z(0)
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273 mova m1, Z(1)
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274 T4_SSE m0, m1, m2
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275 mova Z(0), m0
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276 mova Z(1), m1
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277 ret
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278
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279 align 16
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280 fft8_sse:
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281 mova m0, Z(0)
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282 mova m1, Z(1)
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283 T4_SSE m0, m1, m2
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284 mova m2, Z(2)
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285 mova m3, Z(3)
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286 T8_SSE m0, m1, m2, m3, m4, m5
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287 mova Z(0), m0
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288 mova Z(1), m1
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289 mova Z(2), m2
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290 mova Z(3), m3
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291 ret
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292
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293 align 16
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294 fft16_sse:
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295 mova m0, Z(0)
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296 mova m1, Z(1)
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297 T4_SSE m0, m1, m2
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298 mova m2, Z(2)
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299 mova m3, Z(3)
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300 T8_SSE m0, m1, m2, m3, m4, m5
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301 mova m4, Z(4)
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302 mova m5, Z(5)
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303 mova Z(0), m0
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304 mova Z(1), m1
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305 mova Z(2), m2
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306 mova Z(3), m3
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307 T4_SSE m4, m5, m6
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308 mova m6, Z(6)
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309 mova m7, Z(7)
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310 T4_SSE m6, m7, m0
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311 PASS_SMALL 0, [ff_cos_16 GLOBAL], [ff_cos_16+16 GLOBAL]
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312 ret
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313
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314
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315 INIT_MMX
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316
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317 %macro FFT48_3DN 1
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318 align 16
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319 fft4%1:
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320 T2_3DN m0, m1, Z(0), Z(1)
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321 mova m2, Z(2)
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322 mova m3, Z(3)
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323 T4_3DN m0, m1, m2, m3, m4, m5
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324 PUNPCK m0, m1, m4
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325 PUNPCK m2, m3, m5
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326 mova Z(0), m0
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327 mova Z(1), m4
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328 mova Z(2), m2
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329 mova Z(3), m5
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330 ret
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331
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332 align 16
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333 fft8%1:
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334 T2_3DN m0, m1, Z(0), Z(1)
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335 mova m2, Z(2)
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336 mova m3, Z(3)
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337 T4_3DN m0, m1, m2, m3, m4, m5
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338 mova Z(0), m0
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339 mova Z(2), m2
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340 T2_3DN m4, m5, Z(4), Z(5)
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341 T2_3DN m6, m7, Z(6), Z(7)
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342 pswapd m0, m5
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343 pswapd m2, m7
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344 pxor m0, [ps_m1p1 GLOBAL]
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345 pxor m2, [ps_m1p1 GLOBAL]
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346 pfsub m5, m0
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347 pfadd m7, m2
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348 pfmul m5, [ps_root2 GLOBAL]
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349 pfmul m7, [ps_root2 GLOBAL]
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350 T4_3DN m1, m3, m5, m7, m0, m2
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351 mova Z(5), m5
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352 mova Z(7), m7
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353 mova m0, Z(0)
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354 mova m2, Z(2)
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355 T4_3DN m0, m2, m4, m6, m5, m7
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356 PUNPCK m0, m1, m5
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357 PUNPCK m2, m3, m7
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358 mova Z(0), m0
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359 mova Z(1), m5
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360 mova Z(2), m2
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361 mova Z(3), m7
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362 PUNPCK m4, Z(5), m5
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363 PUNPCK m6, Z(7), m7
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364 mova Z(4), m4
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365 mova Z(5), m5
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366 mova Z(6), m6
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367 mova Z(7), m7
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368 ret
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369 %endmacro
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370
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371 FFT48_3DN _3dn2
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372
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373 %macro pswapd 2
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374 %ifidn %1, %2
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375 movd [r0+12], %1
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376 punpckhdq %1, [r0+8]
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377 %else
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378 movq %1, %2
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379 psrlq %1, 32
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380 punpckldq %1, %2
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381 %endif
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382 %endmacro
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383
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384 FFT48_3DN _3dn
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385
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386
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387 %define Z(x) [zq + o1q*(x&6)*((x/6)^1) + o3q*(x/6) + mmsize*(x&1)]
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388
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389 %macro DECL_PASS 2+ ; name, payload
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390 align 16
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391 %1:
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392 DEFINE_ARGS z, w, n, o1, o3
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393 lea o3q, [nq*3]
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394 lea o1q, [nq*8]
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395 shl o3q, 4
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396 .loop:
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397 %2
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398 add zq, mmsize*2
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399 add wq, mmsize
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400 sub nd, mmsize/8
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401 jg .loop
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402 rep ret
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403 %endmacro
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404
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405 INIT_XMM
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406 DECL_PASS pass_sse, PASS_BIG 1
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407 DECL_PASS pass_interleave_sse, PASS_BIG 0
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408
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409 INIT_MMX
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410 %define mulps pfmul
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411 %define addps pfadd
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412 %define subps pfsub
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413 %define unpcklps punpckldq
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414 %define unpckhps punpckhdq
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415 DECL_PASS pass_3dn, PASS_SMALL 1, [wq], [wq+o1q]
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416 DECL_PASS pass_interleave_3dn, PASS_BIG 0
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417 %define pass_3dn2 pass_3dn
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418 %define pass_interleave_3dn2 pass_interleave_3dn
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419
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420
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421 %macro DECL_FFT 2-3 ; nbits, cpu, suffix
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422 %xdefine list_of_fft fft4%2, fft8%2
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423 %if %1==5
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424 %xdefine list_of_fft list_of_fft, fft16%2
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425 %endif
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426
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427 %assign n 1<<%1
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428 %rep 17-%1
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429 %assign n2 n/2
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430 %assign n4 n/4
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431 %xdefine list_of_fft list_of_fft, fft %+ n %+ %3%2
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432
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433 align 16
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434 fft %+ n %+ %3%2:
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435 call fft %+ n2 %+ %2
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436 add r0, n*4 - (n&(-2<<%1))
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437 call fft %+ n4 %+ %2
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438 add r0, n*2 - (n2&(-2<<%1))
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439 call fft %+ n4 %+ %2
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440 sub r0, n*6 + (n2&(-2<<%1))
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441 lea r1, [ff_cos_ %+ n GLOBAL]
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442 mov r2d, n4/2
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443 jmp pass%3%2
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444
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445 %assign n n*2
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446 %endrep
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447 %undef n
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448
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449 align 8
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450 dispatch_tab%3%2: pointer list_of_fft
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451
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452 ; On x86_32, this function does the register saving and restoring for all of fft.
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453 ; The others pass args in registers and don't spill anything.
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454 cglobal ff_fft_dispatch%3%2, 2,5,0, z, nbits
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455 lea r2, [dispatch_tab%3%2 GLOBAL]
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456 mov r2, [r2 + (nbitsq-2)*gprsize]
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457 call r2
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458 RET
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459 %endmacro ; DECL_FFT
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460
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461 DECL_FFT 5, _sse
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462 DECL_FFT 5, _sse, _interleave
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463 DECL_FFT 4, _3dn
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464 DECL_FFT 4, _3dn, _interleave
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465 DECL_FFT 4, _3dn2
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466 DECL_FFT 4, _3dn2, _interleave
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467
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