annotate armv4l/mathops.h @ 7459:283eeda62184 libavcodec

Modify av_audio_convert() to use AVAudioConvert context struct; add av_audio_convert_alloc() and av_audio_convert_free() support functions.
author pross
date Fri, 01 Aug 2008 13:53:18 +0000
parents dc5a334c758b
children c4a4495715dd
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
3733
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
1 /*
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
2 * simple math operations
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
3 * Copyright (c) 2006 Michael Niedermayer <michaelni@gmx.at> et al
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
4 *
3947
c8c591fe26f8 Change license headers to say 'FFmpeg' instead of 'this program/this library'
diego
parents: 3767
diff changeset
5 * This file is part of FFmpeg.
c8c591fe26f8 Change license headers to say 'FFmpeg' instead of 'this program/this library'
diego
parents: 3767
diff changeset
6 *
c8c591fe26f8 Change license headers to say 'FFmpeg' instead of 'this program/this library'
diego
parents: 3767
diff changeset
7 * FFmpeg is free software; you can redistribute it and/or
3733
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
8 * modify it under the terms of the GNU Lesser General Public
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
9 * License as published by the Free Software Foundation; either
3947
c8c591fe26f8 Change license headers to say 'FFmpeg' instead of 'this program/this library'
diego
parents: 3767
diff changeset
10 * version 2.1 of the License, or (at your option) any later version.
3733
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
11 *
3947
c8c591fe26f8 Change license headers to say 'FFmpeg' instead of 'this program/this library'
diego
parents: 3767
diff changeset
12 * FFmpeg is distributed in the hope that it will be useful,
3733
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
15 * Lesser General Public License for more details.
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
16 *
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
17 * You should have received a copy of the GNU Lesser General Public
3947
c8c591fe26f8 Change license headers to say 'FFmpeg' instead of 'this program/this library'
diego
parents: 3767
diff changeset
18 * License along with FFmpeg; if not, write to the Free Software
3733
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
20 */
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
21
5830
1d83e9c34641 Add FFMPEG_ prefix to all multiple inclusion guards.
diego
parents: 5169
diff changeset
22 #ifndef FFMPEG_ARMV4L_MATHOPS_H
1d83e9c34641 Add FFMPEG_ prefix to all multiple inclusion guards.
diego
parents: 5169
diff changeset
23 #define FFMPEG_ARMV4L_MATHOPS_H
5163
9ecbfc0c82bf add multiple inclusion guards to headers
mru
parents: 3947
diff changeset
24
3733
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
25 #ifdef FRAC_BITS
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
26 # define MULL(a, b) \
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
27 ({ int lo, hi;\
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
28 asm("smull %0, %1, %2, %3 \n\t"\
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
29 "mov %0, %0, lsr %4\n\t"\
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
30 "add %1, %0, %1, lsl %5\n\t"\
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
31 : "=&r"(lo), "=&r"(hi)\
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
32 : "r"(b), "r"(a), "i"(FRAC_BITS), "i"(32-FRAC_BITS));\
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
33 hi; })
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
34 #endif
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
35
7280
c8b0366e066f ARM: ARMv6 optimised MULH
mru
parents: 5830
diff changeset
36 #ifdef HAVE_ARMV6
c8b0366e066f ARM: ARMv6 optimised MULH
mru
parents: 5830
diff changeset
37 static inline av_const int MULH(int a, int b)
c8b0366e066f ARM: ARMv6 optimised MULH
mru
parents: 5830
diff changeset
38 {
c8b0366e066f ARM: ARMv6 optimised MULH
mru
parents: 5830
diff changeset
39 int r;
c8b0366e066f ARM: ARMv6 optimised MULH
mru
parents: 5830
diff changeset
40 asm ("smmul %0, %1, %2" : "=r"(r) : "r"(a), "r"(b));
c8b0366e066f ARM: ARMv6 optimised MULH
mru
parents: 5830
diff changeset
41 return r;
c8b0366e066f ARM: ARMv6 optimised MULH
mru
parents: 5830
diff changeset
42 }
c8b0366e066f ARM: ARMv6 optimised MULH
mru
parents: 5830
diff changeset
43 #define MULH MULH
c8b0366e066f ARM: ARMv6 optimised MULH
mru
parents: 5830
diff changeset
44 #else
3733
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
45 #define MULH(a, b) \
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
46 ({ int lo, hi;\
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
47 asm ("smull %0, %1, %2, %3" : "=&r"(lo), "=&r"(hi) : "r"(b), "r"(a));\
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
48 hi; })
7280
c8b0366e066f ARM: ARMv6 optimised MULH
mru
parents: 5830
diff changeset
49 #endif
3733
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
50
7281
747908449de0 ARM: optimised MUL64
mru
parents: 7280
diff changeset
51 static inline av_const int64_t MUL64(int a, int b)
747908449de0 ARM: optimised MUL64
mru
parents: 7280
diff changeset
52 {
747908449de0 ARM: optimised MUL64
mru
parents: 7280
diff changeset
53 union { uint64_t x; unsigned hl[2]; } x;
747908449de0 ARM: optimised MUL64
mru
parents: 7280
diff changeset
54 asm ("smull %0, %1, %2, %3"
747908449de0 ARM: optimised MUL64
mru
parents: 7280
diff changeset
55 : "=r"(x.hl[0]), "=r"(x.hl[1]) : "r"(a), "r"(b));
747908449de0 ARM: optimised MUL64
mru
parents: 7280
diff changeset
56 return x.x;
747908449de0 ARM: optimised MUL64
mru
parents: 7280
diff changeset
57 }
747908449de0 ARM: optimised MUL64
mru
parents: 7280
diff changeset
58 #define MUL64 MUL64
747908449de0 ARM: optimised MUL64
mru
parents: 7280
diff changeset
59
7282
dc5a334c758b ARM: optimised MAC64 and MLS64
mru
parents: 7281
diff changeset
60 static inline av_const int64_t MAC64(int64_t d, int a, int b)
dc5a334c758b ARM: optimised MAC64 and MLS64
mru
parents: 7281
diff changeset
61 {
dc5a334c758b ARM: optimised MAC64 and MLS64
mru
parents: 7281
diff changeset
62 union { uint64_t x; unsigned hl[2]; } x = { d };
dc5a334c758b ARM: optimised MAC64 and MLS64
mru
parents: 7281
diff changeset
63 asm ("smlal %0, %1, %2, %3"
dc5a334c758b ARM: optimised MAC64 and MLS64
mru
parents: 7281
diff changeset
64 : "+r"(x.hl[0]), "+r"(x.hl[1]) : "r"(a), "r"(b));
dc5a334c758b ARM: optimised MAC64 and MLS64
mru
parents: 7281
diff changeset
65 return x.x;
dc5a334c758b ARM: optimised MAC64 and MLS64
mru
parents: 7281
diff changeset
66 }
dc5a334c758b ARM: optimised MAC64 and MLS64
mru
parents: 7281
diff changeset
67 #define MAC64(d, a, b) ((d) = MAC64(d, a, b))
dc5a334c758b ARM: optimised MAC64 and MLS64
mru
parents: 7281
diff changeset
68 #define MLS64(d, a, b) MAC64(d, -(a), b)
dc5a334c758b ARM: optimised MAC64 and MLS64
mru
parents: 7281
diff changeset
69
3733
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
70 #if defined(HAVE_ARMV5TE)
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
71
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
72 /* signed 16x16 -> 32 multiply add accumulate */
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
73 # define MAC16(rt, ra, rb) \
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
74 asm ("smlabb %0, %2, %3, %0" : "=r" (rt) : "0" (rt), "r" (ra), "r" (rb));
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
75 /* signed 16x16 -> 32 multiply */
3767
2eddcfa87eda fix MUL16 macro
mru
parents: 3733
diff changeset
76 # define MUL16(ra, rb) \
2eddcfa87eda fix MUL16 macro
mru
parents: 3733
diff changeset
77 ({ int __rt; \
2eddcfa87eda fix MUL16 macro
mru
parents: 3733
diff changeset
78 asm ("smulbb %0, %1, %2" : "=r" (__rt) : "r" (ra), "r" (rb)); \
3733
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
79 __rt; })
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
80
d1b5acd0b680 New single instruction math operation header
lu_zero
parents:
diff changeset
81 #endif
5163
9ecbfc0c82bf add multiple inclusion guards to headers
mru
parents: 3947
diff changeset
82
5830
1d83e9c34641 Add FFMPEG_ prefix to all multiple inclusion guards.
diego
parents: 5169
diff changeset
83 #endif /* FFMPEG_ARMV4L_MATHOPS_H */