Mercurial > libavcodec.hg
annotate i386/snowdsp_mmx.c @ 5594:384629ebcb93 libavcodec
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
(patch for plain mmx support is welcome ...)
author | michael |
---|---|
date | Sun, 26 Aug 2007 01:11:02 +0000 |
parents | bd015f9ea964 |
children | 9da9e00a04a5 |
rev | line source |
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1 /* |
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2 * MMX and SSE2 optimized snow DSP utils |
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3 * Copyright (c) 2005-2006 Robert Edele <yartrebo@earthlink.net> |
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4 * |
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5 * This file is part of FFmpeg. |
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6 * |
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7 * FFmpeg is free software; you can redistribute it and/or |
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8 * modify it under the terms of the GNU Lesser General Public |
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9 * License as published by the Free Software Foundation; either |
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10 * version 2.1 of the License, or (at your option) any later version. |
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11 * |
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12 * FFmpeg is distributed in the hope that it will be useful, |
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13 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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15 * Lesser General Public License for more details. |
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16 * |
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17 * You should have received a copy of the GNU Lesser General Public |
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18 * License along with FFmpeg; if not, write to the Free Software |
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19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
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20 */ |
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21 |
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22 #include "avcodec.h" |
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23 #include "snow.h" |
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24 #include "x86_cpu.h" |
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25 |
5591 | 26 void ff_snow_horizontal_compose97i_sse2(IDWTELEM *b, int width){ |
3210 | 27 const int w2= (width+1)>>1; |
28 // SSE2 code runs faster with pointers aligned on a 32-byte boundary. | |
5591 | 29 IDWTELEM temp_buf[(width>>1) + 4]; |
30 IDWTELEM * const temp = temp_buf + 4 - (((int)temp_buf & 0xF) >> 2); | |
3210 | 31 const int w_l= (width>>1); |
32 const int w_r= w2 - 1; | |
33 int i; | |
34 | |
35 { // Lift 0 | |
5591 | 36 IDWTELEM * const ref = b + w2 - 1; |
37 IDWTELEM b_0 = b[0]; //By allowing the first entry in b[0] to be calculated twice | |
3210 | 38 // (the first time erroneously), we allow the SSE2 code to run an extra pass. |
39 // The savings in code and time are well worth having to store this value and | |
40 // calculate b[0] correctly afterwards. | |
41 | |
42 i = 0; | |
43 asm volatile( | |
44 "pcmpeqd %%xmm7, %%xmm7 \n\t" | |
5591 | 45 "psllw $15, %%xmm7 \n\t" |
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46 "psrlw $14, %%xmm7 \n\t" |
3210 | 47 ::); |
5591 | 48 for(; i<w_l-15; i+=16){ |
3210 | 49 asm volatile( |
50 "movdqu (%1), %%xmm1 \n\t" | |
51 "movdqu 16(%1), %%xmm5 \n\t" | |
5591 | 52 "movdqu 2(%1), %%xmm2 \n\t" |
53 "movdqu 18(%1), %%xmm6 \n\t" | |
54 "paddw %%xmm1, %%xmm2 \n\t" | |
55 "paddw %%xmm5, %%xmm6 \n\t" | |
3210 | 56 "movdqa %%xmm2, %%xmm0 \n\t" |
57 "movdqa %%xmm6, %%xmm4 \n\t" | |
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58 "psraw $1, %%xmm0 \n\t" |
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59 "psraw $1, %%xmm4 \n\t" |
5591 | 60 "paddw %%xmm0, %%xmm2 \n\t" |
61 "paddw %%xmm4, %%xmm6 \n\t" | |
62 "paddw %%xmm7, %%xmm2 \n\t" | |
63 "paddw %%xmm7, %%xmm6 \n\t" | |
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64 "psraw $2, %%xmm2 \n\t" |
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65 "psraw $2, %%xmm6 \n\t" |
3210 | 66 "movdqa (%0), %%xmm0 \n\t" |
67 "movdqa 16(%0), %%xmm4 \n\t" | |
5591 | 68 "psubw %%xmm2, %%xmm0 \n\t" |
69 "psubw %%xmm6, %%xmm4 \n\t" | |
3210 | 70 "movdqa %%xmm0, (%0) \n\t" |
71 "movdqa %%xmm4, 16(%0) \n\t" | |
72 :: "r"(&b[i]), "r"(&ref[i]) | |
73 : "memory" | |
74 ); | |
75 } | |
76 snow_horizontal_compose_lift_lead_out(i, b, b, ref, width, w_l, 0, W_DM, W_DO, W_DS); | |
77 b[0] = b_0 - ((W_DM * 2 * ref[1]+W_DO)>>W_DS); | |
78 } | |
79 | |
80 { // Lift 1 | |
5591 | 81 IDWTELEM * const dst = b+w2; |
3210 | 82 |
83 i = 0; | |
5591 | 84 for(; (((long)&dst[i]) & 0x1F) && i<w_r; i++){ |
3210 | 85 dst[i] = dst[i] - (b[i] + b[i + 1]); |
86 } | |
5591 | 87 for(; i<w_r-15; i+=16){ |
3210 | 88 asm volatile( |
89 "movdqu (%1), %%xmm1 \n\t" | |
90 "movdqu 16(%1), %%xmm5 \n\t" | |
5591 | 91 "movdqu 2(%1), %%xmm2 \n\t" |
92 "movdqu 18(%1), %%xmm6 \n\t" | |
93 "paddw %%xmm1, %%xmm2 \n\t" | |
94 "paddw %%xmm5, %%xmm6 \n\t" | |
3210 | 95 "movdqa (%0), %%xmm0 \n\t" |
96 "movdqa 16(%0), %%xmm4 \n\t" | |
5591 | 97 "psubw %%xmm2, %%xmm0 \n\t" |
98 "psubw %%xmm6, %%xmm4 \n\t" | |
3210 | 99 "movdqa %%xmm0, (%0) \n\t" |
100 "movdqa %%xmm4, 16(%0) \n\t" | |
101 :: "r"(&dst[i]), "r"(&b[i]) | |
102 : "memory" | |
103 ); | |
104 } | |
105 snow_horizontal_compose_lift_lead_out(i, dst, dst, b, width, w_r, 1, W_CM, W_CO, W_CS); | |
106 } | |
107 | |
108 { // Lift 2 | |
5591 | 109 IDWTELEM * const ref = b+w2 - 1; |
110 IDWTELEM b_0 = b[0]; | |
3210 | 111 |
112 i = 0; | |
113 asm volatile( | |
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114 "psllw $13, %%xmm7 \n\t" |
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115 "pcmpeqw %%xmm6, %%xmm6 \n\t" |
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116 "psrlw $13, %%xmm6 \n\t" |
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117 "paddw %%xmm7, %%xmm6 \n\t" |
3210 | 118 ::); |
5591 | 119 for(; i<w_l-15; i+=16){ |
3210 | 120 asm volatile( |
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121 "movdqu (%1), %%xmm0 \n\t" |
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122 "movdqu 16(%1), %%xmm4 \n\t" |
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123 "movdqu 2(%1), %%xmm1 \n\t" |
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124 "movdqu 18(%1), %%xmm5 \n\t" //FIXME try aligned reads and shifts |
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125 "paddw %%xmm6, %%xmm0 \n\t" |
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126 "paddw %%xmm6, %%xmm4 \n\t" |
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127 "paddw %%xmm7, %%xmm1 \n\t" |
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128 "paddw %%xmm7, %%xmm5 \n\t" |
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129 "pavgw %%xmm1, %%xmm0 \n\t" |
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130 "pavgw %%xmm5, %%xmm4 \n\t" |
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131 "psubw %%xmm7, %%xmm0 \n\t" |
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132 "psubw %%xmm7, %%xmm4 \n\t" |
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133 "psraw $1, %%xmm0 \n\t" |
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134 "psraw $1, %%xmm4 \n\t" |
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135 "movdqa (%0), %%xmm1 \n\t" |
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136 "movdqa 16(%0), %%xmm5 \n\t" |
5591 | 137 "paddw %%xmm1, %%xmm0 \n\t" |
138 "paddw %%xmm5, %%xmm4 \n\t" | |
139 "psraw $2, %%xmm0 \n\t" | |
140 "psraw $2, %%xmm4 \n\t" | |
141 "paddw %%xmm1, %%xmm0 \n\t" | |
142 "paddw %%xmm5, %%xmm4 \n\t" | |
3210 | 143 "movdqa %%xmm0, (%0) \n\t" |
144 "movdqa %%xmm4, 16(%0) \n\t" | |
145 :: "r"(&b[i]), "r"(&ref[i]) | |
146 : "memory" | |
147 ); | |
148 } | |
149 snow_horizontal_compose_liftS_lead_out(i, b, b, ref, width, w_l); | |
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150 b[0] = b_0 + ((2 * ref[1] + W_BO-1 + 4 * b_0) >> W_BS); |
3210 | 151 } |
152 | |
153 { // Lift 3 | |
5591 | 154 IDWTELEM * const src = b+w2; |
3210 | 155 |
156 i = 0; | |
5591 | 157 for(; (((long)&temp[i]) & 0x1F) && i<w_r; i++){ |
3210 | 158 temp[i] = src[i] - ((-W_AM*(b[i] + b[i+1]))>>W_AS); |
159 } | |
160 for(; i<w_r-7; i+=8){ | |
161 asm volatile( | |
5591 | 162 "movdqu 2(%1), %%xmm2 \n\t" |
163 "movdqu 18(%1), %%xmm6 \n\t" | |
164 "paddw (%1), %%xmm2 \n\t" | |
165 "paddw 16(%1), %%xmm6 \n\t" | |
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166 "movdqu (%0), %%xmm0 \n\t" |
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167 "movdqu 16(%0), %%xmm4 \n\t" |
5591 | 168 "paddw %%xmm2, %%xmm0 \n\t" |
169 "paddw %%xmm6, %%xmm4 \n\t" | |
170 "psraw $1, %%xmm2 \n\t" | |
171 "psraw $1, %%xmm6 \n\t" | |
172 "paddw %%xmm0, %%xmm2 \n\t" | |
173 "paddw %%xmm4, %%xmm6 \n\t" | |
3210 | 174 "movdqa %%xmm2, (%2) \n\t" |
175 "movdqa %%xmm6, 16(%2) \n\t" | |
176 :: "r"(&src[i]), "r"(&b[i]), "r"(&temp[i]) | |
177 : "memory" | |
178 ); | |
179 } | |
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180 snow_horizontal_compose_lift_lead_out(i, temp, src, b, width, w_r, 1, -W_AM, W_AO+1, W_AS); |
3210 | 181 } |
182 | |
183 { | |
184 snow_interleave_line_header(&i, width, b, temp); | |
185 | |
5591 | 186 for (; (i & 0x3E) != 0x3E; i-=2){ |
187 b[i+1] = temp[i>>1]; | |
188 b[i] = b[i>>1]; | |
189 } | |
190 for (i-=62; i>=0; i-=64){ | |
191 asm volatile( | |
192 "movdqa (%1), %%xmm0 \n\t" | |
193 "movdqa 16(%1), %%xmm2 \n\t" | |
194 "movdqa 32(%1), %%xmm4 \n\t" | |
195 "movdqa 48(%1), %%xmm6 \n\t" | |
196 "movdqa (%1), %%xmm1 \n\t" | |
197 "movdqa 16(%1), %%xmm3 \n\t" | |
198 "movdqa 32(%1), %%xmm5 \n\t" | |
199 "movdqa 48(%1), %%xmm7 \n\t" | |
200 "punpcklwd (%2), %%xmm0 \n\t" | |
201 "punpcklwd 16(%2), %%xmm2 \n\t" | |
202 "punpcklwd 32(%2), %%xmm4 \n\t" | |
203 "punpcklwd 48(%2), %%xmm6 \n\t" | |
204 "movdqa %%xmm0, (%0) \n\t" | |
205 "movdqa %%xmm2, 32(%0) \n\t" | |
206 "movdqa %%xmm4, 64(%0) \n\t" | |
207 "movdqa %%xmm6, 96(%0) \n\t" | |
208 "punpckhwd (%2), %%xmm1 \n\t" | |
209 "punpckhwd 16(%2), %%xmm3 \n\t" | |
210 "punpckhwd 32(%2), %%xmm5 \n\t" | |
211 "punpckhwd 48(%2), %%xmm7 \n\t" | |
212 "movdqa %%xmm1, 16(%0) \n\t" | |
213 "movdqa %%xmm3, 48(%0) \n\t" | |
214 "movdqa %%xmm5, 80(%0) \n\t" | |
215 "movdqa %%xmm7, 112(%0) \n\t" | |
216 :: "r"(&(b)[i]), "r"(&(b)[i>>1]), "r"(&(temp)[i>>1]) | |
217 : "memory" | |
218 ); | |
219 } | |
220 } | |
221 } | |
222 | |
223 void ff_snow_horizontal_compose97i_mmx(IDWTELEM *b, int width){ | |
224 const int w2= (width+1)>>1; | |
225 IDWTELEM temp[width >> 1]; | |
226 const int w_l= (width>>1); | |
227 const int w_r= w2 - 1; | |
228 int i; | |
229 | |
230 { // Lift 0 | |
231 IDWTELEM * const ref = b + w2 - 1; | |
232 | |
233 i = 1; | |
234 b[0] = b[0] - ((W_DM * 2 * ref[1]+W_DO)>>W_DS); | |
235 asm volatile( | |
236 "pcmpeqw %%mm7, %%mm7 \n\t" | |
237 "psllw $15, %%mm7 \n\t" | |
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238 "psrlw $14, %%mm7 \n\t" |
5591 | 239 ::); |
240 for(; i<w_l-7; i+=8){ | |
241 asm volatile( | |
242 "movq (%1), %%mm2 \n\t" | |
243 "movq 8(%1), %%mm6 \n\t" | |
244 "paddw 2(%1), %%mm2 \n\t" | |
245 "paddw 10(%1), %%mm6 \n\t" | |
246 "movq %%mm2, %%mm0 \n\t" | |
247 "movq %%mm6, %%mm4 \n\t" | |
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248 "psraw $1, %%mm2 \n\t" |
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249 "psraw $1, %%mm6 \n\t" |
5591 | 250 "paddw %%mm0, %%mm2 \n\t" |
251 "paddw %%mm4, %%mm6 \n\t" | |
252 "paddw %%mm7, %%mm2 \n\t" | |
253 "paddw %%mm7, %%mm6 \n\t" | |
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254 "psraw $2, %%mm2 \n\t" |
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255 "psraw $2, %%mm6 \n\t" |
5591 | 256 "movq (%0), %%mm0 \n\t" |
257 "movq 8(%0), %%mm4 \n\t" | |
258 "psubw %%mm2, %%mm0 \n\t" | |
259 "psubw %%mm6, %%mm4 \n\t" | |
260 "movq %%mm0, (%0) \n\t" | |
261 "movq %%mm4, 8(%0) \n\t" | |
262 :: "r"(&b[i]), "r"(&ref[i]) | |
263 : "memory" | |
264 ); | |
265 } | |
266 snow_horizontal_compose_lift_lead_out(i, b, b, ref, width, w_l, 0, W_DM, W_DO, W_DS); | |
267 } | |
268 | |
269 { // Lift 1 | |
270 IDWTELEM * const dst = b+w2; | |
271 | |
272 i = 0; | |
273 for(; i<w_r-7; i+=8){ | |
274 asm volatile( | |
275 "movq (%1), %%mm2 \n\t" | |
276 "movq 8(%1), %%mm6 \n\t" | |
277 "paddw 2(%1), %%mm2 \n\t" | |
278 "paddw 10(%1), %%mm6 \n\t" | |
279 "movq (%0), %%mm0 \n\t" | |
280 "movq 8(%0), %%mm4 \n\t" | |
281 "psubw %%mm2, %%mm0 \n\t" | |
282 "psubw %%mm6, %%mm4 \n\t" | |
283 "movq %%mm0, (%0) \n\t" | |
284 "movq %%mm4, 8(%0) \n\t" | |
285 :: "r"(&dst[i]), "r"(&b[i]) | |
286 : "memory" | |
287 ); | |
288 } | |
289 snow_horizontal_compose_lift_lead_out(i, dst, dst, b, width, w_r, 1, W_CM, W_CO, W_CS); | |
290 } | |
291 | |
292 { // Lift 2 | |
293 IDWTELEM * const ref = b+w2 - 1; | |
294 | |
295 i = 1; | |
296 b[0] = b[0] + (((2 * ref[1] + W_BO) + 4 * b[0]) >> W_BS); | |
297 asm volatile( | |
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298 "psllw $13, %%mm7 \n\t" |
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299 "pcmpeqw %%mm6, %%mm6 \n\t" |
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300 "psrlw $13, %%mm6 \n\t" |
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301 "paddw %%mm7, %%mm6 \n\t" |
5591 | 302 ::); |
303 for(; i<w_l-7; i+=8){ | |
304 asm volatile( | |
305 "movq (%1), %%mm0 \n\t" | |
306 "movq 8(%1), %%mm4 \n\t" | |
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307 "movq 2(%1), %%mm1 \n\t" |
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308 "movq 10(%1), %%mm5 \n\t" |
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309 "paddw %%mm6, %%mm0 \n\t" |
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310 "paddw %%mm6, %%mm4 \n\t" |
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311 "paddw %%mm7, %%mm1 \n\t" |
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312 "paddw %%mm7, %%mm5 \n\t" |
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313 "pavgw %%mm1, %%mm0 \n\t" |
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314 "pavgw %%mm5, %%mm4 \n\t" |
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315 "psubw %%mm7, %%mm0 \n\t" |
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316 "psubw %%mm7, %%mm4 \n\t" |
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317 "psraw $1, %%mm0 \n\t" |
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318 "psraw $1, %%mm4 \n\t" |
5591 | 319 "movq (%0), %%mm1 \n\t" |
320 "movq 8(%0), %%mm5 \n\t" | |
321 "paddw %%mm1, %%mm0 \n\t" | |
322 "paddw %%mm5, %%mm4 \n\t" | |
323 "psraw $2, %%mm0 \n\t" | |
324 "psraw $2, %%mm4 \n\t" | |
325 "paddw %%mm1, %%mm0 \n\t" | |
326 "paddw %%mm5, %%mm4 \n\t" | |
327 "movq %%mm0, (%0) \n\t" | |
328 "movq %%mm4, 8(%0) \n\t" | |
329 :: "r"(&b[i]), "r"(&ref[i]) | |
330 : "memory" | |
331 ); | |
332 } | |
333 snow_horizontal_compose_liftS_lead_out(i, b, b, ref, width, w_l); | |
334 } | |
335 | |
336 { // Lift 3 | |
337 IDWTELEM * const src = b+w2; | |
338 i = 0; | |
339 | |
340 for(; i<w_r-7; i+=8){ | |
341 asm volatile( | |
342 "movq 2(%1), %%mm2 \n\t" | |
343 "movq 10(%1), %%mm6 \n\t" | |
344 "paddw (%1), %%mm2 \n\t" | |
345 "paddw 8(%1), %%mm6 \n\t" | |
346 "movq (%0), %%mm0 \n\t" | |
347 "movq 8(%0), %%mm4 \n\t" | |
348 "paddw %%mm2, %%mm0 \n\t" | |
349 "paddw %%mm6, %%mm4 \n\t" | |
350 "psraw $1, %%mm2 \n\t" | |
351 "psraw $1, %%mm6 \n\t" | |
352 "paddw %%mm0, %%mm2 \n\t" | |
353 "paddw %%mm4, %%mm6 \n\t" | |
354 "movq %%mm2, (%2) \n\t" | |
355 "movq %%mm6, 8(%2) \n\t" | |
356 :: "r"(&src[i]), "r"(&b[i]), "r"(&temp[i]) | |
357 : "memory" | |
358 ); | |
359 } | |
360 snow_horizontal_compose_lift_lead_out(i, temp, src, b, width, w_r, 1, -W_AM, W_AO+1, W_AS); | |
361 } | |
362 | |
363 { | |
364 snow_interleave_line_header(&i, width, b, temp); | |
365 | |
3210 | 366 for (; (i & 0x1E) != 0x1E; i-=2){ |
367 b[i+1] = temp[i>>1]; | |
368 b[i] = b[i>>1]; | |
369 } | |
370 for (i-=30; i>=0; i-=32){ | |
371 asm volatile( | |
372 "movq (%1), %%mm0 \n\t" | |
373 "movq 8(%1), %%mm2 \n\t" | |
374 "movq 16(%1), %%mm4 \n\t" | |
375 "movq 24(%1), %%mm6 \n\t" | |
376 "movq (%1), %%mm1 \n\t" | |
377 "movq 8(%1), %%mm3 \n\t" | |
378 "movq 16(%1), %%mm5 \n\t" | |
379 "movq 24(%1), %%mm7 \n\t" | |
5591 | 380 "punpcklwd (%2), %%mm0 \n\t" |
381 "punpcklwd 8(%2), %%mm2 \n\t" | |
382 "punpcklwd 16(%2), %%mm4 \n\t" | |
383 "punpcklwd 24(%2), %%mm6 \n\t" | |
3210 | 384 "movq %%mm0, (%0) \n\t" |
385 "movq %%mm2, 16(%0) \n\t" | |
386 "movq %%mm4, 32(%0) \n\t" | |
387 "movq %%mm6, 48(%0) \n\t" | |
5591 | 388 "punpckhwd (%2), %%mm1 \n\t" |
389 "punpckhwd 8(%2), %%mm3 \n\t" | |
390 "punpckhwd 16(%2), %%mm5 \n\t" | |
391 "punpckhwd 24(%2), %%mm7 \n\t" | |
3210 | 392 "movq %%mm1, 8(%0) \n\t" |
393 "movq %%mm3, 24(%0) \n\t" | |
394 "movq %%mm5, 40(%0) \n\t" | |
395 "movq %%mm7, 56(%0) \n\t" | |
396 :: "r"(&b[i]), "r"(&b[i>>1]), "r"(&temp[i>>1]) | |
397 : "memory" | |
398 ); | |
399 } | |
400 } | |
401 } | |
402 | |
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403 #define snow_vertical_compose_sse2_load_add(op,r,t0,t1,t2,t3)\ |
5591 | 404 ""op" (%%"r",%%"REG_d",2), %%"t0" \n\t"\ |
405 ""op" 16(%%"r",%%"REG_d",2), %%"t1" \n\t"\ | |
406 ""op" 32(%%"r",%%"REG_d",2), %%"t2" \n\t"\ | |
407 ""op" 48(%%"r",%%"REG_d",2), %%"t3" \n\t" | |
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408 |
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409 #define snow_vertical_compose_sse2_load(r,t0,t1,t2,t3)\ |
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410 snow_vertical_compose_sse2_load_add("movdqa",r,t0,t1,t2,t3) |
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411 |
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412 #define snow_vertical_compose_sse2_add(r,t0,t1,t2,t3)\ |
5591 | 413 snow_vertical_compose_sse2_load_add("paddw",r,t0,t1,t2,t3) |
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414 |
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415 #define snow_vertical_compose_sse2_sub(s0,s1,s2,s3,t0,t1,t2,t3)\ |
5591 | 416 "psubw %%"s0", %%"t0" \n\t"\ |
417 "psubw %%"s1", %%"t1" \n\t"\ | |
418 "psubw %%"s2", %%"t2" \n\t"\ | |
419 "psubw %%"s3", %%"t3" \n\t" | |
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420 |
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421 #define snow_vertical_compose_sse2_store(w,s0,s1,s2,s3)\ |
5591 | 422 "movdqa %%"s0", (%%"w",%%"REG_d",2) \n\t"\ |
423 "movdqa %%"s1", 16(%%"w",%%"REG_d",2) \n\t"\ | |
424 "movdqa %%"s2", 32(%%"w",%%"REG_d",2) \n\t"\ | |
425 "movdqa %%"s3", 48(%%"w",%%"REG_d",2) \n\t" | |
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426 |
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427 #define snow_vertical_compose_sse2_sra(n,t0,t1,t2,t3)\ |
5591 | 428 "psraw $"n", %%"t0" \n\t"\ |
429 "psraw $"n", %%"t1" \n\t"\ | |
430 "psraw $"n", %%"t2" \n\t"\ | |
431 "psraw $"n", %%"t3" \n\t" | |
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432 |
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433 #define snow_vertical_compose_sse2_r2r_add(s0,s1,s2,s3,t0,t1,t2,t3)\ |
5591 | 434 "paddw %%"s0", %%"t0" \n\t"\ |
435 "paddw %%"s1", %%"t1" \n\t"\ | |
436 "paddw %%"s2", %%"t2" \n\t"\ | |
437 "paddw %%"s3", %%"t3" \n\t" | |
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438 |
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439 #define snow_vertical_compose_sse2_move(s0,s1,s2,s3,t0,t1,t2,t3)\ |
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440 "movdqa %%"s0", %%"t0" \n\t"\ |
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441 "movdqa %%"s1", %%"t1" \n\t"\ |
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442 "movdqa %%"s2", %%"t2" \n\t"\ |
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443 "movdqa %%"s3", %%"t3" \n\t" |
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444 |
5591 | 445 void ff_snow_vertical_compose97i_sse2(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, IDWTELEM *b3, IDWTELEM *b4, IDWTELEM *b5, int width){ |
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446 long i = width; |
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447 |
5591 | 448 while(i & 0x1F) |
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449 { |
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450 i--; |
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451 b4[i] -= (W_DM*(b3[i] + b5[i])+W_DO)>>W_DS; |
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452 b3[i] -= (W_CM*(b2[i] + b4[i])+W_CO)>>W_CS; |
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453 b2[i] += (W_BM*(b1[i] + b3[i])+4*b2[i]+W_BO)>>W_BS; |
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454 b1[i] += (W_AM*(b0[i] + b2[i])+W_AO)>>W_AS; |
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455 } |
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456 |
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457 asm volatile ( |
33110c1008a4
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458 "jmp 2f \n\t" |
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459 "1: \n\t" |
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460 |
33110c1008a4
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461 "mov %6, %%"REG_a" \n\t" |
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462 "mov %4, %%"REG_S" \n\t" |
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463 |
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b63ef6fcbc70
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464 snow_vertical_compose_sse2_load(REG_S,"xmm0","xmm2","xmm4","xmm6") |
3207
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465 snow_vertical_compose_sse2_add(REG_a,"xmm0","xmm2","xmm4","xmm6") |
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466 snow_vertical_compose_sse2_move("xmm0","xmm2","xmm4","xmm6","xmm1","xmm3","xmm5","xmm7") |
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467 snow_vertical_compose_sse2_sra("1","xmm0","xmm2","xmm4","xmm6") |
3207
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468 snow_vertical_compose_sse2_r2r_add("xmm1","xmm3","xmm5","xmm7","xmm0","xmm2","xmm4","xmm6") |
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469 |
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470 "pcmpeqd %%xmm1, %%xmm1 \n\t" |
5591 | 471 "psllw $15, %%xmm1 \n\t" |
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472 "psrlw $14, %%xmm1 \n\t" |
3207
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473 "mov %5, %%"REG_a" \n\t" |
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474 |
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475 snow_vertical_compose_sse2_r2r_add("xmm1","xmm1","xmm1","xmm1","xmm0","xmm2","xmm4","xmm6") |
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476 snow_vertical_compose_sse2_sra("2","xmm0","xmm2","xmm4","xmm6") |
3207
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477 snow_vertical_compose_sse2_load(REG_a,"xmm1","xmm3","xmm5","xmm7") |
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478 snow_vertical_compose_sse2_sub("xmm0","xmm2","xmm4","xmm6","xmm1","xmm3","xmm5","xmm7") |
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479 snow_vertical_compose_sse2_store(REG_a,"xmm1","xmm3","xmm5","xmm7") |
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480 "mov %3, %%"REG_c" \n\t" |
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481 snow_vertical_compose_sse2_load(REG_S,"xmm0","xmm2","xmm4","xmm6") |
3207
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482 snow_vertical_compose_sse2_add(REG_c,"xmm1","xmm3","xmm5","xmm7") |
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483 snow_vertical_compose_sse2_sub("xmm1","xmm3","xmm5","xmm7","xmm0","xmm2","xmm4","xmm6") |
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484 snow_vertical_compose_sse2_store(REG_S,"xmm0","xmm2","xmm4","xmm6") |
3207
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485 "mov %2, %%"REG_a" \n\t" |
5594
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|
486 |
384629ebcb93
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487 "pcmpeqw %%xmm7, %%xmm7 \n\t" |
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488 "pcmpeqw %%xmm5, %%xmm5 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
489 "psllw $15, %%xmm7 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
490 "psrlw $13, %%xmm5 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
491 "paddw %%xmm7, %%xmm5 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
492 snow_vertical_compose_sse2_r2r_add("xmm5","xmm5","xmm5","xmm5","xmm0","xmm2","xmm4","xmm6") |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
493 "movq (%%"REG_a",%%"REG_d",2), %%xmm1 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
494 "movq 8(%%"REG_a",%%"REG_d",2), %%xmm3 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
495 "paddw %%xmm7, %%xmm1 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
496 "paddw %%xmm7, %%xmm3 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
497 "pavgw %%xmm1, %%xmm0 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
498 "pavgw %%xmm3, %%xmm2 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
499 "movq 16(%%"REG_a",%%"REG_d",2), %%xmm1 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
500 "movq 24(%%"REG_a",%%"REG_d",2), %%xmm3 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
501 "paddw %%xmm7, %%xmm1 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
502 "paddw %%xmm7, %%xmm3 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
503 "pavgw %%xmm1, %%xmm4 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
504 "pavgw %%xmm3, %%xmm6 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
505 snow_vertical_compose_sse2_sub("xmm7","xmm7","xmm7","xmm7","xmm0","xmm2","xmm4","xmm6") |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
506 snow_vertical_compose_sse2_sra("1","xmm0","xmm2","xmm4","xmm6") |
5560
2e63bd8e894d
Simplify and speedup code, reduce needed headroom by 2 bits in the 3rd
michael
parents:
5559
diff
changeset
|
507 snow_vertical_compose_sse2_add(REG_c,"xmm0","xmm2","xmm4","xmm6") |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
508 |
3566
b63ef6fcbc70
Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents:
3398
diff
changeset
|
509 "mov %1, %%"REG_S" \n\t" |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
510 |
5560
2e63bd8e894d
Simplify and speedup code, reduce needed headroom by 2 bits in the 3rd
michael
parents:
5559
diff
changeset
|
511 snow_vertical_compose_sse2_sra("2","xmm0","xmm2","xmm4","xmm6") |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
512 snow_vertical_compose_sse2_add(REG_c,"xmm0","xmm2","xmm4","xmm6") |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
513 snow_vertical_compose_sse2_store(REG_c,"xmm0","xmm2","xmm4","xmm6") |
3566
b63ef6fcbc70
Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents:
3398
diff
changeset
|
514 snow_vertical_compose_sse2_add(REG_S,"xmm0","xmm2","xmm4","xmm6") |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
515 snow_vertical_compose_sse2_move("xmm0","xmm2","xmm4","xmm6","xmm1","xmm3","xmm5","xmm7") |
5562
0074dd43ae5e
Simplify and optimize the 4th vertical lifting step of the SSE2 code (untested)
michael
parents:
5561
diff
changeset
|
516 snow_vertical_compose_sse2_sra("1","xmm0","xmm2","xmm4","xmm6") |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
517 snow_vertical_compose_sse2_r2r_add("xmm1","xmm3","xmm5","xmm7","xmm0","xmm2","xmm4","xmm6") |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
518 snow_vertical_compose_sse2_add(REG_a,"xmm0","xmm2","xmm4","xmm6") |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
519 snow_vertical_compose_sse2_store(REG_a,"xmm0","xmm2","xmm4","xmm6") |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
520 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
521 "2: \n\t" |
5591 | 522 "sub $32, %%"REG_d" \n\t" |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
523 "jge 1b \n\t" |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
524 :"+d"(i) |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
525 : |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
526 "m"(b0),"m"(b1),"m"(b2),"m"(b3),"m"(b4),"m"(b5): |
3566
b63ef6fcbc70
Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents:
3398
diff
changeset
|
527 "%"REG_a"","%"REG_S"","%"REG_c""); |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
528 } |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
529 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
530 #define snow_vertical_compose_mmx_load_add(op,r,t0,t1,t2,t3)\ |
5591 | 531 ""op" (%%"r",%%"REG_d",2), %%"t0" \n\t"\ |
532 ""op" 8(%%"r",%%"REG_d",2), %%"t1" \n\t"\ | |
533 ""op" 16(%%"r",%%"REG_d",2), %%"t2" \n\t"\ | |
534 ""op" 24(%%"r",%%"REG_d",2), %%"t3" \n\t" | |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
535 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
536 #define snow_vertical_compose_mmx_load(r,t0,t1,t2,t3)\ |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
537 snow_vertical_compose_mmx_load_add("movq",r,t0,t1,t2,t3) |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
538 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
539 #define snow_vertical_compose_mmx_add(r,t0,t1,t2,t3)\ |
5591 | 540 snow_vertical_compose_mmx_load_add("paddw",r,t0,t1,t2,t3) |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
541 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
542 #define snow_vertical_compose_mmx_sub(s0,s1,s2,s3,t0,t1,t2,t3)\ |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
543 snow_vertical_compose_sse2_sub(s0,s1,s2,s3,t0,t1,t2,t3) |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
544 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
545 #define snow_vertical_compose_mmx_store(w,s0,s1,s2,s3)\ |
5591 | 546 "movq %%"s0", (%%"w",%%"REG_d",2) \n\t"\ |
547 "movq %%"s1", 8(%%"w",%%"REG_d",2) \n\t"\ | |
548 "movq %%"s2", 16(%%"w",%%"REG_d",2) \n\t"\ | |
549 "movq %%"s3", 24(%%"w",%%"REG_d",2) \n\t" | |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
550 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
551 #define snow_vertical_compose_mmx_sra(n,t0,t1,t2,t3)\ |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
552 snow_vertical_compose_sse2_sra(n,t0,t1,t2,t3) |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
553 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
554 #define snow_vertical_compose_mmx_r2r_add(s0,s1,s2,s3,t0,t1,t2,t3)\ |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
555 snow_vertical_compose_sse2_r2r_add(s0,s1,s2,s3,t0,t1,t2,t3) |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
556 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
557 #define snow_vertical_compose_mmx_move(s0,s1,s2,s3,t0,t1,t2,t3)\ |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
558 "movq %%"s0", %%"t0" \n\t"\ |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
559 "movq %%"s1", %%"t1" \n\t"\ |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
560 "movq %%"s2", %%"t2" \n\t"\ |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
561 "movq %%"s3", %%"t3" \n\t" |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
562 |
5591 | 563 void ff_snow_vertical_compose97i_mmx(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, IDWTELEM *b3, IDWTELEM *b4, IDWTELEM *b5, int width){ |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
564 long i = width; |
5591 | 565 while(i & 15) |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
566 { |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
567 i--; |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
568 b4[i] -= (W_DM*(b3[i] + b5[i])+W_DO)>>W_DS; |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
569 b3[i] -= (W_CM*(b2[i] + b4[i])+W_CO)>>W_CS; |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
570 b2[i] += (W_BM*(b1[i] + b3[i])+4*b2[i]+W_BO)>>W_BS; |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
571 b1[i] += (W_AM*(b0[i] + b2[i])+W_AO)>>W_AS; |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
572 } |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
573 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
574 asm volatile( |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
575 "jmp 2f \n\t" |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
576 "1: \n\t" |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
577 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
578 "mov %6, %%"REG_a" \n\t" |
3566
b63ef6fcbc70
Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents:
3398
diff
changeset
|
579 "mov %4, %%"REG_S" \n\t" |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
580 |
3566
b63ef6fcbc70
Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents:
3398
diff
changeset
|
581 snow_vertical_compose_mmx_load(REG_S,"mm0","mm2","mm4","mm6") |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
582 snow_vertical_compose_mmx_add(REG_a,"mm0","mm2","mm4","mm6") |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
583 snow_vertical_compose_mmx_move("mm0","mm2","mm4","mm6","mm1","mm3","mm5","mm7") |
5592
fadffa1e5aef
prevent one overflow in the first vertical lifting step
michael
parents:
5591
diff
changeset
|
584 snow_vertical_compose_mmx_sra("1","mm0","mm2","mm4","mm6") |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
585 snow_vertical_compose_mmx_r2r_add("mm1","mm3","mm5","mm7","mm0","mm2","mm4","mm6") |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
586 |
5591 | 587 "pcmpeqw %%mm1, %%mm1 \n\t" |
588 "psllw $15, %%mm1 \n\t" | |
5592
fadffa1e5aef
prevent one overflow in the first vertical lifting step
michael
parents:
5591
diff
changeset
|
589 "psrlw $14, %%mm1 \n\t" |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
590 "mov %5, %%"REG_a" \n\t" |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
591 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
592 snow_vertical_compose_mmx_r2r_add("mm1","mm1","mm1","mm1","mm0","mm2","mm4","mm6") |
5592
fadffa1e5aef
prevent one overflow in the first vertical lifting step
michael
parents:
5591
diff
changeset
|
593 snow_vertical_compose_mmx_sra("2","mm0","mm2","mm4","mm6") |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
594 snow_vertical_compose_mmx_load(REG_a,"mm1","mm3","mm5","mm7") |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
595 snow_vertical_compose_mmx_sub("mm0","mm2","mm4","mm6","mm1","mm3","mm5","mm7") |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
596 snow_vertical_compose_mmx_store(REG_a,"mm1","mm3","mm5","mm7") |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
597 "mov %3, %%"REG_c" \n\t" |
3566
b63ef6fcbc70
Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents:
3398
diff
changeset
|
598 snow_vertical_compose_mmx_load(REG_S,"mm0","mm2","mm4","mm6") |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
599 snow_vertical_compose_mmx_add(REG_c,"mm1","mm3","mm5","mm7") |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
600 snow_vertical_compose_mmx_sub("mm1","mm3","mm5","mm7","mm0","mm2","mm4","mm6") |
3566
b63ef6fcbc70
Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents:
3398
diff
changeset
|
601 snow_vertical_compose_mmx_store(REG_S,"mm0","mm2","mm4","mm6") |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
602 "mov %2, %%"REG_a" \n\t" |
5594
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
603 "pcmpeqw %%mm7, %%mm7 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
604 "pcmpeqw %%mm5, %%mm5 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
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5593
diff
changeset
|
605 "psllw $15, %%mm7 \n\t" |
384629ebcb93
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michael
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changeset
|
606 "psrlw $13, %%mm5 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
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changeset
|
607 "paddw %%mm7, %%mm5 \n\t" |
384629ebcb93
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michael
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changeset
|
608 snow_vertical_compose_mmx_r2r_add("mm5","mm5","mm5","mm5","mm0","mm2","mm4","mm6") |
384629ebcb93
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michael
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|
609 "movq (%%"REG_a",%%"REG_d",2), %%mm1 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
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diff
changeset
|
610 "movq 8(%%"REG_a",%%"REG_d",2), %%mm3 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
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diff
changeset
|
611 "paddw %%mm7, %%mm1 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
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changeset
|
612 "paddw %%mm7, %%mm3 \n\t" |
384629ebcb93
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michael
parents:
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diff
changeset
|
613 "pavgw %%mm1, %%mm0 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
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changeset
|
614 "pavgw %%mm3, %%mm2 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
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changeset
|
615 "movq 16(%%"REG_a",%%"REG_d",2), %%mm1 \n\t" |
384629ebcb93
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michael
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changeset
|
616 "movq 24(%%"REG_a",%%"REG_d",2), %%mm3 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
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changeset
|
617 "paddw %%mm7, %%mm1 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
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changeset
|
618 "paddw %%mm7, %%mm3 \n\t" |
384629ebcb93
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michael
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changeset
|
619 "pavgw %%mm1, %%mm4 \n\t" |
384629ebcb93
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michael
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changeset
|
620 "pavgw %%mm3, %%mm6 \n\t" |
384629ebcb93
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michael
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changeset
|
621 snow_vertical_compose_sse2_sub("mm7","mm7","mm7","mm7","mm0","mm2","mm4","mm6") |
384629ebcb93
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michael
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changeset
|
622 snow_vertical_compose_mmx_sra("1","mm0","mm2","mm4","mm6") |
5559
9993d38f59cf
simplify, speedup and reduce needed headroom by 2 bits in the 3rd
michael
parents:
5558
diff
changeset
|
623 snow_vertical_compose_mmx_add(REG_c,"mm0","mm2","mm4","mm6") |
3207
33110c1008a4
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gpoirier
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diff
changeset
|
624 |
3566
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Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
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changeset
|
625 "mov %1, %%"REG_S" \n\t" |
3207
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Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
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diff
changeset
|
626 |
5559
9993d38f59cf
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michael
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changeset
|
627 snow_vertical_compose_mmx_sra("2","mm0","mm2","mm4","mm6") |
3207
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gpoirier
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|
628 snow_vertical_compose_mmx_add(REG_c,"mm0","mm2","mm4","mm6") |
33110c1008a4
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|
629 snow_vertical_compose_mmx_store(REG_c,"mm0","mm2","mm4","mm6") |
3566
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Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
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630 snow_vertical_compose_mmx_add(REG_S,"mm0","mm2","mm4","mm6") |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
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diff
changeset
|
631 snow_vertical_compose_mmx_move("mm0","mm2","mm4","mm6","mm1","mm3","mm5","mm7") |
5561
225867be27f7
Simplify and optimize the 4th vertical lifting step of the MMX code
michael
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5560
diff
changeset
|
632 snow_vertical_compose_mmx_sra("1","mm0","mm2","mm4","mm6") |
3207
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Add the mmx and sse2 implementations of ff_snow_vertical_compose().
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|
633 snow_vertical_compose_mmx_r2r_add("mm1","mm3","mm5","mm7","mm0","mm2","mm4","mm6") |
33110c1008a4
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|
634 snow_vertical_compose_mmx_add(REG_a,"mm0","mm2","mm4","mm6") |
33110c1008a4
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|
635 snow_vertical_compose_mmx_store(REG_a,"mm0","mm2","mm4","mm6") |
33110c1008a4
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diff
changeset
|
636 |
33110c1008a4
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|
637 "2: \n\t" |
5591 | 638 "sub $16, %%"REG_d" \n\t" |
3207
33110c1008a4
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parents:
diff
changeset
|
639 "jge 1b \n\t" |
33110c1008a4
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diff
changeset
|
640 :"+d"(i) |
33110c1008a4
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gpoirier
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diff
changeset
|
641 : |
33110c1008a4
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gpoirier
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diff
changeset
|
642 "m"(b0),"m"(b1),"m"(b2),"m"(b3),"m"(b4),"m"(b5): |
3566
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Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
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|
643 "%"REG_a"","%"REG_S"","%"REG_c""); |
3207
33110c1008a4
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|
644 } |
3211
b77b5e7072d6
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|
645 |
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|
646 #define snow_inner_add_yblock_sse2_header \ |
5591 | 647 IDWTELEM * * dst_array = sb->line + src_y;\ |
3566
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Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
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|
648 long tmp;\ |
3211
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|
649 asm volatile(\ |
3566
b63ef6fcbc70
Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
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changeset
|
650 "mov %7, %%"REG_c" \n\t"\ |
b63ef6fcbc70
Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
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|
651 "mov %6, %2 \n\t"\ |
b63ef6fcbc70
Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
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changeset
|
652 "mov %4, %%"REG_S" \n\t"\ |
3211
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|
653 "pxor %%xmm7, %%xmm7 \n\t" /* 0 */\ |
b77b5e7072d6
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|
654 "pcmpeqd %%xmm3, %%xmm3 \n\t"\ |
5591 | 655 "psllw $15, %%xmm3 \n\t"\ |
656 "psrlw $12, %%xmm3 \n\t" /* FRAC_BITS >> 1 */\ | |
3211
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|
657 "1: \n\t"\ |
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changeset
|
658 "mov %1, %%"REG_D" \n\t"\ |
b77b5e7072d6
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|
659 "mov (%%"REG_D"), %%"REG_D" \n\t"\ |
3566
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Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
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changeset
|
660 "add %3, %%"REG_D" \n\t" |
3211
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|
661 |
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|
662 #define snow_inner_add_yblock_sse2_start_8(out_reg1, out_reg2, ptr_offset, s_offset)\ |
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|
663 "mov "PTR_SIZE"*"ptr_offset"(%%"REG_a"), %%"REG_d"; \n\t"\ |
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|
664 "movq (%%"REG_d"), %%"out_reg1" \n\t"\ |
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
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|
665 "movq (%%"REG_d", %%"REG_c"), %%"out_reg2" \n\t"\ |
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
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changeset
|
666 "punpcklbw %%xmm7, %%"out_reg1" \n\t"\ |
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add MMX and SSE versions of ff_snow_inner_add_yblock
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changeset
|
667 "punpcklbw %%xmm7, %%"out_reg2" \n\t"\ |
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
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changeset
|
668 "movq "s_offset"(%%"REG_S"), %%xmm0 \n\t"\ |
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
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changeset
|
669 "movq "s_offset"+16(%%"REG_S"), %%xmm4 \n\t"\ |
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add MMX and SSE versions of ff_snow_inner_add_yblock
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changeset
|
670 "punpcklbw %%xmm7, %%xmm0 \n\t"\ |
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
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changeset
|
671 "punpcklbw %%xmm7, %%xmm4 \n\t"\ |
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add MMX and SSE versions of ff_snow_inner_add_yblock
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changeset
|
672 "pmullw %%xmm0, %%"out_reg1" \n\t"\ |
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
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changeset
|
673 "pmullw %%xmm4, %%"out_reg2" \n\t" |
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
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|
674 |
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|
675 #define snow_inner_add_yblock_sse2_start_16(out_reg1, out_reg2, ptr_offset, s_offset)\ |
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|
676 "mov "PTR_SIZE"*"ptr_offset"(%%"REG_a"), %%"REG_d"; \n\t"\ |
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
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changeset
|
677 "movq (%%"REG_d"), %%"out_reg1" \n\t"\ |
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add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
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|
678 "movq 8(%%"REG_d"), %%"out_reg2" \n\t"\ |
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add MMX and SSE versions of ff_snow_inner_add_yblock
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parents:
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changeset
|
679 "punpcklbw %%xmm7, %%"out_reg1" \n\t"\ |
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add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents:
3210
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changeset
|
680 "punpcklbw %%xmm7, %%"out_reg2" \n\t"\ |
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
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changeset
|
681 "movq "s_offset"(%%"REG_S"), %%xmm0 \n\t"\ |
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add MMX and SSE versions of ff_snow_inner_add_yblock
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changeset
|
682 "movq "s_offset"+8(%%"REG_S"), %%xmm4 \n\t"\ |
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
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changeset
|
683 "punpcklbw %%xmm7, %%xmm0 \n\t"\ |
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
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changeset
|
684 "punpcklbw %%xmm7, %%xmm4 \n\t"\ |
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
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changeset
|
685 "pmullw %%xmm0, %%"out_reg1" \n\t"\ |
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
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|
686 "pmullw %%xmm4, %%"out_reg2" \n\t" |
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
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|
687 |
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|
688 #define snow_inner_add_yblock_sse2_accum_8(ptr_offset, s_offset) \ |
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|
689 snow_inner_add_yblock_sse2_start_8("xmm2", "xmm6", ptr_offset, s_offset)\ |
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add MMX and SSE versions of ff_snow_inner_add_yblock
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changeset
|
690 "paddusw %%xmm2, %%xmm1 \n\t"\ |
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add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
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3210
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changeset
|
691 "paddusw %%xmm6, %%xmm5 \n\t" |
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|
692 |
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|
693 #define snow_inner_add_yblock_sse2_accum_16(ptr_offset, s_offset) \ |
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|
694 snow_inner_add_yblock_sse2_start_16("xmm2", "xmm6", ptr_offset, s_offset)\ |
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|
695 "paddusw %%xmm2, %%xmm1 \n\t"\ |
b77b5e7072d6
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changeset
|
696 "paddusw %%xmm6, %%xmm5 \n\t" |
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|
697 |
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|
698 #define snow_inner_add_yblock_sse2_end_common1\ |
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|
699 "add $32, %%"REG_S" \n\t"\ |
b77b5e7072d6
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changeset
|
700 "add %%"REG_c", %0 \n\t"\ |
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changeset
|
701 "add %%"REG_c", "PTR_SIZE"*3(%%"REG_a");\n\t"\ |
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add MMX and SSE versions of ff_snow_inner_add_yblock
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|
702 "add %%"REG_c", "PTR_SIZE"*2(%%"REG_a");\n\t"\ |
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changeset
|
703 "add %%"REG_c", "PTR_SIZE"*1(%%"REG_a");\n\t"\ |
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add MMX and SSE versions of ff_snow_inner_add_yblock
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|
704 "add %%"REG_c", (%%"REG_a") \n\t" |
b77b5e7072d6
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|
705 |
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changeset
|
706 #define snow_inner_add_yblock_sse2_end_common2\ |
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changeset
|
707 "jnz 1b \n\t"\ |
3566
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changeset
|
708 :"+m"(dst8),"+m"(dst_array),"=&r"(tmp)\ |
3211
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|
709 :\ |
5591 | 710 "rm"((long)(src_x<<1)),"m"(obmc),"a"(block),"m"((long)b_h),"m"((long)src_stride):\ |
3566
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Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
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diff
changeset
|
711 "%"REG_c"","%"REG_S"","%"REG_D"","%"REG_d""); |
3211
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712 |
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713 #define snow_inner_add_yblock_sse2_end_8\ |
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|
714 "sal $1, %%"REG_c" \n\t"\ |
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|
715 "add $"PTR_SIZE"*2, %1 \n\t"\ |
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add MMX and SSE versions of ff_snow_inner_add_yblock
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716 snow_inner_add_yblock_sse2_end_common1\ |
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add MMX and SSE versions of ff_snow_inner_add_yblock
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717 "sar $1, %%"REG_c" \n\t"\ |
3566
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Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
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|
718 "sub $2, %2 \n\t"\ |
3211
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|
719 snow_inner_add_yblock_sse2_end_common2 |
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|
720 |
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|
721 #define snow_inner_add_yblock_sse2_end_16\ |
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722 "add $"PTR_SIZE"*1, %1 \n\t"\ |
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add MMX and SSE versions of ff_snow_inner_add_yblock
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723 snow_inner_add_yblock_sse2_end_common1\ |
3566
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Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
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|
724 "dec %2 \n\t"\ |
3211
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725 snow_inner_add_yblock_sse2_end_common2 |
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726 |
4436
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Add the const specifier as needed to reduce the number of warnings.
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727 static void inner_add_yblock_bw_8_obmc_16_bh_even_sse2(const uint8_t *obmc, const long obmc_stride, uint8_t * * block, int b_w, long b_h, |
3211
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728 int src_x, int src_y, long src_stride, slice_buffer * sb, int add, uint8_t * dst8){ |
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|
729 snow_inner_add_yblock_sse2_header |
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|
730 snow_inner_add_yblock_sse2_start_8("xmm1", "xmm5", "3", "0") |
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731 snow_inner_add_yblock_sse2_accum_8("2", "8") |
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732 snow_inner_add_yblock_sse2_accum_8("1", "128") |
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733 snow_inner_add_yblock_sse2_accum_8("0", "136") |
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734 |
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|
735 "mov %0, %%"REG_d" \n\t" |
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736 "movdqa (%%"REG_D"), %%xmm0 \n\t" |
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737 "movdqa %%xmm1, %%xmm2 \n\t" |
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|
738 |
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739 "punpckhwd %%xmm7, %%xmm1 \n\t" |
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|
740 "punpcklwd %%xmm7, %%xmm2 \n\t" |
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741 "paddd %%xmm2, %%xmm0 \n\t" |
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742 "movdqa 16(%%"REG_D"), %%xmm2 \n\t" |
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743 "paddd %%xmm1, %%xmm2 \n\t" |
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744 "paddd %%xmm3, %%xmm0 \n\t" |
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|
745 "paddd %%xmm3, %%xmm2 \n\t" |
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|
746 |
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747 "mov %1, %%"REG_D" \n\t" |
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748 "mov "PTR_SIZE"(%%"REG_D"), %%"REG_D";\n\t" |
3566
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Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
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|
749 "add %3, %%"REG_D" \n\t" |
3211
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750 |
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|
751 "movdqa (%%"REG_D"), %%xmm4 \n\t" |
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752 "movdqa %%xmm5, %%xmm6 \n\t" |
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
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|
753 "punpckhwd %%xmm7, %%xmm5 \n\t" |
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
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|
754 "punpcklwd %%xmm7, %%xmm6 \n\t" |
b77b5e7072d6
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|
755 "paddd %%xmm6, %%xmm4 \n\t" |
b77b5e7072d6
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|
756 "movdqa 16(%%"REG_D"), %%xmm6 \n\t" |
b77b5e7072d6
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757 "paddd %%xmm5, %%xmm6 \n\t" |
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|
758 "paddd %%xmm3, %%xmm4 \n\t" |
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|
759 "paddd %%xmm3, %%xmm6 \n\t" |
b77b5e7072d6
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|
760 |
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761 "psrad $8, %%xmm0 \n\t" /* FRAC_BITS. */ |
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762 "psrad $8, %%xmm2 \n\t" /* FRAC_BITS. */ |
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|
763 "packssdw %%xmm2, %%xmm0 \n\t" |
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
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|
764 "packuswb %%xmm7, %%xmm0 \n\t" |
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|
765 "movq %%xmm0, (%%"REG_d") \n\t" |
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|
766 |
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|
767 "psrad $8, %%xmm4 \n\t" /* FRAC_BITS. */ |
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|
768 "psrad $8, %%xmm6 \n\t" /* FRAC_BITS. */ |
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|
769 "packssdw %%xmm6, %%xmm4 \n\t" |
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add MMX and SSE versions of ff_snow_inner_add_yblock
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changeset
|
770 "packuswb %%xmm7, %%xmm4 \n\t" |
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add MMX and SSE versions of ff_snow_inner_add_yblock
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|
771 "movq %%xmm4, (%%"REG_d",%%"REG_c");\n\t" |
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|
772 snow_inner_add_yblock_sse2_end_8 |
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|
773 } |
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|
774 |
4436
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takis
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3947
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changeset
|
775 static void inner_add_yblock_bw_16_obmc_32_sse2(const uint8_t *obmc, const long obmc_stride, uint8_t * * block, int b_w, long b_h, |
3211
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776 int src_x, int src_y, long src_stride, slice_buffer * sb, int add, uint8_t * dst8){ |
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add MMX and SSE versions of ff_snow_inner_add_yblock
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|
777 snow_inner_add_yblock_sse2_header |
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778 snow_inner_add_yblock_sse2_start_16("xmm1", "xmm5", "3", "0") |
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|
779 snow_inner_add_yblock_sse2_accum_16("2", "16") |
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|
780 snow_inner_add_yblock_sse2_accum_16("1", "512") |
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|
781 snow_inner_add_yblock_sse2_accum_16("0", "528") |
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|
782 |
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|
783 "mov %0, %%"REG_d" \n\t" |
5591 | 784 "psrlw $4, %%xmm1 \n\t" |
785 "psrlw $4, %%xmm5 \n\t" | |
786 "paddw (%%"REG_D"), %%xmm1 \n\t" | |
787 "paddw 16(%%"REG_D"), %%xmm5 \n\t" | |
788 "paddw %%xmm3, %%xmm1 \n\t" | |
789 "paddw %%xmm3, %%xmm5 \n\t" | |
790 "psraw $4, %%xmm1 \n\t" /* FRAC_BITS. */ | |
791 "psraw $4, %%xmm5 \n\t" /* FRAC_BITS. */ | |
792 "packuswb %%xmm5, %%xmm1 \n\t" | |
3211
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|
793 |
5591 | 794 "movdqu %%xmm1, (%%"REG_d") \n\t" |
3211
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|
795 |
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|
796 snow_inner_add_yblock_sse2_end_16 |
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|
797 } |
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|
798 |
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|
799 #define snow_inner_add_yblock_mmx_header \ |
5591 | 800 IDWTELEM * * dst_array = sb->line + src_y;\ |
3566
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|
801 long tmp;\ |
3211
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changeset
|
802 asm volatile(\ |
3566
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changeset
|
803 "mov %7, %%"REG_c" \n\t"\ |
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Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
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|
804 "mov %6, %2 \n\t"\ |
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Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
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|
805 "mov %4, %%"REG_S" \n\t"\ |
3211
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|
806 "pxor %%mm7, %%mm7 \n\t" /* 0 */\ |
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changeset
|
807 "pcmpeqd %%mm3, %%mm3 \n\t"\ |
5591 | 808 "psllw $15, %%mm3 \n\t"\ |
809 "psrlw $12, %%mm3 \n\t" /* FRAC_BITS >> 1 */\ | |
3211
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810 "1: \n\t"\ |
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changeset
|
811 "mov %1, %%"REG_D" \n\t"\ |
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812 "mov (%%"REG_D"), %%"REG_D" \n\t"\ |
3566
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|
813 "add %3, %%"REG_D" \n\t" |
3211
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|
814 |
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|
815 #define snow_inner_add_yblock_mmx_start(out_reg1, out_reg2, ptr_offset, s_offset, d_offset)\ |
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816 "mov "PTR_SIZE"*"ptr_offset"(%%"REG_a"), %%"REG_d"; \n\t"\ |
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817 "movd "d_offset"(%%"REG_d"), %%"out_reg1" \n\t"\ |
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818 "movd "d_offset"+4(%%"REG_d"), %%"out_reg2" \n\t"\ |
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|
819 "punpcklbw %%mm7, %%"out_reg1" \n\t"\ |
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|
820 "punpcklbw %%mm7, %%"out_reg2" \n\t"\ |
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|
821 "movd "s_offset"(%%"REG_S"), %%mm0 \n\t"\ |
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|
822 "movd "s_offset"+4(%%"REG_S"), %%mm4 \n\t"\ |
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823 "punpcklbw %%mm7, %%mm0 \n\t"\ |
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824 "punpcklbw %%mm7, %%mm4 \n\t"\ |
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825 "pmullw %%mm0, %%"out_reg1" \n\t"\ |
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826 "pmullw %%mm4, %%"out_reg2" \n\t" |
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827 |
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828 #define snow_inner_add_yblock_mmx_accum(ptr_offset, s_offset, d_offset) \ |
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829 snow_inner_add_yblock_mmx_start("mm2", "mm6", ptr_offset, s_offset, d_offset)\ |
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830 "paddusw %%mm2, %%mm1 \n\t"\ |
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831 "paddusw %%mm6, %%mm5 \n\t" |
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832 |
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833 #define snow_inner_add_yblock_mmx_mix(read_offset, write_offset)\ |
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834 "mov %0, %%"REG_d" \n\t"\ |
5591 | 835 "psrlw $4, %%mm1 \n\t"\ |
836 "psrlw $4, %%mm5 \n\t"\ | |
837 "paddw "read_offset"(%%"REG_D"), %%mm1 \n\t"\ | |
838 "paddw "read_offset"+8(%%"REG_D"), %%mm5 \n\t"\ | |
839 "paddw %%mm3, %%mm1 \n\t"\ | |
840 "paddw %%mm3, %%mm5 \n\t"\ | |
841 "psraw $4, %%mm1 \n\t"\ | |
842 "psraw $4, %%mm5 \n\t"\ | |
843 "packuswb %%mm5, %%mm1 \n\t"\ | |
844 "movq %%mm1, "write_offset"(%%"REG_d") \n\t" | |
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845 |
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846 #define snow_inner_add_yblock_mmx_end(s_step)\ |
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847 "add $"s_step", %%"REG_S" \n\t"\ |
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848 "add %%"REG_c", "PTR_SIZE"*3(%%"REG_a");\n\t"\ |
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849 "add %%"REG_c", "PTR_SIZE"*2(%%"REG_a");\n\t"\ |
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850 "add %%"REG_c", "PTR_SIZE"*1(%%"REG_a");\n\t"\ |
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851 "add %%"REG_c", (%%"REG_a") \n\t"\ |
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852 "add $"PTR_SIZE"*1, %1 \n\t"\ |
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853 "add %%"REG_c", %0 \n\t"\ |
3566
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854 "dec %2 \n\t"\ |
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855 "jnz 1b \n\t"\ |
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856 :"+m"(dst8),"+m"(dst_array),"=&r"(tmp)\ |
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857 :\ |
5591 | 858 "rm"((long)(src_x<<1)),"m"(obmc),"a"(block),"m"((long)b_h),"m"((long)src_stride):\ |
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859 "%"REG_c"","%"REG_S"","%"REG_D"","%"REG_d""); |
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860 |
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861 static void inner_add_yblock_bw_8_obmc_16_mmx(const uint8_t *obmc, const long obmc_stride, uint8_t * * block, int b_w, long b_h, |
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862 int src_x, int src_y, long src_stride, slice_buffer * sb, int add, uint8_t * dst8){ |
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863 snow_inner_add_yblock_mmx_header |
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864 snow_inner_add_yblock_mmx_start("mm1", "mm5", "3", "0", "0") |
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865 snow_inner_add_yblock_mmx_accum("2", "8", "0") |
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866 snow_inner_add_yblock_mmx_accum("1", "128", "0") |
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867 snow_inner_add_yblock_mmx_accum("0", "136", "0") |
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868 snow_inner_add_yblock_mmx_mix("0", "0") |
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869 snow_inner_add_yblock_mmx_end("16") |
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870 } |
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871 |
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872 static void inner_add_yblock_bw_16_obmc_32_mmx(const uint8_t *obmc, const long obmc_stride, uint8_t * * block, int b_w, long b_h, |
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873 int src_x, int src_y, long src_stride, slice_buffer * sb, int add, uint8_t * dst8){ |
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874 snow_inner_add_yblock_mmx_header |
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875 snow_inner_add_yblock_mmx_start("mm1", "mm5", "3", "0", "0") |
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876 snow_inner_add_yblock_mmx_accum("2", "16", "0") |
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877 snow_inner_add_yblock_mmx_accum("1", "512", "0") |
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878 snow_inner_add_yblock_mmx_accum("0", "528", "0") |
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879 snow_inner_add_yblock_mmx_mix("0", "0") |
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880 |
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881 snow_inner_add_yblock_mmx_start("mm1", "mm5", "3", "8", "8") |
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882 snow_inner_add_yblock_mmx_accum("2", "24", "8") |
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883 snow_inner_add_yblock_mmx_accum("1", "520", "8") |
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884 snow_inner_add_yblock_mmx_accum("0", "536", "8") |
5591 | 885 snow_inner_add_yblock_mmx_mix("16", "8") |
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886 snow_inner_add_yblock_mmx_end("32") |
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887 } |
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888 |
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889 void ff_snow_inner_add_yblock_sse2(const uint8_t *obmc, const int obmc_stride, uint8_t * * block, int b_w, int b_h, |
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890 int src_x, int src_y, int src_stride, slice_buffer * sb, int add, uint8_t * dst8){ |
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891 |
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892 if (b_w == 16) |
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893 inner_add_yblock_bw_16_obmc_32_sse2(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8); |
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894 else if (b_w == 8 && obmc_stride == 16) { |
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895 if (!(b_h & 1)) |
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896 inner_add_yblock_bw_8_obmc_16_bh_even_sse2(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8); |
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897 else |
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898 inner_add_yblock_bw_8_obmc_16_mmx(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8); |
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899 } else |
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900 ff_snow_inner_add_yblock(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8); |
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901 } |
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902 |
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903 void ff_snow_inner_add_yblock_mmx(const uint8_t *obmc, const int obmc_stride, uint8_t * * block, int b_w, int b_h, |
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904 int src_x, int src_y, int src_stride, slice_buffer * sb, int add, uint8_t * dst8){ |
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905 if (b_w == 16) |
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906 inner_add_yblock_bw_16_obmc_32_mmx(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8); |
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907 else if (b_w == 8 && obmc_stride == 16) |
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908 inner_add_yblock_bw_8_obmc_16_mmx(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8); |
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909 else |
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910 ff_snow_inner_add_yblock(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8); |
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911 } |