Mercurial > libavcodec.hg
annotate i386/dsputil_mmx.c @ 8093:408d200a6179 libavcodec
Remove nonsense @return Doxygen comment for void function.
author | diego |
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date | Thu, 30 Oct 2008 22:12:43 +0000 |
parents | 915bc657348f |
children | 0d108ec85620 |
rev | line source |
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0 | 1 /* |
2 * MMX optimized DSP utils | |
429 | 3 * Copyright (c) 2000, 2001 Fabrice Bellard. |
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4 * Copyright (c) 2002-2004 Michael Niedermayer <michaelni@gmx.at> |
0 | 5 * |
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6 * This file is part of FFmpeg. |
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7 * |
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8 * FFmpeg is free software; you can redistribute it and/or |
429 | 9 * modify it under the terms of the GNU Lesser General Public |
10 * License as published by the Free Software Foundation; either | |
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11 * version 2.1 of the License, or (at your option) any later version. |
0 | 12 * |
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13 * FFmpeg is distributed in the hope that it will be useful, |
0 | 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
429 | 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
16 * Lesser General Public License for more details. | |
0 | 17 * |
429 | 18 * You should have received a copy of the GNU Lesser General Public |
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19 * License along with FFmpeg; if not, write to the Free Software |
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20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
0 | 21 * |
22 * MMX optimization by Nick Kurshev <nickols_k@mail.ru> | |
23 */ | |
24 | |
6763 | 25 #include "libavutil/x86_cpu.h" |
26 #include "libavcodec/dsputil.h" | |
27 #include "libavcodec/h263.h" | |
28 #include "libavcodec/mpegvideo.h" | |
29 #include "libavcodec/simple_idct.h" | |
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30 #include "dsputil_mmx.h" |
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31 #include "mmx.h" |
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32 #include "vp3dsp_mmx.h" |
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33 #include "vp3dsp_sse2.h" |
6585 | 34 #include "idct_xvid.h" |
0 | 35 |
1729 | 36 //#undef NDEBUG |
37 //#include <assert.h> | |
38 | |
4197 | 39 int mm_flags; /* multimedia extension flags */ |
936 | 40 |
0 | 41 /* pixel operations */ |
5947 | 42 DECLARE_ALIGNED_8 (const uint64_t, ff_bone) = 0x0101010101010101ULL; |
43 DECLARE_ALIGNED_8 (const uint64_t, ff_wtwo) = 0x0002000200020002ULL; | |
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44 |
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45 DECLARE_ALIGNED_16(const uint64_t, ff_pdw_80000000[2]) = |
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46 {0x8000000080000000ULL, 0x8000000080000000ULL}; |
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47 |
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48 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_3 ) = 0x0003000300030003ULL; |
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49 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_4 ) = 0x0004000400040004ULL; |
6331 | 50 DECLARE_ALIGNED_16(const xmm_t, ff_pw_5 ) = {0x0005000500050005ULL, 0x0005000500050005ULL}; |
7741 | 51 DECLARE_ALIGNED_16(const xmm_t, ff_pw_8 ) = {0x0008000800080008ULL, 0x0008000800080008ULL}; |
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52 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_15 ) = 0x000F000F000F000FULL; |
6331 | 53 DECLARE_ALIGNED_16(const xmm_t, ff_pw_16 ) = {0x0010001000100010ULL, 0x0010001000100010ULL}; |
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54 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_20 ) = 0x0014001400140014ULL; |
6557 | 55 DECLARE_ALIGNED_16(const xmm_t, ff_pw_28 ) = {0x001C001C001C001CULL, 0x001C001C001C001CULL}; |
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56 DECLARE_ALIGNED_16(const xmm_t, ff_pw_32 ) = {0x0020002000200020ULL, 0x0020002000200020ULL}; |
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57 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_42 ) = 0x002A002A002A002AULL; |
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58 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_64 ) = 0x0040004000400040ULL; |
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59 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_96 ) = 0x0060006000600060ULL; |
6333 | 60 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_128) = 0x0080008000800080ULL; |
6384 | 61 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_255) = 0x00ff00ff00ff00ffULL; |
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62 |
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63 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_1 ) = 0x0101010101010101ULL; |
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64 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_3 ) = 0x0303030303030303ULL; |
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65 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_7 ) = 0x0707070707070707ULL; |
8032 | 66 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_1F ) = 0x1F1F1F1F1F1F1F1FULL; |
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67 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_3F ) = 0x3F3F3F3F3F3F3F3FULL; |
8032 | 68 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_81 ) = 0x8181818181818181ULL; |
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69 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_A1 ) = 0xA1A1A1A1A1A1A1A1ULL; |
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70 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_FC ) = 0xFCFCFCFCFCFCFCFCULL; |
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71 |
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72 DECLARE_ALIGNED_16(const double, ff_pd_1[2]) = { 1.0, 1.0 }; |
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73 DECLARE_ALIGNED_16(const double, ff_pd_2[2]) = { 2.0, 2.0 }; |
5737 | 74 |
8031 | 75 #define JUMPALIGN() __asm__ volatile (ASMALIGN(3)::) |
76 #define MOVQ_ZERO(regd) __asm__ volatile ("pxor %%" #regd ", %%" #regd ::) | |
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77 |
448 | 78 #define MOVQ_BFE(regd) \ |
8031 | 79 __asm__ volatile ( \ |
448 | 80 "pcmpeqd %%" #regd ", %%" #regd " \n\t"\ |
81 "paddb %%" #regd ", %%" #regd " \n\t" ::) | |
82 | |
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83 #ifndef PIC |
8031 | 84 #define MOVQ_BONE(regd) __asm__ volatile ("movq %0, %%" #regd " \n\t" ::"m"(ff_bone)) |
85 #define MOVQ_WTWO(regd) __asm__ volatile ("movq %0, %%" #regd " \n\t" ::"m"(ff_wtwo)) | |
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86 #else |
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87 // for shared library it's better to use this way for accessing constants |
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88 // pcmpeqd -> -1 |
448 | 89 #define MOVQ_BONE(regd) \ |
8031 | 90 __asm__ volatile ( \ |
448 | 91 "pcmpeqd %%" #regd ", %%" #regd " \n\t" \ |
92 "psrlw $15, %%" #regd " \n\t" \ | |
93 "packuswb %%" #regd ", %%" #regd " \n\t" ::) | |
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94 |
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95 #define MOVQ_WTWO(regd) \ |
8031 | 96 __asm__ volatile ( \ |
448 | 97 "pcmpeqd %%" #regd ", %%" #regd " \n\t" \ |
98 "psrlw $15, %%" #regd " \n\t" \ | |
99 "psllw $1, %%" #regd " \n\t"::) | |
387 | 100 |
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101 #endif |
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102 |
448 | 103 // using regr as temporary and for the output result |
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104 // first argument is unmodifed and second is trashed |
471 | 105 // regfe is supposed to contain 0xfefefefefefefefe |
106 #define PAVGB_MMX_NO_RND(rega, regb, regr, regfe) \ | |
2979 | 107 "movq " #rega ", " #regr " \n\t"\ |
108 "pand " #regb ", " #regr " \n\t"\ | |
109 "pxor " #rega ", " #regb " \n\t"\ | |
110 "pand " #regfe "," #regb " \n\t"\ | |
111 "psrlq $1, " #regb " \n\t"\ | |
112 "paddb " #regb ", " #regr " \n\t" | |
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113 |
471 | 114 #define PAVGB_MMX(rega, regb, regr, regfe) \ |
2979 | 115 "movq " #rega ", " #regr " \n\t"\ |
116 "por " #regb ", " #regr " \n\t"\ | |
117 "pxor " #rega ", " #regb " \n\t"\ | |
118 "pand " #regfe "," #regb " \n\t"\ | |
119 "psrlq $1, " #regb " \n\t"\ | |
120 "psubb " #regb ", " #regr " \n\t" | |
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121 |
471 | 122 // mm6 is supposed to contain 0xfefefefefefefefe |
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123 #define PAVGBP_MMX_NO_RND(rega, regb, regr, regc, regd, regp) \ |
2979 | 124 "movq " #rega ", " #regr " \n\t"\ |
125 "movq " #regc ", " #regp " \n\t"\ | |
126 "pand " #regb ", " #regr " \n\t"\ | |
127 "pand " #regd ", " #regp " \n\t"\ | |
128 "pxor " #rega ", " #regb " \n\t"\ | |
129 "pxor " #regc ", " #regd " \n\t"\ | |
130 "pand %%mm6, " #regb " \n\t"\ | |
131 "pand %%mm6, " #regd " \n\t"\ | |
132 "psrlq $1, " #regb " \n\t"\ | |
133 "psrlq $1, " #regd " \n\t"\ | |
134 "paddb " #regb ", " #regr " \n\t"\ | |
135 "paddb " #regd ", " #regp " \n\t" | |
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136 |
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137 #define PAVGBP_MMX(rega, regb, regr, regc, regd, regp) \ |
2979 | 138 "movq " #rega ", " #regr " \n\t"\ |
139 "movq " #regc ", " #regp " \n\t"\ | |
140 "por " #regb ", " #regr " \n\t"\ | |
141 "por " #regd ", " #regp " \n\t"\ | |
142 "pxor " #rega ", " #regb " \n\t"\ | |
143 "pxor " #regc ", " #regd " \n\t"\ | |
144 "pand %%mm6, " #regb " \n\t"\ | |
145 "pand %%mm6, " #regd " \n\t"\ | |
146 "psrlq $1, " #regd " \n\t"\ | |
147 "psrlq $1, " #regb " \n\t"\ | |
148 "psubb " #regb ", " #regr " \n\t"\ | |
149 "psubb " #regd ", " #regp " \n\t" | |
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150 |
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151 /***********************************/ |
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152 /* MMX no rounding */ |
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153 #define DEF(x, y) x ## _no_rnd_ ## y ##_mmx |
448 | 154 #define SET_RND MOVQ_WONE |
2979 | 155 #define PAVGBP(a, b, c, d, e, f) PAVGBP_MMX_NO_RND(a, b, c, d, e, f) |
156 #define PAVGB(a, b, c, e) PAVGB_MMX_NO_RND(a, b, c, e) | |
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157 |
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158 #include "dsputil_mmx_rnd_template.c" |
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159 |
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160 #undef DEF |
448 | 161 #undef SET_RND |
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162 #undef PAVGBP |
471 | 163 #undef PAVGB |
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164 /***********************************/ |
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165 /* MMX rounding */ |
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166 |
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167 #define DEF(x, y) x ## _ ## y ##_mmx |
448 | 168 #define SET_RND MOVQ_WTWO |
2979 | 169 #define PAVGBP(a, b, c, d, e, f) PAVGBP_MMX(a, b, c, d, e, f) |
170 #define PAVGB(a, b, c, e) PAVGB_MMX(a, b, c, e) | |
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171 |
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172 #include "dsputil_mmx_rnd_template.c" |
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173 |
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174 #undef DEF |
448 | 175 #undef SET_RND |
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176 #undef PAVGBP |
471 | 177 #undef PAVGB |
387 | 178 |
0 | 179 /***********************************/ |
180 /* 3Dnow specific */ | |
181 | |
182 #define DEF(x) x ## _3dnow | |
183 #define PAVGB "pavgusb" | |
184 | |
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185 #include "dsputil_mmx_avg_template.c" |
0 | 186 |
187 #undef DEF | |
188 #undef PAVGB | |
189 | |
190 /***********************************/ | |
191 /* MMX2 specific */ | |
192 | |
386 | 193 #define DEF(x) x ## _mmx2 |
0 | 194 |
195 /* Introduced only in MMX2 set */ | |
196 #define PAVGB "pavgb" | |
197 | |
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198 #include "dsputil_mmx_avg_template.c" |
0 | 199 |
200 #undef DEF | |
201 #undef PAVGB | |
202 | |
6327 | 203 #define put_no_rnd_pixels16_mmx put_pixels16_mmx |
204 #define put_no_rnd_pixels8_mmx put_pixels8_mmx | |
6321 | 205 #define put_pixels16_mmx2 put_pixels16_mmx |
206 #define put_pixels8_mmx2 put_pixels8_mmx | |
207 #define put_pixels4_mmx2 put_pixels4_mmx | |
208 #define put_no_rnd_pixels16_mmx2 put_no_rnd_pixels16_mmx | |
209 #define put_no_rnd_pixels8_mmx2 put_no_rnd_pixels8_mmx | |
210 #define put_pixels16_3dnow put_pixels16_mmx | |
211 #define put_pixels8_3dnow put_pixels8_mmx | |
212 #define put_pixels4_3dnow put_pixels4_mmx | |
213 #define put_no_rnd_pixels16_3dnow put_no_rnd_pixels16_mmx | |
214 #define put_no_rnd_pixels8_3dnow put_no_rnd_pixels8_mmx | |
215 | |
0 | 216 /***********************************/ |
217 /* standard MMX */ | |
218 | |
1064 | 219 void put_pixels_clamped_mmx(const DCTELEM *block, uint8_t *pixels, int line_size) |
0 | 220 { |
221 const DCTELEM *p; | |
1064 | 222 uint8_t *pix; |
0 | 223 |
224 /* read the pixels */ | |
225 p = block; | |
226 pix = pixels; | |
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227 /* unrolled loop */ |
8031 | 228 __asm__ volatile( |
2979 | 229 "movq %3, %%mm0 \n\t" |
230 "movq 8%3, %%mm1 \n\t" | |
231 "movq 16%3, %%mm2 \n\t" | |
232 "movq 24%3, %%mm3 \n\t" | |
233 "movq 32%3, %%mm4 \n\t" | |
234 "movq 40%3, %%mm5 \n\t" | |
235 "movq 48%3, %%mm6 \n\t" | |
236 "movq 56%3, %%mm7 \n\t" | |
237 "packuswb %%mm1, %%mm0 \n\t" | |
238 "packuswb %%mm3, %%mm2 \n\t" | |
239 "packuswb %%mm5, %%mm4 \n\t" | |
240 "packuswb %%mm7, %%mm6 \n\t" | |
241 "movq %%mm0, (%0) \n\t" | |
242 "movq %%mm2, (%0, %1) \n\t" | |
243 "movq %%mm4, (%0, %1, 2) \n\t" | |
244 "movq %%mm6, (%0, %2) \n\t" | |
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245 ::"r" (pix), "r" ((x86_reg)line_size), "r" ((x86_reg)line_size*3), "m"(*p) |
2979 | 246 :"memory"); |
0 | 247 pix += line_size*4; |
248 p += 32; | |
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249 |
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250 // if here would be an exact copy of the code above |
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251 // compiler would generate some very strange code |
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252 // thus using "r" |
8031 | 253 __asm__ volatile( |
2979 | 254 "movq (%3), %%mm0 \n\t" |
255 "movq 8(%3), %%mm1 \n\t" | |
256 "movq 16(%3), %%mm2 \n\t" | |
257 "movq 24(%3), %%mm3 \n\t" | |
258 "movq 32(%3), %%mm4 \n\t" | |
259 "movq 40(%3), %%mm5 \n\t" | |
260 "movq 48(%3), %%mm6 \n\t" | |
261 "movq 56(%3), %%mm7 \n\t" | |
262 "packuswb %%mm1, %%mm0 \n\t" | |
263 "packuswb %%mm3, %%mm2 \n\t" | |
264 "packuswb %%mm5, %%mm4 \n\t" | |
265 "packuswb %%mm7, %%mm6 \n\t" | |
266 "movq %%mm0, (%0) \n\t" | |
267 "movq %%mm2, (%0, %1) \n\t" | |
268 "movq %%mm4, (%0, %1, 2) \n\t" | |
269 "movq %%mm6, (%0, %2) \n\t" | |
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270 ::"r" (pix), "r" ((x86_reg)line_size), "r" ((x86_reg)line_size*3), "r"(p) |
2979 | 271 :"memory"); |
0 | 272 } |
273 | |
3089 | 274 static DECLARE_ALIGNED_8(const unsigned char, vector128[8]) = |
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275 { 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80 }; |
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276 |
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277 void put_signed_pixels_clamped_mmx(const DCTELEM *block, uint8_t *pixels, int line_size) |
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278 { |
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279 int i; |
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280 |
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281 movq_m2r(*vector128, mm1); |
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282 for (i = 0; i < 8; i++) { |
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283 movq_m2r(*(block), mm0); |
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284 packsswb_m2r(*(block + 4), mm0); |
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285 block += 8; |
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286 paddb_r2r(mm1, mm0); |
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287 movq_r2m(mm0, *pixels); |
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288 pixels += line_size; |
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289 } |
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290 } |
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291 |
1064 | 292 void add_pixels_clamped_mmx(const DCTELEM *block, uint8_t *pixels, int line_size) |
0 | 293 { |
294 const DCTELEM *p; | |
1064 | 295 uint8_t *pix; |
0 | 296 int i; |
297 | |
298 /* read the pixels */ | |
299 p = block; | |
300 pix = pixels; | |
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301 MOVQ_ZERO(mm7); |
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302 i = 4; |
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303 do { |
8031 | 304 __asm__ volatile( |
2979 | 305 "movq (%2), %%mm0 \n\t" |
306 "movq 8(%2), %%mm1 \n\t" | |
307 "movq 16(%2), %%mm2 \n\t" | |
308 "movq 24(%2), %%mm3 \n\t" | |
309 "movq %0, %%mm4 \n\t" | |
310 "movq %1, %%mm6 \n\t" | |
311 "movq %%mm4, %%mm5 \n\t" | |
312 "punpcklbw %%mm7, %%mm4 \n\t" | |
313 "punpckhbw %%mm7, %%mm5 \n\t" | |
314 "paddsw %%mm4, %%mm0 \n\t" | |
315 "paddsw %%mm5, %%mm1 \n\t" | |
316 "movq %%mm6, %%mm5 \n\t" | |
317 "punpcklbw %%mm7, %%mm6 \n\t" | |
318 "punpckhbw %%mm7, %%mm5 \n\t" | |
319 "paddsw %%mm6, %%mm2 \n\t" | |
320 "paddsw %%mm5, %%mm3 \n\t" | |
321 "packuswb %%mm1, %%mm0 \n\t" | |
322 "packuswb %%mm3, %%mm2 \n\t" | |
323 "movq %%mm0, %0 \n\t" | |
324 "movq %%mm2, %1 \n\t" | |
325 :"+m"(*pix), "+m"(*(pix+line_size)) | |
326 :"r"(p) | |
327 :"memory"); | |
0 | 328 pix += line_size*2; |
329 p += 16; | |
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330 } while (--i); |
0 | 331 } |
332 | |
2209 | 333 static void put_pixels4_mmx(uint8_t *block, const uint8_t *pixels, int line_size, int h) |
334 { | |
8031 | 335 __asm__ volatile( |
2979 | 336 "lea (%3, %3), %%"REG_a" \n\t" |
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337 ASMALIGN(3) |
2979 | 338 "1: \n\t" |
339 "movd (%1), %%mm0 \n\t" | |
340 "movd (%1, %3), %%mm1 \n\t" | |
341 "movd %%mm0, (%2) \n\t" | |
342 "movd %%mm1, (%2, %3) \n\t" | |
343 "add %%"REG_a", %1 \n\t" | |
344 "add %%"REG_a", %2 \n\t" | |
345 "movd (%1), %%mm0 \n\t" | |
346 "movd (%1, %3), %%mm1 \n\t" | |
347 "movd %%mm0, (%2) \n\t" | |
348 "movd %%mm1, (%2, %3) \n\t" | |
349 "add %%"REG_a", %1 \n\t" | |
350 "add %%"REG_a", %2 \n\t" | |
351 "subl $4, %0 \n\t" | |
352 "jnz 1b \n\t" | |
353 : "+g"(h), "+r" (pixels), "+r" (block) | |
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354 : "r"((x86_reg)line_size) |
2979 | 355 : "%"REG_a, "memory" |
356 ); | |
2209 | 357 } |
358 | |
1064 | 359 static void put_pixels8_mmx(uint8_t *block, const uint8_t *pixels, int line_size, int h) |
0 | 360 { |
8031 | 361 __asm__ volatile( |
2979 | 362 "lea (%3, %3), %%"REG_a" \n\t" |
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363 ASMALIGN(3) |
2979 | 364 "1: \n\t" |
365 "movq (%1), %%mm0 \n\t" | |
366 "movq (%1, %3), %%mm1 \n\t" | |
367 "movq %%mm0, (%2) \n\t" | |
368 "movq %%mm1, (%2, %3) \n\t" | |
369 "add %%"REG_a", %1 \n\t" | |
370 "add %%"REG_a", %2 \n\t" | |
371 "movq (%1), %%mm0 \n\t" | |
372 "movq (%1, %3), %%mm1 \n\t" | |
373 "movq %%mm0, (%2) \n\t" | |
374 "movq %%mm1, (%2, %3) \n\t" | |
375 "add %%"REG_a", %1 \n\t" | |
376 "add %%"REG_a", %2 \n\t" | |
377 "subl $4, %0 \n\t" | |
378 "jnz 1b \n\t" | |
379 : "+g"(h), "+r" (pixels), "+r" (block) | |
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380 : "r"((x86_reg)line_size) |
2979 | 381 : "%"REG_a, "memory" |
382 ); | |
0 | 383 } |
384 | |
1064 | 385 static void put_pixels16_mmx(uint8_t *block, const uint8_t *pixels, int line_size, int h) |
651 | 386 { |
8031 | 387 __asm__ volatile( |
2979 | 388 "lea (%3, %3), %%"REG_a" \n\t" |
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389 ASMALIGN(3) |
2979 | 390 "1: \n\t" |
391 "movq (%1), %%mm0 \n\t" | |
392 "movq 8(%1), %%mm4 \n\t" | |
393 "movq (%1, %3), %%mm1 \n\t" | |
394 "movq 8(%1, %3), %%mm5 \n\t" | |
395 "movq %%mm0, (%2) \n\t" | |
396 "movq %%mm4, 8(%2) \n\t" | |
397 "movq %%mm1, (%2, %3) \n\t" | |
398 "movq %%mm5, 8(%2, %3) \n\t" | |
399 "add %%"REG_a", %1 \n\t" | |
400 "add %%"REG_a", %2 \n\t" | |
401 "movq (%1), %%mm0 \n\t" | |
402 "movq 8(%1), %%mm4 \n\t" | |
403 "movq (%1, %3), %%mm1 \n\t" | |
404 "movq 8(%1, %3), %%mm5 \n\t" | |
405 "movq %%mm0, (%2) \n\t" | |
406 "movq %%mm4, 8(%2) \n\t" | |
407 "movq %%mm1, (%2, %3) \n\t" | |
408 "movq %%mm5, 8(%2, %3) \n\t" | |
409 "add %%"REG_a", %1 \n\t" | |
410 "add %%"REG_a", %2 \n\t" | |
411 "subl $4, %0 \n\t" | |
412 "jnz 1b \n\t" | |
413 : "+g"(h), "+r" (pixels), "+r" (block) | |
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414 : "r"((x86_reg)line_size) |
2979 | 415 : "%"REG_a, "memory" |
416 ); | |
651 | 417 } |
418 | |
6331 | 419 static void put_pixels16_sse2(uint8_t *block, const uint8_t *pixels, int line_size, int h) |
420 { | |
8031 | 421 __asm__ volatile( |
6331 | 422 "1: \n\t" |
423 "movdqu (%1), %%xmm0 \n\t" | |
424 "movdqu (%1,%3), %%xmm1 \n\t" | |
425 "movdqu (%1,%3,2), %%xmm2 \n\t" | |
426 "movdqu (%1,%4), %%xmm3 \n\t" | |
427 "movdqa %%xmm0, (%2) \n\t" | |
428 "movdqa %%xmm1, (%2,%3) \n\t" | |
429 "movdqa %%xmm2, (%2,%3,2) \n\t" | |
430 "movdqa %%xmm3, (%2,%4) \n\t" | |
431 "subl $4, %0 \n\t" | |
432 "lea (%1,%3,4), %1 \n\t" | |
433 "lea (%2,%3,4), %2 \n\t" | |
434 "jnz 1b \n\t" | |
435 : "+g"(h), "+r" (pixels), "+r" (block) | |
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436 : "r"((x86_reg)line_size), "r"((x86_reg)3L*line_size) |
6331 | 437 : "memory" |
438 ); | |
439 } | |
440 | |
441 static void avg_pixels16_sse2(uint8_t *block, const uint8_t *pixels, int line_size, int h) | |
442 { | |
8031 | 443 __asm__ volatile( |
6331 | 444 "1: \n\t" |
445 "movdqu (%1), %%xmm0 \n\t" | |
446 "movdqu (%1,%3), %%xmm1 \n\t" | |
447 "movdqu (%1,%3,2), %%xmm2 \n\t" | |
448 "movdqu (%1,%4), %%xmm3 \n\t" | |
449 "pavgb (%2), %%xmm0 \n\t" | |
450 "pavgb (%2,%3), %%xmm1 \n\t" | |
451 "pavgb (%2,%3,2), %%xmm2 \n\t" | |
452 "pavgb (%2,%4), %%xmm3 \n\t" | |
453 "movdqa %%xmm0, (%2) \n\t" | |
454 "movdqa %%xmm1, (%2,%3) \n\t" | |
455 "movdqa %%xmm2, (%2,%3,2) \n\t" | |
456 "movdqa %%xmm3, (%2,%4) \n\t" | |
457 "subl $4, %0 \n\t" | |
458 "lea (%1,%3,4), %1 \n\t" | |
459 "lea (%2,%3,4), %2 \n\t" | |
460 "jnz 1b \n\t" | |
461 : "+g"(h), "+r" (pixels), "+r" (block) | |
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462 : "r"((x86_reg)line_size), "r"((x86_reg)3L*line_size) |
6331 | 463 : "memory" |
464 ); | |
465 } | |
466 | |
296 | 467 static void clear_blocks_mmx(DCTELEM *blocks) |
468 { | |
8031 | 469 __asm__ volatile( |
2979 | 470 "pxor %%mm7, %%mm7 \n\t" |
471 "mov $-128*6, %%"REG_a" \n\t" | |
472 "1: \n\t" | |
473 "movq %%mm7, (%0, %%"REG_a") \n\t" | |
474 "movq %%mm7, 8(%0, %%"REG_a") \n\t" | |
475 "movq %%mm7, 16(%0, %%"REG_a") \n\t" | |
476 "movq %%mm7, 24(%0, %%"REG_a") \n\t" | |
477 "add $32, %%"REG_a" \n\t" | |
478 " js 1b \n\t" | |
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479 : : "r" (((uint8_t *)blocks)+128*6) |
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480 : "%"REG_a |
296 | 481 ); |
482 } | |
483 | |
866 | 484 static void add_bytes_mmx(uint8_t *dst, uint8_t *src, int w){ |
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485 x86_reg i=0; |
8031 | 486 __asm__ volatile( |
7087 | 487 "jmp 2f \n\t" |
2979 | 488 "1: \n\t" |
489 "movq (%1, %0), %%mm0 \n\t" | |
490 "movq (%2, %0), %%mm1 \n\t" | |
491 "paddb %%mm0, %%mm1 \n\t" | |
492 "movq %%mm1, (%2, %0) \n\t" | |
493 "movq 8(%1, %0), %%mm0 \n\t" | |
494 "movq 8(%2, %0), %%mm1 \n\t" | |
495 "paddb %%mm0, %%mm1 \n\t" | |
496 "movq %%mm1, 8(%2, %0) \n\t" | |
497 "add $16, %0 \n\t" | |
7087 | 498 "2: \n\t" |
2979 | 499 "cmp %3, %0 \n\t" |
7087 | 500 " js 1b \n\t" |
866 | 501 : "+r" (i) |
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502 : "r"(src), "r"(dst), "r"((x86_reg)w-15) |
866 | 503 ); |
504 for(; i<w; i++) | |
505 dst[i+0] += src[i+0]; | |
506 } | |
507 | |
6384 | 508 static void add_bytes_l2_mmx(uint8_t *dst, uint8_t *src1, uint8_t *src2, int w){ |
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509 x86_reg i=0; |
8031 | 510 __asm__ volatile( |
7087 | 511 "jmp 2f \n\t" |
6384 | 512 "1: \n\t" |
513 "movq (%2, %0), %%mm0 \n\t" | |
514 "movq 8(%2, %0), %%mm1 \n\t" | |
515 "paddb (%3, %0), %%mm0 \n\t" | |
516 "paddb 8(%3, %0), %%mm1 \n\t" | |
517 "movq %%mm0, (%1, %0) \n\t" | |
518 "movq %%mm1, 8(%1, %0) \n\t" | |
519 "add $16, %0 \n\t" | |
7087 | 520 "2: \n\t" |
6384 | 521 "cmp %4, %0 \n\t" |
7087 | 522 " js 1b \n\t" |
6384 | 523 : "+r" (i) |
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524 : "r"(dst), "r"(src1), "r"(src2), "r"((x86_reg)w-15) |
6384 | 525 ); |
526 for(; i<w; i++) | |
527 dst[i] = src1[i] + src2[i]; | |
528 } | |
529 | |
1648 | 530 #define H263_LOOP_FILTER \ |
2979 | 531 "pxor %%mm7, %%mm7 \n\t"\ |
532 "movq %0, %%mm0 \n\t"\ | |
533 "movq %0, %%mm1 \n\t"\ | |
534 "movq %3, %%mm2 \n\t"\ | |
535 "movq %3, %%mm3 \n\t"\ | |
536 "punpcklbw %%mm7, %%mm0 \n\t"\ | |
537 "punpckhbw %%mm7, %%mm1 \n\t"\ | |
538 "punpcklbw %%mm7, %%mm2 \n\t"\ | |
539 "punpckhbw %%mm7, %%mm3 \n\t"\ | |
540 "psubw %%mm2, %%mm0 \n\t"\ | |
541 "psubw %%mm3, %%mm1 \n\t"\ | |
542 "movq %1, %%mm2 \n\t"\ | |
543 "movq %1, %%mm3 \n\t"\ | |
544 "movq %2, %%mm4 \n\t"\ | |
545 "movq %2, %%mm5 \n\t"\ | |
546 "punpcklbw %%mm7, %%mm2 \n\t"\ | |
547 "punpckhbw %%mm7, %%mm3 \n\t"\ | |
548 "punpcklbw %%mm7, %%mm4 \n\t"\ | |
549 "punpckhbw %%mm7, %%mm5 \n\t"\ | |
550 "psubw %%mm2, %%mm4 \n\t"\ | |
551 "psubw %%mm3, %%mm5 \n\t"\ | |
552 "psllw $2, %%mm4 \n\t"\ | |
553 "psllw $2, %%mm5 \n\t"\ | |
554 "paddw %%mm0, %%mm4 \n\t"\ | |
555 "paddw %%mm1, %%mm5 \n\t"\ | |
556 "pxor %%mm6, %%mm6 \n\t"\ | |
557 "pcmpgtw %%mm4, %%mm6 \n\t"\ | |
558 "pcmpgtw %%mm5, %%mm7 \n\t"\ | |
559 "pxor %%mm6, %%mm4 \n\t"\ | |
560 "pxor %%mm7, %%mm5 \n\t"\ | |
561 "psubw %%mm6, %%mm4 \n\t"\ | |
562 "psubw %%mm7, %%mm5 \n\t"\ | |
563 "psrlw $3, %%mm4 \n\t"\ | |
564 "psrlw $3, %%mm5 \n\t"\ | |
565 "packuswb %%mm5, %%mm4 \n\t"\ | |
566 "packsswb %%mm7, %%mm6 \n\t"\ | |
567 "pxor %%mm7, %%mm7 \n\t"\ | |
568 "movd %4, %%mm2 \n\t"\ | |
569 "punpcklbw %%mm2, %%mm2 \n\t"\ | |
570 "punpcklbw %%mm2, %%mm2 \n\t"\ | |
571 "punpcklbw %%mm2, %%mm2 \n\t"\ | |
572 "psubusb %%mm4, %%mm2 \n\t"\ | |
573 "movq %%mm2, %%mm3 \n\t"\ | |
574 "psubusb %%mm4, %%mm3 \n\t"\ | |
575 "psubb %%mm3, %%mm2 \n\t"\ | |
576 "movq %1, %%mm3 \n\t"\ | |
577 "movq %2, %%mm4 \n\t"\ | |
578 "pxor %%mm6, %%mm3 \n\t"\ | |
579 "pxor %%mm6, %%mm4 \n\t"\ | |
580 "paddusb %%mm2, %%mm3 \n\t"\ | |
581 "psubusb %%mm2, %%mm4 \n\t"\ | |
582 "pxor %%mm6, %%mm3 \n\t"\ | |
583 "pxor %%mm6, %%mm4 \n\t"\ | |
584 "paddusb %%mm2, %%mm2 \n\t"\ | |
585 "packsswb %%mm1, %%mm0 \n\t"\ | |
586 "pcmpgtb %%mm0, %%mm7 \n\t"\ | |
587 "pxor %%mm7, %%mm0 \n\t"\ | |
588 "psubb %%mm7, %%mm0 \n\t"\ | |
589 "movq %%mm0, %%mm1 \n\t"\ | |
590 "psubusb %%mm2, %%mm0 \n\t"\ | |
591 "psubb %%mm0, %%mm1 \n\t"\ | |
592 "pand %5, %%mm1 \n\t"\ | |
593 "psrlw $2, %%mm1 \n\t"\ | |
594 "pxor %%mm7, %%mm1 \n\t"\ | |
595 "psubb %%mm7, %%mm1 \n\t"\ | |
596 "movq %0, %%mm5 \n\t"\ | |
597 "movq %3, %%mm6 \n\t"\ | |
598 "psubb %%mm1, %%mm5 \n\t"\ | |
599 "paddb %%mm1, %%mm6 \n\t" | |
1648 | 600 |
1647 | 601 static void h263_v_loop_filter_mmx(uint8_t *src, int stride, int qscale){ |
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602 if(ENABLE_ANY_H263) { |
1647 | 603 const int strength= ff_h263_loop_filter_strength[qscale]; |
604 | |
8031 | 605 __asm__ volatile( |
2967 | 606 |
1648 | 607 H263_LOOP_FILTER |
2967 | 608 |
2979 | 609 "movq %%mm3, %1 \n\t" |
610 "movq %%mm4, %2 \n\t" | |
611 "movq %%mm5, %0 \n\t" | |
612 "movq %%mm6, %3 \n\t" | |
1647 | 613 : "+m" (*(uint64_t*)(src - 2*stride)), |
614 "+m" (*(uint64_t*)(src - 1*stride)), | |
615 "+m" (*(uint64_t*)(src + 0*stride)), | |
616 "+m" (*(uint64_t*)(src + 1*stride)) | |
617 : "g" (2*strength), "m"(ff_pb_FC) | |
618 ); | |
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619 } |
1647 | 620 } |
621 | |
1648 | 622 static inline void transpose4x4(uint8_t *dst, uint8_t *src, int dst_stride, int src_stride){ |
8031 | 623 __asm__ volatile( //FIXME could save 1 instruction if done as 8x4 ... |
2979 | 624 "movd %4, %%mm0 \n\t" |
625 "movd %5, %%mm1 \n\t" | |
626 "movd %6, %%mm2 \n\t" | |
627 "movd %7, %%mm3 \n\t" | |
628 "punpcklbw %%mm1, %%mm0 \n\t" | |
629 "punpcklbw %%mm3, %%mm2 \n\t" | |
630 "movq %%mm0, %%mm1 \n\t" | |
631 "punpcklwd %%mm2, %%mm0 \n\t" | |
632 "punpckhwd %%mm2, %%mm1 \n\t" | |
633 "movd %%mm0, %0 \n\t" | |
634 "punpckhdq %%mm0, %%mm0 \n\t" | |
635 "movd %%mm0, %1 \n\t" | |
636 "movd %%mm1, %2 \n\t" | |
637 "punpckhdq %%mm1, %%mm1 \n\t" | |
638 "movd %%mm1, %3 \n\t" | |
2967 | 639 |
1648 | 640 : "=m" (*(uint32_t*)(dst + 0*dst_stride)), |
641 "=m" (*(uint32_t*)(dst + 1*dst_stride)), | |
642 "=m" (*(uint32_t*)(dst + 2*dst_stride)), | |
643 "=m" (*(uint32_t*)(dst + 3*dst_stride)) | |
644 : "m" (*(uint32_t*)(src + 0*src_stride)), | |
645 "m" (*(uint32_t*)(src + 1*src_stride)), | |
646 "m" (*(uint32_t*)(src + 2*src_stride)), | |
647 "m" (*(uint32_t*)(src + 3*src_stride)) | |
648 ); | |
649 } | |
650 | |
651 static void h263_h_loop_filter_mmx(uint8_t *src, int stride, int qscale){ | |
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652 if(ENABLE_ANY_H263) { |
1648 | 653 const int strength= ff_h263_loop_filter_strength[qscale]; |
6181 | 654 DECLARE_ALIGNED(8, uint64_t, temp[4]); |
1648 | 655 uint8_t *btemp= (uint8_t*)temp; |
2967 | 656 |
1648 | 657 src -= 2; |
658 | |
659 transpose4x4(btemp , src , 8, stride); | |
660 transpose4x4(btemp+4, src + 4*stride, 8, stride); | |
8031 | 661 __asm__ volatile( |
1648 | 662 H263_LOOP_FILTER // 5 3 4 6 |
2967 | 663 |
1648 | 664 : "+m" (temp[0]), |
665 "+m" (temp[1]), | |
666 "+m" (temp[2]), | |
667 "+m" (temp[3]) | |
668 : "g" (2*strength), "m"(ff_pb_FC) | |
669 ); | |
670 | |
8031 | 671 __asm__ volatile( |
2979 | 672 "movq %%mm5, %%mm1 \n\t" |
673 "movq %%mm4, %%mm0 \n\t" | |
674 "punpcklbw %%mm3, %%mm5 \n\t" | |
675 "punpcklbw %%mm6, %%mm4 \n\t" | |
676 "punpckhbw %%mm3, %%mm1 \n\t" | |
677 "punpckhbw %%mm6, %%mm0 \n\t" | |
678 "movq %%mm5, %%mm3 \n\t" | |
679 "movq %%mm1, %%mm6 \n\t" | |
680 "punpcklwd %%mm4, %%mm5 \n\t" | |
681 "punpcklwd %%mm0, %%mm1 \n\t" | |
682 "punpckhwd %%mm4, %%mm3 \n\t" | |
683 "punpckhwd %%mm0, %%mm6 \n\t" | |
684 "movd %%mm5, (%0) \n\t" | |
685 "punpckhdq %%mm5, %%mm5 \n\t" | |
686 "movd %%mm5, (%0,%2) \n\t" | |
687 "movd %%mm3, (%0,%2,2) \n\t" | |
688 "punpckhdq %%mm3, %%mm3 \n\t" | |
689 "movd %%mm3, (%0,%3) \n\t" | |
690 "movd %%mm1, (%1) \n\t" | |
691 "punpckhdq %%mm1, %%mm1 \n\t" | |
692 "movd %%mm1, (%1,%2) \n\t" | |
693 "movd %%mm6, (%1,%2,2) \n\t" | |
694 "punpckhdq %%mm6, %%mm6 \n\t" | |
695 "movd %%mm6, (%1,%3) \n\t" | |
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696 :: "r" (src), |
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697 "r" (src + 4*stride), |
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698 "r" ((x86_reg) stride ), |
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699 "r" ((x86_reg)(3*stride)) |
1648 | 700 ); |
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701 } |
1648 | 702 } |
703 | |
6437 | 704 /* draw the edges of width 'w' of an image of size width, height |
705 this mmx version can only handle w==8 || w==16 */ | |
706 static void draw_edges_mmx(uint8_t *buf, int wrap, int width, int height, int w) | |
707 { | |
708 uint8_t *ptr, *last_line; | |
709 int i; | |
710 | |
711 last_line = buf + (height - 1) * wrap; | |
712 /* left and right */ | |
713 ptr = buf; | |
714 if(w==8) | |
715 { | |
8031 | 716 __asm__ volatile( |
6437 | 717 "1: \n\t" |
718 "movd (%0), %%mm0 \n\t" | |
719 "punpcklbw %%mm0, %%mm0 \n\t" | |
720 "punpcklwd %%mm0, %%mm0 \n\t" | |
721 "punpckldq %%mm0, %%mm0 \n\t" | |
722 "movq %%mm0, -8(%0) \n\t" | |
723 "movq -8(%0, %2), %%mm1 \n\t" | |
724 "punpckhbw %%mm1, %%mm1 \n\t" | |
725 "punpckhwd %%mm1, %%mm1 \n\t" | |
726 "punpckhdq %%mm1, %%mm1 \n\t" | |
727 "movq %%mm1, (%0, %2) \n\t" | |
728 "add %1, %0 \n\t" | |
729 "cmp %3, %0 \n\t" | |
730 " jb 1b \n\t" | |
731 : "+r" (ptr) | |
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732 : "r" ((x86_reg)wrap), "r" ((x86_reg)width), "r" (ptr + wrap*height) |
6437 | 733 ); |
734 } | |
735 else | |
736 { | |
8031 | 737 __asm__ volatile( |
6437 | 738 "1: \n\t" |
739 "movd (%0), %%mm0 \n\t" | |
740 "punpcklbw %%mm0, %%mm0 \n\t" | |
741 "punpcklwd %%mm0, %%mm0 \n\t" | |
742 "punpckldq %%mm0, %%mm0 \n\t" | |
743 "movq %%mm0, -8(%0) \n\t" | |
744 "movq %%mm0, -16(%0) \n\t" | |
745 "movq -8(%0, %2), %%mm1 \n\t" | |
746 "punpckhbw %%mm1, %%mm1 \n\t" | |
747 "punpckhwd %%mm1, %%mm1 \n\t" | |
748 "punpckhdq %%mm1, %%mm1 \n\t" | |
749 "movq %%mm1, (%0, %2) \n\t" | |
750 "movq %%mm1, 8(%0, %2) \n\t" | |
751 "add %1, %0 \n\t" | |
752 "cmp %3, %0 \n\t" | |
753 " jb 1b \n\t" | |
754 : "+r" (ptr) | |
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755 : "r" ((x86_reg)wrap), "r" ((x86_reg)width), "r" (ptr + wrap*height) |
6437 | 756 ); |
757 } | |
758 | |
759 for(i=0;i<w;i+=4) { | |
760 /* top and bottom (and hopefully also the corners) */ | |
761 ptr= buf - (i + 1) * wrap - w; | |
8031 | 762 __asm__ volatile( |
6437 | 763 "1: \n\t" |
764 "movq (%1, %0), %%mm0 \n\t" | |
765 "movq %%mm0, (%0) \n\t" | |
766 "movq %%mm0, (%0, %2) \n\t" | |
767 "movq %%mm0, (%0, %2, 2) \n\t" | |
768 "movq %%mm0, (%0, %3) \n\t" | |
769 "add $8, %0 \n\t" | |
770 "cmp %4, %0 \n\t" | |
771 " jb 1b \n\t" | |
772 : "+r" (ptr) | |
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773 : "r" ((x86_reg)buf - (x86_reg)ptr - w), "r" ((x86_reg)-wrap), "r" ((x86_reg)-wrap*3), "r" (ptr+width+2*w) |
6437 | 774 ); |
775 ptr= last_line + (i + 1) * wrap - w; | |
8031 | 776 __asm__ volatile( |
6437 | 777 "1: \n\t" |
778 "movq (%1, %0), %%mm0 \n\t" | |
779 "movq %%mm0, (%0) \n\t" | |
780 "movq %%mm0, (%0, %2) \n\t" | |
781 "movq %%mm0, (%0, %2, 2) \n\t" | |
782 "movq %%mm0, (%0, %3) \n\t" | |
783 "add $8, %0 \n\t" | |
784 "cmp %4, %0 \n\t" | |
785 " jb 1b \n\t" | |
786 : "+r" (ptr) | |
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787 : "r" ((x86_reg)last_line - (x86_reg)ptr - w), "r" ((x86_reg)wrap), "r" ((x86_reg)wrap*3), "r" (ptr+width+2*w) |
6437 | 788 ); |
789 } | |
790 } | |
791 | |
6384 | 792 #define PAETH(cpu, abs3)\ |
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793 static void add_png_paeth_prediction_##cpu(uint8_t *dst, uint8_t *src, uint8_t *top, int w, int bpp)\ |
6384 | 794 {\ |
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795 x86_reg i = -bpp;\ |
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796 x86_reg end = w-3;\ |
8031 | 797 __asm__ volatile(\ |
6384 | 798 "pxor %%mm7, %%mm7 \n"\ |
799 "movd (%1,%0), %%mm0 \n"\ | |
800 "movd (%2,%0), %%mm1 \n"\ | |
801 "punpcklbw %%mm7, %%mm0 \n"\ | |
802 "punpcklbw %%mm7, %%mm1 \n"\ | |
803 "add %4, %0 \n"\ | |
804 "1: \n"\ | |
805 "movq %%mm1, %%mm2 \n"\ | |
806 "movd (%2,%0), %%mm1 \n"\ | |
807 "movq %%mm2, %%mm3 \n"\ | |
808 "punpcklbw %%mm7, %%mm1 \n"\ | |
809 "movq %%mm2, %%mm4 \n"\ | |
810 "psubw %%mm1, %%mm3 \n"\ | |
811 "psubw %%mm0, %%mm4 \n"\ | |
812 "movq %%mm3, %%mm5 \n"\ | |
813 "paddw %%mm4, %%mm5 \n"\ | |
814 abs3\ | |
815 "movq %%mm4, %%mm6 \n"\ | |
816 "pminsw %%mm5, %%mm6 \n"\ | |
817 "pcmpgtw %%mm6, %%mm3 \n"\ | |
818 "pcmpgtw %%mm5, %%mm4 \n"\ | |
819 "movq %%mm4, %%mm6 \n"\ | |
820 "pand %%mm3, %%mm4 \n"\ | |
821 "pandn %%mm3, %%mm6 \n"\ | |
822 "pandn %%mm0, %%mm3 \n"\ | |
823 "movd (%3,%0), %%mm0 \n"\ | |
824 "pand %%mm1, %%mm6 \n"\ | |
825 "pand %%mm4, %%mm2 \n"\ | |
826 "punpcklbw %%mm7, %%mm0 \n"\ | |
827 "movq %6, %%mm5 \n"\ | |
828 "paddw %%mm6, %%mm0 \n"\ | |
829 "paddw %%mm2, %%mm3 \n"\ | |
830 "paddw %%mm3, %%mm0 \n"\ | |
831 "pand %%mm5, %%mm0 \n"\ | |
832 "movq %%mm0, %%mm3 \n"\ | |
833 "packuswb %%mm3, %%mm3 \n"\ | |
834 "movd %%mm3, (%1,%0) \n"\ | |
835 "add %4, %0 \n"\ | |
836 "cmp %5, %0 \n"\ | |
837 "jle 1b \n"\ | |
838 :"+r"(i)\ | |
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839 :"r"(dst), "r"(top), "r"(src), "r"((x86_reg)bpp), "g"(end),\ |
6384 | 840 "m"(ff_pw_255)\ |
841 :"memory"\ | |
842 );\ | |
843 } | |
844 | |
845 #define ABS3_MMX2\ | |
846 "psubw %%mm5, %%mm7 \n"\ | |
847 "pmaxsw %%mm7, %%mm5 \n"\ | |
848 "pxor %%mm6, %%mm6 \n"\ | |
849 "pxor %%mm7, %%mm7 \n"\ | |
850 "psubw %%mm3, %%mm6 \n"\ | |
851 "psubw %%mm4, %%mm7 \n"\ | |
852 "pmaxsw %%mm6, %%mm3 \n"\ | |
853 "pmaxsw %%mm7, %%mm4 \n"\ | |
854 "pxor %%mm7, %%mm7 \n" | |
855 | |
856 #define ABS3_SSSE3\ | |
857 "pabsw %%mm3, %%mm3 \n"\ | |
858 "pabsw %%mm4, %%mm4 \n"\ | |
859 "pabsw %%mm5, %%mm5 \n" | |
860 | |
861 PAETH(mmx2, ABS3_MMX2) | |
862 #ifdef HAVE_SSSE3 | |
863 PAETH(ssse3, ABS3_SSSE3) | |
864 #endif | |
865 | |
954 | 866 #define QPEL_V_LOW(m3,m4,m5,m6, pw_20, pw_3, rnd, in0, in1, in2, in7, out, OP)\ |
2979 | 867 "paddw " #m4 ", " #m3 " \n\t" /* x1 */\ |
868 "movq "MANGLE(ff_pw_20)", %%mm4 \n\t" /* 20 */\ | |
869 "pmullw " #m3 ", %%mm4 \n\t" /* 20x1 */\ | |
870 "movq "#in7", " #m3 " \n\t" /* d */\ | |
871 "movq "#in0", %%mm5 \n\t" /* D */\ | |
872 "paddw " #m3 ", %%mm5 \n\t" /* x4 */\ | |
873 "psubw %%mm5, %%mm4 \n\t" /* 20x1 - x4 */\ | |
874 "movq "#in1", %%mm5 \n\t" /* C */\ | |
875 "movq "#in2", %%mm6 \n\t" /* B */\ | |
876 "paddw " #m6 ", %%mm5 \n\t" /* x3 */\ | |
877 "paddw " #m5 ", %%mm6 \n\t" /* x2 */\ | |
878 "paddw %%mm6, %%mm6 \n\t" /* 2x2 */\ | |
879 "psubw %%mm6, %%mm5 \n\t" /* -2x2 + x3 */\ | |
880 "pmullw "MANGLE(ff_pw_3)", %%mm5 \n\t" /* -6x2 + 3x3 */\ | |
881 "paddw " #rnd ", %%mm4 \n\t" /* x2 */\ | |
882 "paddw %%mm4, %%mm5 \n\t" /* 20x1 - 6x2 + 3x3 - x4 */\ | |
883 "psraw $5, %%mm5 \n\t"\ | |
884 "packuswb %%mm5, %%mm5 \n\t"\ | |
954 | 885 OP(%%mm5, out, %%mm7, d) |
886 | |
959 | 887 #define QPEL_BASE(OPNAME, ROUNDER, RND, OP_MMX2, OP_3DNOW)\ |
1057 | 888 static void OPNAME ## mpeg4_qpel16_h_lowpass_mmx2(uint8_t *dst, uint8_t *src, int dstStride, int srcStride, int h){\ |
954 | 889 uint64_t temp;\ |
890 \ | |
8031 | 891 __asm__ volatile(\ |
2979 | 892 "pxor %%mm7, %%mm7 \n\t"\ |
893 "1: \n\t"\ | |
894 "movq (%0), %%mm0 \n\t" /* ABCDEFGH */\ | |
895 "movq %%mm0, %%mm1 \n\t" /* ABCDEFGH */\ | |
896 "movq %%mm0, %%mm2 \n\t" /* ABCDEFGH */\ | |
897 "punpcklbw %%mm7, %%mm0 \n\t" /* 0A0B0C0D */\ | |
898 "punpckhbw %%mm7, %%mm1 \n\t" /* 0E0F0G0H */\ | |
899 "pshufw $0x90, %%mm0, %%mm5 \n\t" /* 0A0A0B0C */\ | |
900 "pshufw $0x41, %%mm0, %%mm6 \n\t" /* 0B0A0A0B */\ | |
901 "movq %%mm2, %%mm3 \n\t" /* ABCDEFGH */\ | |
902 "movq %%mm2, %%mm4 \n\t" /* ABCDEFGH */\ | |
903 "psllq $8, %%mm2 \n\t" /* 0ABCDEFG */\ | |
904 "psllq $16, %%mm3 \n\t" /* 00ABCDEF */\ | |
905 "psllq $24, %%mm4 \n\t" /* 000ABCDE */\ | |
906 "punpckhbw %%mm7, %%mm2 \n\t" /* 0D0E0F0G */\ | |
907 "punpckhbw %%mm7, %%mm3 \n\t" /* 0C0D0E0F */\ | |
908 "punpckhbw %%mm7, %%mm4 \n\t" /* 0B0C0D0E */\ | |
909 "paddw %%mm3, %%mm5 \n\t" /* b */\ | |
910 "paddw %%mm2, %%mm6 \n\t" /* c */\ | |
911 "paddw %%mm5, %%mm5 \n\t" /* 2b */\ | |
912 "psubw %%mm5, %%mm6 \n\t" /* c - 2b */\ | |
913 "pshufw $0x06, %%mm0, %%mm5 \n\t" /* 0C0B0A0A */\ | |
914 "pmullw "MANGLE(ff_pw_3)", %%mm6 \n\t" /* 3c - 6b */\ | |
915 "paddw %%mm4, %%mm0 \n\t" /* a */\ | |
916 "paddw %%mm1, %%mm5 \n\t" /* d */\ | |
917 "pmullw "MANGLE(ff_pw_20)", %%mm0 \n\t" /* 20a */\ | |
918 "psubw %%mm5, %%mm0 \n\t" /* 20a - d */\ | |
919 "paddw %6, %%mm6 \n\t"\ | |
920 "paddw %%mm6, %%mm0 \n\t" /* 20a - 6b + 3c - d */\ | |
921 "psraw $5, %%mm0 \n\t"\ | |
922 "movq %%mm0, %5 \n\t"\ | |
954 | 923 /* mm1=EFGH, mm2=DEFG, mm3=CDEF, mm4=BCDE, mm7=0 */\ |
924 \ | |
2979 | 925 "movq 5(%0), %%mm0 \n\t" /* FGHIJKLM */\ |
926 "movq %%mm0, %%mm5 \n\t" /* FGHIJKLM */\ | |
927 "movq %%mm0, %%mm6 \n\t" /* FGHIJKLM */\ | |
928 "psrlq $8, %%mm0 \n\t" /* GHIJKLM0 */\ | |
929 "psrlq $16, %%mm5 \n\t" /* HIJKLM00 */\ | |
930 "punpcklbw %%mm7, %%mm0 \n\t" /* 0G0H0I0J */\ | |
931 "punpcklbw %%mm7, %%mm5 \n\t" /* 0H0I0J0K */\ | |
932 "paddw %%mm0, %%mm2 \n\t" /* b */\ | |
933 "paddw %%mm5, %%mm3 \n\t" /* c */\ | |
934 "paddw %%mm2, %%mm2 \n\t" /* 2b */\ | |
935 "psubw %%mm2, %%mm3 \n\t" /* c - 2b */\ | |
936 "movq %%mm6, %%mm2 \n\t" /* FGHIJKLM */\ | |
937 "psrlq $24, %%mm6 \n\t" /* IJKLM000 */\ | |
938 "punpcklbw %%mm7, %%mm2 \n\t" /* 0F0G0H0I */\ | |
939 "punpcklbw %%mm7, %%mm6 \n\t" /* 0I0J0K0L */\ | |
940 "pmullw "MANGLE(ff_pw_3)", %%mm3 \n\t" /* 3c - 6b */\ | |
941 "paddw %%mm2, %%mm1 \n\t" /* a */\ | |
942 "paddw %%mm6, %%mm4 \n\t" /* d */\ | |
943 "pmullw "MANGLE(ff_pw_20)", %%mm1 \n\t" /* 20a */\ | |
944 "psubw %%mm4, %%mm3 \n\t" /* - 6b +3c - d */\ | |
945 "paddw %6, %%mm1 \n\t"\ | |
946 "paddw %%mm1, %%mm3 \n\t" /* 20a - 6b +3c - d */\ | |
947 "psraw $5, %%mm3 \n\t"\ | |
948 "movq %5, %%mm1 \n\t"\ | |
949 "packuswb %%mm3, %%mm1 \n\t"\ | |
959 | 950 OP_MMX2(%%mm1, (%1),%%mm4, q)\ |
954 | 951 /* mm0= GHIJ, mm2=FGHI, mm5=HIJK, mm6=IJKL, mm7=0 */\ |
952 \ | |
2979 | 953 "movq 9(%0), %%mm1 \n\t" /* JKLMNOPQ */\ |
954 "movq %%mm1, %%mm4 \n\t" /* JKLMNOPQ */\ | |
955 "movq %%mm1, %%mm3 \n\t" /* JKLMNOPQ */\ | |
956 "psrlq $8, %%mm1 \n\t" /* KLMNOPQ0 */\ | |
957 "psrlq $16, %%mm4 \n\t" /* LMNOPQ00 */\ | |
958 "punpcklbw %%mm7, %%mm1 \n\t" /* 0K0L0M0N */\ | |
959 "punpcklbw %%mm7, %%mm4 \n\t" /* 0L0M0N0O */\ | |
960 "paddw %%mm1, %%mm5 \n\t" /* b */\ | |
961 "paddw %%mm4, %%mm0 \n\t" /* c */\ | |
962 "paddw %%mm5, %%mm5 \n\t" /* 2b */\ | |
963 "psubw %%mm5, %%mm0 \n\t" /* c - 2b */\ | |
964 "movq %%mm3, %%mm5 \n\t" /* JKLMNOPQ */\ | |
965 "psrlq $24, %%mm3 \n\t" /* MNOPQ000 */\ | |
966 "pmullw "MANGLE(ff_pw_3)", %%mm0 \n\t" /* 3c - 6b */\ | |
967 "punpcklbw %%mm7, %%mm3 \n\t" /* 0M0N0O0P */\ | |
968 "paddw %%mm3, %%mm2 \n\t" /* d */\ | |
969 "psubw %%mm2, %%mm0 \n\t" /* -6b + 3c - d */\ | |
970 "movq %%mm5, %%mm2 \n\t" /* JKLMNOPQ */\ | |
971 "punpcklbw %%mm7, %%mm2 \n\t" /* 0J0K0L0M */\ | |
972 "punpckhbw %%mm7, %%mm5 \n\t" /* 0N0O0P0Q */\ | |
973 "paddw %%mm2, %%mm6 \n\t" /* a */\ | |
974 "pmullw "MANGLE(ff_pw_20)", %%mm6 \n\t" /* 20a */\ | |
975 "paddw %6, %%mm0 \n\t"\ | |
976 "paddw %%mm6, %%mm0 \n\t" /* 20a - 6b + 3c - d */\ | |
977 "psraw $5, %%mm0 \n\t"\ | |
954 | 978 /* mm1=KLMN, mm2=JKLM, mm3=MNOP, mm4=LMNO, mm5=NOPQ mm7=0 */\ |
979 \ | |
2979 | 980 "paddw %%mm5, %%mm3 \n\t" /* a */\ |
981 "pshufw $0xF9, %%mm5, %%mm6 \n\t" /* 0O0P0Q0Q */\ | |
982 "paddw %%mm4, %%mm6 \n\t" /* b */\ | |
983 "pshufw $0xBE, %%mm5, %%mm4 \n\t" /* 0P0Q0Q0P */\ | |
984 "pshufw $0x6F, %%mm5, %%mm5 \n\t" /* 0Q0Q0P0O */\ | |
985 "paddw %%mm1, %%mm4 \n\t" /* c */\ | |
986 "paddw %%mm2, %%mm5 \n\t" /* d */\ | |
987 "paddw %%mm6, %%mm6 \n\t" /* 2b */\ | |
988 "psubw %%mm6, %%mm4 \n\t" /* c - 2b */\ | |
989 "pmullw "MANGLE(ff_pw_20)", %%mm3 \n\t" /* 20a */\ | |
990 "pmullw "MANGLE(ff_pw_3)", %%mm4 \n\t" /* 3c - 6b */\ | |
991 "psubw %%mm5, %%mm3 \n\t" /* -6b + 3c - d */\ | |
992 "paddw %6, %%mm4 \n\t"\ | |
993 "paddw %%mm3, %%mm4 \n\t" /* 20a - 6b + 3c - d */\ | |
994 "psraw $5, %%mm4 \n\t"\ | |
995 "packuswb %%mm4, %%mm0 \n\t"\ | |
959 | 996 OP_MMX2(%%mm0, 8(%1), %%mm4, q)\ |
954 | 997 \ |
2979 | 998 "add %3, %0 \n\t"\ |
999 "add %4, %1 \n\t"\ | |
1000 "decl %2 \n\t"\ | |
1001 " jnz 1b \n\t"\ | |
6513
713c4fd84e0b
Hardcode register to prevent aparent miscompilation.
michael
parents:
6512
diff
changeset
|
1002 : "+a"(src), "+c"(dst), "+D"(h)\ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1003 : "d"((x86_reg)srcStride), "S"((x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(temp), "m"(ROUNDER)\ |
966 | 1004 : "memory"\ |
954 | 1005 );\ |
1006 }\ | |
1007 \ | |
1008 static void OPNAME ## mpeg4_qpel16_h_lowpass_3dnow(uint8_t *dst, uint8_t *src, int dstStride, int srcStride, int h){\ | |
1009 int i;\ | |
1010 int16_t temp[16];\ | |
1011 /* quick HACK, XXX FIXME MUST be optimized */\ | |
1012 for(i=0; i<h; i++)\ | |
1013 {\ | |
1014 temp[ 0]= (src[ 0]+src[ 1])*20 - (src[ 0]+src[ 2])*6 + (src[ 1]+src[ 3])*3 - (src[ 2]+src[ 4]);\ | |
1015 temp[ 1]= (src[ 1]+src[ 2])*20 - (src[ 0]+src[ 3])*6 + (src[ 0]+src[ 4])*3 - (src[ 1]+src[ 5]);\ | |
1016 temp[ 2]= (src[ 2]+src[ 3])*20 - (src[ 1]+src[ 4])*6 + (src[ 0]+src[ 5])*3 - (src[ 0]+src[ 6]);\ | |
1017 temp[ 3]= (src[ 3]+src[ 4])*20 - (src[ 2]+src[ 5])*6 + (src[ 1]+src[ 6])*3 - (src[ 0]+src[ 7]);\ | |
1018 temp[ 4]= (src[ 4]+src[ 5])*20 - (src[ 3]+src[ 6])*6 + (src[ 2]+src[ 7])*3 - (src[ 1]+src[ 8]);\ | |
1019 temp[ 5]= (src[ 5]+src[ 6])*20 - (src[ 4]+src[ 7])*6 + (src[ 3]+src[ 8])*3 - (src[ 2]+src[ 9]);\ | |
1020 temp[ 6]= (src[ 6]+src[ 7])*20 - (src[ 5]+src[ 8])*6 + (src[ 4]+src[ 9])*3 - (src[ 3]+src[10]);\ | |
1021 temp[ 7]= (src[ 7]+src[ 8])*20 - (src[ 6]+src[ 9])*6 + (src[ 5]+src[10])*3 - (src[ 4]+src[11]);\ | |
1022 temp[ 8]= (src[ 8]+src[ 9])*20 - (src[ 7]+src[10])*6 + (src[ 6]+src[11])*3 - (src[ 5]+src[12]);\ | |
1023 temp[ 9]= (src[ 9]+src[10])*20 - (src[ 8]+src[11])*6 + (src[ 7]+src[12])*3 - (src[ 6]+src[13]);\ | |
1024 temp[10]= (src[10]+src[11])*20 - (src[ 9]+src[12])*6 + (src[ 8]+src[13])*3 - (src[ 7]+src[14]);\ | |
1025 temp[11]= (src[11]+src[12])*20 - (src[10]+src[13])*6 + (src[ 9]+src[14])*3 - (src[ 8]+src[15]);\ | |
1026 temp[12]= (src[12]+src[13])*20 - (src[11]+src[14])*6 + (src[10]+src[15])*3 - (src[ 9]+src[16]);\ | |
1027 temp[13]= (src[13]+src[14])*20 - (src[12]+src[15])*6 + (src[11]+src[16])*3 - (src[10]+src[16]);\ | |
1028 temp[14]= (src[14]+src[15])*20 - (src[13]+src[16])*6 + (src[12]+src[16])*3 - (src[11]+src[15]);\ | |
1029 temp[15]= (src[15]+src[16])*20 - (src[14]+src[16])*6 + (src[13]+src[15])*3 - (src[12]+src[14]);\ | |
8031 | 1030 __asm__ volatile(\ |
2979 | 1031 "movq (%0), %%mm0 \n\t"\ |
1032 "movq 8(%0), %%mm1 \n\t"\ | |
1033 "paddw %2, %%mm0 \n\t"\ | |
1034 "paddw %2, %%mm1 \n\t"\ | |
1035 "psraw $5, %%mm0 \n\t"\ | |
1036 "psraw $5, %%mm1 \n\t"\ | |
1037 "packuswb %%mm1, %%mm0 \n\t"\ | |
959 | 1038 OP_3DNOW(%%mm0, (%1), %%mm1, q)\ |
2979 | 1039 "movq 16(%0), %%mm0 \n\t"\ |
1040 "movq 24(%0), %%mm1 \n\t"\ | |
1041 "paddw %2, %%mm0 \n\t"\ | |
1042 "paddw %2, %%mm1 \n\t"\ | |
1043 "psraw $5, %%mm0 \n\t"\ | |
1044 "psraw $5, %%mm1 \n\t"\ | |
1045 "packuswb %%mm1, %%mm0 \n\t"\ | |
959 | 1046 OP_3DNOW(%%mm0, 8(%1), %%mm1, q)\ |
954 | 1047 :: "r"(temp), "r"(dst), "m"(ROUNDER)\ |
966 | 1048 : "memory"\ |
954 | 1049 );\ |
1050 dst+=dstStride;\ | |
1051 src+=srcStride;\ | |
1052 }\ | |
1053 }\ | |
1054 \ | |
1057 | 1055 static void OPNAME ## mpeg4_qpel8_h_lowpass_mmx2(uint8_t *dst, uint8_t *src, int dstStride, int srcStride, int h){\ |
8031 | 1056 __asm__ volatile(\ |
2979 | 1057 "pxor %%mm7, %%mm7 \n\t"\ |
1058 "1: \n\t"\ | |
1059 "movq (%0), %%mm0 \n\t" /* ABCDEFGH */\ | |
1060 "movq %%mm0, %%mm1 \n\t" /* ABCDEFGH */\ | |
1061 "movq %%mm0, %%mm2 \n\t" /* ABCDEFGH */\ | |
1062 "punpcklbw %%mm7, %%mm0 \n\t" /* 0A0B0C0D */\ | |
1063 "punpckhbw %%mm7, %%mm1 \n\t" /* 0E0F0G0H */\ | |
1064 "pshufw $0x90, %%mm0, %%mm5 \n\t" /* 0A0A0B0C */\ | |
1065 "pshufw $0x41, %%mm0, %%mm6 \n\t" /* 0B0A0A0B */\ | |
1066 "movq %%mm2, %%mm3 \n\t" /* ABCDEFGH */\ | |
1067 "movq %%mm2, %%mm4 \n\t" /* ABCDEFGH */\ | |
1068 "psllq $8, %%mm2 \n\t" /* 0ABCDEFG */\ | |
1069 "psllq $16, %%mm3 \n\t" /* 00ABCDEF */\ | |
1070 "psllq $24, %%mm4 \n\t" /* 000ABCDE */\ | |
1071 "punpckhbw %%mm7, %%mm2 \n\t" /* 0D0E0F0G */\ | |
1072 "punpckhbw %%mm7, %%mm3 \n\t" /* 0C0D0E0F */\ | |
1073 "punpckhbw %%mm7, %%mm4 \n\t" /* 0B0C0D0E */\ | |
1074 "paddw %%mm3, %%mm5 \n\t" /* b */\ | |
1075 "paddw %%mm2, %%mm6 \n\t" /* c */\ | |
1076 "paddw %%mm5, %%mm5 \n\t" /* 2b */\ | |
1077 "psubw %%mm5, %%mm6 \n\t" /* c - 2b */\ | |
1078 "pshufw $0x06, %%mm0, %%mm5 \n\t" /* 0C0B0A0A */\ | |
1079 "pmullw "MANGLE(ff_pw_3)", %%mm6 \n\t" /* 3c - 6b */\ | |
1080 "paddw %%mm4, %%mm0 \n\t" /* a */\ | |
1081 "paddw %%mm1, %%mm5 \n\t" /* d */\ | |
1082 "pmullw "MANGLE(ff_pw_20)", %%mm0 \n\t" /* 20a */\ | |
1083 "psubw %%mm5, %%mm0 \n\t" /* 20a - d */\ | |
6512 | 1084 "paddw %5, %%mm6 \n\t"\ |
2979 | 1085 "paddw %%mm6, %%mm0 \n\t" /* 20a - 6b + 3c - d */\ |
1086 "psraw $5, %%mm0 \n\t"\ | |
959 | 1087 /* mm1=EFGH, mm2=DEFG, mm3=CDEF, mm4=BCDE, mm7=0 */\ |
1088 \ | |
2979 | 1089 "movd 5(%0), %%mm5 \n\t" /* FGHI */\ |
1090 "punpcklbw %%mm7, %%mm5 \n\t" /* 0F0G0H0I */\ | |
1091 "pshufw $0xF9, %%mm5, %%mm6 \n\t" /* 0G0H0I0I */\ | |
1092 "paddw %%mm5, %%mm1 \n\t" /* a */\ | |
1093 "paddw %%mm6, %%mm2 \n\t" /* b */\ | |
1094 "pshufw $0xBE, %%mm5, %%mm6 \n\t" /* 0H0I0I0H */\ | |
1095 "pshufw $0x6F, %%mm5, %%mm5 \n\t" /* 0I0I0H0G */\ | |
1096 "paddw %%mm6, %%mm3 \n\t" /* c */\ | |
1097 "paddw %%mm5, %%mm4 \n\t" /* d */\ | |
1098 "paddw %%mm2, %%mm2 \n\t" /* 2b */\ | |
1099 "psubw %%mm2, %%mm3 \n\t" /* c - 2b */\ | |
1100 "pmullw "MANGLE(ff_pw_20)", %%mm1 \n\t" /* 20a */\ | |
1101 "pmullw "MANGLE(ff_pw_3)", %%mm3 \n\t" /* 3c - 6b */\ | |
1102 "psubw %%mm4, %%mm3 \n\t" /* -6b + 3c - d */\ | |
6512 | 1103 "paddw %5, %%mm1 \n\t"\ |
2979 | 1104 "paddw %%mm1, %%mm3 \n\t" /* 20a - 6b + 3c - d */\ |
1105 "psraw $5, %%mm3 \n\t"\ | |
1106 "packuswb %%mm3, %%mm0 \n\t"\ | |
959 | 1107 OP_MMX2(%%mm0, (%1), %%mm4, q)\ |
1108 \ | |
2979 | 1109 "add %3, %0 \n\t"\ |
1110 "add %4, %1 \n\t"\ | |
1111 "decl %2 \n\t"\ | |
1112 " jnz 1b \n\t"\ | |
6513
713c4fd84e0b
Hardcode register to prevent aparent miscompilation.
michael
parents:
6512
diff
changeset
|
1113 : "+a"(src), "+c"(dst), "+d"(h)\ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1114 : "S"((x86_reg)srcStride), "D"((x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(ROUNDER)\ |
966 | 1115 : "memory"\ |
959 | 1116 );\ |
1117 }\ | |
1118 \ | |
1119 static void OPNAME ## mpeg4_qpel8_h_lowpass_3dnow(uint8_t *dst, uint8_t *src, int dstStride, int srcStride, int h){\ | |
1120 int i;\ | |
1121 int16_t temp[8];\ | |
1122 /* quick HACK, XXX FIXME MUST be optimized */\ | |
1123 for(i=0; i<h; i++)\ | |
1124 {\ | |
1125 temp[ 0]= (src[ 0]+src[ 1])*20 - (src[ 0]+src[ 2])*6 + (src[ 1]+src[ 3])*3 - (src[ 2]+src[ 4]);\ | |
1126 temp[ 1]= (src[ 1]+src[ 2])*20 - (src[ 0]+src[ 3])*6 + (src[ 0]+src[ 4])*3 - (src[ 1]+src[ 5]);\ | |
1127 temp[ 2]= (src[ 2]+src[ 3])*20 - (src[ 1]+src[ 4])*6 + (src[ 0]+src[ 5])*3 - (src[ 0]+src[ 6]);\ | |
1128 temp[ 3]= (src[ 3]+src[ 4])*20 - (src[ 2]+src[ 5])*6 + (src[ 1]+src[ 6])*3 - (src[ 0]+src[ 7]);\ | |
1129 temp[ 4]= (src[ 4]+src[ 5])*20 - (src[ 3]+src[ 6])*6 + (src[ 2]+src[ 7])*3 - (src[ 1]+src[ 8]);\ | |
1130 temp[ 5]= (src[ 5]+src[ 6])*20 - (src[ 4]+src[ 7])*6 + (src[ 3]+src[ 8])*3 - (src[ 2]+src[ 8]);\ | |
1131 temp[ 6]= (src[ 6]+src[ 7])*20 - (src[ 5]+src[ 8])*6 + (src[ 4]+src[ 8])*3 - (src[ 3]+src[ 7]);\ | |
1132 temp[ 7]= (src[ 7]+src[ 8])*20 - (src[ 6]+src[ 8])*6 + (src[ 5]+src[ 7])*3 - (src[ 4]+src[ 6]);\ | |
8031 | 1133 __asm__ volatile(\ |
2979 | 1134 "movq (%0), %%mm0 \n\t"\ |
1135 "movq 8(%0), %%mm1 \n\t"\ | |
1136 "paddw %2, %%mm0 \n\t"\ | |
1137 "paddw %2, %%mm1 \n\t"\ | |
1138 "psraw $5, %%mm0 \n\t"\ | |
1139 "psraw $5, %%mm1 \n\t"\ | |
1140 "packuswb %%mm1, %%mm0 \n\t"\ | |
959 | 1141 OP_3DNOW(%%mm0, (%1), %%mm1, q)\ |
1142 :: "r"(temp), "r"(dst), "m"(ROUNDER)\ | |
966 | 1143 :"memory"\ |
959 | 1144 );\ |
1145 dst+=dstStride;\ | |
1146 src+=srcStride;\ | |
1147 }\ | |
1148 } | |
1149 | |
1150 #define QPEL_OP(OPNAME, ROUNDER, RND, OP, MMX)\ | |
1151 \ | |
1152 static void OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(uint8_t *dst, uint8_t *src, int dstStride, int srcStride){\ | |
954 | 1153 uint64_t temp[17*4];\ |
1154 uint64_t *temp_ptr= temp;\ | |
1155 int count= 17;\ | |
1156 \ | |
1157 /*FIXME unroll */\ | |
8031 | 1158 __asm__ volatile(\ |
2979 | 1159 "pxor %%mm7, %%mm7 \n\t"\ |
1160 "1: \n\t"\ | |
1161 "movq (%0), %%mm0 \n\t"\ | |
1162 "movq (%0), %%mm1 \n\t"\ | |
1163 "movq 8(%0), %%mm2 \n\t"\ | |
1164 "movq 8(%0), %%mm3 \n\t"\ | |
1165 "punpcklbw %%mm7, %%mm0 \n\t"\ | |
1166 "punpckhbw %%mm7, %%mm1 \n\t"\ | |
1167 "punpcklbw %%mm7, %%mm2 \n\t"\ | |
1168 "punpckhbw %%mm7, %%mm3 \n\t"\ | |
1169 "movq %%mm0, (%1) \n\t"\ | |
1170 "movq %%mm1, 17*8(%1) \n\t"\ | |
1171 "movq %%mm2, 2*17*8(%1) \n\t"\ | |
1172 "movq %%mm3, 3*17*8(%1) \n\t"\ | |
1173 "add $8, %1 \n\t"\ | |
1174 "add %3, %0 \n\t"\ | |
1175 "decl %2 \n\t"\ | |
1176 " jnz 1b \n\t"\ | |
954 | 1177 : "+r" (src), "+r" (temp_ptr), "+r"(count)\ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1178 : "r" ((x86_reg)srcStride)\ |
966 | 1179 : "memory"\ |
954 | 1180 );\ |
1181 \ | |
1182 temp_ptr= temp;\ | |
1183 count=4;\ | |
1184 \ | |
1185 /*FIXME reorder for speed */\ | |
8031 | 1186 __asm__ volatile(\ |
2979 | 1187 /*"pxor %%mm7, %%mm7 \n\t"*/\ |
1188 "1: \n\t"\ | |
1189 "movq (%0), %%mm0 \n\t"\ | |
1190 "movq 8(%0), %%mm1 \n\t"\ | |
1191 "movq 16(%0), %%mm2 \n\t"\ | |
1192 "movq 24(%0), %%mm3 \n\t"\ | |
961 | 1193 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 16(%0), 8(%0), (%0), 32(%0), (%1), OP)\ |
1194 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 8(%0), (%0), (%0), 40(%0), (%1, %3), OP)\ | |
2979 | 1195 "add %4, %1 \n\t"\ |
961 | 1196 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, (%0), (%0), 8(%0), 48(%0), (%1), OP)\ |
954 | 1197 \ |
961 | 1198 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, (%0), 8(%0), 16(%0), 56(%0), (%1, %3), OP)\ |
2979 | 1199 "add %4, %1 \n\t"\ |
961 | 1200 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 8(%0), 16(%0), 24(%0), 64(%0), (%1), OP)\ |
1201 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 16(%0), 24(%0), 32(%0), 72(%0), (%1, %3), OP)\ | |
2979 | 1202 "add %4, %1 \n\t"\ |
961 | 1203 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, 24(%0), 32(%0), 40(%0), 80(%0), (%1), OP)\ |
1204 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, 32(%0), 40(%0), 48(%0), 88(%0), (%1, %3), OP)\ | |
2979 | 1205 "add %4, %1 \n\t"\ |
961 | 1206 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 40(%0), 48(%0), 56(%0), 96(%0), (%1), OP)\ |
1207 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 48(%0), 56(%0), 64(%0),104(%0), (%1, %3), OP)\ | |
2979 | 1208 "add %4, %1 \n\t"\ |
961 | 1209 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, 56(%0), 64(%0), 72(%0),112(%0), (%1), OP)\ |
1210 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, 64(%0), 72(%0), 80(%0),120(%0), (%1, %3), OP)\ | |
2979 | 1211 "add %4, %1 \n\t"\ |
961 | 1212 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 72(%0), 80(%0), 88(%0),128(%0), (%1), OP)\ |
954 | 1213 \ |
961 | 1214 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 80(%0), 88(%0), 96(%0),128(%0), (%1, %3), OP)\ |
2979 | 1215 "add %4, %1 \n\t" \ |
961 | 1216 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, 88(%0), 96(%0),104(%0),120(%0), (%1), OP)\ |
1217 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, 96(%0),104(%0),112(%0),112(%0), (%1, %3), OP)\ | |
954 | 1218 \ |
2979 | 1219 "add $136, %0 \n\t"\ |
1220 "add %6, %1 \n\t"\ | |
1221 "decl %2 \n\t"\ | |
1222 " jnz 1b \n\t"\ | |
958
9bb668034ecf
slowdown / gcc 2.95.* bug workaround (this should be reversed as soon as gcc 2.95.* support is droped)
michaelni
parents:
954
diff
changeset
|
1223 \ |
967 | 1224 : "+r"(temp_ptr), "+r"(dst), "+g"(count)\ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1225 : "r"((x86_reg)dstStride), "r"(2*(x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(ROUNDER), "g"(4-14*(x86_reg)dstStride)\ |
966 | 1226 :"memory"\ |
954 | 1227 );\ |
1228 }\ | |
1229 \ | |
1057 | 1230 static void OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(uint8_t *dst, uint8_t *src, int dstStride, int srcStride){\ |
2209 | 1231 uint64_t temp[9*2];\ |
954 | 1232 uint64_t *temp_ptr= temp;\ |
1233 int count= 9;\ | |
1234 \ | |
1235 /*FIXME unroll */\ | |
8031 | 1236 __asm__ volatile(\ |
2979 | 1237 "pxor %%mm7, %%mm7 \n\t"\ |
1238 "1: \n\t"\ | |
1239 "movq (%0), %%mm0 \n\t"\ | |
1240 "movq (%0), %%mm1 \n\t"\ | |
1241 "punpcklbw %%mm7, %%mm0 \n\t"\ | |
1242 "punpckhbw %%mm7, %%mm1 \n\t"\ | |
1243 "movq %%mm0, (%1) \n\t"\ | |
1244 "movq %%mm1, 9*8(%1) \n\t"\ | |
1245 "add $8, %1 \n\t"\ | |
1246 "add %3, %0 \n\t"\ | |
1247 "decl %2 \n\t"\ | |
1248 " jnz 1b \n\t"\ | |
954 | 1249 : "+r" (src), "+r" (temp_ptr), "+r"(count)\ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1250 : "r" ((x86_reg)srcStride)\ |
966 | 1251 : "memory"\ |
954 | 1252 );\ |
1253 \ | |
1254 temp_ptr= temp;\ | |
1255 count=2;\ | |
1256 \ | |
1257 /*FIXME reorder for speed */\ | |
8031 | 1258 __asm__ volatile(\ |
2979 | 1259 /*"pxor %%mm7, %%mm7 \n\t"*/\ |
1260 "1: \n\t"\ | |
1261 "movq (%0), %%mm0 \n\t"\ | |
1262 "movq 8(%0), %%mm1 \n\t"\ | |
1263 "movq 16(%0), %%mm2 \n\t"\ | |
1264 "movq 24(%0), %%mm3 \n\t"\ | |
961 | 1265 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 16(%0), 8(%0), (%0), 32(%0), (%1), OP)\ |
1266 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 8(%0), (%0), (%0), 40(%0), (%1, %3), OP)\ | |
2979 | 1267 "add %4, %1 \n\t"\ |
961 | 1268 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, (%0), (%0), 8(%0), 48(%0), (%1), OP)\ |
954 | 1269 \ |
961 | 1270 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, (%0), 8(%0), 16(%0), 56(%0), (%1, %3), OP)\ |
2979 | 1271 "add %4, %1 \n\t"\ |
961 | 1272 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 8(%0), 16(%0), 24(%0), 64(%0), (%1), OP)\ |
954 | 1273 \ |
961 | 1274 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 16(%0), 24(%0), 32(%0), 64(%0), (%1, %3), OP)\ |
2979 | 1275 "add %4, %1 \n\t"\ |
961 | 1276 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, 24(%0), 32(%0), 40(%0), 56(%0), (%1), OP)\ |
1277 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, 32(%0), 40(%0), 48(%0), 48(%0), (%1, %3), OP)\ | |
954 | 1278 \ |
2979 | 1279 "add $72, %0 \n\t"\ |
1280 "add %6, %1 \n\t"\ | |
1281 "decl %2 \n\t"\ | |
1282 " jnz 1b \n\t"\ | |
954 | 1283 \ |
961 | 1284 : "+r"(temp_ptr), "+r"(dst), "+g"(count)\ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1285 : "r"((x86_reg)dstStride), "r"(2*(x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(ROUNDER), "g"(4-6*(x86_reg)dstStride)\ |
966 | 1286 : "memory"\ |
1287 );\ | |
959 | 1288 }\ |
954 | 1289 \ |
1064 | 1290 static void OPNAME ## qpel8_mc00_ ## MMX (uint8_t *dst, uint8_t *src, int stride){\ |
6321 | 1291 OPNAME ## pixels8_ ## MMX(dst, src, stride, 8);\ |
954 | 1292 }\ |
1293 \ | |
1064 | 1294 static void OPNAME ## qpel8_mc10_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1295 uint64_t temp[8];\ |
954 | 1296 uint8_t * const half= (uint8_t*)temp;\ |
1297 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(half, src, 8, stride, 8);\ | |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1298 OPNAME ## pixels8_l2_ ## MMX(dst, src, half, stride, stride, 8);\ |
954 | 1299 }\ |
1300 \ | |
1064 | 1301 static void OPNAME ## qpel8_mc20_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1302 OPNAME ## mpeg4_qpel8_h_lowpass_ ## MMX(dst, src, stride, stride, 8);\ |
1303 }\ | |
1304 \ | |
1064 | 1305 static void OPNAME ## qpel8_mc30_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1306 uint64_t temp[8];\ |
954 | 1307 uint8_t * const half= (uint8_t*)temp;\ |
1308 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(half, src, 8, stride, 8);\ | |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1309 OPNAME ## pixels8_l2_ ## MMX(dst, src+1, half, stride, stride, 8);\ |
954 | 1310 }\ |
1311 \ | |
1064 | 1312 static void OPNAME ## qpel8_mc01_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1313 uint64_t temp[8];\ |
954 | 1314 uint8_t * const half= (uint8_t*)temp;\ |
959 | 1315 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(half, src, 8, stride);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1316 OPNAME ## pixels8_l2_ ## MMX(dst, src, half, stride, stride, 8);\ |
954 | 1317 }\ |
1318 \ | |
1064 | 1319 static void OPNAME ## qpel8_mc02_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
959 | 1320 OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(dst, src, stride, stride);\ |
954 | 1321 }\ |
1322 \ | |
1064 | 1323 static void OPNAME ## qpel8_mc03_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1324 uint64_t temp[8];\ |
954 | 1325 uint8_t * const half= (uint8_t*)temp;\ |
959 | 1326 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(half, src, 8, stride);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1327 OPNAME ## pixels8_l2_ ## MMX(dst, src+stride, half, stride, stride, 8);\ |
954 | 1328 }\ |
1064 | 1329 static void OPNAME ## qpel8_mc11_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1330 uint64_t half[8 + 9];\ |
1331 uint8_t * const halfH= ((uint8_t*)half) + 64;\ | |
1332 uint8_t * const halfHV= ((uint8_t*)half);\ | |
954 | 1333 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1334 put ## RND ## pixels8_l2_ ## MMX(halfH, src, halfH, 8, stride, 9);\ |
959 | 1335 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1336 OPNAME ## pixels8_l2_ ## MMX(dst, halfH, halfHV, stride, 8, 8);\ |
954 | 1337 }\ |
1064 | 1338 static void OPNAME ## qpel8_mc31_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1339 uint64_t half[8 + 9];\ |
1340 uint8_t * const halfH= ((uint8_t*)half) + 64;\ | |
1341 uint8_t * const halfHV= ((uint8_t*)half);\ | |
954 | 1342 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1343 put ## RND ## pixels8_l2_ ## MMX(halfH, src+1, halfH, 8, stride, 9);\ |
959 | 1344 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1345 OPNAME ## pixels8_l2_ ## MMX(dst, halfH, halfHV, stride, 8, 8);\ |
954 | 1346 }\ |
1064 | 1347 static void OPNAME ## qpel8_mc13_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1348 uint64_t half[8 + 9];\ |
1349 uint8_t * const halfH= ((uint8_t*)half) + 64;\ | |
1350 uint8_t * const halfHV= ((uint8_t*)half);\ | |
954 | 1351 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1352 put ## RND ## pixels8_l2_ ## MMX(halfH, src, halfH, 8, stride, 9);\ |
959 | 1353 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1354 OPNAME ## pixels8_l2_ ## MMX(dst, halfH+8, halfHV, stride, 8, 8);\ |
954 | 1355 }\ |
1064 | 1356 static void OPNAME ## qpel8_mc33_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1357 uint64_t half[8 + 9];\ |
1358 uint8_t * const halfH= ((uint8_t*)half) + 64;\ | |
1359 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1360 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1361 put ## RND ## pixels8_l2_ ## MMX(halfH, src+1, halfH, 8, stride, 9);\ |
959 | 1362 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1363 OPNAME ## pixels8_l2_ ## MMX(dst, halfH+8, halfHV, stride, 8, 8);\ |
954 | 1364 }\ |
1064 | 1365 static void OPNAME ## qpel8_mc21_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1366 uint64_t half[8 + 9];\ |
954 | 1367 uint8_t * const halfH= ((uint8_t*)half) + 64;\ |
1368 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1369 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
959 | 1370 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1371 OPNAME ## pixels8_l2_ ## MMX(dst, halfH, halfHV, stride, 8, 8);\ |
954 | 1372 }\ |
1064 | 1373 static void OPNAME ## qpel8_mc23_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1374 uint64_t half[8 + 9];\ |
954 | 1375 uint8_t * const halfH= ((uint8_t*)half) + 64;\ |
1376 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1377 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
959 | 1378 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1379 OPNAME ## pixels8_l2_ ## MMX(dst, halfH+8, halfHV, stride, 8, 8);\ |
954 | 1380 }\ |
1064 | 1381 static void OPNAME ## qpel8_mc12_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1382 uint64_t half[8 + 9];\ |
1383 uint8_t * const halfH= ((uint8_t*)half);\ | |
954 | 1384 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1385 put ## RND ## pixels8_l2_ ## MMX(halfH, src, halfH, 8, stride, 9);\ |
984 | 1386 OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(dst, halfH, stride, 8);\ |
954 | 1387 }\ |
1064 | 1388 static void OPNAME ## qpel8_mc32_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1389 uint64_t half[8 + 9];\ |
1390 uint8_t * const halfH= ((uint8_t*)half);\ | |
954 | 1391 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1392 put ## RND ## pixels8_l2_ ## MMX(halfH, src+1, halfH, 8, stride, 9);\ |
984 | 1393 OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(dst, halfH, stride, 8);\ |
954 | 1394 }\ |
1064 | 1395 static void OPNAME ## qpel8_mc22_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1396 uint64_t half[9];\ |
954 | 1397 uint8_t * const halfH= ((uint8_t*)half);\ |
1398 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
959 | 1399 OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(dst, halfH, stride, 8);\ |
954 | 1400 }\ |
1064 | 1401 static void OPNAME ## qpel16_mc00_ ## MMX (uint8_t *dst, uint8_t *src, int stride){\ |
6321 | 1402 OPNAME ## pixels16_ ## MMX(dst, src, stride, 16);\ |
954 | 1403 }\ |
1404 \ | |
1064 | 1405 static void OPNAME ## qpel16_mc10_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1406 uint64_t temp[32];\ |
1407 uint8_t * const half= (uint8_t*)temp;\ | |
1408 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(half, src, 16, stride, 16);\ | |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1409 OPNAME ## pixels16_l2_ ## MMX(dst, src, half, stride, stride, 16);\ |
954 | 1410 }\ |
1411 \ | |
1064 | 1412 static void OPNAME ## qpel16_mc20_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1413 OPNAME ## mpeg4_qpel16_h_lowpass_ ## MMX(dst, src, stride, stride, 16);\ |
1414 }\ | |
1415 \ | |
1064 | 1416 static void OPNAME ## qpel16_mc30_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1417 uint64_t temp[32];\ |
1418 uint8_t * const half= (uint8_t*)temp;\ | |
1419 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(half, src, 16, stride, 16);\ | |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1420 OPNAME ## pixels16_l2_ ## MMX(dst, src+1, half, stride, stride, 16);\ |
954 | 1421 }\ |
1422 \ | |
1064 | 1423 static void OPNAME ## qpel16_mc01_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1424 uint64_t temp[32];\ |
1425 uint8_t * const half= (uint8_t*)temp;\ | |
959 | 1426 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(half, src, 16, stride);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1427 OPNAME ## pixels16_l2_ ## MMX(dst, src, half, stride, stride, 16);\ |
954 | 1428 }\ |
1429 \ | |
1064 | 1430 static void OPNAME ## qpel16_mc02_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
959 | 1431 OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(dst, src, stride, stride);\ |
954 | 1432 }\ |
1433 \ | |
1064 | 1434 static void OPNAME ## qpel16_mc03_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1435 uint64_t temp[32];\ |
1436 uint8_t * const half= (uint8_t*)temp;\ | |
959 | 1437 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(half, src, 16, stride);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1438 OPNAME ## pixels16_l2_ ## MMX(dst, src+stride, half, stride, stride, 16);\ |
954 | 1439 }\ |
1064 | 1440 static void OPNAME ## qpel16_mc11_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1441 uint64_t half[16*2 + 17*2];\ |
1442 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1443 uint8_t * const halfHV= ((uint8_t*)half);\ | |
954 | 1444 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
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diff
changeset
|
1445 put ## RND ## pixels16_l2_ ## MMX(halfH, src, halfH, 16, stride, 17);\ |
959 | 1446 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
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diff
changeset
|
1447 OPNAME ## pixels16_l2_ ## MMX(dst, halfH, halfHV, stride, 16, 16);\ |
954 | 1448 }\ |
1064 | 1449 static void OPNAME ## qpel16_mc31_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1450 uint64_t half[16*2 + 17*2];\ |
1451 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1452 uint8_t * const halfHV= ((uint8_t*)half);\ | |
954 | 1453 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
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changeset
|
1454 put ## RND ## pixels16_l2_ ## MMX(halfH, src+1, halfH, 16, stride, 17);\ |
959 | 1455 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
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diff
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|
1456 OPNAME ## pixels16_l2_ ## MMX(dst, halfH, halfHV, stride, 16, 16);\ |
954 | 1457 }\ |
1064 | 1458 static void OPNAME ## qpel16_mc13_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1459 uint64_t half[16*2 + 17*2];\ |
1460 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1461 uint8_t * const halfHV= ((uint8_t*)half);\ | |
954 | 1462 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ |
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22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
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changeset
|
1463 put ## RND ## pixels16_l2_ ## MMX(halfH, src, halfH, 16, stride, 17);\ |
959 | 1464 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
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diff
changeset
|
1465 OPNAME ## pixels16_l2_ ## MMX(dst, halfH+16, halfHV, stride, 16, 16);\ |
954 | 1466 }\ |
1064 | 1467 static void OPNAME ## qpel16_mc33_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1468 uint64_t half[16*2 + 17*2];\ |
1469 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1470 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1471 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
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changeset
|
1472 put ## RND ## pixels16_l2_ ## MMX(halfH, src+1, halfH, 16, stride, 17);\ |
959 | 1473 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ |
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22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
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|
1474 OPNAME ## pixels16_l2_ ## MMX(dst, halfH+16, halfHV, stride, 16, 16);\ |
954 | 1475 }\ |
1064 | 1476 static void OPNAME ## qpel16_mc21_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1477 uint64_t half[16*2 + 17*2];\ |
1478 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1479 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1480 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
959 | 1481 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ |
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22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
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|
1482 OPNAME ## pixels16_l2_ ## MMX(dst, halfH, halfHV, stride, 16, 16);\ |
954 | 1483 }\ |
1064 | 1484 static void OPNAME ## qpel16_mc23_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1485 uint64_t half[16*2 + 17*2];\ |
1486 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1487 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1488 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
959 | 1489 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ |
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10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
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|
1490 OPNAME ## pixels16_l2_ ## MMX(dst, halfH+16, halfHV, stride, 16, 16);\ |
954 | 1491 }\ |
1064 | 1492 static void OPNAME ## qpel16_mc12_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1493 uint64_t half[17*2];\ |
1494 uint8_t * const halfH= ((uint8_t*)half);\ | |
954 | 1495 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ |
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22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
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|
1496 put ## RND ## pixels16_l2_ ## MMX(halfH, src, halfH, 16, stride, 17);\ |
984 | 1497 OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(dst, halfH, stride, 16);\ |
954 | 1498 }\ |
1064 | 1499 static void OPNAME ## qpel16_mc32_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1500 uint64_t half[17*2];\ |
1501 uint8_t * const halfH= ((uint8_t*)half);\ | |
954 | 1502 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ |
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10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
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|
1503 put ## RND ## pixels16_l2_ ## MMX(halfH, src+1, halfH, 16, stride, 17);\ |
984 | 1504 OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(dst, halfH, stride, 16);\ |
954 | 1505 }\ |
1064 | 1506 static void OPNAME ## qpel16_mc22_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1507 uint64_t half[17*2];\ |
1508 uint8_t * const halfH= ((uint8_t*)half);\ | |
1509 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
959 | 1510 OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(dst, halfH, stride, 16);\ |
954 | 1511 } |
1512 | |
2979 | 1513 #define PUT_OP(a,b,temp, size) "mov" #size " " #a ", " #b " \n\t" |
959 | 1514 #define AVG_3DNOW_OP(a,b,temp, size) \ |
2979 | 1515 "mov" #size " " #b ", " #temp " \n\t"\ |
1516 "pavgusb " #temp ", " #a " \n\t"\ | |
1517 "mov" #size " " #a ", " #b " \n\t" | |
959 | 1518 #define AVG_MMX2_OP(a,b,temp, size) \ |
2979 | 1519 "mov" #size " " #b ", " #temp " \n\t"\ |
1520 "pavgb " #temp ", " #a " \n\t"\ | |
1521 "mov" #size " " #a ", " #b " \n\t" | |
959 | 1522 |
1523 QPEL_BASE(put_ , ff_pw_16, _ , PUT_OP, PUT_OP) | |
1524 QPEL_BASE(avg_ , ff_pw_16, _ , AVG_MMX2_OP, AVG_3DNOW_OP) | |
1525 QPEL_BASE(put_no_rnd_, ff_pw_15, _no_rnd_, PUT_OP, PUT_OP) | |
1526 QPEL_OP(put_ , ff_pw_16, _ , PUT_OP, 3dnow) | |
1527 QPEL_OP(avg_ , ff_pw_16, _ , AVG_3DNOW_OP, 3dnow) | |
1528 QPEL_OP(put_no_rnd_, ff_pw_15, _no_rnd_, PUT_OP, 3dnow) | |
954 | 1529 QPEL_OP(put_ , ff_pw_16, _ , PUT_OP, mmx2) |
959 | 1530 QPEL_OP(avg_ , ff_pw_16, _ , AVG_MMX2_OP, mmx2) |
954 | 1531 QPEL_OP(put_no_rnd_, ff_pw_15, _no_rnd_, PUT_OP, mmx2) |
1532 | |
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|
1533 /***********************************/ |
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|
1534 /* bilinear qpel: not compliant to any spec, only for -lavdopts fast */ |
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|
1535 |
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|
1536 #define QPEL_2TAP_XY(OPNAME, SIZE, MMX, XY, HPEL)\ |
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|
1537 static void OPNAME ## 2tap_qpel ## SIZE ## _mc ## XY ## _ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
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|
1538 OPNAME ## pixels ## SIZE ## HPEL(dst, src, stride, SIZE);\ |
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|
1539 } |
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changeset
|
1540 #define QPEL_2TAP_L3(OPNAME, SIZE, MMX, XY, S0, S1, S2)\ |
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|
1541 static void OPNAME ## 2tap_qpel ## SIZE ## _mc ## XY ## _ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
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|
1542 OPNAME ## 2tap_qpel ## SIZE ## _l3_ ## MMX(dst, src+S0, stride, SIZE, S1, S2);\ |
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|
1543 } |
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|
1544 |
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|
1545 #define QPEL_2TAP(OPNAME, SIZE, MMX)\ |
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|
1546 QPEL_2TAP_XY(OPNAME, SIZE, MMX, 20, _x2_ ## MMX)\ |
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changeset
|
1547 QPEL_2TAP_XY(OPNAME, SIZE, MMX, 02, _y2_ ## MMX)\ |
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approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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parents:
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diff
changeset
|
1548 QPEL_2TAP_XY(OPNAME, SIZE, MMX, 22, _xy2_mmx)\ |
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parents:
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diff
changeset
|
1549 static const qpel_mc_func OPNAME ## 2tap_qpel ## SIZE ## _mc00_ ## MMX =\ |
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parents:
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diff
changeset
|
1550 OPNAME ## qpel ## SIZE ## _mc00_ ## MMX;\ |
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approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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parents:
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diff
changeset
|
1551 static const qpel_mc_func OPNAME ## 2tap_qpel ## SIZE ## _mc21_ ## MMX =\ |
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approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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parents:
3777
diff
changeset
|
1552 OPNAME ## 2tap_qpel ## SIZE ## _mc20_ ## MMX;\ |
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approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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parents:
3777
diff
changeset
|
1553 static const qpel_mc_func OPNAME ## 2tap_qpel ## SIZE ## _mc12_ ## MMX =\ |
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approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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parents:
3777
diff
changeset
|
1554 OPNAME ## 2tap_qpel ## SIZE ## _mc02_ ## MMX;\ |
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parents:
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diff
changeset
|
1555 static void OPNAME ## 2tap_qpel ## SIZE ## _mc32_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
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approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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parents:
3777
diff
changeset
|
1556 OPNAME ## pixels ## SIZE ## _y2_ ## MMX(dst, src+1, stride, SIZE);\ |
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approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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parents:
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diff
changeset
|
1557 }\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1558 static void OPNAME ## 2tap_qpel ## SIZE ## _mc23_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
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approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
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changeset
|
1559 OPNAME ## pixels ## SIZE ## _x2_ ## MMX(dst, src+stride, stride, SIZE);\ |
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lorenm
parents:
3777
diff
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|
1560 }\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
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|
1561 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 10, 0, 1, 0)\ |
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approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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parents:
3777
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changeset
|
1562 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 30, 1, -1, 0)\ |
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approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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parents:
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changeset
|
1563 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 01, 0, stride, 0)\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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parents:
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diff
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|
1564 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 03, stride, -stride, 0)\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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parents:
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|
1565 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 11, 0, stride, 1)\ |
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|
1566 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 31, 1, stride, -1)\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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parents:
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diff
changeset
|
1567 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 13, stride, -stride, 1)\ |
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approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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parents:
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|
1568 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 33, stride+1, -stride, -1)\ |
6a40092eb9e6
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parents:
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changeset
|
1569 |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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parents:
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diff
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|
1570 QPEL_2TAP(put_, 16, mmx2) |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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parents:
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diff
changeset
|
1571 QPEL_2TAP(avg_, 16, mmx2) |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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parents:
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diff
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|
1572 QPEL_2TAP(put_, 8, mmx2) |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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parents:
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|
1573 QPEL_2TAP(avg_, 8, mmx2) |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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diff
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|
1574 QPEL_2TAP(put_, 16, 3dnow) |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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parents:
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|
1575 QPEL_2TAP(avg_, 16, 3dnow) |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
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parents:
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|
1576 QPEL_2TAP(put_, 8, 3dnow) |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
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diff
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|
1577 QPEL_2TAP(avg_, 8, 3dnow) |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
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diff
changeset
|
1578 |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
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diff
changeset
|
1579 |
393 | 1580 #if 0 |
247
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
1581 static void just_return() { return; } |
393 | 1582 #endif |
247
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
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188
diff
changeset
|
1583 |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
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parents:
3215
diff
changeset
|
1584 static void gmc_mmx(uint8_t *dst, uint8_t *src, int stride, int h, int ox, int oy, |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
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diff
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|
1585 int dxx, int dxy, int dyx, int dyy, int shift, int r, int width, int height){ |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
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parents:
3215
diff
changeset
|
1586 const int w = 8; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
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parents:
3215
diff
changeset
|
1587 const int ix = ox>>(16+shift); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1588 const int iy = oy>>(16+shift); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1589 const int oxs = ox>>4; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1590 const int oys = oy>>4; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1591 const int dxxs = dxx>>4; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1592 const int dxys = dxy>>4; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1593 const int dyxs = dyx>>4; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1594 const int dyys = dyy>>4; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1595 const uint16_t r4[4] = {r,r,r,r}; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1596 const uint16_t dxy4[4] = {dxys,dxys,dxys,dxys}; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1597 const uint16_t dyy4[4] = {dyys,dyys,dyys,dyys}; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1598 const uint64_t shift2 = 2*shift; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1599 uint8_t edge_buf[(h+1)*stride]; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1600 int x, y; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1601 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1602 const int dxw = (dxx-(1<<(16+shift)))*(w-1); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1603 const int dyh = (dyy-(1<<(16+shift)))*(h-1); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1604 const int dxh = dxy*(h-1); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1605 const int dyw = dyx*(w-1); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1606 if( // non-constant fullpel offset (3% of blocks) |
6196
166bef5cad01
add parenthesis, fix warning: i386/dsputil_mmx.c:2618: warning: suggest parentheses around arithmetic in operand of |
bcoudurier
parents:
6195
diff
changeset
|
1607 ((ox^(ox+dxw)) | (ox^(ox+dxh)) | (ox^(ox+dxw+dxh)) | |
166bef5cad01
add parenthesis, fix warning: i386/dsputil_mmx.c:2618: warning: suggest parentheses around arithmetic in operand of |
bcoudurier
parents:
6195
diff
changeset
|
1608 (oy^(oy+dyw)) | (oy^(oy+dyh)) | (oy^(oy+dyw+dyh))) >> (16+shift) |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1609 // uses more than 16 bits of subpel mv (only at huge resolution) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1610 || (dxx|dxy|dyx|dyy)&15 ) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1611 { |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1612 //FIXME could still use mmx for some of the rows |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1613 ff_gmc_c(dst, src, stride, h, ox, oy, dxx, dxy, dyx, dyy, shift, r, width, height); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1614 return; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1615 } |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1616 |
3250 | 1617 src += ix + iy*stride; |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1618 if( (unsigned)ix >= width-w || |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1619 (unsigned)iy >= height-h ) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1620 { |
3250 | 1621 ff_emulated_edge_mc(edge_buf, src, stride, w+1, h+1, ix, iy, width, height); |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1622 src = edge_buf; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1623 } |
3250 | 1624 |
8031 | 1625 __asm__ volatile( |
3250 | 1626 "movd %0, %%mm6 \n\t" |
1627 "pxor %%mm7, %%mm7 \n\t" | |
1628 "punpcklwd %%mm6, %%mm6 \n\t" | |
1629 "punpcklwd %%mm6, %%mm6 \n\t" | |
1630 :: "r"(1<<shift) | |
1631 ); | |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1632 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1633 for(x=0; x<w; x+=4){ |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1634 uint16_t dx4[4] = { oxs - dxys + dxxs*(x+0), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1635 oxs - dxys + dxxs*(x+1), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1636 oxs - dxys + dxxs*(x+2), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1637 oxs - dxys + dxxs*(x+3) }; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1638 uint16_t dy4[4] = { oys - dyys + dyxs*(x+0), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1639 oys - dyys + dyxs*(x+1), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1640 oys - dyys + dyxs*(x+2), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1641 oys - dyys + dyxs*(x+3) }; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1642 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1643 for(y=0; y<h; y++){ |
8031 | 1644 __asm__ volatile( |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1645 "movq %0, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1646 "movq %1, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1647 "paddw %2, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1648 "paddw %3, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1649 "movq %%mm4, %0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1650 "movq %%mm5, %1 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1651 "psrlw $12, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1652 "psrlw $12, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1653 : "+m"(*dx4), "+m"(*dy4) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1654 : "m"(*dxy4), "m"(*dyy4) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1655 ); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1656 |
8031 | 1657 __asm__ volatile( |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1658 "movq %%mm6, %%mm2 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1659 "movq %%mm6, %%mm1 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1660 "psubw %%mm4, %%mm2 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1661 "psubw %%mm5, %%mm1 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1662 "movq %%mm2, %%mm0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1663 "movq %%mm4, %%mm3 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1664 "pmullw %%mm1, %%mm0 \n\t" // (s-dx)*(s-dy) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1665 "pmullw %%mm5, %%mm3 \n\t" // dx*dy |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1666 "pmullw %%mm5, %%mm2 \n\t" // (s-dx)*dy |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1667 "pmullw %%mm4, %%mm1 \n\t" // dx*(s-dy) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1668 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1669 "movd %4, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1670 "movd %3, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1671 "punpcklbw %%mm7, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1672 "punpcklbw %%mm7, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1673 "pmullw %%mm5, %%mm3 \n\t" // src[1,1] * dx*dy |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1674 "pmullw %%mm4, %%mm2 \n\t" // src[0,1] * (s-dx)*dy |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1675 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1676 "movd %2, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1677 "movd %1, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1678 "punpcklbw %%mm7, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1679 "punpcklbw %%mm7, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1680 "pmullw %%mm5, %%mm1 \n\t" // src[1,0] * dx*(s-dy) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1681 "pmullw %%mm4, %%mm0 \n\t" // src[0,0] * (s-dx)*(s-dy) |
3250 | 1682 "paddw %5, %%mm1 \n\t" |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1683 "paddw %%mm3, %%mm2 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1684 "paddw %%mm1, %%mm0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1685 "paddw %%mm2, %%mm0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1686 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1687 "psrlw %6, %%mm0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1688 "packuswb %%mm0, %%mm0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1689 "movd %%mm0, %0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1690 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1691 : "=m"(dst[x+y*stride]) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1692 : "m"(src[0]), "m"(src[1]), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1693 "m"(src[stride]), "m"(src[stride+1]), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1694 "m"(*r4), "m"(shift2) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1695 ); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1696 src += stride; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1697 } |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1698 src += 4-h*stride; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1699 } |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1700 } |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1701 |
3215
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1702 #define PREFETCH(name, op) \ |
4172 | 1703 static void name(void *mem, int stride, int h){\ |
3215
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1704 const uint8_t *p= mem;\ |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1705 do{\ |
8031 | 1706 __asm__ volatile(#op" %0" :: "m"(*p));\ |
3215
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1707 p+= stride;\ |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1708 }while(--h);\ |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1709 } |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1710 PREFETCH(prefetch_mmx2, prefetcht0) |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1711 PREFETCH(prefetch_3dnow, prefetch) |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1712 #undef PREFETCH |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1713 |
2754 | 1714 #include "h264dsp_mmx.c" |
2967 | 1715 |
6009 | 1716 /* CAVS specific */ |
3524 | 1717 void ff_cavsdsp_init_mmx2(DSPContext* c, AVCodecContext *avctx); |
6522
dfa76e0734e5
Add missed call to ff_cavsdsp_init_3dnow() in dsputil_init_mmx()
zuxy
parents:
6513
diff
changeset
|
1718 void ff_cavsdsp_init_3dnow(DSPContext* c, AVCodecContext *avctx); |
3524 | 1719 |
1720 void ff_put_cavs_qpel8_mc00_mmx2(uint8_t *dst, uint8_t *src, int stride) { | |
1721 put_pixels8_mmx(dst, src, stride, 8); | |
1722 } | |
1723 void ff_avg_cavs_qpel8_mc00_mmx2(uint8_t *dst, uint8_t *src, int stride) { | |
1724 avg_pixels8_mmx(dst, src, stride, 8); | |
1725 } | |
1726 void ff_put_cavs_qpel16_mc00_mmx2(uint8_t *dst, uint8_t *src, int stride) { | |
1727 put_pixels16_mmx(dst, src, stride, 16); | |
1728 } | |
1729 void ff_avg_cavs_qpel16_mc00_mmx2(uint8_t *dst, uint8_t *src, int stride) { | |
1730 avg_pixels16_mmx(dst, src, stride, 16); | |
1731 } | |
1732 | |
5948 | 1733 /* VC1 specific */ |
1734 void ff_vc1dsp_init_mmx(DSPContext* dsp, AVCodecContext *avctx); | |
1735 | |
1736 void ff_put_vc1_mspel_mc00_mmx(uint8_t *dst, const uint8_t *src, int stride, int rnd) { | |
1737 put_pixels8_mmx(dst, src, stride, 8); | |
1738 } | |
1739 | |
1092 | 1740 /* external functions, from idct_mmx.c */ |
1741 void ff_mmx_idct(DCTELEM *block); | |
1742 void ff_mmxext_idct(DCTELEM *block); | |
1743 | |
1744 /* XXX: those functions should be suppressed ASAP when all IDCTs are | |
1745 converted */ | |
4020
723818b5de0f
Put libmpeg2 IDCT functions under CONFIG_GPL, fixes link failure
diego
parents:
4001
diff
changeset
|
1746 #ifdef CONFIG_GPL |
1092 | 1747 static void ff_libmpeg2mmx_idct_put(uint8_t *dest, int line_size, DCTELEM *block) |
1748 { | |
1749 ff_mmx_idct (block); | |
1750 put_pixels_clamped_mmx(block, dest, line_size); | |
1751 } | |
1752 static void ff_libmpeg2mmx_idct_add(uint8_t *dest, int line_size, DCTELEM *block) | |
1753 { | |
1754 ff_mmx_idct (block); | |
1755 add_pixels_clamped_mmx(block, dest, line_size); | |
1756 } | |
1757 static void ff_libmpeg2mmx2_idct_put(uint8_t *dest, int line_size, DCTELEM *block) | |
1758 { | |
1759 ff_mmxext_idct (block); | |
1760 put_pixels_clamped_mmx(block, dest, line_size); | |
1761 } | |
1762 static void ff_libmpeg2mmx2_idct_add(uint8_t *dest, int line_size, DCTELEM *block) | |
1763 { | |
1764 ff_mmxext_idct (block); | |
1765 add_pixels_clamped_mmx(block, dest, line_size); | |
1766 } | |
4020
723818b5de0f
Put libmpeg2 IDCT functions under CONFIG_GPL, fixes link failure
diego
parents:
4001
diff
changeset
|
1767 #endif |
2868 | 1768 static void ff_idct_xvid_mmx_put(uint8_t *dest, int line_size, DCTELEM *block) |
1769 { | |
1770 ff_idct_xvid_mmx (block); | |
1771 put_pixels_clamped_mmx(block, dest, line_size); | |
1772 } | |
1773 static void ff_idct_xvid_mmx_add(uint8_t *dest, int line_size, DCTELEM *block) | |
1774 { | |
1775 ff_idct_xvid_mmx (block); | |
1776 add_pixels_clamped_mmx(block, dest, line_size); | |
1777 } | |
1778 static void ff_idct_xvid_mmx2_put(uint8_t *dest, int line_size, DCTELEM *block) | |
1779 { | |
1780 ff_idct_xvid_mmx2 (block); | |
1781 put_pixels_clamped_mmx(block, dest, line_size); | |
1782 } | |
1783 static void ff_idct_xvid_mmx2_add(uint8_t *dest, int line_size, DCTELEM *block) | |
1784 { | |
1785 ff_idct_xvid_mmx2 (block); | |
1786 add_pixels_clamped_mmx(block, dest, line_size); | |
1787 } | |
2967 | 1788 |
3541
3fbddeb13686
10l, vorbis_inverse_coupling_sse() was really 3dnow
lorenm
parents:
3536
diff
changeset
|
1789 static void vorbis_inverse_coupling_3dnow(float *mag, float *ang, int blocksize) |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1790 { |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1791 int i; |
8031 | 1792 __asm__ volatile("pxor %%mm7, %%mm7":); |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1793 for(i=0; i<blocksize; i+=2) { |
8031 | 1794 __asm__ volatile( |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1795 "movq %0, %%mm0 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1796 "movq %1, %%mm1 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1797 "movq %%mm0, %%mm2 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1798 "movq %%mm1, %%mm3 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1799 "pfcmpge %%mm7, %%mm2 \n\t" // m <= 0.0 |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1800 "pfcmpge %%mm7, %%mm3 \n\t" // a <= 0.0 |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1801 "pslld $31, %%mm2 \n\t" // keep only the sign bit |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1802 "pxor %%mm2, %%mm1 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1803 "movq %%mm3, %%mm4 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1804 "pand %%mm1, %%mm3 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1805 "pandn %%mm1, %%mm4 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1806 "pfadd %%mm0, %%mm3 \n\t" // a = m + ((a<0) & (a ^ sign(m))) |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1807 "pfsub %%mm4, %%mm0 \n\t" // m = m + ((a>0) & (a ^ sign(m))) |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1808 "movq %%mm3, %1 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1809 "movq %%mm0, %0 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1810 :"+m"(mag[i]), "+m"(ang[i]) |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1811 ::"memory" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1812 ); |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1813 } |
8031 | 1814 __asm__ volatile("femms"); |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1815 } |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1816 static void vorbis_inverse_coupling_sse(float *mag, float *ang, int blocksize) |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1817 { |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1818 int i; |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1819 |
8031 | 1820 __asm__ volatile( |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1821 "movaps %0, %%xmm5 \n\t" |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1822 ::"m"(ff_pdw_80000000[0]) |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1823 ); |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1824 for(i=0; i<blocksize; i+=4) { |
8031 | 1825 __asm__ volatile( |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1826 "movaps %0, %%xmm0 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1827 "movaps %1, %%xmm1 \n\t" |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1828 "xorps %%xmm2, %%xmm2 \n\t" |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1829 "xorps %%xmm3, %%xmm3 \n\t" |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1830 "cmpleps %%xmm0, %%xmm2 \n\t" // m <= 0.0 |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1831 "cmpleps %%xmm1, %%xmm3 \n\t" // a <= 0.0 |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1832 "andps %%xmm5, %%xmm2 \n\t" // keep only the sign bit |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1833 "xorps %%xmm2, %%xmm1 \n\t" |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1834 "movaps %%xmm3, %%xmm4 \n\t" |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1835 "andps %%xmm1, %%xmm3 \n\t" |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1836 "andnps %%xmm1, %%xmm4 \n\t" |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1837 "addps %%xmm0, %%xmm3 \n\t" // a = m + ((a<0) & (a ^ sign(m))) |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1838 "subps %%xmm4, %%xmm0 \n\t" // m = m + ((a>0) & (a ^ sign(m))) |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1839 "movaps %%xmm3, %1 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1840 "movaps %%xmm0, %0 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1841 :"+m"(mag[i]), "+m"(ang[i]) |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1842 ::"memory" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1843 ); |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1844 } |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1845 } |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1846 |
7563 | 1847 #define IF1(x) x |
1848 #define IF0(x) | |
1849 | |
1850 #define MIX5(mono,stereo)\ | |
8031 | 1851 __asm__ volatile(\ |
7563 | 1852 "movss 0(%2), %%xmm5 \n"\ |
1853 "movss 8(%2), %%xmm6 \n"\ | |
1854 "movss 24(%2), %%xmm7 \n"\ | |
1855 "shufps $0, %%xmm5, %%xmm5 \n"\ | |
1856 "shufps $0, %%xmm6, %%xmm6 \n"\ | |
1857 "shufps $0, %%xmm7, %%xmm7 \n"\ | |
1858 "1: \n"\ | |
1859 "movaps (%0,%1), %%xmm0 \n"\ | |
1860 "movaps 0x400(%0,%1), %%xmm1 \n"\ | |
1861 "movaps 0x800(%0,%1), %%xmm2 \n"\ | |
1862 "movaps 0xc00(%0,%1), %%xmm3 \n"\ | |
1863 "movaps 0x1000(%0,%1), %%xmm4 \n"\ | |
1864 "mulps %%xmm5, %%xmm0 \n"\ | |
1865 "mulps %%xmm6, %%xmm1 \n"\ | |
1866 "mulps %%xmm5, %%xmm2 \n"\ | |
1867 "mulps %%xmm7, %%xmm3 \n"\ | |
1868 "mulps %%xmm7, %%xmm4 \n"\ | |
1869 stereo("addps %%xmm1, %%xmm0 \n")\ | |
1870 "addps %%xmm1, %%xmm2 \n"\ | |
1871 "addps %%xmm3, %%xmm0 \n"\ | |
1872 "addps %%xmm4, %%xmm2 \n"\ | |
1873 mono("addps %%xmm2, %%xmm0 \n")\ | |
1874 "movaps %%xmm0, (%0,%1) \n"\ | |
1875 stereo("movaps %%xmm2, 0x400(%0,%1) \n")\ | |
1876 "add $16, %0 \n"\ | |
1877 "jl 1b \n"\ | |
1878 :"+&r"(i)\ | |
1879 :"r"(samples[0]+len), "r"(matrix)\ | |
1880 :"memory"\ | |
1881 ); | |
1882 | |
1883 #define MIX_MISC(stereo)\ | |
8031 | 1884 __asm__ volatile(\ |
7563 | 1885 "1: \n"\ |
1886 "movaps (%3,%0), %%xmm0 \n"\ | |
1887 stereo("movaps %%xmm0, %%xmm1 \n")\ | |
1888 "mulps %%xmm6, %%xmm0 \n"\ | |
1889 stereo("mulps %%xmm7, %%xmm1 \n")\ | |
1890 "lea 1024(%3,%0), %1 \n"\ | |
1891 "mov %5, %2 \n"\ | |
1892 "2: \n"\ | |
1893 "movaps (%1), %%xmm2 \n"\ | |
1894 stereo("movaps %%xmm2, %%xmm3 \n")\ | |
1895 "mulps (%4,%2), %%xmm2 \n"\ | |
1896 stereo("mulps 16(%4,%2), %%xmm3 \n")\ | |
1897 "addps %%xmm2, %%xmm0 \n"\ | |
1898 stereo("addps %%xmm3, %%xmm1 \n")\ | |
1899 "add $1024, %1 \n"\ | |
1900 "add $32, %2 \n"\ | |
1901 "jl 2b \n"\ | |
1902 "movaps %%xmm0, (%3,%0) \n"\ | |
1903 stereo("movaps %%xmm1, 1024(%3,%0) \n")\ | |
1904 "add $16, %0 \n"\ | |
1905 "jl 1b \n"\ | |
1906 :"+&r"(i), "=&r"(j), "=&r"(k)\ | |
1907 :"r"(samples[0]+len), "r"(matrix_simd+in_ch), "g"((intptr_t)-32*(in_ch-1))\ | |
1908 :"memory"\ | |
1909 ); | |
1910 | |
1911 static void ac3_downmix_sse(float (*samples)[256], float (*matrix)[2], int out_ch, int in_ch, int len) | |
1912 { | |
1913 int (*matrix_cmp)[2] = (int(*)[2])matrix; | |
1914 intptr_t i,j,k; | |
1915 | |
1916 i = -len*sizeof(float); | |
1917 if(in_ch == 5 && out_ch == 2 && !(matrix_cmp[0][1]|matrix_cmp[2][0]|matrix_cmp[3][1]|matrix_cmp[4][0]|(matrix_cmp[1][0]^matrix_cmp[1][1])|(matrix_cmp[0][0]^matrix_cmp[2][1]))) { | |
1918 MIX5(IF0,IF1); | |
1919 } else if(in_ch == 5 && out_ch == 1 && matrix_cmp[0][0]==matrix_cmp[2][0] && matrix_cmp[3][0]==matrix_cmp[4][0]) { | |
1920 MIX5(IF1,IF0); | |
1921 } else { | |
1922 DECLARE_ALIGNED_16(float, matrix_simd[in_ch][2][4]); | |
1923 j = 2*in_ch*sizeof(float); | |
8031 | 1924 __asm__ volatile( |
7563 | 1925 "1: \n" |
1926 "sub $8, %0 \n" | |
1927 "movss (%2,%0), %%xmm6 \n" | |
1928 "movss 4(%2,%0), %%xmm7 \n" | |
1929 "shufps $0, %%xmm6, %%xmm6 \n" | |
1930 "shufps $0, %%xmm7, %%xmm7 \n" | |
1931 "movaps %%xmm6, (%1,%0,4) \n" | |
1932 "movaps %%xmm7, 16(%1,%0,4) \n" | |
1933 "jg 1b \n" | |
1934 :"+&r"(j) | |
1935 :"r"(matrix_simd), "r"(matrix) | |
1936 :"memory" | |
1937 ); | |
1938 if(out_ch == 2) { | |
1939 MIX_MISC(IF1); | |
1940 } else { | |
1941 MIX_MISC(IF0); | |
1942 } | |
1943 } | |
1944 } | |
1945 | |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1946 static void vector_fmul_3dnow(float *dst, const float *src, int len){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1947 x86_reg i = (len-4)*4; |
8031 | 1948 __asm__ volatile( |
3574 | 1949 "1: \n\t" |
1950 "movq (%1,%0), %%mm0 \n\t" | |
1951 "movq 8(%1,%0), %%mm1 \n\t" | |
1952 "pfmul (%2,%0), %%mm0 \n\t" | |
1953 "pfmul 8(%2,%0), %%mm1 \n\t" | |
1954 "movq %%mm0, (%1,%0) \n\t" | |
1955 "movq %%mm1, 8(%1,%0) \n\t" | |
1956 "sub $16, %0 \n\t" | |
1957 "jge 1b \n\t" | |
1958 "femms \n\t" | |
1959 :"+r"(i) | |
1960 :"r"(dst), "r"(src) | |
1961 :"memory" | |
1962 ); | |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1963 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1964 static void vector_fmul_sse(float *dst, const float *src, int len){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1965 x86_reg i = (len-8)*4; |
8031 | 1966 __asm__ volatile( |
3574 | 1967 "1: \n\t" |
1968 "movaps (%1,%0), %%xmm0 \n\t" | |
1969 "movaps 16(%1,%0), %%xmm1 \n\t" | |
1970 "mulps (%2,%0), %%xmm0 \n\t" | |
1971 "mulps 16(%2,%0), %%xmm1 \n\t" | |
1972 "movaps %%xmm0, (%1,%0) \n\t" | |
1973 "movaps %%xmm1, 16(%1,%0) \n\t" | |
1974 "sub $32, %0 \n\t" | |
1975 "jge 1b \n\t" | |
1976 :"+r"(i) | |
1977 :"r"(dst), "r"(src) | |
1978 :"memory" | |
1979 ); | |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1980 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1981 |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1982 static void vector_fmul_reverse_3dnow2(float *dst, const float *src0, const float *src1, int len){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1983 x86_reg i = len*4-16; |
8031 | 1984 __asm__ volatile( |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1985 "1: \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1986 "pswapd 8(%1), %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1987 "pswapd (%1), %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1988 "pfmul (%3,%0), %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1989 "pfmul 8(%3,%0), %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1990 "movq %%mm0, (%2,%0) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1991 "movq %%mm1, 8(%2,%0) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1992 "add $16, %1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1993 "sub $16, %0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1994 "jge 1b \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1995 :"+r"(i), "+r"(src1) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1996 :"r"(dst), "r"(src0) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1997 ); |
8031 | 1998 __asm__ volatile("femms"); |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1999 } |
3569
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2000 static void vector_fmul_reverse_sse(float *dst, const float *src0, const float *src1, int len){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
2001 x86_reg i = len*4-32; |
8031 | 2002 __asm__ volatile( |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2003 "1: \n\t" |
3569
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2004 "movaps 16(%1), %%xmm0 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2005 "movaps (%1), %%xmm1 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2006 "shufps $0x1b, %%xmm0, %%xmm0 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2007 "shufps $0x1b, %%xmm1, %%xmm1 \n\t" |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2008 "mulps (%3,%0), %%xmm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2009 "mulps 16(%3,%0), %%xmm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2010 "movaps %%xmm0, (%2,%0) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2011 "movaps %%xmm1, 16(%2,%0) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2012 "add $32, %1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2013 "sub $32, %0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2014 "jge 1b \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2015 :"+r"(i), "+r"(src1) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2016 :"r"(dst), "r"(src0) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2017 ); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2018 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2019 |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2020 static void vector_fmul_add_add_3dnow(float *dst, const float *src0, const float *src1, |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2021 const float *src2, int src3, int len, int step){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
2022 x86_reg i = (len-4)*4; |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2023 if(step == 2 && src3 == 0){ |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2024 dst += (len-4)*2; |
8031 | 2025 __asm__ volatile( |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2026 "1: \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2027 "movq (%2,%0), %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2028 "movq 8(%2,%0), %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2029 "pfmul (%3,%0), %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2030 "pfmul 8(%3,%0), %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2031 "pfadd (%4,%0), %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2032 "pfadd 8(%4,%0), %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2033 "movd %%mm0, (%1) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2034 "movd %%mm1, 16(%1) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2035 "psrlq $32, %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2036 "psrlq $32, %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2037 "movd %%mm0, 8(%1) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2038 "movd %%mm1, 24(%1) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2039 "sub $32, %1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2040 "sub $16, %0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2041 "jge 1b \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2042 :"+r"(i), "+r"(dst) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2043 :"r"(src0), "r"(src1), "r"(src2) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2044 :"memory" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2045 ); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2046 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2047 else if(step == 1 && src3 == 0){ |
8031 | 2048 __asm__ volatile( |
3574 | 2049 "1: \n\t" |
2050 "movq (%2,%0), %%mm0 \n\t" | |
2051 "movq 8(%2,%0), %%mm1 \n\t" | |
2052 "pfmul (%3,%0), %%mm0 \n\t" | |
2053 "pfmul 8(%3,%0), %%mm1 \n\t" | |
2054 "pfadd (%4,%0), %%mm0 \n\t" | |
2055 "pfadd 8(%4,%0), %%mm1 \n\t" | |
2056 "movq %%mm0, (%1,%0) \n\t" | |
2057 "movq %%mm1, 8(%1,%0) \n\t" | |
2058 "sub $16, %0 \n\t" | |
2059 "jge 1b \n\t" | |
2060 :"+r"(i) | |
2061 :"r"(dst), "r"(src0), "r"(src1), "r"(src2) | |
2062 :"memory" | |
2063 ); | |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2064 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2065 else |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2066 ff_vector_fmul_add_add_c(dst, src0, src1, src2, src3, len, step); |
8031 | 2067 __asm__ volatile("femms"); |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2068 } |
3569
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2069 static void vector_fmul_add_add_sse(float *dst, const float *src0, const float *src1, |
3574 | 2070 const float *src2, int src3, int len, int step){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
2071 x86_reg i = (len-8)*4; |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2072 if(step == 2 && src3 == 0){ |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2073 dst += (len-8)*2; |
8031 | 2074 __asm__ volatile( |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2075 "1: \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2076 "movaps (%2,%0), %%xmm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2077 "movaps 16(%2,%0), %%xmm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2078 "mulps (%3,%0), %%xmm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2079 "mulps 16(%3,%0), %%xmm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2080 "addps (%4,%0), %%xmm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2081 "addps 16(%4,%0), %%xmm1 \n\t" |
3569
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2082 "movss %%xmm0, (%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2083 "movss %%xmm1, 32(%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2084 "movhlps %%xmm0, %%xmm2 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2085 "movhlps %%xmm1, %%xmm3 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2086 "movss %%xmm2, 16(%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2087 "movss %%xmm3, 48(%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2088 "shufps $0xb1, %%xmm0, %%xmm0 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2089 "shufps $0xb1, %%xmm1, %%xmm1 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2090 "movss %%xmm0, 8(%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2091 "movss %%xmm1, 40(%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2092 "movhlps %%xmm0, %%xmm2 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2093 "movhlps %%xmm1, %%xmm3 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2094 "movss %%xmm2, 24(%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2095 "movss %%xmm3, 56(%1) \n\t" |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2096 "sub $64, %1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2097 "sub $32, %0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2098 "jge 1b \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2099 :"+r"(i), "+r"(dst) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2100 :"r"(src0), "r"(src1), "r"(src2) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2101 :"memory" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2102 ); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2103 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2104 else if(step == 1 && src3 == 0){ |
8031 | 2105 __asm__ volatile( |
3574 | 2106 "1: \n\t" |
2107 "movaps (%2,%0), %%xmm0 \n\t" | |
2108 "movaps 16(%2,%0), %%xmm1 \n\t" | |
2109 "mulps (%3,%0), %%xmm0 \n\t" | |
2110 "mulps 16(%3,%0), %%xmm1 \n\t" | |
2111 "addps (%4,%0), %%xmm0 \n\t" | |
2112 "addps 16(%4,%0), %%xmm1 \n\t" | |
2113 "movaps %%xmm0, (%1,%0) \n\t" | |
2114 "movaps %%xmm1, 16(%1,%0) \n\t" | |
2115 "sub $32, %0 \n\t" | |
2116 "jge 1b \n\t" | |
2117 :"+r"(i) | |
2118 :"r"(dst), "r"(src0), "r"(src1), "r"(src2) | |
2119 :"memory" | |
2120 ); | |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2121 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2122 else |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2123 ff_vector_fmul_add_add_c(dst, src0, src1, src2, src3, len, step); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2124 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2125 |
7263 | 2126 static void vector_fmul_window_3dnow2(float *dst, const float *src0, const float *src1, |
2127 const float *win, float add_bias, int len){ | |
2128 #ifdef HAVE_6REGS | |
2129 if(add_bias == 0){ | |
2130 x86_reg i = -len*4; | |
2131 x86_reg j = len*4-8; | |
8031 | 2132 __asm__ volatile( |
7263 | 2133 "1: \n" |
2134 "pswapd (%5,%1), %%mm1 \n" | |
2135 "movq (%5,%0), %%mm0 \n" | |
2136 "pswapd (%4,%1), %%mm5 \n" | |
2137 "movq (%3,%0), %%mm4 \n" | |
2138 "movq %%mm0, %%mm2 \n" | |
2139 "movq %%mm1, %%mm3 \n" | |
2140 "pfmul %%mm4, %%mm2 \n" // src0[len+i]*win[len+i] | |
2141 "pfmul %%mm5, %%mm3 \n" // src1[ j]*win[len+j] | |
2142 "pfmul %%mm4, %%mm1 \n" // src0[len+i]*win[len+j] | |
2143 "pfmul %%mm5, %%mm0 \n" // src1[ j]*win[len+i] | |
2144 "pfadd %%mm3, %%mm2 \n" | |
2145 "pfsub %%mm0, %%mm1 \n" | |
2146 "pswapd %%mm2, %%mm2 \n" | |
2147 "movq %%mm1, (%2,%0) \n" | |
2148 "movq %%mm2, (%2,%1) \n" | |
2149 "sub $8, %1 \n" | |
2150 "add $8, %0 \n" | |
2151 "jl 1b \n" | |
2152 "femms \n" | |
2153 :"+r"(i), "+r"(j) | |
2154 :"r"(dst+len), "r"(src0+len), "r"(src1), "r"(win+len) | |
2155 ); | |
2156 }else | |
2157 #endif | |
2158 ff_vector_fmul_window_c(dst, src0, src1, win, add_bias, len); | |
2159 } | |
2160 | |
7261 | 2161 static void vector_fmul_window_sse(float *dst, const float *src0, const float *src1, |
2162 const float *win, float add_bias, int len){ | |
2163 #ifdef HAVE_6REGS | |
2164 if(add_bias == 0){ | |
7263 | 2165 x86_reg i = -len*4; |
2166 x86_reg j = len*4-16; | |
8031 | 2167 __asm__ volatile( |
7261 | 2168 "1: \n" |
7263 | 2169 "movaps (%5,%1), %%xmm1 \n" |
7261 | 2170 "movaps (%5,%0), %%xmm0 \n" |
7263 | 2171 "movaps (%4,%1), %%xmm5 \n" |
2172 "movaps (%3,%0), %%xmm4 \n" | |
2173 "shufps $0x1b, %%xmm1, %%xmm1 \n" | |
2174 "shufps $0x1b, %%xmm5, %%xmm5 \n" | |
7261 | 2175 "movaps %%xmm0, %%xmm2 \n" |
2176 "movaps %%xmm1, %%xmm3 \n" | |
7263 | 2177 "mulps %%xmm4, %%xmm2 \n" // src0[len+i]*win[len+i] |
2178 "mulps %%xmm5, %%xmm3 \n" // src1[ j]*win[len+j] | |
2179 "mulps %%xmm4, %%xmm1 \n" // src0[len+i]*win[len+j] | |
2180 "mulps %%xmm5, %%xmm0 \n" // src1[ j]*win[len+i] | |
2181 "addps %%xmm3, %%xmm2 \n" | |
2182 "subps %%xmm0, %%xmm1 \n" | |
7261 | 2183 "shufps $0x1b, %%xmm2, %%xmm2 \n" |
7263 | 2184 "movaps %%xmm1, (%2,%0) \n" |
2185 "movaps %%xmm2, (%2,%1) \n" | |
7261 | 2186 "sub $16, %1 \n" |
2187 "add $16, %0 \n" | |
2188 "jl 1b \n" | |
2189 :"+r"(i), "+r"(j) | |
7263 | 2190 :"r"(dst+len), "r"(src0+len), "r"(src1), "r"(win+len) |
7261 | 2191 ); |
2192 }else | |
2193 #endif | |
2194 ff_vector_fmul_window_c(dst, src0, src1, win, add_bias, len); | |
2195 } | |
2196 | |
7564 | 2197 static void int32_to_float_fmul_scalar_sse(float *dst, const int *src, float mul, int len) |
2198 { | |
2199 x86_reg i = -4*len; | |
8031 | 2200 __asm__ volatile( |
7564 | 2201 "movss %3, %%xmm4 \n" |
2202 "shufps $0, %%xmm4, %%xmm4 \n" | |
2203 "1: \n" | |
2204 "cvtpi2ps (%2,%0), %%xmm0 \n" | |
2205 "cvtpi2ps 8(%2,%0), %%xmm1 \n" | |
2206 "cvtpi2ps 16(%2,%0), %%xmm2 \n" | |
2207 "cvtpi2ps 24(%2,%0), %%xmm3 \n" | |
2208 "movlhps %%xmm1, %%xmm0 \n" | |
2209 "movlhps %%xmm3, %%xmm2 \n" | |
2210 "mulps %%xmm4, %%xmm0 \n" | |
2211 "mulps %%xmm4, %%xmm2 \n" | |
2212 "movaps %%xmm0, (%1,%0) \n" | |
2213 "movaps %%xmm2, 16(%1,%0) \n" | |
2214 "add $32, %0 \n" | |
2215 "jl 1b \n" | |
2216 :"+r"(i) | |
7567
75841957d08b
gcc chokes on xmm constraints, so pessimize int32_to_float_fmul_scalar_sse a little
lorenm
parents:
7565
diff
changeset
|
2217 :"r"(dst+len), "r"(src+len), "m"(mul) |
7564 | 2218 ); |
2219 } | |
2220 | |
2221 static void int32_to_float_fmul_scalar_sse2(float *dst, const int *src, float mul, int len) | |
2222 { | |
2223 x86_reg i = -4*len; | |
8031 | 2224 __asm__ volatile( |
7564 | 2225 "movss %3, %%xmm4 \n" |
2226 "shufps $0, %%xmm4, %%xmm4 \n" | |
2227 "1: \n" | |
2228 "cvtdq2ps (%2,%0), %%xmm0 \n" | |
2229 "cvtdq2ps 16(%2,%0), %%xmm1 \n" | |
2230 "mulps %%xmm4, %%xmm0 \n" | |
2231 "mulps %%xmm4, %%xmm1 \n" | |
2232 "movaps %%xmm0, (%1,%0) \n" | |
2233 "movaps %%xmm1, 16(%1,%0) \n" | |
2234 "add $32, %0 \n" | |
2235 "jl 1b \n" | |
2236 :"+r"(i) | |
7567
75841957d08b
gcc chokes on xmm constraints, so pessimize int32_to_float_fmul_scalar_sse a little
lorenm
parents:
7565
diff
changeset
|
2237 :"r"(dst+len), "r"(src+len), "m"(mul) |
7564 | 2238 ); |
2239 } | |
2240 | |
7218 | 2241 static void float_to_int16_3dnow(int16_t *dst, const float *src, long len){ |
8041
24761747ac3d
Use x86_reg type instead of long in float_to_int16 MMX/SSE functions.
reimar
parents:
8035
diff
changeset
|
2242 x86_reg reglen = len; |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2243 // not bit-exact: pf2id uses different rounding than C and SSE |
8031 | 2244 __asm__ volatile( |
7217
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2245 "add %0 , %0 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2246 "lea (%2,%0,2) , %2 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2247 "add %0 , %1 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2248 "neg %0 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2249 "1: \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2250 "pf2id (%2,%0,2) , %%mm0 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2251 "pf2id 8(%2,%0,2) , %%mm1 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2252 "pf2id 16(%2,%0,2) , %%mm2 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2253 "pf2id 24(%2,%0,2) , %%mm3 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2254 "packssdw %%mm1 , %%mm0 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2255 "packssdw %%mm3 , %%mm2 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2256 "movq %%mm0 , (%1,%0) \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2257 "movq %%mm2 , 8(%1,%0) \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2258 "add $16 , %0 \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2259 " js 1b \n\t" |
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2260 "femms \n\t" |
8041
24761747ac3d
Use x86_reg type instead of long in float_to_int16 MMX/SSE functions.
reimar
parents:
8035
diff
changeset
|
2261 :"+r"(reglen), "+r"(dst), "+r"(src) |
7217
726770da3234
dont use C-asm loops and unroll once float_to_int16_3dnow()
michael
parents:
7087
diff
changeset
|
2262 ); |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2263 } |
7218 | 2264 static void float_to_int16_sse(int16_t *dst, const float *src, long len){ |
8041
24761747ac3d
Use x86_reg type instead of long in float_to_int16 MMX/SSE functions.
reimar
parents:
8035
diff
changeset
|
2265 x86_reg reglen = len; |
8031 | 2266 __asm__ volatile( |
7219
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2267 "add %0 , %0 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2268 "lea (%2,%0,2) , %2 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2269 "add %0 , %1 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2270 "neg %0 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2271 "1: \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2272 "cvtps2pi (%2,%0,2) , %%mm0 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2273 "cvtps2pi 8(%2,%0,2) , %%mm1 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2274 "cvtps2pi 16(%2,%0,2) , %%mm2 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2275 "cvtps2pi 24(%2,%0,2) , %%mm3 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2276 "packssdw %%mm1 , %%mm0 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2277 "packssdw %%mm3 , %%mm2 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2278 "movq %%mm0 , (%1,%0) \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2279 "movq %%mm2 , 8(%1,%0) \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2280 "add $16 , %0 \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2281 " js 1b \n\t" |
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2282 "emms \n\t" |
8041
24761747ac3d
Use x86_reg type instead of long in float_to_int16 MMX/SSE functions.
reimar
parents:
8035
diff
changeset
|
2283 :"+r"(reglen), "+r"(dst), "+r"(src) |
7219
f72ef5b28253
1 c-asm loop less and 1x unroll of float_to_int16_sse()
michael
parents:
7218
diff
changeset
|
2284 ); |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2285 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2286 |
7226 | 2287 static void float_to_int16_sse2(int16_t *dst, const float *src, long len){ |
8041
24761747ac3d
Use x86_reg type instead of long in float_to_int16 MMX/SSE functions.
reimar
parents:
8035
diff
changeset
|
2288 x86_reg reglen = len; |
8031 | 2289 __asm__ volatile( |
7226 | 2290 "add %0 , %0 \n\t" |
2291 "lea (%2,%0,2) , %2 \n\t" | |
2292 "add %0 , %1 \n\t" | |
2293 "neg %0 \n\t" | |
2294 "1: \n\t" | |
2295 "cvtps2dq (%2,%0,2) , %%xmm0 \n\t" | |
2296 "cvtps2dq 16(%2,%0,2) , %%xmm1 \n\t" | |
2297 "packssdw %%xmm1 , %%xmm0 \n\t" | |
2298 "movdqa %%xmm0 , (%1,%0) \n\t" | |
2299 "add $16 , %0 \n\t" | |
2300 " js 1b \n\t" | |
8041
24761747ac3d
Use x86_reg type instead of long in float_to_int16 MMX/SSE functions.
reimar
parents:
8035
diff
changeset
|
2301 :"+r"(reglen), "+r"(dst), "+r"(src) |
7226 | 2302 ); |
2303 } | |
2304 | |
7568
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2305 #ifdef HAVE_YASM |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2306 void ff_float_to_int16_interleave6_sse(int16_t *dst, const float **src, int len); |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2307 void ff_float_to_int16_interleave6_3dnow(int16_t *dst, const float **src, int len); |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2308 void ff_float_to_int16_interleave6_3dn2(int16_t *dst, const float **src, int len); |
7565
474c7ae4b431
special case 6 channel version of float_to_int16_interleave
lorenm
parents:
7564
diff
changeset
|
2309 #else |
7568
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2310 #define ff_float_to_int16_interleave6_sse(a,b,c) float_to_int16_interleave_misc_sse(a,b,c,6) |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2311 #define ff_float_to_int16_interleave6_3dnow(a,b,c) float_to_int16_interleave_misc_3dnow(a,b,c,6) |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2312 #define ff_float_to_int16_interleave6_3dn2(a,b,c) float_to_int16_interleave_misc_3dnow(a,b,c,6) |
7565
474c7ae4b431
special case 6 channel version of float_to_int16_interleave
lorenm
parents:
7564
diff
changeset
|
2313 #endif |
7568
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2314 #define ff_float_to_int16_interleave6_sse2 ff_float_to_int16_interleave6_sse |
7565
474c7ae4b431
special case 6 channel version of float_to_int16_interleave
lorenm
parents:
7564
diff
changeset
|
2315 |
7261 | 2316 #define FLOAT_TO_INT16_INTERLEAVE(cpu, body) \ |
2317 /* gcc pessimizes register allocation if this is in the same function as float_to_int16_interleave_sse2*/\ | |
7565
474c7ae4b431
special case 6 channel version of float_to_int16_interleave
lorenm
parents:
7564
diff
changeset
|
2318 static av_noinline void float_to_int16_interleave_misc_##cpu(int16_t *dst, const float **src, long len, int channels){\ |
7286
e267f2519248
float_to_int16_interleave: change src to an array of pointers instead of assuming it's contiguous.
lorenm
parents:
7278
diff
changeset
|
2319 DECLARE_ALIGNED_16(int16_t, tmp[len]);\ |
7261 | 2320 int i,j,c;\ |
2321 for(c=0; c<channels; c++){\ | |
7286
e267f2519248
float_to_int16_interleave: change src to an array of pointers instead of assuming it's contiguous.
lorenm
parents:
7278
diff
changeset
|
2322 float_to_int16_##cpu(tmp, src[c], len);\ |
7261 | 2323 for(i=0, j=c; i<len; i++, j+=channels)\ |
7286
e267f2519248
float_to_int16_interleave: change src to an array of pointers instead of assuming it's contiguous.
lorenm
parents:
7278
diff
changeset
|
2324 dst[j] = tmp[i];\ |
7261 | 2325 }\ |
2326 }\ | |
2327 \ | |
7286
e267f2519248
float_to_int16_interleave: change src to an array of pointers instead of assuming it's contiguous.
lorenm
parents:
7278
diff
changeset
|
2328 static void float_to_int16_interleave_##cpu(int16_t *dst, const float **src, long len, int channels){\ |
7261 | 2329 if(channels==1)\ |
7286
e267f2519248
float_to_int16_interleave: change src to an array of pointers instead of assuming it's contiguous.
lorenm
parents:
7278
diff
changeset
|
2330 float_to_int16_##cpu(dst, src[0], len);\ |
7565
474c7ae4b431
special case 6 channel version of float_to_int16_interleave
lorenm
parents:
7564
diff
changeset
|
2331 else if(channels==2){\ |
8041
24761747ac3d
Use x86_reg type instead of long in float_to_int16 MMX/SSE functions.
reimar
parents:
8035
diff
changeset
|
2332 x86_reg reglen = len; \ |
7286
e267f2519248
float_to_int16_interleave: change src to an array of pointers instead of assuming it's contiguous.
lorenm
parents:
7278
diff
changeset
|
2333 const float *src0 = src[0];\ |
e267f2519248
float_to_int16_interleave: change src to an array of pointers instead of assuming it's contiguous.
lorenm
parents:
7278
diff
changeset
|
2334 const float *src1 = src[1];\ |
8031 | 2335 __asm__ volatile(\ |
7261 | 2336 "shl $2, %0 \n"\ |
2337 "add %0, %1 \n"\ | |
2338 "add %0, %2 \n"\ | |
7286
e267f2519248
float_to_int16_interleave: change src to an array of pointers instead of assuming it's contiguous.
lorenm
parents:
7278
diff
changeset
|
2339 "add %0, %3 \n"\ |
7261 | 2340 "neg %0 \n"\ |
2341 body\ | |
8041
24761747ac3d
Use x86_reg type instead of long in float_to_int16 MMX/SSE functions.
reimar
parents:
8035
diff
changeset
|
2342 :"+r"(reglen), "+r"(dst), "+r"(src0), "+r"(src1)\ |
7261 | 2343 );\ |
7565
474c7ae4b431
special case 6 channel version of float_to_int16_interleave
lorenm
parents:
7564
diff
changeset
|
2344 }else if(channels==6){\ |
7568
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2345 ff_float_to_int16_interleave6_##cpu(dst, src, len);\ |
7565
474c7ae4b431
special case 6 channel version of float_to_int16_interleave
lorenm
parents:
7564
diff
changeset
|
2346 }else\ |
474c7ae4b431
special case 6 channel version of float_to_int16_interleave
lorenm
parents:
7564
diff
changeset
|
2347 float_to_int16_interleave_misc_##cpu(dst, src, len, channels);\ |
7261 | 2348 } |
2349 | |
2350 FLOAT_TO_INT16_INTERLEAVE(3dnow, | |
2351 "1: \n" | |
2352 "pf2id (%2,%0), %%mm0 \n" | |
2353 "pf2id 8(%2,%0), %%mm1 \n" | |
2354 "pf2id (%3,%0), %%mm2 \n" | |
2355 "pf2id 8(%3,%0), %%mm3 \n" | |
2356 "packssdw %%mm1, %%mm0 \n" | |
2357 "packssdw %%mm3, %%mm2 \n" | |
2358 "movq %%mm0, %%mm1 \n" | |
2359 "punpcklwd %%mm2, %%mm0 \n" | |
2360 "punpckhwd %%mm2, %%mm1 \n" | |
2361 "movq %%mm0, (%1,%0)\n" | |
7278
6c140c15ee8c
10l, float_to_int16_interleave_sse/3dnow wrote the wrong samples
lorenm
parents:
7263
diff
changeset
|
2362 "movq %%mm1, 8(%1,%0)\n" |
7261 | 2363 "add $16, %0 \n" |
2364 "js 1b \n" | |
2365 "femms \n" | |
2366 ) | |
2367 | |
2368 FLOAT_TO_INT16_INTERLEAVE(sse, | |
2369 "1: \n" | |
2370 "cvtps2pi (%2,%0), %%mm0 \n" | |
2371 "cvtps2pi 8(%2,%0), %%mm1 \n" | |
2372 "cvtps2pi (%3,%0), %%mm2 \n" | |
2373 "cvtps2pi 8(%3,%0), %%mm3 \n" | |
2374 "packssdw %%mm1, %%mm0 \n" | |
2375 "packssdw %%mm3, %%mm2 \n" | |
2376 "movq %%mm0, %%mm1 \n" | |
2377 "punpcklwd %%mm2, %%mm0 \n" | |
2378 "punpckhwd %%mm2, %%mm1 \n" | |
2379 "movq %%mm0, (%1,%0)\n" | |
7278
6c140c15ee8c
10l, float_to_int16_interleave_sse/3dnow wrote the wrong samples
lorenm
parents:
7263
diff
changeset
|
2380 "movq %%mm1, 8(%1,%0)\n" |
7261 | 2381 "add $16, %0 \n" |
2382 "js 1b \n" | |
2383 "emms \n" | |
2384 ) | |
2385 | |
2386 FLOAT_TO_INT16_INTERLEAVE(sse2, | |
2387 "1: \n" | |
2388 "cvtps2dq (%2,%0), %%xmm0 \n" | |
2389 "cvtps2dq (%3,%0), %%xmm1 \n" | |
2390 "packssdw %%xmm1, %%xmm0 \n" | |
2391 "movhlps %%xmm0, %%xmm1 \n" | |
2392 "punpcklwd %%xmm1, %%xmm0 \n" | |
2393 "movdqa %%xmm0, (%1,%0) \n" | |
2394 "add $16, %0 \n" | |
2395 "js 1b \n" | |
2396 ) | |
2397 | |
7568
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2398 static void float_to_int16_interleave_3dn2(int16_t *dst, const float **src, long len, int channels){ |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2399 if(channels==6) |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2400 ff_float_to_int16_interleave6_3dn2(dst, src, len); |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2401 else |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2402 float_to_int16_interleave_3dnow(dst, src, len, channels); |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2403 } |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2404 |
7261 | 2405 |
6195
5f704e9cb518
fix prototypes, remove warning: i386/dsputil_mmx.c:3594: warning: assignment from incompatible pointer type
bcoudurier
parents:
6181
diff
changeset
|
2406 extern void ff_snow_horizontal_compose97i_sse2(IDWTELEM *b, int width); |
5f704e9cb518
fix prototypes, remove warning: i386/dsputil_mmx.c:3594: warning: assignment from incompatible pointer type
bcoudurier
parents:
6181
diff
changeset
|
2407 extern void ff_snow_horizontal_compose97i_mmx(IDWTELEM *b, int width); |
5f704e9cb518
fix prototypes, remove warning: i386/dsputil_mmx.c:3594: warning: assignment from incompatible pointer type
bcoudurier
parents:
6181
diff
changeset
|
2408 extern void ff_snow_vertical_compose97i_sse2(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, IDWTELEM *b3, IDWTELEM *b4, IDWTELEM *b5, int width); |
5f704e9cb518
fix prototypes, remove warning: i386/dsputil_mmx.c:3594: warning: assignment from incompatible pointer type
bcoudurier
parents:
6181
diff
changeset
|
2409 extern void ff_snow_vertical_compose97i_mmx(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, IDWTELEM *b3, IDWTELEM *b4, IDWTELEM *b5, int width); |
4436
d3e389536b0a
Add the const specifier as needed to reduce the number of warnings.
takis
parents:
4197
diff
changeset
|
2410 extern void ff_snow_inner_add_yblock_sse2(const uint8_t *obmc, const int obmc_stride, uint8_t * * block, int b_w, int b_h, |
3211
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents:
3210
diff
changeset
|
2411 int src_x, int src_y, int src_stride, slice_buffer * sb, int add, uint8_t * dst8); |
4436
d3e389536b0a
Add the const specifier as needed to reduce the number of warnings.
takis
parents:
4197
diff
changeset
|
2412 extern void ff_snow_inner_add_yblock_mmx(const uint8_t *obmc, const int obmc_stride, uint8_t * * block, int b_w, int b_h, |
3211
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents:
3210
diff
changeset
|
2413 int src_x, int src_y, int src_stride, slice_buffer * sb, int add, uint8_t * dst8); |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2414 |
7238
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2415 |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2416 static void add_int16_sse2(int16_t * v1, int16_t * v2, int order) |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2417 { |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2418 x86_reg o = -(order << 1); |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2419 v1 += order; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2420 v2 += order; |
8031 | 2421 __asm__ volatile( |
7238
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2422 "1: \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2423 "movdqu (%1,%2), %%xmm0 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2424 "movdqu 16(%1,%2), %%xmm1 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2425 "paddw (%0,%2), %%xmm0 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2426 "paddw 16(%0,%2), %%xmm1 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2427 "movdqa %%xmm0, (%0,%2) \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2428 "movdqa %%xmm1, 16(%0,%2) \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2429 "add $32, %2 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2430 "js 1b \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2431 : "+r"(v1), "+r"(v2), "+r"(o) |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2432 ); |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2433 } |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2434 |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2435 static void sub_int16_sse2(int16_t * v1, int16_t * v2, int order) |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2436 { |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2437 x86_reg o = -(order << 1); |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2438 v1 += order; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2439 v2 += order; |
8031 | 2440 __asm__ volatile( |
7238
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2441 "1: \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2442 "movdqa (%0,%2), %%xmm0 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2443 "movdqa 16(%0,%2), %%xmm2 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2444 "movdqu (%1,%2), %%xmm1 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2445 "movdqu 16(%1,%2), %%xmm3 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2446 "psubw %%xmm1, %%xmm0 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2447 "psubw %%xmm3, %%xmm2 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2448 "movdqa %%xmm0, (%0,%2) \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2449 "movdqa %%xmm2, 16(%0,%2) \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2450 "add $32, %2 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2451 "js 1b \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2452 : "+r"(v1), "+r"(v2), "+r"(o) |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2453 ); |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2454 } |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2455 |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2456 static int32_t scalarproduct_int16_sse2(int16_t * v1, int16_t * v2, int order, int shift) |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2457 { |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2458 int res = 0; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2459 DECLARE_ALIGNED_16(int64_t, sh); |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2460 x86_reg o = -(order << 1); |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2461 |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2462 v1 += order; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2463 v2 += order; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2464 sh = shift; |
8031 | 2465 __asm__ volatile( |
7238
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2466 "pxor %%xmm7, %%xmm7 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2467 "1: \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2468 "movdqu (%0,%3), %%xmm0 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2469 "movdqu 16(%0,%3), %%xmm1 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2470 "pmaddwd (%1,%3), %%xmm0 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2471 "pmaddwd 16(%1,%3), %%xmm1 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2472 "paddd %%xmm0, %%xmm7 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2473 "paddd %%xmm1, %%xmm7 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2474 "add $32, %3 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2475 "js 1b \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2476 "movhlps %%xmm7, %%xmm2 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2477 "paddd %%xmm2, %%xmm7 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2478 "psrad %4, %%xmm7 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2479 "pshuflw $0x4E, %%xmm7,%%xmm2 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2480 "paddd %%xmm2, %%xmm7 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2481 "movd %%xmm7, %2 \n\t" |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2482 : "+r"(v1), "+r"(v2), "=r"(res), "+r"(o) |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2483 : "m"(sh) |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2484 ); |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2485 return res; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2486 } |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2487 |
1092 | 2488 void dsputil_init_mmx(DSPContext* c, AVCodecContext *avctx) |
0 | 2489 { |
4197 | 2490 mm_flags = mm_support(); |
1115 | 2491 |
1122 | 2492 if (avctx->dsp_mask) { |
2979 | 2493 if (avctx->dsp_mask & FF_MM_FORCE) |
4197 | 2494 mm_flags |= (avctx->dsp_mask & 0xffff); |
2979 | 2495 else |
4197 | 2496 mm_flags &= ~(avctx->dsp_mask & 0xffff); |
1122 | 2497 } |
1115 | 2498 |
631
47a8964ba5cd
be less verbose patch by (Lennert Buytenhek <buytenh at math dot leidenuniv dot nl>)
michaelni
parents:
629
diff
changeset
|
2499 #if 0 |
1868 | 2500 av_log(avctx, AV_LOG_INFO, "libavcodec: CPU flags:"); |
4197 | 2501 if (mm_flags & MM_MMX) |
1868 | 2502 av_log(avctx, AV_LOG_INFO, " mmx"); |
4197 | 2503 if (mm_flags & MM_MMXEXT) |
1868 | 2504 av_log(avctx, AV_LOG_INFO, " mmxext"); |
4197 | 2505 if (mm_flags & MM_3DNOW) |
1868 | 2506 av_log(avctx, AV_LOG_INFO, " 3dnow"); |
4197 | 2507 if (mm_flags & MM_SSE) |
1868 | 2508 av_log(avctx, AV_LOG_INFO, " sse"); |
4197 | 2509 if (mm_flags & MM_SSE2) |
1868 | 2510 av_log(avctx, AV_LOG_INFO, " sse2"); |
2511 av_log(avctx, AV_LOG_INFO, "\n"); | |
0 | 2512 #endif |
2513 | |
4197 | 2514 if (mm_flags & MM_MMX) { |
1092 | 2515 const int idct_algo= avctx->idct_algo; |
2516 | |
2256 | 2517 if(avctx->lowres==0){ |
2518 if(idct_algo==FF_IDCT_AUTO || idct_algo==FF_IDCT_SIMPLEMMX){ | |
2519 c->idct_put= ff_simple_idct_put_mmx; | |
2520 c->idct_add= ff_simple_idct_add_mmx; | |
2521 c->idct = ff_simple_idct_mmx; | |
2522 c->idct_permutation_type= FF_SIMPLE_IDCT_PERM; | |
3717
ea9fe1c9d126
Remove the LGPL exception clause as discussed on ffmpeg-devel
diego
parents:
3712
diff
changeset
|
2523 #ifdef CONFIG_GPL |
2256 | 2524 }else if(idct_algo==FF_IDCT_LIBMPEG2MMX){ |
4197 | 2525 if(mm_flags & MM_MMXEXT){ |
2256 | 2526 c->idct_put= ff_libmpeg2mmx2_idct_put; |
2527 c->idct_add= ff_libmpeg2mmx2_idct_add; | |
2528 c->idct = ff_mmxext_idct; | |
2529 }else{ | |
2530 c->idct_put= ff_libmpeg2mmx_idct_put; | |
2531 c->idct_add= ff_libmpeg2mmx_idct_add; | |
2532 c->idct = ff_mmx_idct; | |
2533 } | |
2534 c->idct_permutation_type= FF_LIBMPEG2_IDCT_PERM; | |
3717
ea9fe1c9d126
Remove the LGPL exception clause as discussed on ffmpeg-devel
diego
parents:
3712
diff
changeset
|
2535 #endif |
7880
2d3d9b4181d7
Ensure MMX/SSE2 VP3 IDCT selection isn't disabled when only Theora is enabled
conrad
parents:
7876
diff
changeset
|
2536 }else if((ENABLE_VP3_DECODER || ENABLE_VP5_DECODER || ENABLE_VP6_DECODER || ENABLE_THEORA_DECODER) && |
7876
3fd591f125b5
MMX/SSE2 VP3 IDCT are bitexact now that the dequantization matrices are permutated correctly
conrad
parents:
7759
diff
changeset
|
2537 idct_algo==FF_IDCT_VP3){ |
4197 | 2538 if(mm_flags & MM_SSE2){ |
2696
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2539 c->idct_put= ff_vp3_idct_put_sse2; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2540 c->idct_add= ff_vp3_idct_add_sse2; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2541 c->idct = ff_vp3_idct_sse2; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2542 c->idct_permutation_type= FF_TRANSPOSE_IDCT_PERM; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2543 }else{ |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2544 c->idct_put= ff_vp3_idct_put_mmx; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2545 c->idct_add= ff_vp3_idct_add_mmx; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2546 c->idct = ff_vp3_idct_mmx; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2547 c->idct_permutation_type= FF_PARTTRANS_IDCT_PERM; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2548 } |
3524 | 2549 }else if(idct_algo==FF_IDCT_CAVS){ |
2550 c->idct_permutation_type= FF_TRANSPOSE_IDCT_PERM; | |
2868 | 2551 }else if(idct_algo==FF_IDCT_XVIDMMX){ |
6601 | 2552 if(mm_flags & MM_SSE2){ |
2553 c->idct_put= ff_idct_xvid_sse2_put; | |
2554 c->idct_add= ff_idct_xvid_sse2_add; | |
2555 c->idct = ff_idct_xvid_sse2; | |
2556 c->idct_permutation_type= FF_SSE2_IDCT_PERM; | |
2557 }else if(mm_flags & MM_MMXEXT){ | |
2868 | 2558 c->idct_put= ff_idct_xvid_mmx2_put; |
2559 c->idct_add= ff_idct_xvid_mmx2_add; | |
2560 c->idct = ff_idct_xvid_mmx2; | |
2561 }else{ | |
2562 c->idct_put= ff_idct_xvid_mmx_put; | |
2563 c->idct_add= ff_idct_xvid_mmx_add; | |
2564 c->idct = ff_idct_xvid_mmx; | |
2565 } | |
1092 | 2566 } |
2567 } | |
1868 | 2568 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2569 c->put_pixels_clamped = put_pixels_clamped_mmx; |
1984
ef919e9ef73e
separate out put_signed_pixels_clamped() into its own function and
melanson
parents:
1977
diff
changeset
|
2570 c->put_signed_pixels_clamped = put_signed_pixels_clamped_mmx; |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2571 c->add_pixels_clamped = add_pixels_clamped_mmx; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2572 c->clear_blocks = clear_blocks_mmx; |
415 | 2573 |
6327 | 2574 #define SET_HPEL_FUNCS(PFX, IDX, SIZE, CPU) \ |
2575 c->PFX ## _pixels_tab[IDX][0] = PFX ## _pixels ## SIZE ## _ ## CPU; \ | |
2576 c->PFX ## _pixels_tab[IDX][1] = PFX ## _pixels ## SIZE ## _x2_ ## CPU; \ | |
2577 c->PFX ## _pixels_tab[IDX][2] = PFX ## _pixels ## SIZE ## _y2_ ## CPU; \ | |
2578 c->PFX ## _pixels_tab[IDX][3] = PFX ## _pixels ## SIZE ## _xy2_ ## CPU | |
2579 | |
2580 SET_HPEL_FUNCS(put, 0, 16, mmx); | |
2581 SET_HPEL_FUNCS(put_no_rnd, 0, 16, mmx); | |
2582 SET_HPEL_FUNCS(avg, 0, 16, mmx); | |
2583 SET_HPEL_FUNCS(avg_no_rnd, 0, 16, mmx); | |
2584 SET_HPEL_FUNCS(put, 1, 8, mmx); | |
2585 SET_HPEL_FUNCS(put_no_rnd, 1, 8, mmx); | |
2586 SET_HPEL_FUNCS(avg, 1, 8, mmx); | |
2587 SET_HPEL_FUNCS(avg_no_rnd, 1, 8, mmx); | |
2967 | 2588 |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
2589 c->gmc= gmc_mmx; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
2590 |
866 | 2591 c->add_bytes= add_bytes_mmx; |
6384 | 2592 c->add_bytes_l2= add_bytes_l2_mmx; |
1647 | 2593 |
6437 | 2594 c->draw_edges = draw_edges_mmx; |
2595 | |
5277
7b3fcb7c61ce
Avoid linking with h263.c functions when the relevant codecs
aurel
parents:
5255
diff
changeset
|
2596 if (ENABLE_ANY_H263) { |
5278 | 2597 c->h263_v_loop_filter= h263_v_loop_filter_mmx; |
2598 c->h263_h_loop_filter= h263_h_loop_filter_mmx; | |
5277
7b3fcb7c61ce
Avoid linking with h263.c functions when the relevant codecs
aurel
parents:
5255
diff
changeset
|
2599 } |
6057
03febc8f506f
add MMX version for put_no_rnd_h264_chroma_mc8_c, used in VC-1 decoding.
gpoirier
parents:
6056
diff
changeset
|
2600 c->put_h264_chroma_pixels_tab[0]= put_h264_chroma_mc8_mmx_rnd; |
2922
d772011258ec
faster h264_chroma_mc8_mmx, added h264_chroma_mc4_mmx.
lorenm
parents:
2902
diff
changeset
|
2601 c->put_h264_chroma_pixels_tab[1]= put_h264_chroma_mc4_mmx; |
6057
03febc8f506f
add MMX version for put_no_rnd_h264_chroma_mc8_c, used in VC-1 decoding.
gpoirier
parents:
6056
diff
changeset
|
2602 c->put_no_rnd_h264_chroma_pixels_tab[0]= put_h264_chroma_mc8_mmx_nornd; |
2967 | 2603 |
3173 | 2604 c->h264_idct_dc_add= |
2605 c->h264_idct_add= ff_h264_idct_add_mmx; | |
3174 | 2606 c->h264_idct8_dc_add= |
2607 c->h264_idct8_add= ff_h264_idct8_add_mmx; | |
6320 | 2608 if (mm_flags & MM_SSE2) |
2609 c->h264_idct8_add= ff_h264_idct8_add_sse2; | |
3173 | 2610 |
4197 | 2611 if (mm_flags & MM_MMXEXT) { |
3215
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
2612 c->prefetch = prefetch_mmx2; |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
2613 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2614 c->put_pixels_tab[0][1] = put_pixels16_x2_mmx2; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2615 c->put_pixels_tab[0][2] = put_pixels16_y2_mmx2; |
651 | 2616 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2617 c->avg_pixels_tab[0][0] = avg_pixels16_mmx2; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2618 c->avg_pixels_tab[0][1] = avg_pixels16_x2_mmx2; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2619 c->avg_pixels_tab[0][2] = avg_pixels16_y2_mmx2; |
415 | 2620 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2621 c->put_pixels_tab[1][1] = put_pixels8_x2_mmx2; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2622 c->put_pixels_tab[1][2] = put_pixels8_y2_mmx2; |
651 | 2623 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2624 c->avg_pixels_tab[1][0] = avg_pixels8_mmx2; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2625 c->avg_pixels_tab[1][1] = avg_pixels8_x2_mmx2; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2626 c->avg_pixels_tab[1][2] = avg_pixels8_y2_mmx2; |
1092 | 2627 |
3105
2d35fb3cb940
h264: special case dc-only idct. ~1% faster overall
lorenm
parents:
3089
diff
changeset
|
2628 c->h264_idct_dc_add= ff_h264_idct_dc_add_mmx2; |
2d35fb3cb940
h264: special case dc-only idct. ~1% faster overall
lorenm
parents:
3089
diff
changeset
|
2629 c->h264_idct8_dc_add= ff_h264_idct8_dc_add_mmx2; |
2745 | 2630 |
1092 | 2631 if(!(avctx->flags & CODEC_FLAG_BITEXACT)){ |
2632 c->put_no_rnd_pixels_tab[0][1] = put_no_rnd_pixels16_x2_mmx2; | |
2633 c->put_no_rnd_pixels_tab[0][2] = put_no_rnd_pixels16_y2_mmx2; | |
2634 c->put_no_rnd_pixels_tab[1][1] = put_no_rnd_pixels8_x2_mmx2; | |
2635 c->put_no_rnd_pixels_tab[1][2] = put_no_rnd_pixels8_y2_mmx2; | |
2636 c->avg_pixels_tab[0][3] = avg_pixels16_xy2_mmx2; | |
2637 c->avg_pixels_tab[1][3] = avg_pixels8_xy2_mmx2; | |
959 | 2638 |
8035 | 2639 if (ENABLE_VP3_DECODER || ENABLE_THEORA_DECODER) { |
2640 c->vp3_v_loop_filter= ff_vp3_v_loop_filter_mmx2; | |
2641 c->vp3_h_loop_filter= ff_vp3_h_loop_filter_mmx2; | |
8034 | 2642 } |
8033 | 2643 } |
2644 | |
6327 | 2645 #define SET_QPEL_FUNCS(PFX, IDX, SIZE, CPU) \ |
2646 c->PFX ## _pixels_tab[IDX][ 0] = PFX ## SIZE ## _mc00_ ## CPU; \ | |
2647 c->PFX ## _pixels_tab[IDX][ 1] = PFX ## SIZE ## _mc10_ ## CPU; \ | |
2648 c->PFX ## _pixels_tab[IDX][ 2] = PFX ## SIZE ## _mc20_ ## CPU; \ | |
2649 c->PFX ## _pixels_tab[IDX][ 3] = PFX ## SIZE ## _mc30_ ## CPU; \ | |
2650 c->PFX ## _pixels_tab[IDX][ 4] = PFX ## SIZE ## _mc01_ ## CPU; \ | |
2651 c->PFX ## _pixels_tab[IDX][ 5] = PFX ## SIZE ## _mc11_ ## CPU; \ | |
2652 c->PFX ## _pixels_tab[IDX][ 6] = PFX ## SIZE ## _mc21_ ## CPU; \ | |
2653 c->PFX ## _pixels_tab[IDX][ 7] = PFX ## SIZE ## _mc31_ ## CPU; \ | |
2654 c->PFX ## _pixels_tab[IDX][ 8] = PFX ## SIZE ## _mc02_ ## CPU; \ | |
2655 c->PFX ## _pixels_tab[IDX][ 9] = PFX ## SIZE ## _mc12_ ## CPU; \ | |
2656 c->PFX ## _pixels_tab[IDX][10] = PFX ## SIZE ## _mc22_ ## CPU; \ | |
2657 c->PFX ## _pixels_tab[IDX][11] = PFX ## SIZE ## _mc32_ ## CPU; \ | |
2658 c->PFX ## _pixels_tab[IDX][12] = PFX ## SIZE ## _mc03_ ## CPU; \ | |
2659 c->PFX ## _pixels_tab[IDX][13] = PFX ## SIZE ## _mc13_ ## CPU; \ | |
2660 c->PFX ## _pixels_tab[IDX][14] = PFX ## SIZE ## _mc23_ ## CPU; \ | |
2661 c->PFX ## _pixels_tab[IDX][15] = PFX ## SIZE ## _mc33_ ## CPU | |
2662 | |
2663 SET_QPEL_FUNCS(put_qpel, 0, 16, mmx2); | |
2664 SET_QPEL_FUNCS(put_qpel, 1, 8, mmx2); | |
2665 SET_QPEL_FUNCS(put_no_rnd_qpel, 0, 16, mmx2); | |
2666 SET_QPEL_FUNCS(put_no_rnd_qpel, 1, 8, mmx2); | |
2667 SET_QPEL_FUNCS(avg_qpel, 0, 16, mmx2); | |
2668 SET_QPEL_FUNCS(avg_qpel, 1, 8, mmx2); | |
2669 | |
2670 SET_QPEL_FUNCS(put_h264_qpel, 0, 16, mmx2); | |
2671 SET_QPEL_FUNCS(put_h264_qpel, 1, 8, mmx2); | |
2672 SET_QPEL_FUNCS(put_h264_qpel, 2, 4, mmx2); | |
2673 SET_QPEL_FUNCS(avg_h264_qpel, 0, 16, mmx2); | |
2674 SET_QPEL_FUNCS(avg_h264_qpel, 1, 8, mmx2); | |
2675 SET_QPEL_FUNCS(avg_h264_qpel, 2, 4, mmx2); | |
2676 | |
2677 SET_QPEL_FUNCS(put_2tap_qpel, 0, 16, mmx2); | |
2678 SET_QPEL_FUNCS(put_2tap_qpel, 1, 8, mmx2); | |
2679 SET_QPEL_FUNCS(avg_2tap_qpel, 0, 16, mmx2); | |
2680 SET_QPEL_FUNCS(avg_2tap_qpel, 1, 8, mmx2); | |
2209 | 2681 |
6057
03febc8f506f
add MMX version for put_no_rnd_h264_chroma_mc8_c, used in VC-1 decoding.
gpoirier
parents:
6056
diff
changeset
|
2682 c->avg_h264_chroma_pixels_tab[0]= avg_h264_chroma_mc8_mmx2_rnd; |
2922
d772011258ec
faster h264_chroma_mc8_mmx, added h264_chroma_mc4_mmx.
lorenm
parents:
2902
diff
changeset
|
2683 c->avg_h264_chroma_pixels_tab[1]= avg_h264_chroma_mc4_mmx2; |
3213 | 2684 c->avg_h264_chroma_pixels_tab[2]= avg_h264_chroma_mc2_mmx2; |
2685 c->put_h264_chroma_pixels_tab[2]= put_h264_chroma_mc2_mmx2; | |
2633 | 2686 c->h264_v_loop_filter_luma= h264_v_loop_filter_luma_mmx2; |
2687 c->h264_h_loop_filter_luma= h264_h_loop_filter_luma_mmx2; | |
2688 c->h264_v_loop_filter_chroma= h264_v_loop_filter_chroma_mmx2; | |
2689 c->h264_h_loop_filter_chroma= h264_h_loop_filter_chroma_mmx2; | |
2707
360024d31dab
H.264 deblocking optimizations (mmx for chroma_bS4 case, convert existing cases to 8-bit math)
lorenm
parents:
2696
diff
changeset
|
2690 c->h264_v_loop_filter_chroma_intra= h264_v_loop_filter_chroma_intra_mmx2; |
360024d31dab
H.264 deblocking optimizations (mmx for chroma_bS4 case, convert existing cases to 8-bit math)
lorenm
parents:
2696
diff
changeset
|
2691 c->h264_h_loop_filter_chroma_intra= h264_h_loop_filter_chroma_intra_mmx2; |
3645
47821be55b6c
mmx implementation of deblocking strength decision.
lorenm
parents:
3576
diff
changeset
|
2692 c->h264_loop_filter_strength= h264_loop_filter_strength_mmx2; |
2633 | 2693 |
2902
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2694 c->weight_h264_pixels_tab[0]= ff_h264_weight_16x16_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2695 c->weight_h264_pixels_tab[1]= ff_h264_weight_16x8_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2696 c->weight_h264_pixels_tab[2]= ff_h264_weight_8x16_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2697 c->weight_h264_pixels_tab[3]= ff_h264_weight_8x8_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2698 c->weight_h264_pixels_tab[4]= ff_h264_weight_8x4_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2699 c->weight_h264_pixels_tab[5]= ff_h264_weight_4x8_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2700 c->weight_h264_pixels_tab[6]= ff_h264_weight_4x4_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2701 c->weight_h264_pixels_tab[7]= ff_h264_weight_4x2_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2702 |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2703 c->biweight_h264_pixels_tab[0]= ff_h264_biweight_16x16_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2704 c->biweight_h264_pixels_tab[1]= ff_h264_biweight_16x8_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2705 c->biweight_h264_pixels_tab[2]= ff_h264_biweight_8x16_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2706 c->biweight_h264_pixels_tab[3]= ff_h264_biweight_8x8_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2707 c->biweight_h264_pixels_tab[4]= ff_h264_biweight_8x4_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2708 c->biweight_h264_pixels_tab[5]= ff_h264_biweight_4x8_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2709 c->biweight_h264_pixels_tab[6]= ff_h264_biweight_4x4_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2710 c->biweight_h264_pixels_tab[7]= ff_h264_biweight_4x2_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2711 |
5949 | 2712 if (ENABLE_CAVS_DECODER) |
5950 | 2713 ff_cavsdsp_init_mmx2(c, avctx); |
5949 | 2714 |
2715 if (ENABLE_VC1_DECODER || ENABLE_WMV3_DECODER) | |
5950 | 2716 ff_vc1dsp_init_mmx(c, avctx); |
5933 | 2717 |
6384 | 2718 c->add_png_paeth_prediction= add_png_paeth_prediction_mmx2; |
4197 | 2719 } else if (mm_flags & MM_3DNOW) { |
3215
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
2720 c->prefetch = prefetch_3dnow; |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
2721 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2722 c->put_pixels_tab[0][1] = put_pixels16_x2_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2723 c->put_pixels_tab[0][2] = put_pixels16_y2_3dnow; |
393 | 2724 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2725 c->avg_pixels_tab[0][0] = avg_pixels16_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2726 c->avg_pixels_tab[0][1] = avg_pixels16_x2_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2727 c->avg_pixels_tab[0][2] = avg_pixels16_y2_3dnow; |
651 | 2728 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2729 c->put_pixels_tab[1][1] = put_pixels8_x2_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2730 c->put_pixels_tab[1][2] = put_pixels8_y2_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2731 |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2732 c->avg_pixels_tab[1][0] = avg_pixels8_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2733 c->avg_pixels_tab[1][1] = avg_pixels8_x2_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2734 c->avg_pixels_tab[1][2] = avg_pixels8_y2_3dnow; |
1092 | 2735 |
2736 if(!(avctx->flags & CODEC_FLAG_BITEXACT)){ | |
2737 c->put_no_rnd_pixels_tab[0][1] = put_no_rnd_pixels16_x2_3dnow; | |
2738 c->put_no_rnd_pixels_tab[0][2] = put_no_rnd_pixels16_y2_3dnow; | |
2739 c->put_no_rnd_pixels_tab[1][1] = put_no_rnd_pixels8_x2_3dnow; | |
2740 c->put_no_rnd_pixels_tab[1][2] = put_no_rnd_pixels8_y2_3dnow; | |
2741 c->avg_pixels_tab[0][3] = avg_pixels16_xy2_3dnow; | |
2742 c->avg_pixels_tab[1][3] = avg_pixels8_xy2_3dnow; | |
2743 } | |
984 | 2744 |
6327 | 2745 SET_QPEL_FUNCS(put_qpel, 0, 16, 3dnow); |
2746 SET_QPEL_FUNCS(put_qpel, 1, 8, 3dnow); | |
2747 SET_QPEL_FUNCS(put_no_rnd_qpel, 0, 16, 3dnow); | |
2748 SET_QPEL_FUNCS(put_no_rnd_qpel, 1, 8, 3dnow); | |
2749 SET_QPEL_FUNCS(avg_qpel, 0, 16, 3dnow); | |
2750 SET_QPEL_FUNCS(avg_qpel, 1, 8, 3dnow); | |
2751 | |
2752 SET_QPEL_FUNCS(put_h264_qpel, 0, 16, 3dnow); | |
2753 SET_QPEL_FUNCS(put_h264_qpel, 1, 8, 3dnow); | |
2754 SET_QPEL_FUNCS(put_h264_qpel, 2, 4, 3dnow); | |
2755 SET_QPEL_FUNCS(avg_h264_qpel, 0, 16, 3dnow); | |
2756 SET_QPEL_FUNCS(avg_h264_qpel, 1, 8, 3dnow); | |
2757 SET_QPEL_FUNCS(avg_h264_qpel, 2, 4, 3dnow); | |
2758 | |
2759 SET_QPEL_FUNCS(put_2tap_qpel, 0, 16, 3dnow); | |
2760 SET_QPEL_FUNCS(put_2tap_qpel, 1, 8, 3dnow); | |
2761 SET_QPEL_FUNCS(avg_2tap_qpel, 0, 16, 3dnow); | |
2762 SET_QPEL_FUNCS(avg_2tap_qpel, 1, 8, 3dnow); | |
3807
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
2763 |
6057
03febc8f506f
add MMX version for put_no_rnd_h264_chroma_mc8_c, used in VC-1 decoding.
gpoirier
parents:
6056
diff
changeset
|
2764 c->avg_h264_chroma_pixels_tab[0]= avg_h264_chroma_mc8_3dnow_rnd; |
2922
d772011258ec
faster h264_chroma_mc8_mmx, added h264_chroma_mc4_mmx.
lorenm
parents:
2902
diff
changeset
|
2765 c->avg_h264_chroma_pixels_tab[1]= avg_h264_chroma_mc4_3dnow; |
6522
dfa76e0734e5
Add missed call to ff_cavsdsp_init_3dnow() in dsputil_init_mmx()
zuxy
parents:
6513
diff
changeset
|
2766 |
dfa76e0734e5
Add missed call to ff_cavsdsp_init_3dnow() in dsputil_init_mmx()
zuxy
parents:
6513
diff
changeset
|
2767 if (ENABLE_CAVS_DECODER) |
dfa76e0734e5
Add missed call to ff_cavsdsp_init_3dnow() in dsputil_init_mmx()
zuxy
parents:
6513
diff
changeset
|
2768 ff_cavsdsp_init_3dnow(c, avctx); |
0 | 2769 } |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2770 |
6336
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2771 |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2772 #define H264_QPEL_FUNCS(x, y, CPU)\ |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2773 c->put_h264_qpel_pixels_tab[0][x+y*4] = put_h264_qpel16_mc##x##y##_##CPU;\ |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2774 c->put_h264_qpel_pixels_tab[1][x+y*4] = put_h264_qpel8_mc##x##y##_##CPU;\ |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2775 c->avg_h264_qpel_pixels_tab[0][x+y*4] = avg_h264_qpel16_mc##x##y##_##CPU;\ |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2776 c->avg_h264_qpel_pixels_tab[1][x+y*4] = avg_h264_qpel8_mc##x##y##_##CPU; |
6331 | 2777 if((mm_flags & MM_SSE2) && !(mm_flags & MM_3DNOW)){ |
2778 // these functions are slower than mmx on AMD, but faster on Intel | |
6336
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2779 /* FIXME works in most codecs, but crashes svq1 due to unaligned chroma |
6331 | 2780 c->put_pixels_tab[0][0] = put_pixels16_sse2; |
2781 c->avg_pixels_tab[0][0] = avg_pixels16_sse2; | |
6336
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2782 */ |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2783 H264_QPEL_FUNCS(0, 0, sse2); |
6331 | 2784 } |
6336
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2785 if(mm_flags & MM_SSE2){ |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2786 H264_QPEL_FUNCS(0, 1, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2787 H264_QPEL_FUNCS(0, 2, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2788 H264_QPEL_FUNCS(0, 3, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2789 H264_QPEL_FUNCS(1, 1, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2790 H264_QPEL_FUNCS(1, 2, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2791 H264_QPEL_FUNCS(1, 3, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2792 H264_QPEL_FUNCS(2, 1, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2793 H264_QPEL_FUNCS(2, 2, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2794 H264_QPEL_FUNCS(2, 3, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2795 H264_QPEL_FUNCS(3, 1, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2796 H264_QPEL_FUNCS(3, 2, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2797 H264_QPEL_FUNCS(3, 3, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2798 } |
6331 | 2799 #ifdef HAVE_SSSE3 |
2800 if(mm_flags & MM_SSSE3){ | |
6336
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2801 H264_QPEL_FUNCS(1, 0, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2802 H264_QPEL_FUNCS(1, 1, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2803 H264_QPEL_FUNCS(1, 2, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2804 H264_QPEL_FUNCS(1, 3, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2805 H264_QPEL_FUNCS(2, 0, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2806 H264_QPEL_FUNCS(2, 1, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2807 H264_QPEL_FUNCS(2, 2, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2808 H264_QPEL_FUNCS(2, 3, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2809 H264_QPEL_FUNCS(3, 0, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2810 H264_QPEL_FUNCS(3, 1, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2811 H264_QPEL_FUNCS(3, 2, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2812 H264_QPEL_FUNCS(3, 3, ssse3); |
6557 | 2813 c->put_no_rnd_h264_chroma_pixels_tab[0]= put_h264_chroma_mc8_ssse3_nornd; |
2814 c->put_h264_chroma_pixels_tab[0]= put_h264_chroma_mc8_ssse3_rnd; | |
2815 c->avg_h264_chroma_pixels_tab[0]= avg_h264_chroma_mc8_ssse3_rnd; | |
2816 c->put_h264_chroma_pixels_tab[1]= put_h264_chroma_mc4_ssse3; | |
2817 c->avg_h264_chroma_pixels_tab[1]= avg_h264_chroma_mc4_ssse3; | |
6384 | 2818 c->add_png_paeth_prediction= add_png_paeth_prediction_ssse3; |
6331 | 2819 } |
2820 #endif | |
2821 | |
4589
30261f4ed12d
Fix wrong conditional, Snow decoding, not encoding, was SIMD-accelerated.
diego
parents:
4436
diff
changeset
|
2822 #ifdef CONFIG_SNOW_DECODER |
5591 | 2823 if(mm_flags & MM_SSE2 & 0){ |
3210 | 2824 c->horizontal_compose97i = ff_snow_horizontal_compose97i_sse2; |
5602 | 2825 #ifdef HAVE_7REGS |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2826 c->vertical_compose97i = ff_snow_vertical_compose97i_sse2; |
5601
b26025b9586d
workaround gcc bug, untested as my gcc is not complaining
michael
parents:
5594
diff
changeset
|
2827 #endif |
3211
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents:
3210
diff
changeset
|
2828 c->inner_add_yblock = ff_snow_inner_add_yblock_sse2; |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2829 } |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2830 else{ |
5594
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5591
diff
changeset
|
2831 if(mm_flags & MM_MMXEXT){ |
3210 | 2832 c->horizontal_compose97i = ff_snow_horizontal_compose97i_mmx; |
5602 | 2833 #ifdef HAVE_7REGS |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2834 c->vertical_compose97i = ff_snow_vertical_compose97i_mmx; |
5601
b26025b9586d
workaround gcc bug, untested as my gcc is not complaining
michael
parents:
5594
diff
changeset
|
2835 #endif |
5594
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5591
diff
changeset
|
2836 } |
3211
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents:
3210
diff
changeset
|
2837 c->inner_add_yblock = ff_snow_inner_add_yblock_mmx; |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2838 } |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2839 #endif |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
2840 |
4197 | 2841 if(mm_flags & MM_3DNOW){ |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2842 c->vorbis_inverse_coupling = vorbis_inverse_coupling_3dnow; |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2843 c->vector_fmul = vector_fmul_3dnow; |
7261 | 2844 if(!(avctx->flags & CODEC_FLAG_BITEXACT)){ |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2845 c->float_to_int16 = float_to_int16_3dnow; |
7261 | 2846 c->float_to_int16_interleave = float_to_int16_interleave_3dnow; |
2847 } | |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2848 } |
7263 | 2849 if(mm_flags & MM_3DNOWEXT){ |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2850 c->vector_fmul_reverse = vector_fmul_reverse_3dnow2; |
7263 | 2851 c->vector_fmul_window = vector_fmul_window_3dnow2; |
7568
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2852 if(!(avctx->flags & CODEC_FLAG_BITEXACT)){ |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2853 c->float_to_int16_interleave = float_to_int16_interleave_3dn2; |
bb76ecde9318
gcc chokes on the 7 registers needed for float_to_int16_interleave6 (even inside HAVE_7REGS), so write it in yasm
lorenm
parents:
7567
diff
changeset
|
2854 } |
7263 | 2855 } |
4197 | 2856 if(mm_flags & MM_SSE){ |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
2857 c->vorbis_inverse_coupling = vorbis_inverse_coupling_sse; |
7563 | 2858 c->ac3_downmix = ac3_downmix_sse; |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2859 c->vector_fmul = vector_fmul_sse; |
3569
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2860 c->vector_fmul_reverse = vector_fmul_reverse_sse; |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2861 c->vector_fmul_add_add = vector_fmul_add_add_sse; |
7261 | 2862 c->vector_fmul_window = vector_fmul_window_sse; |
7564 | 2863 c->int32_to_float_fmul_scalar = int32_to_float_fmul_scalar_sse; |
7548 | 2864 c->float_to_int16 = float_to_int16_sse; |
2865 c->float_to_int16_interleave = float_to_int16_interleave_sse; | |
7226 | 2866 } |
4197 | 2867 if(mm_flags & MM_3DNOW) |
3574 | 2868 c->vector_fmul_add_add = vector_fmul_add_add_3dnow; // faster than sse |
7238
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2869 if(mm_flags & MM_SSE2){ |
7564 | 2870 c->int32_to_float_fmul_scalar = int32_to_float_fmul_scalar_sse2; |
7548 | 2871 c->float_to_int16 = float_to_int16_sse2; |
2872 c->float_to_int16_interleave = float_to_int16_interleave_sse2; | |
7238
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2873 c->add_int16 = add_int16_sse2; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2874 c->sub_int16 = sub_int16_sse2; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2875 c->scalarproduct_int16 = scalarproduct_int16_sse2; |
08cc6e202aa6
SSE2 optimizations for Monkey's Audio decoder vector functions
kostya
parents:
7226
diff
changeset
|
2876 } |
0 | 2877 } |
2967 | 2878 |
6403
9a736918fd90
split encoding part of dsputil_mmx into its own file
aurel
parents:
6391
diff
changeset
|
2879 if (ENABLE_ENCODERS) |
9a736918fd90
split encoding part of dsputil_mmx into its own file
aurel
parents:
6391
diff
changeset
|
2880 dsputilenc_init_mmx(c, avctx); |
9a736918fd90
split encoding part of dsputil_mmx into its own file
aurel
parents:
6391
diff
changeset
|
2881 |
247
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2882 #if 0 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2883 // for speed testing |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2884 get_pixels = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2885 put_pixels_clamped = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2886 add_pixels_clamped = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2887 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2888 pix_abs16x16 = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2889 pix_abs16x16_x2 = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2890 pix_abs16x16_y2 = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2891 pix_abs16x16_xy2 = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2892 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2893 put_pixels_tab[0] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2894 put_pixels_tab[1] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2895 put_pixels_tab[2] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2896 put_pixels_tab[3] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2897 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2898 put_no_rnd_pixels_tab[0] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2899 put_no_rnd_pixels_tab[1] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2900 put_no_rnd_pixels_tab[2] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2901 put_no_rnd_pixels_tab[3] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2902 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2903 avg_pixels_tab[0] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2904 avg_pixels_tab[1] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2905 avg_pixels_tab[2] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2906 avg_pixels_tab[3] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2907 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2908 avg_no_rnd_pixels_tab[0] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2909 avg_no_rnd_pixels_tab[1] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2910 avg_no_rnd_pixels_tab[2] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2911 avg_no_rnd_pixels_tab[3] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2912 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2913 //av_fdct = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2914 //ff_idct = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2915 #endif |
0 | 2916 } |