Mercurial > libavcodec.hg
annotate ppc/int_altivec.c @ 11626:4c120a633832 libavcodec
DCA: indent
author | mru |
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date | Tue, 13 Apr 2010 10:15:05 +0000 |
parents | 5da7180afadf |
children | 7dd2a45249a9 |
rev | line source |
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1 /* |
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2 * Copyright (c) 2007 Luca Barbato <lu_zero@gentoo.org> |
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3 * |
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4 * This file is part of FFmpeg. |
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5 * |
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6 * FFmpeg is free software; you can redistribute it and/or |
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7 * modify it under the terms of the GNU Lesser General Public |
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8 * License as published by the Free Software Foundation; either |
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9 * version 2.1 of the License, or (at your option) any later version. |
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10 * |
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11 * FFmpeg is distributed in the hope that it will be useful, |
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12 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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14 * Lesser General Public License for more details. |
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15 * |
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16 * You should have received a copy of the GNU Lesser General Public |
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17 * License along with FFmpeg; if not, write to the Free Software |
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18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
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19 */ |
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20 |
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21 /** |
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22 ** @file libavcodec/ppc/int_altivec.c |
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23 ** integer misc ops. |
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24 **/ |
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25 |
9364 | 26 #include "config.h" |
27 #if HAVE_ALTIVEC_H | |
28 #include <altivec.h> | |
29 #endif | |
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30 |
9364 | 31 #include "libavcodec/dsputil.h" |
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32 |
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33 #include "dsputil_altivec.h" |
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34 |
7204 | 35 #include "types_altivec.h" |
36 | |
5255 | 37 static int ssd_int8_vs_int16_altivec(const int8_t *pix1, const int16_t *pix2, |
38 int size) { | |
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39 int i, size16; |
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40 vector signed char vpix1; |
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41 vector signed short vpix2, vdiff, vpix1l,vpix1h; |
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42 union { vector signed int vscore; |
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43 int32_t score[4]; |
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44 } u; |
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45 u.vscore = vec_splat_s32(0); |
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46 // |
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47 //XXX lazy way, fix it later |
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48 |
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49 #define vec_unaligned_load(b) \ |
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50 vec_perm(vec_ld(0,b),vec_ld(15,b),vec_lvsl(0, b)); |
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51 |
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52 size16 = size >> 4; |
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53 while(size16) { |
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54 // score += (pix1[i]-pix2[i])*(pix1[i]-pix2[i]); |
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55 //load pix1 and the first batch of pix2 |
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56 |
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57 vpix1 = vec_unaligned_load(pix1); |
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58 vpix2 = vec_unaligned_load(pix2); |
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59 pix2 += 8; |
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60 //unpack |
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61 vpix1h = vec_unpackh(vpix1); |
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62 vdiff = vec_sub(vpix1h, vpix2); |
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63 vpix1l = vec_unpackl(vpix1); |
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64 // load another batch from pix2 |
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65 vpix2 = vec_unaligned_load(pix2); |
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66 u.vscore = vec_msum(vdiff, vdiff, u.vscore); |
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67 vdiff = vec_sub(vpix1l, vpix2); |
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68 u.vscore = vec_msum(vdiff, vdiff, u.vscore); |
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69 pix1 += 16; |
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70 pix2 += 8; |
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71 size16--; |
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72 } |
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73 u.vscore = vec_sums(u.vscore, vec_splat_s32(0)); |
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74 |
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75 size %= 16; |
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76 for (i = 0; i < size; i++) { |
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77 u.score[3] += (pix1[i]-pix2[i])*(pix1[i]-pix2[i]); |
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78 } |
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79 return u.score[3]; |
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80 } |
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81 |
7204 | 82 static int32_t scalarproduct_int16_altivec(int16_t * v1, int16_t * v2, int order, const int shift) |
83 { | |
84 int i; | |
85 LOAD_ZERO; | |
8494 | 86 register vec_s16 vec1, *pv; |
87 register vec_s32 res = vec_splat_s32(0), t; | |
88 register vec_u32 shifts; | |
10082 | 89 int32_t ires; |
7204 | 90 |
91 shifts = zero_u32v; | |
92 if(shift & 0x10) shifts = vec_add(shifts, vec_sl(vec_splat_u32(0x08), vec_splat_u32(0x1))); | |
93 if(shift & 0x08) shifts = vec_add(shifts, vec_splat_u32(0x08)); | |
94 if(shift & 0x04) shifts = vec_add(shifts, vec_splat_u32(0x04)); | |
95 if(shift & 0x02) shifts = vec_add(shifts, vec_splat_u32(0x02)); | |
96 if(shift & 0x01) shifts = vec_add(shifts, vec_splat_u32(0x01)); | |
97 | |
98 for(i = 0; i < order; i += 8){ | |
8494 | 99 pv = (vec_s16*)v1; |
7204 | 100 vec1 = vec_perm(pv[0], pv[1], vec_lvsl(0, v1)); |
101 t = vec_msum(vec1, vec_ld(0, v2), zero_s32v); | |
102 t = vec_sr(t, shifts); | |
103 res = vec_sums(t, res); | |
104 v1 += 8; | |
105 v2 += 8; | |
106 } | |
107 res = vec_splat(res, 3); | |
108 vec_ste(res, 0, &ires); | |
109 return ires; | |
110 } | |
111 | |
10644 | 112 static int32_t scalarproduct_and_madd_int16_altivec(int16_t *v1, int16_t *v2, int16_t *v3, int order, int mul) |
113 { | |
114 LOAD_ZERO; | |
115 vec_s16 *pv1 = (vec_s16*)v1; | |
116 vec_s16 *pv2 = (vec_s16*)v2; | |
117 vec_s16 *pv3 = (vec_s16*)v3; | |
118 register vec_s16 muls = {mul,mul,mul,mul,mul,mul,mul,mul}; | |
119 register vec_s16 t0, t1, i0, i1; | |
120 register vec_s16 i2 = pv2[0], i3 = pv3[0]; | |
121 register vec_s32 res = zero_s32v; | |
122 register vec_u8 align = vec_lvsl(0, v2); | |
123 int32_t ires; | |
124 order >>= 4; | |
125 do { | |
126 t0 = vec_perm(i2, pv2[1], align); | |
127 i2 = pv2[2]; | |
128 t1 = vec_perm(pv2[1], i2, align); | |
129 i0 = pv1[0]; | |
130 i1 = pv1[1]; | |
131 res = vec_msum(t0, i0, res); | |
132 res = vec_msum(t1, i1, res); | |
133 t0 = vec_perm(i3, pv3[1], align); | |
134 i3 = pv3[2]; | |
135 t1 = vec_perm(pv3[1], i3, align); | |
136 pv1[0] = vec_mladd(t0, muls, i0); | |
137 pv1[1] = vec_mladd(t1, muls, i1); | |
138 pv1 += 2; | |
139 pv2 += 2; | |
140 pv3 += 2; | |
141 } while(--order); | |
142 res = vec_splat(vec_sums(res, zero_s32v), 3); | |
143 vec_ste(res, 0, &ires); | |
144 return ires; | |
145 } | |
146 | |
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147 void int_init_altivec(DSPContext* c, AVCodecContext *avctx) |
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148 { |
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149 c->ssd_int8_vs_int16 = ssd_int8_vs_int16_altivec; |
7204 | 150 c->scalarproduct_int16 = scalarproduct_int16_altivec; |
10644 | 151 c->scalarproduct_and_madd_int16 = scalarproduct_and_madd_int16_altivec; |
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152 } |