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8430
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1 /*
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2 * MMX optimized forward DCT
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3 * The gcc porting is Copyright (c) 2001 Fabrice Bellard.
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4 * cleanup/optimizations are Copyright (c) 2002-2004 Michael Niedermayer <michaelni@gmx.at>
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5 * SSE2 optimization is Copyright (c) 2004 Denes Balatoni.
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6 *
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7 * from fdctam32.c - AP922 MMX(3D-Now) forward-DCT
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8 *
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9 * Intel Application Note AP-922 - fast, precise implementation of DCT
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10 * http://developer.intel.com/vtune/cbts/appnotes.htm
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11 *
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12 * Also of inspiration:
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13 * a page about fdct at http://www.geocities.com/ssavekar/dct.htm
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14 * Skal's fdct at http://skal.planet-d.net/coding/dct.html
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15 *
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16 * This file is part of FFmpeg.
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17 *
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18 * FFmpeg is free software; you can redistribute it and/or
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19 * modify it under the terms of the GNU Lesser General Public
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20 * License as published by the Free Software Foundation; either
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21 * version 2.1 of the License, or (at your option) any later version.
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22 *
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23 * FFmpeg is distributed in the hope that it will be useful,
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24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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26 * Lesser General Public License for more details.
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27 *
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28 * You should have received a copy of the GNU Lesser General Public
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29 * License along with FFmpeg; if not, write to the Free Software
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30 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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31 */
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32
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33 #include "libavutil/common.h"
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34 #include "libavcodec/dsputil.h"
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35
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36 #define ATTR_ALIGN(align) __attribute__ ((__aligned__ (align)))
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37
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38 //////////////////////////////////////////////////////////////////////
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39 //
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40 // constants for the forward DCT
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41 // -----------------------------
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42 //
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43 // Be sure to check that your compiler is aligning all constants to QWORD
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44 // (8-byte) memory boundaries! Otherwise the unaligned memory access will
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45 // severely stall MMX execution.
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46 //
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47 //////////////////////////////////////////////////////////////////////
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48
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49 #define BITS_FRW_ACC 3 //; 2 or 3 for accuracy
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50 #define SHIFT_FRW_COL BITS_FRW_ACC
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51 #define SHIFT_FRW_ROW (BITS_FRW_ACC + 17 - 3)
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52 #define RND_FRW_ROW (1 << (SHIFT_FRW_ROW-1))
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53 //#define RND_FRW_COL (1 << (SHIFT_FRW_COL-1))
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54
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55 #define X8(x) x,x,x,x,x,x,x,x
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56
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57 //concatenated table, for forward DCT transformation
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58 static const int16_t fdct_tg_all_16[24] ATTR_ALIGN(16) = {
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59 X8(13036), // tg * (2<<16) + 0.5
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60 X8(27146), // tg * (2<<16) + 0.5
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61 X8(-21746) // tg * (2<<16) + 0.5
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62 };
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63
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64 static const int16_t ocos_4_16[8] ATTR_ALIGN(16) = {
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65 X8(23170) //cos * (2<<15) + 0.5
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66 };
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67
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68 static const int16_t fdct_one_corr[8] ATTR_ALIGN(16) = { X8(1) };
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69
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70 static const int32_t fdct_r_row[2] ATTR_ALIGN(8) = {RND_FRW_ROW, RND_FRW_ROW };
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71
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72 static struct
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73 {
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74 const int32_t fdct_r_row_sse2[4] ATTR_ALIGN(16);
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75 } fdct_r_row_sse2 ATTR_ALIGN(16)=
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76 {{
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77 RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW
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78 }};
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79 //static const long fdct_r_row_sse2[4] ATTR_ALIGN(16) = {RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW};
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80
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81 static const int16_t tab_frw_01234567[] ATTR_ALIGN(8) = { // forward_dct coeff table
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82 16384, 16384, 22725, 19266,
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83 16384, 16384, 12873, 4520,
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84 21407, 8867, 19266, -4520,
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85 -8867, -21407, -22725, -12873,
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86 16384, -16384, 12873, -22725,
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87 -16384, 16384, 4520, 19266,
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88 8867, -21407, 4520, -12873,
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89 21407, -8867, 19266, -22725,
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90
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91 22725, 22725, 31521, 26722,
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92 22725, 22725, 17855, 6270,
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93 29692, 12299, 26722, -6270,
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94 -12299, -29692, -31521, -17855,
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95 22725, -22725, 17855, -31521,
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96 -22725, 22725, 6270, 26722,
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97 12299, -29692, 6270, -17855,
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98 29692, -12299, 26722, -31521,
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99
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100 21407, 21407, 29692, 25172,
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101 21407, 21407, 16819, 5906,
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102 27969, 11585, 25172, -5906,
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103 -11585, -27969, -29692, -16819,
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104 21407, -21407, 16819, -29692,
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105 -21407, 21407, 5906, 25172,
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106 11585, -27969, 5906, -16819,
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107 27969, -11585, 25172, -29692,
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108
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109 19266, 19266, 26722, 22654,
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110 19266, 19266, 15137, 5315,
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111 25172, 10426, 22654, -5315,
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112 -10426, -25172, -26722, -15137,
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113 19266, -19266, 15137, -26722,
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114 -19266, 19266, 5315, 22654,
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115 10426, -25172, 5315, -15137,
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116 25172, -10426, 22654, -26722,
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117
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118 16384, 16384, 22725, 19266,
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119 16384, 16384, 12873, 4520,
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120 21407, 8867, 19266, -4520,
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121 -8867, -21407, -22725, -12873,
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122 16384, -16384, 12873, -22725,
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123 -16384, 16384, 4520, 19266,
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124 8867, -21407, 4520, -12873,
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125 21407, -8867, 19266, -22725,
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126
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127 19266, 19266, 26722, 22654,
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128 19266, 19266, 15137, 5315,
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129 25172, 10426, 22654, -5315,
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130 -10426, -25172, -26722, -15137,
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131 19266, -19266, 15137, -26722,
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132 -19266, 19266, 5315, 22654,
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133 10426, -25172, 5315, -15137,
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134 25172, -10426, 22654, -26722,
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135
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136 21407, 21407, 29692, 25172,
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137 21407, 21407, 16819, 5906,
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138 27969, 11585, 25172, -5906,
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139 -11585, -27969, -29692, -16819,
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140 21407, -21407, 16819, -29692,
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141 -21407, 21407, 5906, 25172,
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142 11585, -27969, 5906, -16819,
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143 27969, -11585, 25172, -29692,
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144
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145 22725, 22725, 31521, 26722,
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146 22725, 22725, 17855, 6270,
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147 29692, 12299, 26722, -6270,
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148 -12299, -29692, -31521, -17855,
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149 22725, -22725, 17855, -31521,
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150 -22725, 22725, 6270, 26722,
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151 12299, -29692, 6270, -17855,
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152 29692, -12299, 26722, -31521,
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153 };
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154
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155 static struct
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156 {
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157 const int16_t tab_frw_01234567_sse2[256] ATTR_ALIGN(16);
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158 } tab_frw_01234567_sse2 ATTR_ALIGN(16) =
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159 {{
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160 //static const int16_t tab_frw_01234567_sse2[] ATTR_ALIGN(16) = { // forward_dct coeff table
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161 #define TABLE_SSE2 C4, C4, C1, C3, -C6, -C2, -C1, -C5, \
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162 C4, C4, C5, C7, C2, C6, C3, -C7, \
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163 -C4, C4, C7, C3, C6, -C2, C7, -C5, \
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164 C4, -C4, C5, -C1, C2, -C6, C3, -C1,
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165 // c1..c7 * cos(pi/4) * 2^15
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166 #define C1 22725
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167 #define C2 21407
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168 #define C3 19266
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169 #define C4 16384
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170 #define C5 12873
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171 #define C6 8867
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172 #define C7 4520
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173 TABLE_SSE2
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174
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175 #undef C1
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176 #undef C2
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177 #undef C3
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178 #undef C4
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179 #undef C5
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180 #undef C6
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181 #undef C7
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182 #define C1 31521
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183 #define C2 29692
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184 #define C3 26722
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185 #define C4 22725
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186 #define C5 17855
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187 #define C6 12299
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188 #define C7 6270
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189 TABLE_SSE2
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190
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191 #undef C1
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192 #undef C2
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193 #undef C3
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194 #undef C4
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195 #undef C5
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196 #undef C6
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197 #undef C7
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198 #define C1 29692
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199 #define C2 27969
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200 #define C3 25172
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201 #define C4 21407
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202 #define C5 16819
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203 #define C6 11585
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204 #define C7 5906
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205 TABLE_SSE2
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206
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207 #undef C1
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208 #undef C2
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209 #undef C3
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210 #undef C4
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211 #undef C5
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212 #undef C6
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213 #undef C7
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214 #define C1 26722
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215 #define C2 25172
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216 #define C3 22654
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217 #define C4 19266
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218 #define C5 15137
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219 #define C6 10426
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220 #define C7 5315
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221 TABLE_SSE2
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222
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223 #undef C1
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224 #undef C2
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225 #undef C3
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226 #undef C4
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227 #undef C5
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228 #undef C6
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229 #undef C7
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230 #define C1 22725
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231 #define C2 21407
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232 #define C3 19266
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233 #define C4 16384
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234 #define C5 12873
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235 #define C6 8867
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236 #define C7 4520
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237 TABLE_SSE2
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238
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239 #undef C1
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240 #undef C2
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241 #undef C3
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242 #undef C4
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243 #undef C5
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244 #undef C6
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245 #undef C7
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246 #define C1 26722
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247 #define C2 25172
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248 #define C3 22654
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249 #define C4 19266
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250 #define C5 15137
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251 #define C6 10426
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252 #define C7 5315
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253 TABLE_SSE2
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254
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255 #undef C1
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256 #undef C2
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257 #undef C3
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258 #undef C4
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259 #undef C5
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260 #undef C6
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261 #undef C7
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262 #define C1 29692
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263 #define C2 27969
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264 #define C3 25172
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265 #define C4 21407
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266 #define C5 16819
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267 #define C6 11585
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268 #define C7 5906
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269 TABLE_SSE2
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270
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271 #undef C1
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272 #undef C2
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273 #undef C3
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274 #undef C4
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275 #undef C5
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276 #undef C6
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277 #undef C7
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278 #define C1 31521
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279 #define C2 29692
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280 #define C3 26722
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281 #define C4 22725
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282 #define C5 17855
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283 #define C6 12299
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284 #define C7 6270
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285 TABLE_SSE2
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286 }};
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287
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288 #define S(s) AV_TOSTRING(s) //AV_STRINGIFY is too long
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289
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290 #define FDCT_COL(cpu, mm, mov)\
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291 static av_always_inline void fdct_col_##cpu(const int16_t *in, int16_t *out, int offset)\
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292 {\
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293 __asm__ volatile (\
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294 #mov" 16(%0), %%"#mm"0 \n\t" \
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295 #mov" 96(%0), %%"#mm"1 \n\t" \
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296 #mov" %%"#mm"0, %%"#mm"2 \n\t" \
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297 #mov" 32(%0), %%"#mm"3 \n\t" \
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298 "paddsw %%"#mm"1, %%"#mm"0 \n\t" \
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299 #mov" 80(%0), %%"#mm"4 \n\t" \
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300 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"0 \n\t" \
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301 #mov" (%0), %%"#mm"5 \n\t" \
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302 "paddsw %%"#mm"3, %%"#mm"4 \n\t" \
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303 "paddsw 112(%0), %%"#mm"5 \n\t" \
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304 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"4 \n\t" \
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305 #mov" %%"#mm"0, %%"#mm"6 \n\t" \
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306 "psubsw %%"#mm"1, %%"#mm"2 \n\t" \
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307 #mov" 16(%1), %%"#mm"1 \n\t" \
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308 "psubsw %%"#mm"4, %%"#mm"0 \n\t" \
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309 #mov" 48(%0), %%"#mm"7 \n\t" \
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310 "pmulhw %%"#mm"0, %%"#mm"1 \n\t" \
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311 "paddsw 64(%0), %%"#mm"7 \n\t" \
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312 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"5 \n\t" \
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313 "paddsw %%"#mm"4, %%"#mm"6 \n\t" \
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314 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"7 \n\t" \
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315 #mov" %%"#mm"5, %%"#mm"4 \n\t" \
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316 "psubsw %%"#mm"7, %%"#mm"5 \n\t" \
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317 "paddsw %%"#mm"5, %%"#mm"1 \n\t" \
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318 "paddsw %%"#mm"7, %%"#mm"4 \n\t" \
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319 "por (%2), %%"#mm"1 \n\t" \
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320 "psllw $"S(SHIFT_FRW_COL)"+1, %%"#mm"2 \n\t" \
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321 "pmulhw 16(%1), %%"#mm"5 \n\t" \
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322 #mov" %%"#mm"4, %%"#mm"7 \n\t" \
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323 "psubsw 80(%0), %%"#mm"3 \n\t" \
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324 "psubsw %%"#mm"6, %%"#mm"4 \n\t" \
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325 #mov" %%"#mm"1, 32(%3) \n\t" \
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326 "paddsw %%"#mm"6, %%"#mm"7 \n\t" \
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327 #mov" 48(%0), %%"#mm"1 \n\t" \
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328 "psllw $"S(SHIFT_FRW_COL)"+1, %%"#mm"3 \n\t" \
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329 "psubsw 64(%0), %%"#mm"1 \n\t" \
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330 #mov" %%"#mm"2, %%"#mm"6 \n\t" \
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331 #mov" %%"#mm"4, 64(%3) \n\t" \
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332 "paddsw %%"#mm"3, %%"#mm"2 \n\t" \
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333 "pmulhw (%4), %%"#mm"2 \n\t" \
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334 "psubsw %%"#mm"3, %%"#mm"6 \n\t" \
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335 "pmulhw (%4), %%"#mm"6 \n\t" \
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336 "psubsw %%"#mm"0, %%"#mm"5 \n\t" \
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337 "por (%2), %%"#mm"5 \n\t" \
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338 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"1 \n\t" \
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339 "por (%2), %%"#mm"2 \n\t" \
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340 #mov" %%"#mm"1, %%"#mm"4 \n\t" \
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341 #mov" (%0), %%"#mm"3 \n\t" \
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342 "paddsw %%"#mm"6, %%"#mm"1 \n\t" \
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343 "psubsw 112(%0), %%"#mm"3 \n\t" \
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344 "psubsw %%"#mm"6, %%"#mm"4 \n\t" \
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345 #mov" (%1), %%"#mm"0 \n\t" \
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346 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"3 \n\t" \
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347 #mov" 32(%1), %%"#mm"6 \n\t" \
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348 "pmulhw %%"#mm"1, %%"#mm"0 \n\t" \
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349 #mov" %%"#mm"7, (%3) \n\t" \
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350 "pmulhw %%"#mm"4, %%"#mm"6 \n\t" \
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351 #mov" %%"#mm"5, 96(%3) \n\t" \
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352 #mov" %%"#mm"3, %%"#mm"7 \n\t" \
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353 #mov" 32(%1), %%"#mm"5 \n\t" \
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354 "psubsw %%"#mm"2, %%"#mm"7 \n\t" \
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355 "paddsw %%"#mm"2, %%"#mm"3 \n\t" \
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356 "pmulhw %%"#mm"7, %%"#mm"5 \n\t" \
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357 "paddsw %%"#mm"3, %%"#mm"0 \n\t" \
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358 "paddsw %%"#mm"4, %%"#mm"6 \n\t" \
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359 "pmulhw (%1), %%"#mm"3 \n\t" \
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360 "por (%2), %%"#mm"0 \n\t" \
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361 "paddsw %%"#mm"7, %%"#mm"5 \n\t" \
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362 "psubsw %%"#mm"6, %%"#mm"7 \n\t" \
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363 #mov" %%"#mm"0, 16(%3) \n\t" \
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364 "paddsw %%"#mm"4, %%"#mm"5 \n\t" \
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365 #mov" %%"#mm"7, 48(%3) \n\t" \
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366 "psubsw %%"#mm"1, %%"#mm"3 \n\t" \
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367 #mov" %%"#mm"5, 80(%3) \n\t" \
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368 #mov" %%"#mm"3, 112(%3) \n\t" \
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369 : \
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370 : "r" (in + offset), "r" (fdct_tg_all_16), "r" (fdct_one_corr), \
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371 "r" (out + offset), "r" (ocos_4_16)); \
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372 }
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373
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374 FDCT_COL(mmx, mm, movq)
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375 FDCT_COL(sse2, xmm, movdqa)
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376
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377 static av_always_inline void fdct_row_sse2(const int16_t *in, int16_t *out)
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378 {
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379 __asm__ volatile(
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380 #define FDCT_ROW_SSE2_H1(i,t) \
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381 "movq " #i "(%0), %%xmm2 \n\t" \
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382 "movq " #i "+8(%0), %%xmm0 \n\t" \
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383 "movdqa " #t "+32(%1), %%xmm3 \n\t" \
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384 "movdqa " #t "+48(%1), %%xmm7 \n\t" \
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385 "movdqa " #t "(%1), %%xmm4 \n\t" \
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386 "movdqa " #t "+16(%1), %%xmm5 \n\t"
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387
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388 #define FDCT_ROW_SSE2_H2(i,t) \
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389 "movq " #i "(%0), %%xmm2 \n\t" \
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390 "movq " #i "+8(%0), %%xmm0 \n\t" \
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391 "movdqa " #t "+32(%1), %%xmm3 \n\t" \
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392 "movdqa " #t "+48(%1), %%xmm7 \n\t"
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393
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394 #define FDCT_ROW_SSE2(i) \
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395 "movq %%xmm2, %%xmm1 \n\t" \
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396 "pshuflw $27, %%xmm0, %%xmm0 \n\t" \
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397 "paddsw %%xmm0, %%xmm1 \n\t" \
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398 "psubsw %%xmm0, %%xmm2 \n\t" \
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399 "punpckldq %%xmm2, %%xmm1 \n\t" \
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400 "pshufd $78, %%xmm1, %%xmm2 \n\t" \
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401 "pmaddwd %%xmm2, %%xmm3 \n\t" \
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402 "pmaddwd %%xmm1, %%xmm7 \n\t" \
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403 "pmaddwd %%xmm5, %%xmm2 \n\t" \
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404 "pmaddwd %%xmm4, %%xmm1 \n\t" \
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405 "paddd %%xmm7, %%xmm3 \n\t" \
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406 "paddd %%xmm2, %%xmm1 \n\t" \
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407 "paddd %%xmm6, %%xmm3 \n\t" \
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408 "paddd %%xmm6, %%xmm1 \n\t" \
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409 "psrad %3, %%xmm3 \n\t" \
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410 "psrad %3, %%xmm1 \n\t" \
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411 "packssdw %%xmm3, %%xmm1 \n\t" \
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412 "movdqa %%xmm1, " #i "(%4) \n\t"
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413
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414 "movdqa (%2), %%xmm6 \n\t"
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415 FDCT_ROW_SSE2_H1(0,0)
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416 FDCT_ROW_SSE2(0)
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417 FDCT_ROW_SSE2_H2(64,0)
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418 FDCT_ROW_SSE2(64)
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419
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420 FDCT_ROW_SSE2_H1(16,64)
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421 FDCT_ROW_SSE2(16)
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422 FDCT_ROW_SSE2_H2(112,64)
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423 FDCT_ROW_SSE2(112)
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424
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425 FDCT_ROW_SSE2_H1(32,128)
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426 FDCT_ROW_SSE2(32)
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427 FDCT_ROW_SSE2_H2(96,128)
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428 FDCT_ROW_SSE2(96)
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429
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430 FDCT_ROW_SSE2_H1(48,192)
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431 FDCT_ROW_SSE2(48)
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432 FDCT_ROW_SSE2_H2(80,192)
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433 FDCT_ROW_SSE2(80)
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434 :
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435 : "r" (in), "r" (tab_frw_01234567_sse2.tab_frw_01234567_sse2), "r" (fdct_r_row_sse2.fdct_r_row_sse2), "i" (SHIFT_FRW_ROW), "r" (out)
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436 );
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437 }
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438
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439 static av_always_inline void fdct_row_mmx2(const int16_t *in, int16_t *out, const int16_t *table)
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440 {
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441 __asm__ volatile (
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442 "pshufw $0x1B, 8(%0), %%mm5 \n\t"
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443 "movq (%0), %%mm0 \n\t"
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444 "movq %%mm0, %%mm1 \n\t"
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445 "paddsw %%mm5, %%mm0 \n\t"
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446 "psubsw %%mm5, %%mm1 \n\t"
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447 "movq %%mm0, %%mm2 \n\t"
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448 "punpckldq %%mm1, %%mm0 \n\t"
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449 "punpckhdq %%mm1, %%mm2 \n\t"
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450 "movq (%1), %%mm1 \n\t"
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451 "movq 8(%1), %%mm3 \n\t"
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452 "movq 16(%1), %%mm4 \n\t"
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453 "movq 24(%1), %%mm5 \n\t"
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454 "movq 32(%1), %%mm6 \n\t"
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455 "movq 40(%1), %%mm7 \n\t"
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456 "pmaddwd %%mm0, %%mm1 \n\t"
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457 "pmaddwd %%mm2, %%mm3 \n\t"
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458 "pmaddwd %%mm0, %%mm4 \n\t"
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459 "pmaddwd %%mm2, %%mm5 \n\t"
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460 "pmaddwd %%mm0, %%mm6 \n\t"
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461 "pmaddwd %%mm2, %%mm7 \n\t"
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462 "pmaddwd 48(%1), %%mm0 \n\t"
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463 "pmaddwd 56(%1), %%mm2 \n\t"
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464 "paddd %%mm1, %%mm3 \n\t"
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465 "paddd %%mm4, %%mm5 \n\t"
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466 "paddd %%mm6, %%mm7 \n\t"
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467 "paddd %%mm0, %%mm2 \n\t"
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468 "movq (%2), %%mm0 \n\t"
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469 "paddd %%mm0, %%mm3 \n\t"
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470 "paddd %%mm0, %%mm5 \n\t"
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471 "paddd %%mm0, %%mm7 \n\t"
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472 "paddd %%mm0, %%mm2 \n\t"
|
|
|
473 "psrad $"S(SHIFT_FRW_ROW)", %%mm3 \n\t"
|
|
|
474 "psrad $"S(SHIFT_FRW_ROW)", %%mm5 \n\t"
|
|
|
475 "psrad $"S(SHIFT_FRW_ROW)", %%mm7 \n\t"
|
|
|
476 "psrad $"S(SHIFT_FRW_ROW)", %%mm2 \n\t"
|
|
|
477 "packssdw %%mm5, %%mm3 \n\t"
|
|
|
478 "packssdw %%mm2, %%mm7 \n\t"
|
|
|
479 "movq %%mm3, (%3) \n\t"
|
|
|
480 "movq %%mm7, 8(%3) \n\t"
|
|
|
481 :
|
|
|
482 : "r" (in), "r" (table), "r" (fdct_r_row), "r" (out));
|
|
|
483 }
|
|
|
484
|
|
|
485 static av_always_inline void fdct_row_mmx(const int16_t *in, int16_t *out, const int16_t *table)
|
|
|
486 {
|
|
|
487 //FIXME reorder (I do not have an old MMX-only CPU here to benchmark ...)
|
|
|
488 __asm__ volatile(
|
|
|
489 "movd 12(%0), %%mm1 \n\t"
|
|
|
490 "punpcklwd 8(%0), %%mm1 \n\t"
|
|
|
491 "movq %%mm1, %%mm2 \n\t"
|
|
|
492 "psrlq $0x20, %%mm1 \n\t"
|
|
|
493 "movq 0(%0), %%mm0 \n\t"
|
|
|
494 "punpcklwd %%mm2, %%mm1 \n\t"
|
|
|
495 "movq %%mm0, %%mm5 \n\t"
|
|
|
496 "paddsw %%mm1, %%mm0 \n\t"
|
|
|
497 "psubsw %%mm1, %%mm5 \n\t"
|
|
|
498 "movq %%mm0, %%mm2 \n\t"
|
|
|
499 "punpckldq %%mm5, %%mm0 \n\t"
|
|
|
500 "punpckhdq %%mm5, %%mm2 \n\t"
|
|
|
501 "movq 0(%1), %%mm1 \n\t"
|
|
|
502 "movq 8(%1), %%mm3 \n\t"
|
|
|
503 "movq 16(%1), %%mm4 \n\t"
|
|
|
504 "movq 24(%1), %%mm5 \n\t"
|
|
|
505 "movq 32(%1), %%mm6 \n\t"
|
|
|
506 "movq 40(%1), %%mm7 \n\t"
|
|
|
507 "pmaddwd %%mm0, %%mm1 \n\t"
|
|
|
508 "pmaddwd %%mm2, %%mm3 \n\t"
|
|
|
509 "pmaddwd %%mm0, %%mm4 \n\t"
|
|
|
510 "pmaddwd %%mm2, %%mm5 \n\t"
|
|
|
511 "pmaddwd %%mm0, %%mm6 \n\t"
|
|
|
512 "pmaddwd %%mm2, %%mm7 \n\t"
|
|
|
513 "pmaddwd 48(%1), %%mm0 \n\t"
|
|
|
514 "pmaddwd 56(%1), %%mm2 \n\t"
|
|
|
515 "paddd %%mm1, %%mm3 \n\t"
|
|
|
516 "paddd %%mm4, %%mm5 \n\t"
|
|
|
517 "paddd %%mm6, %%mm7 \n\t"
|
|
|
518 "paddd %%mm0, %%mm2 \n\t"
|
|
|
519 "movq (%2), %%mm0 \n\t"
|
|
|
520 "paddd %%mm0, %%mm3 \n\t"
|
|
|
521 "paddd %%mm0, %%mm5 \n\t"
|
|
|
522 "paddd %%mm0, %%mm7 \n\t"
|
|
|
523 "paddd %%mm0, %%mm2 \n\t"
|
|
|
524 "psrad $"S(SHIFT_FRW_ROW)", %%mm3 \n\t"
|
|
|
525 "psrad $"S(SHIFT_FRW_ROW)", %%mm5 \n\t"
|
|
|
526 "psrad $"S(SHIFT_FRW_ROW)", %%mm7 \n\t"
|
|
|
527 "psrad $"S(SHIFT_FRW_ROW)", %%mm2 \n\t"
|
|
|
528 "packssdw %%mm5, %%mm3 \n\t"
|
|
|
529 "packssdw %%mm2, %%mm7 \n\t"
|
|
|
530 "movq %%mm3, 0(%3) \n\t"
|
|
|
531 "movq %%mm7, 8(%3) \n\t"
|
|
|
532 :
|
|
|
533 : "r" (in), "r" (table), "r" (fdct_r_row), "r" (out));
|
|
|
534 }
|
|
|
535
|
|
|
536 void ff_fdct_mmx(int16_t *block)
|
|
|
537 {
|
|
|
538 int64_t align_tmp[16] ATTR_ALIGN(8);
|
|
|
539 int16_t * block1= (int16_t*)align_tmp;
|
|
|
540 const int16_t *table= tab_frw_01234567;
|
|
|
541 int i;
|
|
|
542
|
|
|
543 fdct_col_mmx(block, block1, 0);
|
|
|
544 fdct_col_mmx(block, block1, 4);
|
|
|
545
|
|
|
546 for(i=8;i>0;i--) {
|
|
|
547 fdct_row_mmx(block1, block, table);
|
|
|
548 block1 += 8;
|
|
|
549 table += 32;
|
|
|
550 block += 8;
|
|
|
551 }
|
|
|
552 }
|
|
|
553
|
|
|
554 void ff_fdct_mmx2(int16_t *block)
|
|
|
555 {
|
|
|
556 int64_t align_tmp[16] ATTR_ALIGN(8);
|
|
|
557 int16_t *block1= (int16_t*)align_tmp;
|
|
|
558 const int16_t *table= tab_frw_01234567;
|
|
|
559 int i;
|
|
|
560
|
|
|
561 fdct_col_mmx(block, block1, 0);
|
|
|
562 fdct_col_mmx(block, block1, 4);
|
|
|
563
|
|
|
564 for(i=8;i>0;i--) {
|
|
|
565 fdct_row_mmx2(block1, block, table);
|
|
|
566 block1 += 8;
|
|
|
567 table += 32;
|
|
|
568 block += 8;
|
|
|
569 }
|
|
|
570 }
|
|
|
571
|
|
|
572 void ff_fdct_sse2(int16_t *block)
|
|
|
573 {
|
|
|
574 int64_t align_tmp[16] ATTR_ALIGN(16);
|
|
|
575 int16_t * const block1= (int16_t*)align_tmp;
|
|
|
576
|
|
|
577 fdct_col_sse2(block, block1, 0);
|
|
|
578 fdct_row_sse2(block1, block);
|
|
|
579 }
|
|
|
580
|
