annotate cabac.h @ 4944:5d4544d7cbbc libavcodec

move defines and enums out of cavsdata.h
author aurel
date Tue, 08 May 2007 23:58:35 +0000
parents 777f250df232
children 9a6a0818e93f
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 /*
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2 * H.26L/H.264/AVC/JVT/14496-10/... encoder/decoder
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3 * Copyright (c) 2003 Michael Niedermayer <michaelni@gmx.at>
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4 *
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5 * This file is part of FFmpeg.
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6 *
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7 * FFmpeg is free software; you can redistribute it and/or
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8 * modify it under the terms of the GNU Lesser General Public
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9 * License as published by the Free Software Foundation; either
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10 * version 2.1 of the License, or (at your option) any later version.
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11 *
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12 * FFmpeg is distributed in the hope that it will be useful,
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13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 * Lesser General Public License for more details.
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16 *
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17 * You should have received a copy of the GNU Lesser General Public
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18 * License along with FFmpeg; if not, write to the Free Software
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19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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20 *
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21 */
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22
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23 /**
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24 * @file cabac.h
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25 * Context Adaptive Binary Arithmetic Coder.
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26 */
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27
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28
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29 //#undef NDEBUG
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30 #include <assert.h>
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31 #ifdef ARCH_X86
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32 #include "x86_cpu.h"
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33 #endif
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34
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35 #define CABAC_BITS 16
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36 #define CABAC_MASK ((1<<CABAC_BITS)-1)
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37 #define BRANCHLESS_CABAC_DECODER 1
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38 //#define ARCH_X86_DISABLED 1
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39
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40 typedef struct CABACContext{
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41 int low;
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42 int range;
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43 int outstanding_count;
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44 #ifdef STRICT_LIMITS
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45 int symCount;
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46 #endif
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47 const uint8_t *bytestream_start;
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48 const uint8_t *bytestream;
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49 const uint8_t *bytestream_end;
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50 PutBitContext pb;
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51 }CABACContext;
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52
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53 extern uint8_t ff_h264_mlps_state[4*64];
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54 extern uint8_t ff_h264_lps_range[4*2*64]; ///< rangeTabLPS
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55 extern uint8_t ff_h264_mps_state[2*64]; ///< transIdxMPS
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56 extern uint8_t ff_h264_lps_state[2*64]; ///< transIdxLPS
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57 extern const uint8_t ff_h264_norm_shift[512];
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58
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59
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60 void ff_init_cabac_encoder(CABACContext *c, uint8_t *buf, int buf_size);
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61 void ff_init_cabac_decoder(CABACContext *c, const uint8_t *buf, int buf_size);
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62 void ff_init_cabac_states(CABACContext *c);
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63
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64
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65 static inline void put_cabac_bit(CABACContext *c, int b){
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66 put_bits(&c->pb, 1, b);
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67 for(;c->outstanding_count; c->outstanding_count--){
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68 put_bits(&c->pb, 1, 1-b);
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69 }
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70 }
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71
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72 static inline void renorm_cabac_encoder(CABACContext *c){
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73 while(c->range < 0x100){
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74 //FIXME optimize
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75 if(c->low<0x100){
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76 put_cabac_bit(c, 0);
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77 }else if(c->low<0x200){
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78 c->outstanding_count++;
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79 c->low -= 0x100;
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80 }else{
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81 put_cabac_bit(c, 1);
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82 c->low -= 0x200;
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83 }
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84
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85 c->range+= c->range;
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86 c->low += c->low;
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87 }
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88 }
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89
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90 static void put_cabac(CABACContext *c, uint8_t * const state, int bit){
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91 int RangeLPS= ff_h264_lps_range[2*(c->range&0xC0) + *state];
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92
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93 if(bit == ((*state)&1)){
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94 c->range -= RangeLPS;
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95 *state= ff_h264_mps_state[*state];
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96 }else{
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97 c->low += c->range - RangeLPS;
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98 c->range = RangeLPS;
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99 *state= ff_h264_lps_state[*state];
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100 }
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101
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102 renorm_cabac_encoder(c);
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103
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104 #ifdef STRICT_LIMITS
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105 c->symCount++;
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106 #endif
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107 }
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108
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109 static void put_cabac_static(CABACContext *c, int RangeLPS, int bit){
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110 assert(c->range > RangeLPS);
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111
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112 if(!bit){
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113 c->range -= RangeLPS;
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114 }else{
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115 c->low += c->range - RangeLPS;
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116 c->range = RangeLPS;
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117 }
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118
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119 renorm_cabac_encoder(c);
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120
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121 #ifdef STRICT_LIMITS
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122 c->symCount++;
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123 #endif
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124 }
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125
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126 /**
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127 * @param bit 0 -> write zero bit, !=0 write one bit
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128 */
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129 static void put_cabac_bypass(CABACContext *c, int bit){
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130 c->low += c->low;
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131
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132 if(bit){
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133 c->low += c->range;
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134 }
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135 //FIXME optimize
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136 if(c->low<0x200){
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137 put_cabac_bit(c, 0);
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138 }else if(c->low<0x400){
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139 c->outstanding_count++;
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140 c->low -= 0x200;
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141 }else{
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142 put_cabac_bit(c, 1);
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143 c->low -= 0x400;
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144 }
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145
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146 #ifdef STRICT_LIMITS
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147 c->symCount++;
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148 #endif
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149 }
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150
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151 /**
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152 *
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153 * @return the number of bytes written
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154 */
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155 static int put_cabac_terminate(CABACContext *c, int bit){
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156 c->range -= 2;
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157
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158 if(!bit){
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159 renorm_cabac_encoder(c);
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160 }else{
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161 c->low += c->range;
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162 c->range= 2;
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163
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164 renorm_cabac_encoder(c);
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165
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166 assert(c->low <= 0x1FF);
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167 put_cabac_bit(c, c->low>>9);
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168 put_bits(&c->pb, 2, ((c->low>>7)&3)|1);
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169
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170 flush_put_bits(&c->pb); //FIXME FIXME FIXME XXX wrong
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171 }
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172
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173 #ifdef STRICT_LIMITS
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174 c->symCount++;
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175 #endif
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176
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177 return (put_bits_count(&c->pb)+7)>>3;
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178 }
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179
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180 /**
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181 * put (truncated) unary binarization.
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182 */
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183 static void put_cabac_u(CABACContext *c, uint8_t * state, int v, int max, int max_index, int truncated){
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184 int i;
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185
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186 assert(v <= max);
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187
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188 #if 1
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189 for(i=0; i<v; i++){
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190 put_cabac(c, state, 1);
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191 if(i < max_index) state++;
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192 }
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193 if(truncated==0 || v<max)
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194 put_cabac(c, state, 0);
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195 #else
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196 if(v <= max_index){
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197 for(i=0; i<v; i++){
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198 put_cabac(c, state+i, 1);
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199 }
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200 if(truncated==0 || v<max)
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201 put_cabac(c, state+i, 0);
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202 }else{
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203 for(i=0; i<=max_index; i++){
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204 put_cabac(c, state+i, 1);
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205 }
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206 for(; i<v; i++){
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207 put_cabac(c, state+max_index, 1);
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208 }
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209 if(truncated==0 || v<max)
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210 put_cabac(c, state+max_index, 0);
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211 }
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212 #endif
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213 }
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214
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215 /**
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216 * put unary exp golomb k-th order binarization.
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217 */
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218 static void put_cabac_ueg(CABACContext *c, uint8_t * state, int v, int max, int is_signed, int k, int max_index){
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219 int i;
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220
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221 if(v==0)
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222 put_cabac(c, state, 0);
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223 else{
1298
5bc3184810dc cleanup
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224 const int sign= v < 0;
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225
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34fdffe98bd0 Rename ABS macro to FFABS.
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diff changeset
226 if(is_signed) v= FFABS(v);
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diff changeset
227
1290
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228 if(v<max){
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229 for(i=0; i<v; i++){
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230 put_cabac(c, state, 1);
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diff changeset
231 if(i < max_index) state++;
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232 }
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233
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234 put_cabac(c, state, 0);
dae280b939ca (truncated) unary binerization
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235 }else{
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236 int m= 1<<k;
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237
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diff changeset
238 for(i=0; i<max; i++){
dae280b939ca (truncated) unary binerization
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239 put_cabac(c, state, 1);
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diff changeset
240 if(i < max_index) state++;
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241 }
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242
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diff changeset
243 v -= max;
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244 while(v >= m){ //FIXME optimize
dae280b939ca (truncated) unary binerization
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245 put_cabac_bypass(c, 1);
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246 v-= m;
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247 m+= m;
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248 }
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249 put_cabac_bypass(c, 0);
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250 while(m>>=1){
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251 put_cabac_bypass(c, v&m);
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252 }
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253 }
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254
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diff changeset
255 if(is_signed)
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256 put_cabac_bypass(c, sign);
dae280b939ca (truncated) unary binerization
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parents: 1287
diff changeset
257 }
dae280b939ca (truncated) unary binerization
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diff changeset
258 }
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259
2323
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260 static void refill(CABACContext *c){
1c39d9786efd optimization
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261 #if CABAC_BITS == 16
3946
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262 c->low+= (c->bytestream[0]<<9) + (c->bytestream[1]<<1);
2323
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263 #else
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264 c->low+= c->bytestream[0]<<1;
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265 #endif
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266 c->low -= CABAC_MASK;
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267 c->bytestream+= CABAC_BITS/8;
1c39d9786efd optimization
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parents: 2116
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268 }
1c39d9786efd optimization
michael
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269
1c39d9786efd optimization
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diff changeset
270 static void refill2(CABACContext *c){
1c39d9786efd optimization
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271 int i, x;
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michael
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272
1c39d9786efd optimization
michael
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273 x= c->low ^ (c->low-1);
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
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274 i= 7 - ff_h264_norm_shift[x>>(CABAC_BITS-1)];
2323
1c39d9786efd optimization
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275
1c39d9786efd optimization
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276 x= -CABAC_MASK;
2967
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diego
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277
2323
1c39d9786efd optimization
michael
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diff changeset
278 #if CABAC_BITS == 16
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279 x+= (c->bytestream[0]<<9) + (c->bytestream[1]<<1);
1c39d9786efd optimization
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parents: 2116
diff changeset
280 #else
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281 x+= c->bytestream[0]<<1;
1c39d9786efd optimization
michael
parents: 2116
diff changeset
282 #endif
2967
ef2149182f1c COSMETICS: Remove all trailing whitespace.
diego
parents: 2736
diff changeset
283
2323
1c39d9786efd optimization
michael
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diff changeset
284 c->low += x<<i;
1c39d9786efd optimization
michael
parents: 2116
diff changeset
285 c->bytestream+= CABAC_BITS/8;
1c39d9786efd optimization
michael
parents: 2116
diff changeset
286 }
1c39d9786efd optimization
michael
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287
1287
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parents:
diff changeset
288 static inline void renorm_cabac_decoder(CABACContext *c){
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
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diff changeset
289 while(c->range < 0x100){
1287
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parents:
diff changeset
290 c->range+= c->range;
michaelni
parents:
diff changeset
291 c->low+= c->low;
2323
1c39d9786efd optimization
michael
parents: 2116
diff changeset
292 if(!(c->low & CABAC_MASK))
1c39d9786efd optimization
michael
parents: 2116
diff changeset
293 refill(c);
1287
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parents:
diff changeset
294 }
michaelni
parents:
diff changeset
295 }
michaelni
parents:
diff changeset
296
2323
1c39d9786efd optimization
michael
parents: 2116
diff changeset
297 static inline void renorm_cabac_decoder_once(CABACContext *c){
3951
751bfc30df72 disable benchmarking code
michael
parents: 3950
diff changeset
298 #ifdef ARCH_X86_DISABLED
3943
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
299 int temp;
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
300 #if 0
3950
900d21b85dd6 renorm_cabac_decoder_once START/STOP_TIMER scores for athlon
michael
parents: 3948
diff changeset
301 //P3:683 athlon:475
3943
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
302 asm(
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
303 "lea -0x100(%0), %2 \n\t"
3943
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
304 "shr $31, %2 \n\t" //FIXME 31->63 for x86-64
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
305 "shl %%cl, %0 \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
306 "shl %%cl, %1 \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
307 : "+r"(c->range), "+r"(c->low), "+c"(temp)
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
308 );
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
309 #elif 0
3950
900d21b85dd6 renorm_cabac_decoder_once START/STOP_TIMER scores for athlon
michael
parents: 3948
diff changeset
310 //P3:680 athlon:474
3943
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
311 asm(
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
312 "cmp $0x100, %0 \n\t"
3943
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
313 "setb %%cl \n\t" //FIXME 31->63 for x86-64
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
314 "shl %%cl, %0 \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
315 "shl %%cl, %1 \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
316 : "+r"(c->range), "+r"(c->low), "+c"(temp)
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
317 );
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
318 #elif 1
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
319 int temp2;
3950
900d21b85dd6 renorm_cabac_decoder_once START/STOP_TIMER scores for athlon
michael
parents: 3948
diff changeset
320 //P3:665 athlon:517
3943
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
321 asm(
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
322 "lea -0x100(%0), %%eax \n\t"
3943
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
323 "cdq \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
324 "mov %0, %%eax \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
325 "and %%edx, %0 \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
326 "and %1, %%edx \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
327 "add %%eax, %0 \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
328 "add %%edx, %1 \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
329 : "+r"(c->range), "+r"(c->low), "+a"(temp), "+d"(temp2)
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
330 );
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
331 #elif 0
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
332 int temp2;
3950
900d21b85dd6 renorm_cabac_decoder_once START/STOP_TIMER scores for athlon
michael
parents: 3948
diff changeset
333 //P3:673 athlon:509
3943
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
334 asm(
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
335 "cmp $0x100, %0 \n\t"
3943
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
336 "sbb %%edx, %%edx \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
337 "mov %0, %%eax \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
338 "and %%edx, %0 \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
339 "and %1, %%edx \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
340 "add %%eax, %0 \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
341 "add %%edx, %1 \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
342 : "+r"(c->range), "+r"(c->low), "+a"(temp), "+d"(temp2)
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
343 );
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
344 #else
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
345 int temp2;
3950
900d21b85dd6 renorm_cabac_decoder_once START/STOP_TIMER scores for athlon
michael
parents: 3948
diff changeset
346 //P3:677 athlon:511
3943
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
347 asm(
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
348 "cmp $0x100, %0 \n\t"
3943
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
349 "lea (%0, %0), %%eax \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
350 "lea (%1, %1), %%edx \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
351 "cmovb %%eax, %0 \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
352 "cmovb %%edx, %1 \n\t"
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
353 : "+r"(c->range), "+r"(c->low), "+a"(temp), "+d"(temp2)
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
354 );
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
355 #endif
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
356 #else
3950
900d21b85dd6 renorm_cabac_decoder_once START/STOP_TIMER scores for athlon
michael
parents: 3948
diff changeset
357 //P3:675 athlon:476
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
358 int shift= (uint32_t)(c->range - 0x100)>>31;
3642
0efda682253c tweak cabac. 0.5% faster h264.
lorenm
parents: 3284
diff changeset
359 c->range<<= shift;
0efda682253c tweak cabac. 0.5% faster h264.
lorenm
parents: 3284
diff changeset
360 c->low <<= shift;
3943
811a9b0d9f32 several x86 renorm_cabac_decoder_once optimizations
michael
parents: 3928
diff changeset
361 #endif
2323
1c39d9786efd optimization
michael
parents: 2116
diff changeset
362 if(!(c->low & CABAC_MASK))
1c39d9786efd optimization
michael
parents: 2116
diff changeset
363 refill(c);
1c39d9786efd optimization
michael
parents: 2116
diff changeset
364 }
1c39d9786efd optimization
michael
parents: 2116
diff changeset
365
4908
777f250df232 Fix multiple "¡Æinline/static¡Ç is not at beginning of declaration" warnings.
diego
parents: 4882
diff changeset
366 static av_always_inline int get_cabac_inline(CABACContext *c, uint8_t * const state){
3642
0efda682253c tweak cabac. 0.5% faster h264.
lorenm
parents: 3284
diff changeset
367 //FIXME gcc generates duplicate load/stores for c->low and c->range
3969
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
368 #define LOW "0"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
369 #define RANGE "4"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
370 #ifdef ARCH_X86_64
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
371 #define BYTESTART "16"
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
372 #define BYTE "24"
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
373 #define BYTEEND "32"
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
374 #else
3993
8b7c59b7af01 make state transition tables global as they are constant and the code is slightly faster that way
michael
parents: 3992
diff changeset
375 #define BYTESTART "12"
8b7c59b7af01 make state transition tables global as they are constant and the code is slightly faster that way
michael
parents: 3992
diff changeset
376 #define BYTE "16"
8b7c59b7af01 make state transition tables global as they are constant and the code is slightly faster that way
michael
parents: 3992
diff changeset
377 #define BYTEEND "20"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
378 #endif
4882
8131ccb4ea72 Mark code parts that cannot work on AMD64 due to broken relocations as such.
diego
parents: 4881
diff changeset
379 #if defined(ARCH_X86) && defined(CONFIG_7REGS) && defined(HAVE_EBX_AVAILABLE) && !defined(BROKEN_RELOCATIONS)
4044
5ccdefd60f61 Fix PIC compilation, some defines were under #ifdef !PIC but used
diego
parents: 4043
diff changeset
380 int bit;
5ccdefd60f61 Fix PIC compilation, some defines were under #ifdef !PIC but used
diego
parents: 4043
diff changeset
381
3984
bb186452e7da BRANCHLESS_CABAD --> BRANCHLESS_CABAC_DECODER
diego
parents: 3982
diff changeset
382 #ifndef BRANCHLESS_CABAC_DECODER
3969
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
383 asm volatile(
4035
b7f31a32bb30 cosmetic (%%eax->%0)
michael
parents: 4034
diff changeset
384 "movzbl (%1), %0 \n\t"
3969
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
385 "movl "RANGE "(%2), %%ebx \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
386 "movl "RANGE "(%2), %%edx \n\t"
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
387 "andl $0xC0, %%ebx \n\t"
4035
b7f31a32bb30 cosmetic (%%eax->%0)
michael
parents: 4034
diff changeset
388 "movzbl "MANGLE(ff_h264_lps_range)"(%0, %%ebx, 2), %%esi\n\t"
3969
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
389 "movl "LOW "(%2), %%ebx \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
390 //eax:state ebx:low, edx:range, esi:RangeLPS
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
391 "subl %%esi, %%edx \n\t"
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
392 "movl %%edx, %%ecx \n\t"
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
393 "shll $17, %%ecx \n\t"
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
394 "cmpl %%ecx, %%ebx \n\t"
3969
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
395 " ja 1f \n\t"
3999
6cbad3675632 slightly faster on P3 slightly slower on athlon and probably faster on P4
michael
parents: 3996
diff changeset
396
6cbad3675632 slightly faster on P3 slightly slower on athlon and probably faster on P4
michael
parents: 3996
diff changeset
397 #if 1
6cbad3675632 slightly faster on P3 slightly slower on athlon and probably faster on P4
michael
parents: 3996
diff changeset
398 //athlon:4067 P3:4110
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
399 "lea -0x100(%%edx), %%ecx \n\t"
3999
6cbad3675632 slightly faster on P3 slightly slower on athlon and probably faster on P4
michael
parents: 3996
diff changeset
400 "shr $31, %%ecx \n\t"
6cbad3675632 slightly faster on P3 slightly slower on athlon and probably faster on P4
michael
parents: 3996
diff changeset
401 "shl %%cl, %%edx \n\t"
6cbad3675632 slightly faster on P3 slightly slower on athlon and probably faster on P4
michael
parents: 3996
diff changeset
402 "shl %%cl, %%ebx \n\t"
6cbad3675632 slightly faster on P3 slightly slower on athlon and probably faster on P4
michael
parents: 3996
diff changeset
403 #else
6cbad3675632 slightly faster on P3 slightly slower on athlon and probably faster on P4
michael
parents: 3996
diff changeset
404 //athlon:4057 P3:4130
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
405 "cmp $0x100, %%edx \n\t" //FIXME avoidable
3969
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
406 "setb %%cl \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
407 "shl %%cl, %%edx \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
408 "shl %%cl, %%ebx \n\t"
3999
6cbad3675632 slightly faster on P3 slightly slower on athlon and probably faster on P4
michael
parents: 3996
diff changeset
409 #endif
4035
b7f31a32bb30 cosmetic (%%eax->%0)
michael
parents: 4034
diff changeset
410 "movzbl "MANGLE(ff_h264_mps_state)"(%0), %%ecx \n\t"
3969
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
411 "movb %%cl, (%1) \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
412 //eax:state ebx:low, edx:range, esi:RangeLPS
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
413 "test %%bx, %%bx \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
414 " jnz 2f \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
415 "mov "BYTE "(%2), %%"REG_S" \n\t"
3969
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
416 "subl $0xFFFF, %%ebx \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
417 "movzwl (%%"REG_S"), %%ecx \n\t"
3969
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
418 "bswap %%ecx \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
419 "shrl $15, %%ecx \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
420 "add $2, %%"REG_S" \n\t"
3969
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
421 "addl %%ecx, %%ebx \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
422 "mov %%"REG_S", "BYTE "(%2) \n\t"
3969
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
423 "jmp 2f \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
424 "1: \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
425 //eax:state ebx:low, edx:range, esi:RangeLPS
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
426 "subl %%ecx, %%ebx \n\t"
3969
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
427 "movl %%esi, %%edx \n\t"
3979
ce16f66a48ad reading 8bit mem into a 8bit register needs 2 uops on P4, 8bit->32bit with zero extension needs just 1
michael
parents: 3978
diff changeset
428 "movzbl " MANGLE(ff_h264_norm_shift) "(%%esi), %%ecx \n\t"
3969
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
429 "shll %%cl, %%ebx \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
430 "shll %%cl, %%edx \n\t"
4035
b7f31a32bb30 cosmetic (%%eax->%0)
michael
parents: 4034
diff changeset
431 "movzbl "MANGLE(ff_h264_lps_state)"(%0), %%ecx \n\t"
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
432 "movb %%cl, (%1) \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
433 "add $1, %0 \n\t"
3969
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
434 "test %%bx, %%bx \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
435 " jnz 2f \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
436
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
437 "mov "BYTE "(%2), %%"REG_c" \n\t"
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
438 "movzwl (%%"REG_c"), %%esi \n\t"
3969
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
439 "bswap %%esi \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
440 "shrl $15, %%esi \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
441 "subl $0xFFFF, %%esi \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
442 "add $2, %%"REG_c" \n\t"
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
443 "mov %%"REG_c", "BYTE "(%2) \n\t"
3969
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
444
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
445 "leal -1(%%ebx), %%ecx \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
446 "xorl %%ebx, %%ecx \n\t"
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
447 "shrl $15, %%ecx \n\t"
3979
ce16f66a48ad reading 8bit mem into a 8bit register needs 2 uops on P4, 8bit->32bit with zero extension needs just 1
michael
parents: 3978
diff changeset
448 "movzbl " MANGLE(ff_h264_norm_shift) "(%%ecx), %%ecx \n\t"
3994
2734b228fc87 use ecx instead of cl (no speed change on P3 but might avoid partial register stalls on some cpus)
michael
parents: 3993
diff changeset
449 "neg %%ecx \n\t"
2734b228fc87 use ecx instead of cl (no speed change on P3 but might avoid partial register stalls on some cpus)
michael
parents: 3993
diff changeset
450 "add $7, %%ecx \n\t"
3969
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
451
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
452 "shll %%cl , %%esi \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
453 "addl %%esi, %%ebx \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
454 "2: \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
455 "movl %%edx, "RANGE "(%2) \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
456 "movl %%ebx, "LOW "(%2) \n\t"
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
457 :"=&a"(bit) //FIXME this is fragile gcc either runs out of registers or misscompiles it (for example if "+a"(bit) or "+m"(*state) is used
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
458 :"r"(state), "r"(c)
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
459 : "%"REG_c, "%ebx", "%edx", "%"REG_S, "memory"
3969
fc6e0942353b first try of a handwritten get_cabac() for x86, this is 10-20% faster on P3 depening on if you try to subtract the START/STOP_TIMER overhead
michael
parents: 3967
diff changeset
460 );
3982
af16271634c2 moving another bit&1 out, this is as fast as with it in there, but it makes more sense with it outside of the loop
michael
parents: 3981
diff changeset
461 bit&=1;
4002
ec426fa57dfe adds some useful comments after some of the #else, #elseif,
gpoirier
parents: 4001
diff changeset
462 #else /* BRANCHLESS_CABAC_DECODER */
4046
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
463
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
464
4418
4cceb7c877af rename CMOV_IS_FAST to HAVE_FAST_CMOV and simplify configure
mru
parents: 4345
diff changeset
465 #if defined HAVE_FAST_CMOV
4046
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
466 #define BRANCHLESS_GET_CABAC_UPDATE(ret, cabac, statep, low, lowword, range, tmp, tmpbyte)\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
467 "mov "tmp" , %%ecx \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
468 "shl $17 , "tmp" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
469 "cmp "low" , "tmp" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
470 "cmova %%ecx , "range" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
471 "sbb %%ecx , %%ecx \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
472 "and %%ecx , "tmp" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
473 "sub "tmp" , "low" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
474 "xor %%ecx , "ret" \n\t"
4418
4cceb7c877af rename CMOV_IS_FAST to HAVE_FAST_CMOV and simplify configure
mru
parents: 4345
diff changeset
475 #else /* HAVE_FAST_CMOV */
4046
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
476 #define BRANCHLESS_GET_CABAC_UPDATE(ret, cabac, statep, low, lowword, range, tmp, tmpbyte)\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
477 "mov "tmp" , %%ecx \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
478 "shl $17 , "tmp" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
479 "sub "low" , "tmp" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
480 "sar $31 , "tmp" \n\t" /*lps_mask*/\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
481 "sub %%ecx , "range" \n\t" /*RangeLPS - range*/\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
482 "and "tmp" , "range" \n\t" /*(RangeLPS - range)&lps_mask*/\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
483 "add %%ecx , "range" \n\t" /*new range*/\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
484 "shl $17 , %%ecx \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
485 "and "tmp" , %%ecx \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
486 "sub %%ecx , "low" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
487 "xor "tmp" , "ret" \n\t"
4418
4cceb7c877af rename CMOV_IS_FAST to HAVE_FAST_CMOV and simplify configure
mru
parents: 4345
diff changeset
488 #endif /* HAVE_FAST_CMOV */
3975
6cc9eb5ee5e3 x86 branchless cabac decoder
michael
parents: 3974
diff changeset
489
6cc9eb5ee5e3 x86 branchless cabac decoder
michael
parents: 3974
diff changeset
490
4046
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
491 #define BRANCHLESS_GET_CABAC(ret, cabac, statep, low, lowword, range, tmp, tmpbyte)\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
492 "movzbl "statep" , "ret" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
493 "mov "range" , "tmp" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
494 "and $0xC0 , "range" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
495 "movzbl "MANGLE(ff_h264_lps_range)"("ret", "range", 2), "range" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
496 "sub "range" , "tmp" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
497 BRANCHLESS_GET_CABAC_UPDATE(ret, cabac, statep, low, lowword, range, tmp, tmpbyte)\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
498 "movzbl " MANGLE(ff_h264_norm_shift) "("range"), %%ecx \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
499 "shl %%cl , "range" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
500 "movzbl "MANGLE(ff_h264_mlps_state)"+128("ret"), "tmp" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
501 "mov "tmpbyte" , "statep" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
502 "shl %%cl , "low" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
503 "test "lowword" , "lowword" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
504 " jnz 1f \n\t"\
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
505 "mov "BYTE"("cabac"), %%"REG_c" \n\t"\
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
506 "movzwl (%%"REG_c") , "tmp" \n\t"\
4046
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
507 "bswap "tmp" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
508 "shr $15 , "tmp" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
509 "sub $0xFFFF , "tmp" \n\t"\
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
510 "add $2 , %%"REG_c" \n\t"\
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
511 "mov %%"REG_c" , "BYTE "("cabac") \n\t"\
4046
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
512 "lea -1("low") , %%ecx \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
513 "xor "low" , %%ecx \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
514 "shr $15 , %%ecx \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
515 "movzbl " MANGLE(ff_h264_norm_shift) "(%%ecx), %%ecx \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
516 "neg %%ecx \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
517 "add $7 , %%ecx \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
518 "shl %%cl , "tmp" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
519 "add "tmp" , "low" \n\t"\
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
520 "1: \n\t"
3975
6cc9eb5ee5e3 x86 branchless cabac decoder
michael
parents: 3974
diff changeset
521
4046
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
522 asm volatile(
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
523 "movl "RANGE "(%2), %%esi \n\t"
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
524 "movl "LOW "(%2), %%ebx \n\t"
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
525 BRANCHLESS_GET_CABAC("%0", "%2", "(%1)", "%%ebx", "%%bx", "%%esi", "%%edx", "%%dl")
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
526 "movl %%esi, "RANGE "(%2) \n\t"
8bbc695c9603 factorize get_cabac asm (0.5% slower but its much cleaner)
michael
parents: 4044
diff changeset
527 "movl %%ebx, "LOW "(%2) \n\t"
3975
6cc9eb5ee5e3 x86 branchless cabac decoder
michael
parents: 3974
diff changeset
528
6cc9eb5ee5e3 x86 branchless cabac decoder
michael
parents: 3974
diff changeset
529 :"=&a"(bit)
6cc9eb5ee5e3 x86 branchless cabac decoder
michael
parents: 3974
diff changeset
530 :"r"(state), "r"(c)
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
531 : "%"REG_c, "%ebx", "%edx", "%esi", "memory"
3975
6cc9eb5ee5e3 x86 branchless cabac decoder
michael
parents: 3974
diff changeset
532 );
3981
9854f686ba79 move the &1 out of the asm so gcc can optimize it away in inlined cases (yes this is slightly faster)
michael
parents: 3980
diff changeset
533 bit&=1;
4002
ec426fa57dfe adds some useful comments after some of the #else, #elseif,
gpoirier
parents: 4001
diff changeset
534 #endif /* BRANCHLESS_CABAC_DECODER */
4882
8131ccb4ea72 Mark code parts that cannot work on AMD64 due to broken relocations as such.
diego
parents: 4881
diff changeset
535 #else /* defined(ARCH_X86) && defined(CONFIG_7REGS) && defined(HAVE_EBX_AVAILABLE) && !defined(BROKEN_RELOCATIONS) */
3642
0efda682253c tweak cabac. 0.5% faster h264.
lorenm
parents: 3284
diff changeset
536 int s = *state;
4039
866a83726985 Kill a warning with MSVC
gpoirier
parents: 4037
diff changeset
537 int RangeLPS= ff_h264_lps_range[2*(c->range&0xC0) + s];
2522
e25782262d7d kill warnings patch by (M«©ns Rullg«©rd <mru inprovide com>)
michael
parents: 2323
diff changeset
538 int bit, lps_mask attribute_unused;
2967
ef2149182f1c COSMETICS: Remove all trailing whitespace.
diego
parents: 2736
diff changeset
539
1287
michaelni
parents:
diff changeset
540 c->range -= RangeLPS;
3984
bb186452e7da BRANCHLESS_CABAD --> BRANCHLESS_CABAC_DECODER
diego
parents: 3982
diff changeset
541 #ifndef BRANCHLESS_CABAC_DECODER
4345
88967250d718 replace a few hardcoded numbers with their correct named ones
michael
parents: 4283
diff changeset
542 if(c->low < (c->range<<(CABAC_BITS+1))){
3642
0efda682253c tweak cabac. 0.5% faster h264.
lorenm
parents: 3284
diff changeset
543 bit= s&1;
3993
8b7c59b7af01 make state transition tables global as they are constant and the code is slightly faster that way
michael
parents: 3992
diff changeset
544 *state= ff_h264_mps_state[s];
2323
1c39d9786efd optimization
michael
parents: 2116
diff changeset
545 renorm_cabac_decoder_once(c);
1287
michaelni
parents:
diff changeset
546 }else{
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
547 bit= ff_h264_norm_shift[RangeLPS];
4345
88967250d718 replace a few hardcoded numbers with their correct named ones
michael
parents: 4283
diff changeset
548 c->low -= (c->range<<(CABAC_BITS+1));
3993
8b7c59b7af01 make state transition tables global as they are constant and the code is slightly faster that way
michael
parents: 3992
diff changeset
549 *state= ff_h264_lps_state[s];
3956
0910f2844f9a branchless renormalization (1% faster get_cabac) old branchless renormalization wasnt faster because gcc was scared of the shift variable (missusing bit variable now)
michael
parents: 3955
diff changeset
550 c->range = RangeLPS<<bit;
0910f2844f9a branchless renormalization (1% faster get_cabac) old branchless renormalization wasnt faster because gcc was scared of the shift variable (missusing bit variable now)
michael
parents: 3955
diff changeset
551 c->low <<= bit;
0910f2844f9a branchless renormalization (1% faster get_cabac) old branchless renormalization wasnt faster because gcc was scared of the shift variable (missusing bit variable now)
michael
parents: 3955
diff changeset
552 bit= (s&1)^1;
0910f2844f9a branchless renormalization (1% faster get_cabac) old branchless renormalization wasnt faster because gcc was scared of the shift variable (missusing bit variable now)
michael
parents: 3955
diff changeset
553
4345
88967250d718 replace a few hardcoded numbers with their correct named ones
michael
parents: 4283
diff changeset
554 if(!(c->low & CABAC_MASK)){
2323
1c39d9786efd optimization
michael
parents: 2116
diff changeset
555 refill2(c);
3956
0910f2844f9a branchless renormalization (1% faster get_cabac) old branchless renormalization wasnt faster because gcc was scared of the shift variable (missusing bit variable now)
michael
parents: 3955
diff changeset
556 }
1287
michaelni
parents:
diff changeset
557 }
4002
ec426fa57dfe adds some useful comments after some of the #else, #elseif,
gpoirier
parents: 4001
diff changeset
558 #else /* BRANCHLESS_CABAC_DECODER */
4345
88967250d718 replace a few hardcoded numbers with their correct named ones
michael
parents: 4283
diff changeset
559 lps_mask= ((c->range<<(CABAC_BITS+1)) - c->low)>>31;
2967
ef2149182f1c COSMETICS: Remove all trailing whitespace.
diego
parents: 2736
diff changeset
560
4345
88967250d718 replace a few hardcoded numbers with their correct named ones
michael
parents: 4283
diff changeset
561 c->low -= (c->range<<(CABAC_BITS+1)) & lps_mask;
2323
1c39d9786efd optimization
michael
parents: 2116
diff changeset
562 c->range += (RangeLPS - c->range) & lps_mask;
2967
ef2149182f1c COSMETICS: Remove all trailing whitespace.
diego
parents: 2736
diff changeset
563
3974
93746612bc78 optimize branchless C CABAC decoder
michael
parents: 3972
diff changeset
564 s^=lps_mask;
4014
b2582438effe dehack *ps_state indexing in the branchless decoder
michael
parents: 4012
diff changeset
565 *state= (ff_h264_mlps_state+128)[s];
3974
93746612bc78 optimize branchless C CABAC decoder
michael
parents: 3972
diff changeset
566 bit= s&1;
2967
ef2149182f1c COSMETICS: Remove all trailing whitespace.
diego
parents: 2736
diff changeset
567
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
568 lps_mask= ff_h264_norm_shift[c->range];
2323
1c39d9786efd optimization
michael
parents: 2116
diff changeset
569 c->range<<= lps_mask;
1c39d9786efd optimization
michael
parents: 2116
diff changeset
570 c->low <<= lps_mask;
1c39d9786efd optimization
michael
parents: 2116
diff changeset
571 if(!(c->low & CABAC_MASK))
1c39d9786efd optimization
michael
parents: 2116
diff changeset
572 refill2(c);
4002
ec426fa57dfe adds some useful comments after some of the #else, #elseif,
gpoirier
parents: 4001
diff changeset
573 #endif /* BRANCHLESS_CABAC_DECODER */
4882
8131ccb4ea72 Mark code parts that cannot work on AMD64 due to broken relocations as such.
diego
parents: 4881
diff changeset
574 #endif /* defined(ARCH_X86) && defined(CONFIG_7REGS) && defined(HAVE_EBX_AVAILABLE) && !defined(BROKEN_RELOCATIONS) */
2967
ef2149182f1c COSMETICS: Remove all trailing whitespace.
diego
parents: 2736
diff changeset
575 return bit;
1287
michaelni
parents:
diff changeset
576 }
michaelni
parents:
diff changeset
577
4579
03f7feb14dd3 use av_noinline instead of __attribute((noinline))
aurel
parents: 4418
diff changeset
578 static int av_noinline get_cabac_noinline(CABACContext *c, uint8_t * const state){
4008
b636f3d59283 prevent "mb level" get_cabac() calls from being inlined (3% faster decode_mb_cabac() on P3)
michael
parents: 4002
diff changeset
579 return get_cabac_inline(c,state);
b636f3d59283 prevent "mb level" get_cabac() calls from being inlined (3% faster decode_mb_cabac() on P3)
michael
parents: 4002
diff changeset
580 }
b636f3d59283 prevent "mb level" get_cabac() calls from being inlined (3% faster decode_mb_cabac() on P3)
michael
parents: 4002
diff changeset
581
b636f3d59283 prevent "mb level" get_cabac() calls from being inlined (3% faster decode_mb_cabac() on P3)
michael
parents: 4002
diff changeset
582 static int get_cabac(CABACContext *c, uint8_t * const state){
b636f3d59283 prevent "mb level" get_cabac() calls from being inlined (3% faster decode_mb_cabac() on P3)
michael
parents: 4002
diff changeset
583 return get_cabac_inline(c,state);
b636f3d59283 prevent "mb level" get_cabac() calls from being inlined (3% faster decode_mb_cabac() on P3)
michael
parents: 4002
diff changeset
584 }
b636f3d59283 prevent "mb level" get_cabac() calls from being inlined (3% faster decode_mb_cabac() on P3)
michael
parents: 4002
diff changeset
585
3928
987fffdf6ae7 don't try to inline cabac functions. gcc ignored the hint anyway, and forcing it would make h264 slower.
lorenm
parents: 3642
diff changeset
586 static int get_cabac_bypass(CABACContext *c){
4040
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
587 #if 0 //not faster
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
588 int bit;
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
589 asm volatile(
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
590 "movl "RANGE "(%1), %%ebx \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
591 "movl "LOW "(%1), %%eax \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
592 "shl $17, %%ebx \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
593 "add %%eax, %%eax \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
594 "sub %%ebx, %%eax \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
595 "cdq \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
596 "and %%edx, %%ebx \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
597 "add %%ebx, %%eax \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
598 "test %%ax, %%ax \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
599 " jnz 1f \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
600 "movl "BYTE "(%1), %%"REG_b" \n\t"
4040
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
601 "subl $0xFFFF, %%eax \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
602 "movzwl (%%"REG_b"), %%ecx \n\t"
4040
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
603 "bswap %%ecx \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
604 "shrl $15, %%ecx \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
605 "addl $2, %%"REG_b" \n\t"
4040
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
606 "addl %%ecx, %%eax \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
607 "movl %%"REG_b", "BYTE "(%1) \n\t"
4040
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
608 "1: \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
609 "movl %%eax, "LOW "(%1) \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
610
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
611 :"=&d"(bit)
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
612 :"r"(c)
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
613 : "%eax", "%"REG_b, "%ecx", "memory"
4040
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
614 );
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
615 return bit+1;
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
616 #else
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
617 int range;
1287
michaelni
parents:
diff changeset
618 c->low += c->low;
michaelni
parents:
diff changeset
619
2323
1c39d9786efd optimization
michael
parents: 2116
diff changeset
620 if(!(c->low & CABAC_MASK))
1c39d9786efd optimization
michael
parents: 2116
diff changeset
621 refill(c);
2967
ef2149182f1c COSMETICS: Remove all trailing whitespace.
diego
parents: 2736
diff changeset
622
4345
88967250d718 replace a few hardcoded numbers with their correct named ones
michael
parents: 4283
diff changeset
623 range= c->range<<(CABAC_BITS+1);
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
624 if(c->low < range){
1287
michaelni
parents:
diff changeset
625 return 0;
michaelni
parents:
diff changeset
626 }else{
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
627 c->low -= range;
1287
michaelni
parents:
diff changeset
628 return 1;
michaelni
parents:
diff changeset
629 }
4040
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
630 #endif
1287
michaelni
parents:
diff changeset
631 }
4040
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
632
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
633
4283
d6f83e2f8804 rename always_inline to av_always_inline and move to common.h
mru
parents: 4241
diff changeset
634 static av_always_inline int get_cabac_bypass_sign(CABACContext *c, int val){
4241
92f773cfebf5 PIC fix
michael
parents: 4113
diff changeset
635 #if defined(ARCH_X86) && !(defined(PIC) && defined(__GNUC__))
4040
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
636 asm volatile(
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
637 "movl "RANGE "(%1), %%ebx \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
638 "movl "LOW "(%1), %%eax \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
639 "shl $17, %%ebx \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
640 "add %%eax, %%eax \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
641 "sub %%ebx, %%eax \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
642 "cdq \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
643 "and %%edx, %%ebx \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
644 "add %%ebx, %%eax \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
645 "xor %%edx, %%ecx \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
646 "sub %%edx, %%ecx \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
647 "test %%ax, %%ax \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
648 " jnz 1f \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
649 "mov "BYTE "(%1), %%"REG_b" \n\t"
4040
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
650 "subl $0xFFFF, %%eax \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
651 "movzwl (%%"REG_b"), %%edx \n\t"
4040
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
652 "bswap %%edx \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
653 "shrl $15, %%edx \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
654 "add $2, %%"REG_b" \n\t"
4040
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
655 "addl %%edx, %%eax \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
656 "mov %%"REG_b", "BYTE "(%1) \n\t"
4040
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
657 "1: \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
658 "movl %%eax, "LOW "(%1) \n\t"
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
659
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
660 :"+c"(val)
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
661 :"r"(c)
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
662 : "%eax", "%"REG_b, "%edx", "memory"
4040
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
663 );
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
664 return val;
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
665 #else
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
666 int range, mask;
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
667 c->low += c->low;
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
668
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
669 if(!(c->low & CABAC_MASK))
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
670 refill(c);
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
671
4345
88967250d718 replace a few hardcoded numbers with their correct named ones
michael
parents: 4283
diff changeset
672 range= c->range<<(CABAC_BITS+1);
4040
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
673 c->low -= range;
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
674 mask= c->low >> 31;
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
675 range &= mask;
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
676 c->low += range;
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
677 return (val^mask)-mask;
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
678 #endif
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
679 }
9eaea06c5ba6 optimize sign decoding code in decode_residual()
michael
parents: 4039
diff changeset
680
4037
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
681 //FIXME the x86 code from this file should be moved into i386/h264 or cabac something.c/h (note ill kill you if you move my code away from under my fingers before iam finished with it!)
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
682 //FIXME use some macros to avoid duplicatin get_cabac (cant be done yet as that would make optimization work hard)
4882
8131ccb4ea72 Mark code parts that cannot work on AMD64 due to broken relocations as such.
diego
parents: 4881
diff changeset
683 #if defined(ARCH_X86) && defined(CONFIG_7REGS) && defined(HAVE_EBX_AVAILABLE) && !defined(BROKEN_RELOCATIONS)
4037
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
684 static int decode_significance_x86(CABACContext *c, int max_coeff, uint8_t *significant_coeff_ctx_base, int *index){
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
685 void *end= significant_coeff_ctx_base + max_coeff - 1;
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
686 int minusstart= -(int)significant_coeff_ctx_base;
4049
8c1a5ed03a00 another instruction less in decode_significance_x86() -> 1% faster ion P3
michael
parents: 4048
diff changeset
687 int minusindex= 4-(int)index;
4037
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
688 int coeff_count;
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
689 asm volatile(
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
690 "movl "RANGE "(%3), %%esi \n\t"
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
691 "movl "LOW "(%3), %%ebx \n\t"
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
692
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
693 "2: \n\t"
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
694
4047
61a4e7218a45 reordering instructions a little in decode_significance_x86() -> 2 instructions less / 1% faster decode_residual on P3
michael
parents: 4046
diff changeset
695 BRANCHLESS_GET_CABAC("%%edx", "%3", "(%1)", "%%ebx", "%%bx", "%%esi", "%%eax", "%%al")
4037
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
696
4047
61a4e7218a45 reordering instructions a little in decode_significance_x86() -> 2 instructions less / 1% faster decode_residual on P3
michael
parents: 4046
diff changeset
697 "test $1, %%edx \n\t"
4037
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
698 " jz 3f \n\t"
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
699
4047
61a4e7218a45 reordering instructions a little in decode_significance_x86() -> 2 instructions less / 1% faster decode_residual on P3
michael
parents: 4046
diff changeset
700 BRANCHLESS_GET_CABAC("%%edx", "%3", "61(%1)", "%%ebx", "%%bx", "%%esi", "%%eax", "%%al")
61a4e7218a45 reordering instructions a little in decode_significance_x86() -> 2 instructions less / 1% faster decode_residual on P3
michael
parents: 4046
diff changeset
701
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
702 "mov %2, %%"REG_a" \n\t"
4037
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
703 "movl %4, %%ecx \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
704 "add %1, %%"REG_c" \n\t"
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
705 "movl %%ecx, (%%"REG_a") \n\t"
4037
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
706
4047
61a4e7218a45 reordering instructions a little in decode_significance_x86() -> 2 instructions less / 1% faster decode_residual on P3
michael
parents: 4046
diff changeset
707 "test $1, %%edx \n\t"
4037
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
708 " jnz 4f \n\t"
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
709
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
710 "add $4, %%"REG_a" \n\t"
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
711 "mov %%"REG_a", %2 \n\t"
4048
bf6791303fa0 1 instruction less
michael
parents: 4047
diff changeset
712
4037
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
713 "3: \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
714 "add $1, %1 \n\t"
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
715 "cmp %5, %1 \n\t"
4037
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
716 " jb 2b \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
717 "mov %2, %%"REG_a" \n\t"
4037
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
718 "movl %4, %%ecx \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
719 "add %1, %%"REG_c" \n\t"
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
720 "movl %%ecx, (%%"REG_a") \n\t"
4037
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
721 "4: \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
722 "add %6, %%eax \n\t"
4037
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
723 "shr $2, %%eax \n\t"
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
724
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
725 "movl %%esi, "RANGE "(%3) \n\t"
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
726 "movl %%ebx, "LOW "(%3) \n\t"
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
727 :"=&a"(coeff_count), "+r"(significant_coeff_ctx_base), "+m"(index)\
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
728 :"r"(c), "m"(minusstart), "m"(end), "m"(minusindex)\
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
729 : "%"REG_c, "%ebx", "%edx", "%esi", "memory"\
4037
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
730 );
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
731 return coeff_count;
53be304c7f54 x86 asm version of the decode significance loop (not 8x8) of decode_residual() 5% faster decode_residual() on P3
michael
parents: 4035
diff changeset
732 }
4051
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
733
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
734 static int decode_significance_8x8_x86(CABACContext *c, uint8_t *significant_coeff_ctx_base, int *index, uint8_t *sig_off){
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
735 int minusindex= 4-(int)index;
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
736 int coeff_count;
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
737 long last=0;
4051
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
738 asm volatile(
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
739 "movl "RANGE "(%3), %%esi \n\t"
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
740 "movl "LOW "(%3), %%ebx \n\t"
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
741
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
742 "mov %1, %%"REG_D" \n\t"
4051
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
743 "2: \n\t"
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
744
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
745 "mov %6, %%"REG_a" \n\t"
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
746 "movzbl (%%"REG_a", %%"REG_D"), %%edi \n\t"
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
747 "add %5, %%"REG_D" \n\t"
4051
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
748
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
749 BRANCHLESS_GET_CABAC("%%edx", "%3", "(%%"REG_D")", "%%ebx", "%%bx", "%%esi", "%%eax", "%%al")
4051
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
750
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
751 "mov %1, %%edi \n\t"
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
752 "test $1, %%edx \n\t"
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
753 " jz 3f \n\t"
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
754
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
755 "movzbl "MANGLE(last_coeff_flag_offset_8x8)"(%%edi), %%edi\n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
756 "add %5, %%"REG_D" \n\t"
4051
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
757
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
758 BRANCHLESS_GET_CABAC("%%edx", "%3", "15(%%"REG_D")", "%%ebx", "%%bx", "%%esi", "%%eax", "%%al")
4051
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
759
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
760 "mov %2, %%"REG_a" \n\t"
4051
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
761 "mov %1, %%edi \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
762 "movl %%edi, (%%"REG_a") \n\t"
4051
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
763
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
764 "test $1, %%edx \n\t"
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
765 " jnz 4f \n\t"
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
766
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
767 "add $4, %%"REG_a" \n\t"
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
768 "mov %%"REG_a", %2 \n\t"
4051
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
769
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
770 "3: \n\t"
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
771 "addl $1, %%edi \n\t"
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
772 "mov %%edi, %1 \n\t"
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
773 "cmpl $63, %%edi \n\t"
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
774 " jb 2b \n\t"
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
775 "mov %2, %%"REG_a" \n\t"
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
776 "movl %%edi, (%%"REG_a") \n\t"
4051
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
777 "4: \n\t"
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
778 "addl %4, %%eax \n\t"
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
779 "shr $2, %%eax \n\t"
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
780
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
781 "movl %%esi, "RANGE "(%3) \n\t"
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
782 "movl %%ebx, "LOW "(%3) \n\t"
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
783 :"=&a"(coeff_count),"+m"(last), "+m"(index)\
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
784 :"r"(c), "m"(minusindex), "m"(significant_coeff_ctx_base), "m"(sig_off)\
4064
d3afe4505951 CABAC assembler optimizations ported to AMD64
reimar
parents: 4051
diff changeset
785 : "%"REG_c, "%ebx", "%edx", "%esi", "%"REG_D, "memory"\
4051
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
786 );
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
787 return coeff_count;
19f07b651d79 decode_significance_8x8_x86()
michael
parents: 4050
diff changeset
788 }
4882
8131ccb4ea72 Mark code parts that cannot work on AMD64 due to broken relocations as such.
diego
parents: 4881
diff changeset
789 #endif /* defined(ARCH_X86) && && defined(CONFIG_7REGS) && defined(HAVE_EBX_AVAILABLE) && !defined(BROKEN_RELOCATIONS) */
1287
michaelni
parents:
diff changeset
790
1300
e18667d1e94d FFV1 codec (our very simple lossless intra only codec, compresses much better then huffyuv)
michaelni
parents: 1298
diff changeset
791 /**
e18667d1e94d FFV1 codec (our very simple lossless intra only codec, compresses much better then huffyuv)
michaelni
parents: 1298
diff changeset
792 *
e18667d1e94d FFV1 codec (our very simple lossless intra only codec, compresses much better then huffyuv)
michaelni
parents: 1298
diff changeset
793 * @return the number of bytes read or 0 if no end
e18667d1e94d FFV1 codec (our very simple lossless intra only codec, compresses much better then huffyuv)
michaelni
parents: 1298
diff changeset
794 */
3928
987fffdf6ae7 don't try to inline cabac functions. gcc ignored the hint anyway, and forcing it would make h264 slower.
lorenm
parents: 3642
diff changeset
795 static int get_cabac_terminate(CABACContext *c){
4024
d550343b5dac shift CABACContext.range right, this reduces the number of shifts needed in get_cabac() and is slightly faster on P3 (and should be much faster on P4 as the P4 except the more recent variants lacks an integer shifter and so shifts have ~10 times longer latency then simple operations like adds)
michael
parents: 4014
diff changeset
796 c->range -= 2;
4345
88967250d718 replace a few hardcoded numbers with their correct named ones
michael
parents: 4283
diff changeset
797 if(c->low < c->range<<(CABAC_BITS+1)){
2323
1c39d9786efd optimization
michael
parents: 2116
diff changeset
798 renorm_cabac_decoder_once(c);
1287
michaelni
parents:
diff changeset
799 return 0;
michaelni
parents:
diff changeset
800 }else{
1300
e18667d1e94d FFV1 codec (our very simple lossless intra only codec, compresses much better then huffyuv)
michaelni
parents: 1298
diff changeset
801 return c->bytestream - c->bytestream_start;
2967
ef2149182f1c COSMETICS: Remove all trailing whitespace.
diego
parents: 2736
diff changeset
802 }
1287
michaelni
parents:
diff changeset
803 }
michaelni
parents:
diff changeset
804
1290
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
805 /**
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
806 * get (truncated) unnary binarization.
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
807 */
3928
987fffdf6ae7 don't try to inline cabac functions. gcc ignored the hint anyway, and forcing it would make h264 slower.
lorenm
parents: 3642
diff changeset
808 static int get_cabac_u(CABACContext *c, uint8_t * state, int max, int max_index, int truncated){
1290
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
809 int i;
2967
ef2149182f1c COSMETICS: Remove all trailing whitespace.
diego
parents: 2736
diff changeset
810
ef2149182f1c COSMETICS: Remove all trailing whitespace.
diego
parents: 2736
diff changeset
811 for(i=0; i<max; i++){
1290
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
812 if(get_cabac(c, state)==0)
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
813 return i;
2967
ef2149182f1c COSMETICS: Remove all trailing whitespace.
diego
parents: 2736
diff changeset
814
1290
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
815 if(i< max_index) state++;
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
816 }
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
817
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
818 return truncated ? max : -1;
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
819 }
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
820
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
821 /**
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
822 * get unary exp golomb k-th order binarization.
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
823 */
3928
987fffdf6ae7 don't try to inline cabac functions. gcc ignored the hint anyway, and forcing it would make h264 slower.
lorenm
parents: 3642
diff changeset
824 static int get_cabac_ueg(CABACContext *c, uint8_t * state, int max, int is_signed, int k, int max_index){
1290
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
825 int i, v;
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
826 int m= 1<<k;
2967
ef2149182f1c COSMETICS: Remove all trailing whitespace.
diego
parents: 2736
diff changeset
827
ef2149182f1c COSMETICS: Remove all trailing whitespace.
diego
parents: 2736
diff changeset
828 if(get_cabac(c, state)==0)
1290
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
829 return 0;
2967
ef2149182f1c COSMETICS: Remove all trailing whitespace.
diego
parents: 2736
diff changeset
830
1290
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
831 if(0 < max_index) state++;
2967
ef2149182f1c COSMETICS: Remove all trailing whitespace.
diego
parents: 2736
diff changeset
832
ef2149182f1c COSMETICS: Remove all trailing whitespace.
diego
parents: 2736
diff changeset
833 for(i=1; i<max; i++){
1290
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
834 if(get_cabac(c, state)==0){
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
835 if(is_signed && get_cabac_bypass(c)){
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
836 return -i;
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
837 }else
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
838 return i;
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
839 }
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
840
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
841 if(i < max_index) state++;
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
842 }
2967
ef2149182f1c COSMETICS: Remove all trailing whitespace.
diego
parents: 2736
diff changeset
843
1290
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
844 while(get_cabac_bypass(c)){
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
845 i+= m;
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
846 m+= m;
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
847 }
2967
ef2149182f1c COSMETICS: Remove all trailing whitespace.
diego
parents: 2736
diff changeset
848
1290
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
849 v=0;
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
850 while(m>>=1){
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
851 v+= v + get_cabac_bypass(c);
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
852 }
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
853 i += v;
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
854
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
855 if(is_signed && get_cabac_bypass(c)){
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
856 return -i;
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
857 }else
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
858 return i;
dae280b939ca (truncated) unary binerization
michaelni
parents: 1287
diff changeset
859 }