annotate arm/h264idct_neon.S @ 11797:77243f47f39e libavcodec

ARM: NEON optimised dct_unquantize_h263_{intra,inter}
author mru
date Sat, 29 May 2010 15:29:40 +0000
parents 361a5fcb4393
children ba14e3adeccd
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1 /*
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2 * Copyright (c) 2008 Mans Rullgard <mans@mansr.com>
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3 *
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4 * This file is part of FFmpeg.
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5 *
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6 * FFmpeg is free software; you can redistribute it and/or
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7 * modify it under the terms of the GNU Lesser General Public
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8 * License as published by the Free Software Foundation; either
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9 * version 2.1 of the License, or (at your option) any later version.
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10 *
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11 * FFmpeg is distributed in the hope that it will be useful,
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12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 * Lesser General Public License for more details.
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15 *
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16 * You should have received a copy of the GNU Lesser General Public
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17 * License along with FFmpeg; if not, write to the Free Software
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18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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19 */
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20
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21 #include "asm.S"
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22
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23 preserve8
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24 .text
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25
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26 function ff_h264_idct_add_neon, export=1
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27 vld1.64 {d0-d3}, [r1,:128]
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28
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29 vswp d1, d2
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30 vadd.i16 d4, d0, d1
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31 vshr.s16 q8, q1, #1
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32 vsub.i16 d5, d0, d1
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33 vadd.i16 d6, d2, d17
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34 vsub.i16 d7, d16, d3
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35 vadd.i16 q0, q2, q3
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36 vsub.i16 q1, q2, q3
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37
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38 vtrn.16 d0, d1
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39 vtrn.16 d3, d2
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40 vtrn.32 d0, d3
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41 vtrn.32 d1, d2
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42
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43 vadd.i16 d4, d0, d3
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44 vld1.32 {d18[0]}, [r0,:32], r2
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45 vswp d1, d3
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46 vshr.s16 q8, q1, #1
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47 vld1.32 {d19[1]}, [r0,:32], r2
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48 vsub.i16 d5, d0, d1
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49 vld1.32 {d18[1]}, [r0,:32], r2
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50 vadd.i16 d6, d16, d3
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51 vld1.32 {d19[0]}, [r0,:32], r2
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52 vsub.i16 d7, d2, d17
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53 sub r0, r0, r2, lsl #2
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54 vadd.i16 q0, q2, q3
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55 vsub.i16 q1, q2, q3
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56
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57 vrshr.s16 q0, q0, #6
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58 vrshr.s16 q1, q1, #6
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59
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60 vaddw.u8 q0, q0, d18
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61 vaddw.u8 q1, q1, d19
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62
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63 vqmovun.s16 d0, q0
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64 vqmovun.s16 d1, q1
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65
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66 vst1.32 {d0[0]}, [r0,:32], r2
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67 vst1.32 {d1[1]}, [r0,:32], r2
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68 vst1.32 {d0[1]}, [r0,:32], r2
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69 vst1.32 {d1[0]}, [r0,:32], r2
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70
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71 bx lr
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72 endfunc
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73
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74 function ff_h264_idct_dc_add_neon, export=1
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75 vld1.16 {d2[],d3[]}, [r1,:16]
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76 vrshr.s16 q1, q1, #6
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77 vld1.32 {d0[0]}, [r0,:32], r2
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78 vld1.32 {d0[1]}, [r0,:32], r2
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79 vaddw.u8 q2, q1, d0
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80 vld1.32 {d1[0]}, [r0,:32], r2
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81 vld1.32 {d1[1]}, [r0,:32], r2
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82 vaddw.u8 q1, q1, d1
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83 vqmovun.s16 d0, q2
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84 vqmovun.s16 d1, q1
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85 sub r0, r0, r2, lsl #2
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86 vst1.32 {d0[0]}, [r0,:32], r2
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87 vst1.32 {d0[1]}, [r0,:32], r2
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88 vst1.32 {d1[0]}, [r0,:32], r2
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89 vst1.32 {d1[1]}, [r0,:32], r2
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90 bx lr
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91 endfunc
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92
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93 function ff_h264_idct_add16_neon, export=1
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94 push {r4-r8,lr}
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95 mov r4, r0
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96 mov r5, r1
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97 mov r1, r2
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98 mov r2, r3
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99 ldr r6, [sp, #24]
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100 movrel r7, scan8
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101 mov ip, #16
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102 1: ldrb r8, [r7], #1
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103 ldr r0, [r5], #4
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104 ldrb r8, [r6, r8]
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105 subs r8, r8, #1
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106 blt 2f
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107 ldrsh lr, [r1]
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108 add r0, r0, r4
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109 movne lr, #0
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110 cmp lr, #0
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111 adrne lr, ff_h264_idct_dc_add_neon
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112 adreq lr, ff_h264_idct_add_neon
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113 blx lr
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114 2: subs ip, ip, #1
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115 add r1, r1, #32
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116 bne 1b
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117 pop {r4-r8,pc}
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118 endfunc
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119
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120 function ff_h264_idct_add16intra_neon, export=1
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121 push {r4-r8,lr}
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122 mov r4, r0
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123 mov r5, r1
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124 mov r1, r2
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125 mov r2, r3
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126 ldr r6, [sp, #24]
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127 movrel r7, scan8
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128 mov ip, #16
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129 1: ldrb r8, [r7], #1
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130 ldr r0, [r5], #4
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131 ldrb r8, [r6, r8]
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132 add r0, r0, r4
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133 cmp r8, #0
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134 ldrsh r8, [r1]
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135 adrne lr, ff_h264_idct_add_neon
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136 adreq lr, ff_h264_idct_dc_add_neon
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137 cmpeq r8, #0
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138 blxne lr
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139 subs ip, ip, #1
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140 add r1, r1, #32
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141 bne 1b
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142 pop {r4-r8,pc}
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143 endfunc
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144
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145 function ff_h264_idct_add8_neon, export=1
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146 push {r4-r10,lr}
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147 ldm r0, {r4,r9}
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148 add r5, r1, #16*4
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149 add r1, r2, #16*32
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150 mov r2, r3
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151 ldr r6, [sp, #32]
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152 movrel r7, scan8+16
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153 mov ip, #8
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154 1: ldrb r8, [r7], #1
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155 ldr r0, [r5], #4
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156 ldrb r8, [r6, r8]
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157 tst ip, #4
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158 addeq r0, r0, r4
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159 addne r0, r0, r9
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160 cmp r8, #0
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161 ldrsh r8, [r1]
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162 adrne lr, ff_h264_idct_add_neon
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163 adreq lr, ff_h264_idct_dc_add_neon
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164 cmpeq r8, #0
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165 blxne lr
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166 subs ip, ip, #1
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167 add r1, r1, #32
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168 bne 1b
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169 pop {r4-r10,pc}
11443
361a5fcb4393 ARM: set size of asm functions in object files
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170 endfunc
8462
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171
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172 .section .rodata
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173 scan8: .byte 4+1*8, 5+1*8, 4+2*8, 5+2*8
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174 .byte 6+1*8, 7+1*8, 6+2*8, 7+2*8
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175 .byte 4+3*8, 5+3*8, 4+4*8, 5+4*8
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176 .byte 6+3*8, 7+3*8, 6+4*8, 7+4*8
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177 .byte 1+1*8, 2+1*8
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178 .byte 1+2*8, 2+2*8
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179 .byte 1+4*8, 2+4*8
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180 .byte 1+5*8, 2+5*8