annotate i386/fft_3dn2.c @ 8245:7e6ca1be9e40 libavcodec

Fix reading out of buffer during RV30/40 deblock mask calculation
author kostya
date Tue, 02 Dec 2008 18:14:53 +0000
parents eebc7209c47f
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 /*
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2 * FFT/MDCT transform with Extended 3DNow! optimizations
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3 * Copyright (c) 2006-2008 Zuxy MENG Jie, Loren Merritt
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4 *
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5 * This file is part of FFmpeg.
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6 *
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7 * FFmpeg is free software; you can redistribute it and/or
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8 * modify it under the terms of the GNU Lesser General Public
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9 * License as published by the Free Software Foundation; either
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10 * version 2.1 of the License, or (at your option) any later version.
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11 *
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12 * FFmpeg is distributed in the hope that it will be useful,
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13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 * Lesser General Public License for more details.
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16 *
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17 * You should have received a copy of the GNU Lesser General Public
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18 * License along with FFmpeg; if not, write to the Free Software
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19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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20 */
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21
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22 #include "libavutil/x86_cpu.h"
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23 #include "libavcodec/dsputil.h"
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24
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25 DECLARE_ALIGNED_8(static const int, m1m1[2]) = { 1<<31, 1<<31 };
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26
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27 #ifdef EMULATE_3DNOWEXT
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28 #define PSWAPD(s,d)\
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29 "movq "#s","#d"\n"\
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30 "psrlq $32,"#d"\n"\
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31 "punpckldq "#s","#d"\n"
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32 #define ff_fft_calc_3dn2 ff_fft_calc_3dn
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33 #define ff_fft_dispatch_3dn2 ff_fft_dispatch_3dn
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34 #define ff_fft_dispatch_interleave_3dn2 ff_fft_dispatch_interleave_3dn
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35 #define ff_imdct_calc_3dn2 ff_imdct_calc_3dn
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36 #define ff_imdct_half_3dn2 ff_imdct_half_3dn
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37 #else
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38 #define PSWAPD(s,d) "pswapd "#s","#d"\n"
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39 #endif
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40
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41 void ff_fft_dispatch_3dn2(FFTComplex *z, int nbits);
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42 void ff_fft_dispatch_interleave_3dn2(FFTComplex *z, int nbits);
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43
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44 void ff_fft_calc_3dn2(FFTContext *s, FFTComplex *z)
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45 {
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46 int n = 1<<s->nbits;
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47 int i;
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48 ff_fft_dispatch_interleave_3dn2(z, s->nbits);
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49 __asm__ volatile("femms");
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50 if(n <= 8)
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51 for(i=0; i<n; i+=2)
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52 FFSWAP(FFTSample, z[i].im, z[i+1].re);
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53 }
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54
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55 void ff_imdct_half_3dn2(MDCTContext *s, FFTSample *output, const FFTSample *input)
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56 {
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57 x86_reg j, k;
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58 long n = 1 << s->nbits;
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59 long n2 = n >> 1;
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60 long n4 = n >> 2;
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61 long n8 = n >> 3;
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62 const uint16_t *revtab = s->fft.revtab;
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63 const FFTSample *tcos = s->tcos;
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64 const FFTSample *tsin = s->tsin;
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65 const FFTSample *in1, *in2;
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66 FFTComplex *z = (FFTComplex *)output;
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67
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68 /* pre rotation */
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69 in1 = input;
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70 in2 = input + n2 - 1;
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71 #ifdef EMULATE_3DNOWEXT
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72 __asm__ volatile("movd %0, %%mm7" ::"r"(1<<31));
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73 #endif
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74 for(k = 0; k < n4; k++) {
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75 // FIXME a single block is faster, but gcc 2.95 and 3.4.x on 32bit can't compile it
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76 __asm__ volatile(
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77 "movd %0, %%mm0 \n"
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78 "movd %2, %%mm1 \n"
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79 "punpckldq %1, %%mm0 \n"
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80 "punpckldq %3, %%mm1 \n"
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81 "movq %%mm0, %%mm2 \n"
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82 PSWAPD( %%mm1, %%mm3 )
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83 "pfmul %%mm1, %%mm0 \n"
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84 "pfmul %%mm3, %%mm2 \n"
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85 #ifdef EMULATE_3DNOWEXT
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86 "movq %%mm0, %%mm1 \n"
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87 "punpckhdq %%mm2, %%mm0 \n"
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88 "punpckldq %%mm2, %%mm1 \n"
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89 "pxor %%mm7, %%mm0 \n"
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90 "pfadd %%mm1, %%mm0 \n"
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91 #else
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92 "pfpnacc %%mm2, %%mm0 \n"
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93 #endif
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94 ::"m"(in2[-2*k]), "m"(in1[2*k]),
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95 "m"(tcos[k]), "m"(tsin[k])
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96 );
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97 __asm__ volatile(
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98 "movq %%mm0, %0 \n\t"
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99 :"=m"(z[revtab[k]])
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100 );
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101 }
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102
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103 ff_fft_dispatch_3dn2(z, s->fft.nbits);
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104
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105 #define CMUL(j,mm0,mm1)\
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106 "movq (%2,"#j",2), %%mm6 \n"\
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107 "movq 8(%2,"#j",2), "#mm0"\n"\
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108 "movq %%mm6, "#mm1"\n"\
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109 "movq "#mm0",%%mm7 \n"\
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110 "pfmul (%3,"#j"), %%mm6 \n"\
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111 "pfmul (%4,"#j"), "#mm0"\n"\
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112 "pfmul (%4,"#j"), "#mm1"\n"\
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113 "pfmul (%3,"#j"), %%mm7 \n"\
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114 "pfsub %%mm6, "#mm0"\n"\
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115 "pfadd %%mm7, "#mm1"\n"
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116
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117 /* post rotation */
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118 j = -n2;
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119 k = n2-8;
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120 __asm__ volatile(
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121 "1: \n"
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122 CMUL(%0, %%mm0, %%mm1)
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123 CMUL(%1, %%mm2, %%mm3)
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124 "movd %%mm0, (%2,%0,2) \n"
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125 "movd %%mm1,12(%2,%1,2) \n"
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126 "movd %%mm2, (%2,%1,2) \n"
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127 "movd %%mm3,12(%2,%0,2) \n"
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128 "psrlq $32, %%mm0 \n"
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129 "psrlq $32, %%mm1 \n"
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130 "psrlq $32, %%mm2 \n"
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131 "psrlq $32, %%mm3 \n"
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132 "movd %%mm0, 8(%2,%0,2) \n"
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133 "movd %%mm1, 4(%2,%1,2) \n"
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134 "movd %%mm2, 8(%2,%1,2) \n"
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135 "movd %%mm3, 4(%2,%0,2) \n"
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136 "sub $8, %1 \n"
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137 "add $8, %0 \n"
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138 "jl 1b \n"
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139 :"+r"(j), "+r"(k)
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140 :"r"(z+n8), "r"(tcos+n8), "r"(tsin+n8)
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141 :"memory"
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142 );
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143 __asm__ volatile("femms");
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144 }
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145
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146 void ff_imdct_calc_3dn2(MDCTContext *s, FFTSample *output, const FFTSample *input)
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147 {
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148 x86_reg j, k;
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149 long n = 1 << s->nbits;
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150 long n4 = n >> 2;
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151
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152 ff_imdct_half_3dn2(s, output+n4, input);
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153
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154 j = -n;
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155 k = n-8;
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156 __asm__ volatile(
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157 "movq %4, %%mm7 \n"
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158 "1: \n"
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159 PSWAPD((%2,%1), %%mm0)
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160 PSWAPD((%3,%0), %%mm1)
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161 "pxor %%mm7, %%mm0 \n"
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162 "movq %%mm1, (%3,%1) \n"
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163 "movq %%mm0, (%2,%0) \n"
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164 "sub $8, %1 \n"
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165 "add $8, %0 \n"
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166 "jl 1b \n"
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167 :"+r"(j), "+r"(k)
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168 :"r"(output+n4), "r"(output+n4*3),
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169 "m"(*m1m1)
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ba1f57431c85 tweak ff_imdct_calc_3dn2
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170 );
8031
eebc7209c47f Convert asm keyword into __asm__.
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171 __asm__ volatile("femms");
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5ea82888103e 3dnow2 implementation of imdct.
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172 }
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a3d97c60ea07 ff_fft_calc_3dn/3dn2/sse: convert intrinsics to inline asm.
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173