Mercurial > libavcodec.hg
annotate vc1dsp.c @ 5547:81226e690378 libavcodec
CONFIG_7REGS -> HAVE_7REGS
author | ramiro |
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date | Wed, 15 Aug 2007 21:19:13 +0000 |
parents | 90d90aecc83c |
children | 90de28dfd8d6 |
rev | line source |
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3526 | 1 /* |
2 * VC-1 and WMV3 decoder - DSP functions | |
3 * Copyright (c) 2006 Konstantin Shishkov | |
4 * | |
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5 * This file is part of FFmpeg. |
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6 * |
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7 * FFmpeg is free software; you can redistribute it and/or |
3526 | 8 * modify it under the terms of the GNU Lesser General Public |
9 * License as published by the Free Software Foundation; either | |
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10 * version 2.1 of the License, or (at your option) any later version. |
3526 | 11 * |
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12 * FFmpeg is distributed in the hope that it will be useful, |
3526 | 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 * Lesser General Public License for more details. | |
16 * | |
17 * You should have received a copy of the GNU Lesser General Public | |
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18 * License along with FFmpeg; if not, write to the Free Software |
3526 | 19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
20 */ | |
21 | |
22 /** | |
23 * @file vc1dsp.c | |
24 * VC-1 and WMV3 decoder | |
25 * | |
26 */ | |
27 | |
28 #include "dsputil.h" | |
29 | |
30 | |
4210 | 31 /** Apply overlap transform to horizontal edge |
3526 | 32 */ |
4239 | 33 static void vc1_v_overlap_c(uint8_t* src, int stride) |
3526 | 34 { |
35 int i; | |
36 int a, b, c, d; | |
4211 | 37 int d1, d2; |
4239 | 38 int rnd = 1; |
3526 | 39 for(i = 0; i < 8; i++) { |
40 a = src[-2*stride]; | |
41 b = src[-stride]; | |
42 c = src[0]; | |
43 d = src[stride]; | |
4211 | 44 d1 = (a - d + 3 + rnd) >> 3; |
45 d2 = (a - d + b - c + 4 - rnd) >> 3; | |
3526 | 46 |
4211 | 47 src[-2*stride] = a - d1; |
48 src[-stride] = b - d2; | |
49 src[0] = c + d2; | |
50 src[stride] = d + d1; | |
3526 | 51 src++; |
4239 | 52 rnd = !rnd; |
3526 | 53 } |
54 } | |
55 | |
4210 | 56 /** Apply overlap transform to vertical edge |
3526 | 57 */ |
4239 | 58 static void vc1_h_overlap_c(uint8_t* src, int stride) |
3526 | 59 { |
60 int i; | |
61 int a, b, c, d; | |
4211 | 62 int d1, d2; |
4239 | 63 int rnd = 1; |
3526 | 64 for(i = 0; i < 8; i++) { |
65 a = src[-2]; | |
66 b = src[-1]; | |
67 c = src[0]; | |
68 d = src[1]; | |
4211 | 69 d1 = (a - d + 3 + rnd) >> 3; |
70 d2 = (a - d + b - c + 4 - rnd) >> 3; | |
3526 | 71 |
4211 | 72 src[-2] = a - d1; |
73 src[-1] = b - d2; | |
74 src[0] = c + d2; | |
75 src[1] = d + d1; | |
3526 | 76 src += stride; |
4239 | 77 rnd = !rnd; |
3526 | 78 } |
79 } | |
80 | |
81 | |
82 /** Do inverse transform on 8x8 block | |
83 */ | |
84 static void vc1_inv_trans_8x8_c(DCTELEM block[64]) | |
85 { | |
86 int i; | |
87 register int t1,t2,t3,t4,t5,t6,t7,t8; | |
88 DCTELEM *src, *dst; | |
89 | |
90 src = block; | |
91 dst = block; | |
92 for(i = 0; i < 8; i++){ | |
93 t1 = 12 * (src[0] + src[4]); | |
94 t2 = 12 * (src[0] - src[4]); | |
95 t3 = 16 * src[2] + 6 * src[6]; | |
96 t4 = 6 * src[2] - 16 * src[6]; | |
97 | |
98 t5 = t1 + t3; | |
99 t6 = t2 + t4; | |
100 t7 = t2 - t4; | |
101 t8 = t1 - t3; | |
102 | |
103 t1 = 16 * src[1] + 15 * src[3] + 9 * src[5] + 4 * src[7]; | |
104 t2 = 15 * src[1] - 4 * src[3] - 16 * src[5] - 9 * src[7]; | |
105 t3 = 9 * src[1] - 16 * src[3] + 4 * src[5] + 15 * src[7]; | |
106 t4 = 4 * src[1] - 9 * src[3] + 15 * src[5] - 16 * src[7]; | |
107 | |
108 dst[0] = (t5 + t1 + 4) >> 3; | |
109 dst[1] = (t6 + t2 + 4) >> 3; | |
110 dst[2] = (t7 + t3 + 4) >> 3; | |
111 dst[3] = (t8 + t4 + 4) >> 3; | |
112 dst[4] = (t8 - t4 + 4) >> 3; | |
113 dst[5] = (t7 - t3 + 4) >> 3; | |
114 dst[6] = (t6 - t2 + 4) >> 3; | |
115 dst[7] = (t5 - t1 + 4) >> 3; | |
116 | |
117 src += 8; | |
118 dst += 8; | |
119 } | |
120 | |
121 src = block; | |
122 dst = block; | |
123 for(i = 0; i < 8; i++){ | |
124 t1 = 12 * (src[ 0] + src[32]); | |
125 t2 = 12 * (src[ 0] - src[32]); | |
126 t3 = 16 * src[16] + 6 * src[48]; | |
127 t4 = 6 * src[16] - 16 * src[48]; | |
128 | |
129 t5 = t1 + t3; | |
130 t6 = t2 + t4; | |
131 t7 = t2 - t4; | |
132 t8 = t1 - t3; | |
133 | |
134 t1 = 16 * src[ 8] + 15 * src[24] + 9 * src[40] + 4 * src[56]; | |
135 t2 = 15 * src[ 8] - 4 * src[24] - 16 * src[40] - 9 * src[56]; | |
136 t3 = 9 * src[ 8] - 16 * src[24] + 4 * src[40] + 15 * src[56]; | |
137 t4 = 4 * src[ 8] - 9 * src[24] + 15 * src[40] - 16 * src[56]; | |
138 | |
139 dst[ 0] = (t5 + t1 + 64) >> 7; | |
140 dst[ 8] = (t6 + t2 + 64) >> 7; | |
141 dst[16] = (t7 + t3 + 64) >> 7; | |
142 dst[24] = (t8 + t4 + 64) >> 7; | |
143 dst[32] = (t8 - t4 + 64 + 1) >> 7; | |
144 dst[40] = (t7 - t3 + 64 + 1) >> 7; | |
145 dst[48] = (t6 - t2 + 64 + 1) >> 7; | |
146 dst[56] = (t5 - t1 + 64 + 1) >> 7; | |
147 | |
148 src++; | |
149 dst++; | |
150 } | |
151 } | |
152 | |
153 /** Do inverse transform on 8x4 part of block | |
154 */ | |
155 static void vc1_inv_trans_8x4_c(DCTELEM block[64], int n) | |
156 { | |
157 int i; | |
158 register int t1,t2,t3,t4,t5,t6,t7,t8; | |
159 DCTELEM *src, *dst; | |
160 int off; | |
161 | |
162 off = n * 32; | |
163 src = block + off; | |
164 dst = block + off; | |
165 for(i = 0; i < 4; i++){ | |
166 t1 = 12 * (src[0] + src[4]); | |
167 t2 = 12 * (src[0] - src[4]); | |
168 t3 = 16 * src[2] + 6 * src[6]; | |
169 t4 = 6 * src[2] - 16 * src[6]; | |
170 | |
171 t5 = t1 + t3; | |
172 t6 = t2 + t4; | |
173 t7 = t2 - t4; | |
174 t8 = t1 - t3; | |
175 | |
176 t1 = 16 * src[1] + 15 * src[3] + 9 * src[5] + 4 * src[7]; | |
177 t2 = 15 * src[1] - 4 * src[3] - 16 * src[5] - 9 * src[7]; | |
178 t3 = 9 * src[1] - 16 * src[3] + 4 * src[5] + 15 * src[7]; | |
179 t4 = 4 * src[1] - 9 * src[3] + 15 * src[5] - 16 * src[7]; | |
180 | |
181 dst[0] = (t5 + t1 + 4) >> 3; | |
182 dst[1] = (t6 + t2 + 4) >> 3; | |
183 dst[2] = (t7 + t3 + 4) >> 3; | |
184 dst[3] = (t8 + t4 + 4) >> 3; | |
185 dst[4] = (t8 - t4 + 4) >> 3; | |
186 dst[5] = (t7 - t3 + 4) >> 3; | |
187 dst[6] = (t6 - t2 + 4) >> 3; | |
188 dst[7] = (t5 - t1 + 4) >> 3; | |
189 | |
190 src += 8; | |
191 dst += 8; | |
192 } | |
193 | |
194 src = block + off; | |
195 dst = block + off; | |
196 for(i = 0; i < 8; i++){ | |
197 t1 = 17 * (src[ 0] + src[16]); | |
198 t2 = 17 * (src[ 0] - src[16]); | |
199 t3 = 22 * src[ 8]; | |
200 t4 = 22 * src[24]; | |
201 t5 = 10 * src[ 8]; | |
202 t6 = 10 * src[24]; | |
203 | |
204 dst[ 0] = (t1 + t3 + t6 + 64) >> 7; | |
205 dst[ 8] = (t2 - t4 + t5 + 64) >> 7; | |
206 dst[16] = (t2 + t4 - t5 + 64) >> 7; | |
207 dst[24] = (t1 - t3 - t6 + 64) >> 7; | |
208 | |
209 src ++; | |
210 dst ++; | |
211 } | |
212 } | |
213 | |
214 /** Do inverse transform on 4x8 parts of block | |
215 */ | |
216 static void vc1_inv_trans_4x8_c(DCTELEM block[64], int n) | |
217 { | |
218 int i; | |
219 register int t1,t2,t3,t4,t5,t6,t7,t8; | |
220 DCTELEM *src, *dst; | |
221 int off; | |
222 | |
223 off = n * 4; | |
224 src = block + off; | |
225 dst = block + off; | |
226 for(i = 0; i < 8; i++){ | |
227 t1 = 17 * (src[0] + src[2]); | |
228 t2 = 17 * (src[0] - src[2]); | |
229 t3 = 22 * src[1]; | |
230 t4 = 22 * src[3]; | |
231 t5 = 10 * src[1]; | |
232 t6 = 10 * src[3]; | |
233 | |
234 dst[0] = (t1 + t3 + t6 + 4) >> 3; | |
235 dst[1] = (t2 - t4 + t5 + 4) >> 3; | |
236 dst[2] = (t2 + t4 - t5 + 4) >> 3; | |
237 dst[3] = (t1 - t3 - t6 + 4) >> 3; | |
238 | |
239 src += 8; | |
240 dst += 8; | |
241 } | |
242 | |
243 src = block + off; | |
244 dst = block + off; | |
245 for(i = 0; i < 4; i++){ | |
246 t1 = 12 * (src[ 0] + src[32]); | |
247 t2 = 12 * (src[ 0] - src[32]); | |
248 t3 = 16 * src[16] + 6 * src[48]; | |
249 t4 = 6 * src[16] - 16 * src[48]; | |
250 | |
251 t5 = t1 + t3; | |
252 t6 = t2 + t4; | |
253 t7 = t2 - t4; | |
254 t8 = t1 - t3; | |
255 | |
256 t1 = 16 * src[ 8] + 15 * src[24] + 9 * src[40] + 4 * src[56]; | |
257 t2 = 15 * src[ 8] - 4 * src[24] - 16 * src[40] - 9 * src[56]; | |
258 t3 = 9 * src[ 8] - 16 * src[24] + 4 * src[40] + 15 * src[56]; | |
259 t4 = 4 * src[ 8] - 9 * src[24] + 15 * src[40] - 16 * src[56]; | |
260 | |
261 dst[ 0] = (t5 + t1 + 64) >> 7; | |
262 dst[ 8] = (t6 + t2 + 64) >> 7; | |
263 dst[16] = (t7 + t3 + 64) >> 7; | |
264 dst[24] = (t8 + t4 + 64) >> 7; | |
265 dst[32] = (t8 - t4 + 64 + 1) >> 7; | |
266 dst[40] = (t7 - t3 + 64 + 1) >> 7; | |
267 dst[48] = (t6 - t2 + 64 + 1) >> 7; | |
268 dst[56] = (t5 - t1 + 64 + 1) >> 7; | |
269 | |
270 src++; | |
271 dst++; | |
272 } | |
273 } | |
274 | |
275 /** Do inverse transform on 4x4 part of block | |
276 */ | |
277 static void vc1_inv_trans_4x4_c(DCTELEM block[64], int n) | |
278 { | |
279 int i; | |
280 register int t1,t2,t3,t4,t5,t6; | |
281 DCTELEM *src, *dst; | |
282 int off; | |
283 | |
284 off = (n&1) * 4 + (n&2) * 16; | |
285 src = block + off; | |
286 dst = block + off; | |
287 for(i = 0; i < 4; i++){ | |
288 t1 = 17 * (src[0] + src[2]); | |
289 t2 = 17 * (src[0] - src[2]); | |
290 t3 = 22 * src[1]; | |
291 t4 = 22 * src[3]; | |
292 t5 = 10 * src[1]; | |
293 t6 = 10 * src[3]; | |
294 | |
295 dst[0] = (t1 + t3 + t6 + 4) >> 3; | |
296 dst[1] = (t2 - t4 + t5 + 4) >> 3; | |
297 dst[2] = (t2 + t4 - t5 + 4) >> 3; | |
298 dst[3] = (t1 - t3 - t6 + 4) >> 3; | |
299 | |
300 src += 8; | |
301 dst += 8; | |
302 } | |
303 | |
304 src = block + off; | |
305 dst = block + off; | |
306 for(i = 0; i < 4; i++){ | |
307 t1 = 17 * (src[ 0] + src[16]); | |
308 t2 = 17 * (src[ 0] - src[16]); | |
309 t3 = 22 * src[ 8]; | |
310 t4 = 22 * src[24]; | |
311 t5 = 10 * src[ 8]; | |
312 t6 = 10 * src[24]; | |
313 | |
314 dst[ 0] = (t1 + t3 + t6 + 64) >> 7; | |
315 dst[ 8] = (t2 - t4 + t5 + 64) >> 7; | |
316 dst[16] = (t2 + t4 - t5 + 64) >> 7; | |
317 dst[24] = (t1 - t3 - t6 + 64) >> 7; | |
318 | |
319 src ++; | |
320 dst ++; | |
321 } | |
322 } | |
323 | |
324 /* motion compensation functions */ | |
5416 | 325 /** Filter in case of 2 filters */ |
326 #define VC1_MSPEL_FILTER_16B(DIR, TYPE) \ | |
327 static av_always_inline int vc1_mspel_ ## DIR ## _filter_16bits(const TYPE *src, int stride, int mode) \ | |
328 { \ | |
329 switch(mode){ \ | |
330 case 0: /* no shift - should not occur */ \ | |
331 return 0; \ | |
332 case 1: /* 1/4 shift */ \ | |
333 return -4*src[-stride] + 53*src[0] + 18*src[stride] - 3*src[stride*2]; \ | |
334 case 2: /* 1/2 shift */ \ | |
335 return -src[-stride] + 9*src[0] + 9*src[stride] - src[stride*2]; \ | |
336 case 3: /* 3/4 shift */ \ | |
337 return -3*src[-stride] + 18*src[0] + 53*src[stride] - 4*src[stride*2]; \ | |
338 } \ | |
339 return 0; /* should not occur */ \ | |
340 } | |
341 | |
342 VC1_MSPEL_FILTER_16B(ver, uint8_t); | |
343 VC1_MSPEL_FILTER_16B(hor, int16_t); | |
344 | |
3526 | 345 |
346 /** Filter used to interpolate fractional pel values | |
347 */ | |
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348 static av_always_inline int vc1_mspel_filter(const uint8_t *src, int stride, int mode, int r) |
3526 | 349 { |
350 switch(mode){ | |
351 case 0: //no shift | |
352 return src[0]; | |
353 case 1: // 1/4 shift | |
354 return (-4*src[-stride] + 53*src[0] + 18*src[stride] - 3*src[stride*2] + 32 - r) >> 6; | |
355 case 2: // 1/2 shift | |
356 return (-src[-stride] + 9*src[0] + 9*src[stride] - src[stride*2] + 8 - r) >> 4; | |
357 case 3: // 3/4 shift | |
358 return (-3*src[-stride] + 18*src[0] + 53*src[stride] - 4*src[stride*2] + 32 - r) >> 6; | |
359 } | |
360 return 0; //should not occur | |
361 } | |
362 | |
363 /** Function used to do motion compensation with bicubic interpolation | |
364 */ | |
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365 static void vc1_mspel_mc(uint8_t *dst, const uint8_t *src, int stride, int hmode, int vmode, int rnd) |
3526 | 366 { |
5416 | 367 int i, j; |
368 | |
369 if (vmode) { /* Horizontal filter to apply */ | |
370 int r; | |
371 | |
372 if (hmode) { /* Vertical filter to apply, output to tmp */ | |
373 static const int shift_value[] = { 0, 5, 1, 5 }; | |
374 int shift = (shift_value[hmode]+shift_value[vmode])>>1; | |
375 int16_t tmp[11*8], *tptr = tmp; | |
376 | |
377 r = (1<<(shift-1)) + rnd-1; | |
378 | |
379 src -= 1; | |
380 for(j = 0; j < 8; j++) { | |
381 for(i = 0; i < 11; i++) | |
382 tptr[i] = (vc1_mspel_ver_filter_16bits(src + i, stride, vmode)+r)>>shift; | |
383 src += stride; | |
384 tptr += 11; | |
385 } | |
3526 | 386 |
5416 | 387 r = 64-rnd; |
388 tptr = tmp+1; | |
389 for(j = 0; j < 8; j++) { | |
390 for(i = 0; i < 8; i++) | |
391 dst[i] = av_clip_uint8((vc1_mspel_hor_filter_16bits(tptr + i, 1, hmode)+r)>>7); | |
392 dst += stride; | |
393 tptr += 11; | |
394 } | |
395 | |
396 return; | |
397 } | |
398 else { /* No horizontal filter, output 8 lines to dst */ | |
399 r = 1-rnd; | |
400 | |
401 for(j = 0; j < 8; j++) { | |
402 for(i = 0; i < 8; i++) | |
403 dst[i] = av_clip_uint8(vc1_mspel_filter(src + i, stride, vmode, r)); | |
404 src += stride; | |
405 dst += stride; | |
406 } | |
407 return; | |
408 } | |
3526 | 409 } |
410 | |
5416 | 411 /* Horizontal mode with no vertical mode */ |
3526 | 412 for(j = 0; j < 8; j++) { |
413 for(i = 0; i < 8; i++) | |
5416 | 414 dst[i] = av_clip_uint8(vc1_mspel_filter(src + i, 1, hmode, rnd)); |
3526 | 415 dst += stride; |
5416 | 416 src += stride; |
3526 | 417 } |
418 } | |
419 | |
420 /* pixel functions - really are entry points to vc1_mspel_mc */ | |
421 | |
422 /* this one is defined in dsputil.c */ | |
423 void ff_put_vc1_mspel_mc00_c(uint8_t *dst, const uint8_t *src, int stride, int rnd); | |
424 | |
5252 | 425 #define PUT_VC1_MSPEL(a, b)\ |
426 static void put_vc1_mspel_mc ## a ## b ##_c(uint8_t *dst, const uint8_t *src, int stride, int rnd) { \ | |
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427 vc1_mspel_mc(dst, src, stride, a, b, rnd); \ |
3526 | 428 } |
429 | |
5252 | 430 PUT_VC1_MSPEL(1, 0) |
431 PUT_VC1_MSPEL(2, 0) | |
432 PUT_VC1_MSPEL(3, 0) | |
3526 | 433 |
5252 | 434 PUT_VC1_MSPEL(0, 1) |
435 PUT_VC1_MSPEL(1, 1) | |
436 PUT_VC1_MSPEL(2, 1) | |
437 PUT_VC1_MSPEL(3, 1) | |
3526 | 438 |
5252 | 439 PUT_VC1_MSPEL(0, 2) |
440 PUT_VC1_MSPEL(1, 2) | |
441 PUT_VC1_MSPEL(2, 2) | |
442 PUT_VC1_MSPEL(3, 2) | |
3526 | 443 |
5252 | 444 PUT_VC1_MSPEL(0, 3) |
445 PUT_VC1_MSPEL(1, 3) | |
446 PUT_VC1_MSPEL(2, 3) | |
447 PUT_VC1_MSPEL(3, 3) | |
3526 | 448 |
449 void ff_vc1dsp_init(DSPContext* dsp, AVCodecContext *avctx) { | |
450 dsp->vc1_inv_trans_8x8 = vc1_inv_trans_8x8_c; | |
451 dsp->vc1_inv_trans_4x8 = vc1_inv_trans_4x8_c; | |
452 dsp->vc1_inv_trans_8x4 = vc1_inv_trans_8x4_c; | |
453 dsp->vc1_inv_trans_4x4 = vc1_inv_trans_4x4_c; | |
454 dsp->vc1_h_overlap = vc1_h_overlap_c; | |
455 dsp->vc1_v_overlap = vc1_v_overlap_c; | |
456 | |
457 dsp->put_vc1_mspel_pixels_tab[ 0] = ff_put_vc1_mspel_mc00_c; | |
5251 | 458 dsp->put_vc1_mspel_pixels_tab[ 1] = put_vc1_mspel_mc10_c; |
459 dsp->put_vc1_mspel_pixels_tab[ 2] = put_vc1_mspel_mc20_c; | |
460 dsp->put_vc1_mspel_pixels_tab[ 3] = put_vc1_mspel_mc30_c; | |
461 dsp->put_vc1_mspel_pixels_tab[ 4] = put_vc1_mspel_mc01_c; | |
462 dsp->put_vc1_mspel_pixels_tab[ 5] = put_vc1_mspel_mc11_c; | |
463 dsp->put_vc1_mspel_pixels_tab[ 6] = put_vc1_mspel_mc21_c; | |
464 dsp->put_vc1_mspel_pixels_tab[ 7] = put_vc1_mspel_mc31_c; | |
465 dsp->put_vc1_mspel_pixels_tab[ 8] = put_vc1_mspel_mc02_c; | |
466 dsp->put_vc1_mspel_pixels_tab[ 9] = put_vc1_mspel_mc12_c; | |
467 dsp->put_vc1_mspel_pixels_tab[10] = put_vc1_mspel_mc22_c; | |
468 dsp->put_vc1_mspel_pixels_tab[11] = put_vc1_mspel_mc32_c; | |
469 dsp->put_vc1_mspel_pixels_tab[12] = put_vc1_mspel_mc03_c; | |
470 dsp->put_vc1_mspel_pixels_tab[13] = put_vc1_mspel_mc13_c; | |
471 dsp->put_vc1_mspel_pixels_tab[14] = put_vc1_mspel_mc23_c; | |
472 dsp->put_vc1_mspel_pixels_tab[15] = put_vc1_mspel_mc33_c; | |
3526 | 473 } |