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6601
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1 /*
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2 * XVID MPEG-4 VIDEO CODEC
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3 * - SSE2 inverse discrete cosine transform -
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4 *
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5 * Copyright(C) 2003 Pascal Massimino <skal@planet-d.net>
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6 *
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7 * Conversion to gcc syntax with modifications
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8 * by Alexander Strange <astrange@ithinksw.com>
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9 *
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10 * Originally from dct/x86_asm/fdct_sse2_skal.asm in Xvid.
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11 *
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12 * This file is part of FFmpeg.
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13 *
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14 * Vertical pass is an implementation of the scheme:
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15 * Loeffler C., Ligtenberg A., and Moschytz C.S.:
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16 * Practical Fast 1D DCT Algorithm with Eleven Multiplications,
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17 * Proc. ICASSP 1989, 988-991.
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18 *
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19 * Horizontal pass is a double 4x4 vector/matrix multiplication,
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20 * (see also Intel's Application Note 922:
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21 * http://developer.intel.com/vtune/cbts/strmsimd/922down.htm
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22 * Copyright (C) 1999 Intel Corporation)
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23 *
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24 * More details at http://skal.planet-d.net/coding/dct.html
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25 *
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26 * FFmpeg is free software; you can redistribute it and/or
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27 * modify it under the terms of the GNU Lesser General Public
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28 * License as published by the Free Software Foundation; either
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29 * version 2.1 of the License, or (at your option) any later version.
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30 *
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31 * FFmpeg is distributed in the hope that it will be useful,
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32 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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33 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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34 * Lesser General Public License for more details.
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35 *
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36 * You should have received a copy of the GNU Lesser General Public License
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37 * along with FFmpeg; if not, write to the Free Software Foundation,
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38 * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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39 */
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40
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6763
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41 #include "libavcodec/dsputil.h"
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6601
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42
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43 /*!
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44 * @file idct_sse2_xvid.c
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45 * @brief SSE2 idct compatible with xvidmmx
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46 */
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47
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48 #define X8(x) x,x,x,x,x,x,x,x
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49
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50 #define ROW_SHIFT 11
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51 #define COL_SHIFT 6
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52
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53 DECLARE_ASM_CONST(16, int16_t, tan1[]) = {X8(13036)}; // tan( pi/16)
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54 DECLARE_ASM_CONST(16, int16_t, tan2[]) = {X8(27146)}; // tan(2pi/16) = sqrt(2)-1
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55 DECLARE_ASM_CONST(16, int16_t, tan3[]) = {X8(43790)}; // tan(3pi/16)-1
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56 DECLARE_ASM_CONST(16, int16_t, sqrt2[])= {X8(23170)}; // 0.5/sqrt(2)
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57 DECLARE_ASM_CONST(8, uint8_t, m127[]) = {X8(127)};
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58
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59 DECLARE_ASM_CONST(16, int16_t, iTab1[]) = {
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60 0x4000, 0x539f, 0xc000, 0xac61, 0x4000, 0xdd5d, 0x4000, 0xdd5d,
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61 0x4000, 0x22a3, 0x4000, 0x22a3, 0xc000, 0x539f, 0x4000, 0xac61,
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62 0x3249, 0x11a8, 0x4b42, 0xee58, 0x11a8, 0x4b42, 0x11a8, 0xcdb7,
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63 0x58c5, 0x4b42, 0xa73b, 0xcdb7, 0x3249, 0xa73b, 0x4b42, 0xa73b
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64 };
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65
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66 DECLARE_ASM_CONST(16, int16_t, iTab2[]) = {
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67 0x58c5, 0x73fc, 0xa73b, 0x8c04, 0x58c5, 0xcff5, 0x58c5, 0xcff5,
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68 0x58c5, 0x300b, 0x58c5, 0x300b, 0xa73b, 0x73fc, 0x58c5, 0x8c04,
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69 0x45bf, 0x187e, 0x6862, 0xe782, 0x187e, 0x6862, 0x187e, 0xba41,
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70 0x7b21, 0x6862, 0x84df, 0xba41, 0x45bf, 0x84df, 0x6862, 0x84df
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71 };
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72
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73 DECLARE_ASM_CONST(16, int16_t, iTab3[]) = {
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74 0x539f, 0x6d41, 0xac61, 0x92bf, 0x539f, 0xd2bf, 0x539f, 0xd2bf,
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75 0x539f, 0x2d41, 0x539f, 0x2d41, 0xac61, 0x6d41, 0x539f, 0x92bf,
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76 0x41b3, 0x1712, 0x6254, 0xe8ee, 0x1712, 0x6254, 0x1712, 0xbe4d,
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77 0x73fc, 0x6254, 0x8c04, 0xbe4d, 0x41b3, 0x8c04, 0x6254, 0x8c04
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78 };
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79
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80 DECLARE_ASM_CONST(16, int16_t, iTab4[]) = {
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81 0x4b42, 0x6254, 0xb4be, 0x9dac, 0x4b42, 0xd746, 0x4b42, 0xd746,
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82 0x4b42, 0x28ba, 0x4b42, 0x28ba, 0xb4be, 0x6254, 0x4b42, 0x9dac,
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83 0x3b21, 0x14c3, 0x587e, 0xeb3d, 0x14c3, 0x587e, 0x14c3, 0xc4df,
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84 0x6862, 0x587e, 0x979e, 0xc4df, 0x3b21, 0x979e, 0x587e, 0x979e
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85 };
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86
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87 DECLARE_ASM_CONST(16, int32_t, walkenIdctRounders[]) = {
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88 65536, 65536, 65536, 65536,
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89 3597, 3597, 3597, 3597,
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90 2260, 2260, 2260, 2260,
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91 1203, 1203, 1203, 1203,
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92 120, 120, 120, 120,
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93 512, 512, 512, 512
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94 };
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95
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96 // Temporary storage before the column pass
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97 #define ROW1 "%%xmm6"
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98 #define ROW3 "%%xmm4"
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99 #define ROW5 "%%xmm5"
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100 #define ROW7 "%%xmm7"
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101
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102 #define CLEAR_ODD(r) "pxor "r","r" \n\t"
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103 #define PUT_ODD(dst) "pshufhw $0x1B, %%xmm2, "dst" \n\t"
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104
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105 #ifdef ARCH_X86_64
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106
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107 # define ROW0 "%%xmm8"
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108 # define REG0 ROW0
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109 # define ROW2 "%%xmm9"
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110 # define REG2 ROW2
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111 # define ROW4 "%%xmm10"
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112 # define REG4 ROW4
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113 # define ROW6 "%%xmm11"
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114 # define REG6 ROW6
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115 # define CLEAR_EVEN(r) CLEAR_ODD(r)
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116 # define PUT_EVEN(dst) PUT_ODD(dst)
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117 # define XMMS "%%xmm12"
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118 # define MOV_32_ONLY "#"
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119 # define SREG2 REG2
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120 # define TAN3 "%%xmm13"
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121 # define TAN1 "%%xmm14"
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122
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123 #else
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124
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125 # define ROW0 "(%0)"
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126 # define REG0 "%%xmm4"
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127 # define ROW2 "2*16(%0)"
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128 # define REG2 "%%xmm4"
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129 # define ROW4 "4*16(%0)"
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130 # define REG4 "%%xmm6"
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131 # define ROW6 "6*16(%0)"
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132 # define REG6 "%%xmm6"
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133 # define CLEAR_EVEN(r)
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134 # define PUT_EVEN(dst) \
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135 "pshufhw $0x1B, %%xmm2, %%xmm2 \n\t" \
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136 "movdqa %%xmm2, "dst" \n\t"
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137 # define XMMS "%%xmm2"
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138 # define MOV_32_ONLY "movdqa "
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139 # define SREG2 "%%xmm7"
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140 # define TAN3 "%%xmm0"
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141 # define TAN1 "%%xmm2"
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142
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143 #endif
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144
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145 #define ROUND(x) "paddd "MANGLE(x)
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146
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147 #define JZ(reg, to) \
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148 "testl "reg","reg" \n\t" \
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149 "jz "to" \n\t"
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150
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151 #define JNZ(reg, to) \
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152 "testl "reg","reg" \n\t" \
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153 "jnz "to" \n\t"
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154
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155 #define TEST_ONE_ROW(src, reg, clear) \
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156 clear \
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157 "movq "src", %%mm1 \n\t" \
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158 "por 8+"src", %%mm1 \n\t" \
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159 "paddusb %%mm0, %%mm1 \n\t" \
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160 "pmovmskb %%mm1, "reg" \n\t"
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161
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162 #define TEST_TWO_ROWS(row1, row2, reg1, reg2, clear1, clear2) \
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163 clear1 \
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164 clear2 \
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165 "movq "row1", %%mm1 \n\t" \
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166 "por 8+"row1", %%mm1 \n\t" \
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167 "movq "row2", %%mm2 \n\t" \
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168 "por 8+"row2", %%mm2 \n\t" \
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169 "paddusb %%mm0, %%mm1 \n\t" \
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170 "paddusb %%mm0, %%mm2 \n\t" \
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171 "pmovmskb %%mm1, "reg1" \n\t" \
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172 "pmovmskb %%mm2, "reg2" \n\t"
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173
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174 ///IDCT pass on rows.
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175 #define iMTX_MULT(src, table, rounder, put) \
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176 "movdqa "src", %%xmm3 \n\t" \
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177 "movdqa %%xmm3, %%xmm0 \n\t" \
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178 "pshufd $0x11, %%xmm3, %%xmm1 \n\t" /* 4602 */ \
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179 "punpcklqdq %%xmm0, %%xmm0 \n\t" /* 0246 */ \
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180 "pmaddwd "table", %%xmm0 \n\t" \
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181 "pmaddwd 16+"table", %%xmm1 \n\t" \
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182 "pshufd $0xBB, %%xmm3, %%xmm2 \n\t" /* 5713 */ \
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183 "punpckhqdq %%xmm3, %%xmm3 \n\t" /* 1357 */ \
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184 "pmaddwd 32+"table", %%xmm2 \n\t" \
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185 "pmaddwd 48+"table", %%xmm3 \n\t" \
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186 "paddd %%xmm1, %%xmm0 \n\t" \
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187 "paddd %%xmm3, %%xmm2 \n\t" \
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188 rounder", %%xmm0 \n\t" \
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189 "movdqa %%xmm2, %%xmm3 \n\t" \
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190 "paddd %%xmm0, %%xmm2 \n\t" \
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191 "psubd %%xmm3, %%xmm0 \n\t" \
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192 "psrad $11, %%xmm2 \n\t" \
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193 "psrad $11, %%xmm0 \n\t" \
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194 "packssdw %%xmm0, %%xmm2 \n\t" \
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195 put \
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196 "1: \n\t"
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197
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198 #define iLLM_HEAD \
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199 "movdqa "MANGLE(tan3)", "TAN3" \n\t" \
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200 "movdqa "MANGLE(tan1)", "TAN1" \n\t" \
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201
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202 ///IDCT pass on columns.
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203 #define iLLM_PASS(dct) \
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204 "movdqa "TAN3", %%xmm1 \n\t" \
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205 "movdqa "TAN1", %%xmm3 \n\t" \
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206 "pmulhw %%xmm4, "TAN3" \n\t" \
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207 "pmulhw %%xmm5, %%xmm1 \n\t" \
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208 "paddsw %%xmm4, "TAN3" \n\t" \
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209 "paddsw %%xmm5, %%xmm1 \n\t" \
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210 "psubsw %%xmm5, "TAN3" \n\t" \
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211 "paddsw %%xmm4, %%xmm1 \n\t" \
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212 "pmulhw %%xmm7, %%xmm3 \n\t" \
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213 "pmulhw %%xmm6, "TAN1" \n\t" \
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214 "paddsw %%xmm6, %%xmm3 \n\t" \
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215 "psubsw %%xmm7, "TAN1" \n\t" \
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216 "movdqa %%xmm3, %%xmm7 \n\t" \
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217 "movdqa "TAN1", %%xmm6 \n\t" \
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218 "psubsw %%xmm1, %%xmm3 \n\t" \
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219 "psubsw "TAN3", "TAN1" \n\t" \
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220 "paddsw %%xmm7, %%xmm1 \n\t" \
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221 "paddsw %%xmm6, "TAN3" \n\t" \
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222 "movdqa %%xmm3, %%xmm6 \n\t" \
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223 "psubsw "TAN3", %%xmm3 \n\t" \
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224 "paddsw %%xmm6, "TAN3" \n\t" \
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225 "movdqa "MANGLE(sqrt2)", %%xmm4 \n\t" \
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226 "pmulhw %%xmm4, %%xmm3 \n\t" \
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227 "pmulhw %%xmm4, "TAN3" \n\t" \
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228 "paddsw "TAN3", "TAN3" \n\t" \
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229 "paddsw %%xmm3, %%xmm3 \n\t" \
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230 "movdqa "MANGLE(tan2)", %%xmm7 \n\t" \
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231 MOV_32_ONLY ROW2", "REG2" \n\t" \
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232 MOV_32_ONLY ROW6", "REG6" \n\t" \
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233 "movdqa %%xmm7, %%xmm5 \n\t" \
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234 "pmulhw "REG6", %%xmm7 \n\t" \
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235 "pmulhw "REG2", %%xmm5 \n\t" \
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236 "paddsw "REG2", %%xmm7 \n\t" \
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237 "psubsw "REG6", %%xmm5 \n\t" \
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238 MOV_32_ONLY ROW0", "REG0" \n\t" \
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239 MOV_32_ONLY ROW4", "REG4" \n\t" \
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240 MOV_32_ONLY" "TAN1", (%0) \n\t" \
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241 "movdqa "REG0", "XMMS" \n\t" \
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242 "psubsw "REG4", "REG0" \n\t" \
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243 "paddsw "XMMS", "REG4" \n\t" \
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244 "movdqa "REG4", "XMMS" \n\t" \
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245 "psubsw %%xmm7, "REG4" \n\t" \
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246 "paddsw "XMMS", %%xmm7 \n\t" \
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247 "movdqa "REG0", "XMMS" \n\t" \
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248 "psubsw %%xmm5, "REG0" \n\t" \
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249 "paddsw "XMMS", %%xmm5 \n\t" \
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250 "movdqa %%xmm5, "XMMS" \n\t" \
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251 "psubsw "TAN3", %%xmm5 \n\t" \
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252 "paddsw "XMMS", "TAN3" \n\t" \
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253 "movdqa "REG0", "XMMS" \n\t" \
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254 "psubsw %%xmm3, "REG0" \n\t" \
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255 "paddsw "XMMS", %%xmm3 \n\t" \
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256 MOV_32_ONLY" (%0), "TAN1" \n\t" \
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257 "psraw $6, %%xmm5 \n\t" \
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258 "psraw $6, "REG0" \n\t" \
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259 "psraw $6, "TAN3" \n\t" \
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260 "psraw $6, %%xmm3 \n\t" \
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261 "movdqa "TAN3", 1*16("dct") \n\t" \
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262 "movdqa %%xmm3, 2*16("dct") \n\t" \
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263 "movdqa "REG0", 5*16("dct") \n\t" \
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264 "movdqa %%xmm5, 6*16("dct") \n\t" \
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265 "movdqa %%xmm7, %%xmm0 \n\t" \
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266 "movdqa "REG4", %%xmm4 \n\t" \
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267 "psubsw %%xmm1, %%xmm7 \n\t" \
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268 "psubsw "TAN1", "REG4" \n\t" \
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269 "paddsw %%xmm0, %%xmm1 \n\t" \
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270 "paddsw %%xmm4, "TAN1" \n\t" \
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271 "psraw $6, %%xmm1 \n\t" \
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272 "psraw $6, %%xmm7 \n\t" \
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273 "psraw $6, "TAN1" \n\t" \
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274 "psraw $6, "REG4" \n\t" \
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275 "movdqa %%xmm1, ("dct") \n\t" \
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276 "movdqa "TAN1", 3*16("dct") \n\t" \
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277 "movdqa "REG4", 4*16("dct") \n\t" \
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278 "movdqa %%xmm7, 7*16("dct") \n\t"
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279
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280 ///IDCT pass on columns, assuming rows 4-7 are zero.
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281 #define iLLM_PASS_SPARSE(dct) \
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282 "pmulhw %%xmm4, "TAN3" \n\t" \
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283 "paddsw %%xmm4, "TAN3" \n\t" \
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284 "movdqa %%xmm6, %%xmm3 \n\t" \
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285 "pmulhw %%xmm6, "TAN1" \n\t" \
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286 "movdqa %%xmm4, %%xmm1 \n\t" \
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287 "psubsw %%xmm1, %%xmm3 \n\t" \
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288 "paddsw %%xmm6, %%xmm1 \n\t" \
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289 "movdqa "TAN1", %%xmm6 \n\t" \
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290 "psubsw "TAN3", "TAN1" \n\t" \
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291 "paddsw %%xmm6, "TAN3" \n\t" \
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292 "movdqa %%xmm3, %%xmm6 \n\t" \
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293 "psubsw "TAN3", %%xmm3 \n\t" \
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294 "paddsw %%xmm6, "TAN3" \n\t" \
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295 "movdqa "MANGLE(sqrt2)", %%xmm4 \n\t" \
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296 "pmulhw %%xmm4, %%xmm3 \n\t" \
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297 "pmulhw %%xmm4, "TAN3" \n\t" \
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298 "paddsw "TAN3", "TAN3" \n\t" \
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299 "paddsw %%xmm3, %%xmm3 \n\t" \
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300 "movdqa "MANGLE(tan2)", %%xmm5 \n\t" \
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301 MOV_32_ONLY ROW2", "SREG2" \n\t" \
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302 "pmulhw "SREG2", %%xmm5 \n\t" \
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303 MOV_32_ONLY ROW0", "REG0" \n\t" \
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304 "movdqa "REG0", %%xmm6 \n\t" \
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305 "psubsw "SREG2", %%xmm6 \n\t" \
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306 "paddsw "REG0", "SREG2" \n\t" \
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307 MOV_32_ONLY" "TAN1", (%0) \n\t" \
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308 "movdqa "REG0", "XMMS" \n\t" \
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309 "psubsw %%xmm5, "REG0" \n\t" \
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310 "paddsw "XMMS", %%xmm5 \n\t" \
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311 "movdqa %%xmm5, "XMMS" \n\t" \
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312 "psubsw "TAN3", %%xmm5 \n\t" \
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313 "paddsw "XMMS", "TAN3" \n\t" \
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314 "movdqa "REG0", "XMMS" \n\t" \
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315 "psubsw %%xmm3, "REG0" \n\t" \
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316 "paddsw "XMMS", %%xmm3 \n\t" \
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317 MOV_32_ONLY" (%0), "TAN1" \n\t" \
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318 "psraw $6, %%xmm5 \n\t" \
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319 "psraw $6, "REG0" \n\t" \
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320 "psraw $6, "TAN3" \n\t" \
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321 "psraw $6, %%xmm3 \n\t" \
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322 "movdqa "TAN3", 1*16("dct") \n\t" \
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323 "movdqa %%xmm3, 2*16("dct") \n\t" \
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324 "movdqa "REG0", 5*16("dct") \n\t" \
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325 "movdqa %%xmm5, 6*16("dct") \n\t" \
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326 "movdqa "SREG2", %%xmm0 \n\t" \
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327 "movdqa %%xmm6, %%xmm4 \n\t" \
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328 "psubsw %%xmm1, "SREG2" \n\t" \
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329 "psubsw "TAN1", %%xmm6 \n\t" \
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330 "paddsw %%xmm0, %%xmm1 \n\t" \
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331 "paddsw %%xmm4, "TAN1" \n\t" \
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332 "psraw $6, %%xmm1 \n\t" \
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333 "psraw $6, "SREG2" \n\t" \
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334 "psraw $6, "TAN1" \n\t" \
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335 "psraw $6, %%xmm6 \n\t" \
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336 "movdqa %%xmm1, ("dct") \n\t" \
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337 "movdqa "TAN1", 3*16("dct") \n\t" \
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338 "movdqa %%xmm6, 4*16("dct") \n\t" \
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339 "movdqa "SREG2", 7*16("dct") \n\t"
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340
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341 inline void ff_idct_xvid_sse2(short *block)
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342 {
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343 asm volatile(
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344 "movq "MANGLE(m127)", %%mm0 \n\t"
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345 iMTX_MULT("(%0)", MANGLE(iTab1), ROUND(walkenIdctRounders), PUT_EVEN(ROW0))
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346 iMTX_MULT("1*16(%0)", MANGLE(iTab2), ROUND(walkenIdctRounders+1*16), PUT_ODD(ROW1))
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347 iMTX_MULT("2*16(%0)", MANGLE(iTab3), ROUND(walkenIdctRounders+2*16), PUT_EVEN(ROW2))
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348
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349 TEST_TWO_ROWS("3*16(%0)", "4*16(%0)", "%%eax", "%%ecx", CLEAR_ODD(ROW3), CLEAR_EVEN(ROW4))
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350 JZ("%%eax", "1f")
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351 iMTX_MULT("3*16(%0)", MANGLE(iTab4), ROUND(walkenIdctRounders+3*16), PUT_ODD(ROW3))
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352
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353 TEST_TWO_ROWS("5*16(%0)", "6*16(%0)", "%%eax", "%%edx", CLEAR_ODD(ROW5), CLEAR_EVEN(ROW6))
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354 TEST_ONE_ROW("7*16(%0)", "%%esi", CLEAR_ODD(ROW7))
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355 iLLM_HEAD
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356 ASMALIGN(4)
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357 JNZ("%%ecx", "2f")
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358 JNZ("%%eax", "3f")
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359 JNZ("%%edx", "4f")
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360 JNZ("%%esi", "5f")
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361 iLLM_PASS_SPARSE("%0")
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362 "jmp 6f \n\t"
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363 "2: \n\t"
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364 iMTX_MULT("4*16(%0)", MANGLE(iTab1), "#", PUT_EVEN(ROW4))
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365 "3: \n\t"
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366 iMTX_MULT("5*16(%0)", MANGLE(iTab4), ROUND(walkenIdctRounders+4*16), PUT_ODD(ROW5))
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367 JZ("%%edx", "1f")
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368 "4: \n\t"
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369 iMTX_MULT("6*16(%0)", MANGLE(iTab3), ROUND(walkenIdctRounders+5*16), PUT_EVEN(ROW6))
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370 JZ("%%esi", "1f")
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371 "5: \n\t"
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372 iMTX_MULT("7*16(%0)", MANGLE(iTab2), ROUND(walkenIdctRounders+5*16), PUT_ODD(ROW7))
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373 #ifndef ARCH_X86_64
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374 iLLM_HEAD
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375 #endif
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376 iLLM_PASS("%0")
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377 "6: \n\t"
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378 : "+r"(block)
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379 :
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380 : "%eax", "%ecx", "%edx", "%esi", "memory");
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381 }
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382
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383 void ff_idct_xvid_sse2_put(uint8_t *dest, int line_size, short *block)
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384 {
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385 ff_idct_xvid_sse2(block);
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386 put_pixels_clamped_mmx(block, dest, line_size);
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387 }
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388
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389 void ff_idct_xvid_sse2_add(uint8_t *dest, int line_size, short *block)
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|
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390 {
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|
|
391 ff_idct_xvid_sse2(block);
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|
392 add_pixels_clamped_mmx(block, dest, line_size);
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393 }
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