annotate i386/snowdsp_mmx.c @ 4520:9bf957e669f0 libavcodec

This fixes error handling for BeOS, removing the need for some ifdefs. AVERROR_ defines are moved to avcodec.h as they are needed in there as well. Feel free to move that to avutil/common.h. Bumped up avcodec/format version numbers as though it's binary compatible we will want to rebuild apps as error values changed. Please from now on use return AVERROR(EFOO) instead of the ugly return -EFOO in your code. This also removes the need for berrno.h.
author mmu_man
date Tue, 13 Feb 2007 18:26:14 +0000
parents d3e389536b0a
children d5ba514e3f4a
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1 /*
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2 * MMX and SSE2 optimized snow DSP utils
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3 * Copyright (c) 2005-2006 Robert Edele <yartrebo@earthlink.net>
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4 *
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5 * This file is part of FFmpeg.
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6 *
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7 * FFmpeg is free software; you can redistribute it and/or
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33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
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8 * modify it under the terms of the GNU Lesser General Public
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9 * License as published by the Free Software Foundation; either
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10 * version 2.1 of the License, or (at your option) any later version.
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11 *
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12 * FFmpeg is distributed in the hope that it will be useful,
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13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
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14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
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15 * Lesser General Public License for more details.
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16 *
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
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17 * You should have received a copy of the GNU Lesser General Public
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18 * License along with FFmpeg; if not, write to the Free Software
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19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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20 */
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
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21
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
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22 #include "../avcodec.h"
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23 #include "../snow.h"
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e0927bc44a10 Move REG_* macros from libavcodec/i386/mmx.h to libavutil/x86_cpu.h
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24 #include "x86_cpu.h"
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25
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26 void ff_snow_horizontal_compose97i_sse2(DWTELEM *b, int width){
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27 const int w2= (width+1)>>1;
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28 // SSE2 code runs faster with pointers aligned on a 32-byte boundary.
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29 DWTELEM temp_buf[(width>>1) + 4];
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30 DWTELEM * const temp = temp_buf + 4 - (((int)temp_buf & 0xF) >> 2);
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31 const int w_l= (width>>1);
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32 const int w_r= w2 - 1;
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33 int i;
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34
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35 { // Lift 0
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36 DWTELEM * const ref = b + w2 - 1;
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37 DWTELEM b_0 = b[0]; //By allowing the first entry in b[0] to be calculated twice
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38 // (the first time erroneously), we allow the SSE2 code to run an extra pass.
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39 // The savings in code and time are well worth having to store this value and
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40 // calculate b[0] correctly afterwards.
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41
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42 i = 0;
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43 asm volatile(
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44 "pcmpeqd %%xmm7, %%xmm7 \n\t"
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45 "pslld $31, %%xmm7 \n\t"
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46 "psrld $29, %%xmm7 \n\t"
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47 ::);
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48 for(; i<w_l-7; i+=8){
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49 asm volatile(
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50 "movdqu (%1), %%xmm1 \n\t"
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51 "movdqu 16(%1), %%xmm5 \n\t"
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52 "movdqu 4(%1), %%xmm2 \n\t"
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53 "movdqu 20(%1), %%xmm6 \n\t"
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54 "paddd %%xmm1, %%xmm2 \n\t"
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55 "paddd %%xmm5, %%xmm6 \n\t"
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56 "movdqa %%xmm2, %%xmm0 \n\t"
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57 "movdqa %%xmm6, %%xmm4 \n\t"
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58 "paddd %%xmm2, %%xmm2 \n\t"
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59 "paddd %%xmm6, %%xmm6 \n\t"
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60 "paddd %%xmm0, %%xmm2 \n\t"
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61 "paddd %%xmm4, %%xmm6 \n\t"
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62 "paddd %%xmm7, %%xmm2 \n\t"
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63 "paddd %%xmm7, %%xmm6 \n\t"
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64 "psrad $3, %%xmm2 \n\t"
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65 "psrad $3, %%xmm6 \n\t"
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66 "movdqa (%0), %%xmm0 \n\t"
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67 "movdqa 16(%0), %%xmm4 \n\t"
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68 "psubd %%xmm2, %%xmm0 \n\t"
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69 "psubd %%xmm6, %%xmm4 \n\t"
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70 "movdqa %%xmm0, (%0) \n\t"
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71 "movdqa %%xmm4, 16(%0) \n\t"
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72 :: "r"(&b[i]), "r"(&ref[i])
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73 : "memory"
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74 );
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75 }
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76 snow_horizontal_compose_lift_lead_out(i, b, b, ref, width, w_l, 0, W_DM, W_DO, W_DS);
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77 b[0] = b_0 - ((W_DM * 2 * ref[1]+W_DO)>>W_DS);
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78 }
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79
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80 { // Lift 1
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81 DWTELEM * const dst = b+w2;
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82
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83 i = 0;
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84 for(; (((long)&dst[i]) & 0xF) && i<w_r; i++){
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85 dst[i] = dst[i] - (b[i] + b[i + 1]);
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86 }
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87 for(; i<w_r-7; i+=8){
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88 asm volatile(
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89 "movdqu (%1), %%xmm1 \n\t"
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90 "movdqu 16(%1), %%xmm5 \n\t"
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91 "movdqu 4(%1), %%xmm2 \n\t"
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92 "movdqu 20(%1), %%xmm6 \n\t"
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93 "paddd %%xmm1, %%xmm2 \n\t"
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94 "paddd %%xmm5, %%xmm6 \n\t"
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95 "movdqa (%0), %%xmm0 \n\t"
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96 "movdqa 16(%0), %%xmm4 \n\t"
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97 "psubd %%xmm2, %%xmm0 \n\t"
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98 "psubd %%xmm6, %%xmm4 \n\t"
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99 "movdqa %%xmm0, (%0) \n\t"
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100 "movdqa %%xmm4, 16(%0) \n\t"
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101 :: "r"(&dst[i]), "r"(&b[i])
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102 : "memory"
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103 );
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104 }
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105 snow_horizontal_compose_lift_lead_out(i, dst, dst, b, width, w_r, 1, W_CM, W_CO, W_CS);
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106 }
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107
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108 { // Lift 2
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109 DWTELEM * const ref = b+w2 - 1;
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110 DWTELEM b_0 = b[0];
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111
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112 i = 0;
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113 asm volatile(
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114 "pslld $1, %%xmm7 \n\t" /* xmm7 already holds a '4' from 2 lifts ago. */
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115 ::);
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116 for(; i<w_l-7; i+=8){
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117 asm volatile(
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118 "movdqu (%1), %%xmm1 \n\t"
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119 "movdqu 16(%1), %%xmm5 \n\t"
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120 "movdqu 4(%1), %%xmm0 \n\t"
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121 "movdqu 20(%1), %%xmm4 \n\t"
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122 "paddd %%xmm1, %%xmm0 \n\t"
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123 "paddd %%xmm5, %%xmm4 \n\t"
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124 "movdqa %%xmm7, %%xmm1 \n\t"
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125 "movdqa %%xmm7, %%xmm5 \n\t"
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126 "psubd %%xmm0, %%xmm1 \n\t"
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127 "psubd %%xmm4, %%xmm5 \n\t"
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128 "movdqa (%0), %%xmm0 \n\t"
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129 "movdqa 16(%0), %%xmm4 \n\t"
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130 "pslld $2, %%xmm0 \n\t"
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131 "pslld $2, %%xmm4 \n\t"
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132 "psubd %%xmm0, %%xmm1 \n\t"
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133 "psubd %%xmm4, %%xmm5 \n\t"
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134 "psrad $4, %%xmm1 \n\t"
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135 "psrad $4, %%xmm5 \n\t"
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136 "movdqa (%0), %%xmm0 \n\t"
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137 "movdqa 16(%0), %%xmm4 \n\t"
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138 "psubd %%xmm1, %%xmm0 \n\t"
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139 "psubd %%xmm5, %%xmm4 \n\t"
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140 "movdqa %%xmm0, (%0) \n\t"
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141 "movdqa %%xmm4, 16(%0) \n\t"
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142 :: "r"(&b[i]), "r"(&ref[i])
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143 : "memory"
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144 );
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145 }
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146 snow_horizontal_compose_liftS_lead_out(i, b, b, ref, width, w_l);
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147 b[0] = b_0 - (((-2 * ref[1] + W_BO) - 4 * b_0) >> W_BS);
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diff changeset
148 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
149
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
150 { // Lift 3
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
151 DWTELEM * const src = b+w2;
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
152
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
153 i = 0;
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
154 for(; (((long)&temp[i]) & 0xF) && i<w_r; i++){
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
155 temp[i] = src[i] - ((-W_AM*(b[i] + b[i+1]))>>W_AS);
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
156 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
157 for(; i<w_r-7; i+=8){
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
158 asm volatile(
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
159 "movdqu 4(%1), %%xmm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
160 "movdqu 20(%1), %%xmm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
161 "paddd (%1), %%xmm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
162 "paddd 16(%1), %%xmm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
163 "movdqa %%xmm2, %%xmm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
164 "movdqa %%xmm6, %%xmm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
165 "pslld $2, %%xmm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
166 "pslld $2, %%xmm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
167 "psubd %%xmm2, %%xmm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
168 "psubd %%xmm6, %%xmm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
169 "psrad $1, %%xmm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
170 "psrad $1, %%xmm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
171 "movdqu (%0), %%xmm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
172 "movdqu 16(%0), %%xmm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
173 "psubd %%xmm0, %%xmm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
174 "psubd %%xmm4, %%xmm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
175 "movdqa %%xmm2, (%2) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
176 "movdqa %%xmm6, 16(%2) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
177 :: "r"(&src[i]), "r"(&b[i]), "r"(&temp[i])
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
178 : "memory"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
179 );
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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180 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
181 snow_horizontal_compose_lift_lead_out(i, temp, src, b, width, w_r, 1, -W_AM, W_AO, W_AS);
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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182 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
183
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
184 {
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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185 snow_interleave_line_header(&i, width, b, temp);
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
186
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
187 for (; (i & 0x1E) != 0x1E; i-=2){
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
188 b[i+1] = temp[i>>1];
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
189 b[i] = b[i>>1];
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
190 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
191 for (i-=30; i>=0; i-=32){
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
192 asm volatile(
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
193 "movdqa (%1), %%xmm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
194 "movdqa 16(%1), %%xmm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
195 "movdqa 32(%1), %%xmm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
196 "movdqa 48(%1), %%xmm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
197 "movdqa (%1), %%xmm1 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
198 "movdqa 16(%1), %%xmm3 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
199 "movdqa 32(%1), %%xmm5 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
200 "movdqa 48(%1), %%xmm7 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
201 "punpckldq (%2), %%xmm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
202 "punpckldq 16(%2), %%xmm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
203 "punpckldq 32(%2), %%xmm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
204 "punpckldq 48(%2), %%xmm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
205 "movdqa %%xmm0, (%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
206 "movdqa %%xmm2, 32(%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
207 "movdqa %%xmm4, 64(%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
208 "movdqa %%xmm6, 96(%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
209 "punpckhdq (%2), %%xmm1 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
210 "punpckhdq 16(%2), %%xmm3 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
211 "punpckhdq 32(%2), %%xmm5 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
212 "punpckhdq 48(%2), %%xmm7 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
213 "movdqa %%xmm1, 16(%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
214 "movdqa %%xmm3, 48(%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
215 "movdqa %%xmm5, 80(%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
216 "movdqa %%xmm7, 112(%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
217 :: "r"(&(b)[i]), "r"(&(b)[i>>1]), "r"(&(temp)[i>>1])
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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218 : "memory"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
219 );
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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220 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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221 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
222 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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223
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
224 void ff_snow_horizontal_compose97i_mmx(DWTELEM *b, int width){
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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225 const int w2= (width+1)>>1;
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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226 DWTELEM temp[width >> 1];
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
227 const int w_l= (width>>1);
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
228 const int w_r= w2 - 1;
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
229 int i;
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
230
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
231 { // Lift 0
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
232 DWTELEM * const ref = b + w2 - 1;
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
233
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
234 i = 1;
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
235 b[0] = b[0] - ((W_DM * 2 * ref[1]+W_DO)>>W_DS);
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
236 asm volatile(
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
237 "pcmpeqd %%mm7, %%mm7 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
238 "pslld $31, %%mm7 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
239 "psrld $29, %%mm7 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
240 ::);
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
241 for(; i<w_l-3; i+=4){
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
242 asm volatile(
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
243 "movq (%1), %%mm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
244 "movq 8(%1), %%mm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
245 "paddd 4(%1), %%mm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
246 "paddd 12(%1), %%mm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
247 "movq %%mm2, %%mm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
248 "movq %%mm6, %%mm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
249 "paddd %%mm2, %%mm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
250 "paddd %%mm6, %%mm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
251 "paddd %%mm0, %%mm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
252 "paddd %%mm4, %%mm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
253 "paddd %%mm7, %%mm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
254 "paddd %%mm7, %%mm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
255 "psrad $3, %%mm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
256 "psrad $3, %%mm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
257 "movq (%0), %%mm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
258 "movq 8(%0), %%mm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
259 "psubd %%mm2, %%mm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
260 "psubd %%mm6, %%mm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
261 "movq %%mm0, (%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
262 "movq %%mm4, 8(%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
263 :: "r"(&b[i]), "r"(&ref[i])
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
264 : "memory"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
265 );
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
266 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
267 snow_horizontal_compose_lift_lead_out(i, b, b, ref, width, w_l, 0, W_DM, W_DO, W_DS);
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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268 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
269
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
270 { // Lift 1
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
271 DWTELEM * const dst = b+w2;
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
272
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
273 i = 0;
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
274 for(; i<w_r-3; i+=4){
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
275 asm volatile(
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
276 "movq (%1), %%mm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
277 "movq 8(%1), %%mm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
278 "paddd 4(%1), %%mm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
279 "paddd 12(%1), %%mm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
280 "movq (%0), %%mm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
281 "movq 8(%0), %%mm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
282 "psubd %%mm2, %%mm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
283 "psubd %%mm6, %%mm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
284 "movq %%mm0, (%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
285 "movq %%mm4, 8(%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
286 :: "r"(&dst[i]), "r"(&b[i])
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
287 : "memory"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
288 );
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
289 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
290 snow_horizontal_compose_lift_lead_out(i, dst, dst, b, width, w_r, 1, W_CM, W_CO, W_CS);
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
291 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
292
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
293 { // Lift 2
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
294 DWTELEM * const ref = b+w2 - 1;
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
295
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
296 i = 1;
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
297 b[0] = b[0] - (((-2 * ref[1] + W_BO) - 4 * b[0]) >> W_BS);
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
298 asm volatile(
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
299 "pslld $1, %%mm7 \n\t" /* xmm7 already holds a '4' from 2 lifts ago. */
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
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diff changeset
300 ::);
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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diff changeset
301 for(; i<w_l-3; i+=4){
81cafbc23b8d snow mmx+sse2 optimizations, part 4
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parents: 3207
diff changeset
302 asm volatile(
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
303 "movq (%1), %%mm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
304 "movq 8(%1), %%mm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
305 "paddd 4(%1), %%mm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
306 "paddd 12(%1), %%mm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
307 "movq %%mm7, %%mm1 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
308 "movq %%mm7, %%mm5 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
309 "psubd %%mm0, %%mm1 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
310 "psubd %%mm4, %%mm5 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
311 "movq (%0), %%mm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
312 "movq 8(%0), %%mm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
313 "pslld $2, %%mm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
314 "pslld $2, %%mm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
315 "psubd %%mm0, %%mm1 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
316 "psubd %%mm4, %%mm5 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
317 "psrad $4, %%mm1 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
318 "psrad $4, %%mm5 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
319 "movq (%0), %%mm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
320 "movq 8(%0), %%mm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
321 "psubd %%mm1, %%mm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
322 "psubd %%mm5, %%mm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
323 "movq %%mm0, (%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
324 "movq %%mm4, 8(%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
325 :: "r"(&b[i]), "r"(&ref[i])
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
326 : "memory"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
327 );
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
328 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
329 snow_horizontal_compose_liftS_lead_out(i, b, b, ref, width, w_l);
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
330 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
331
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
332 { // Lift 3
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
333 DWTELEM * const src = b+w2;
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
334 i = 0;
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
335
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
336 for(; i<w_r-3; i+=4){
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
337 asm volatile(
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
338 "movq 4(%1), %%mm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
339 "movq 12(%1), %%mm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
340 "paddd (%1), %%mm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
341 "paddd 8(%1), %%mm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
342 "movq %%mm2, %%mm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
343 "movq %%mm6, %%mm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
344 "pslld $2, %%mm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
345 "pslld $2, %%mm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
346 "psubd %%mm2, %%mm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
347 "psubd %%mm6, %%mm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
348 "psrad $1, %%mm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
349 "psrad $1, %%mm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
350 "movq (%0), %%mm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
351 "movq 8(%0), %%mm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
352 "psubd %%mm0, %%mm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
353 "psubd %%mm4, %%mm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
354 "movq %%mm2, (%2) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
355 "movq %%mm6, 8(%2) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
356 :: "r"(&src[i]), "r"(&b[i]), "r"(&temp[i])
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
357 : "memory"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
358 );
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
359 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
360 snow_horizontal_compose_lift_lead_out(i, temp, src, b, width, w_r, 1, -W_AM, W_AO, W_AS);
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
361 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
362
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
363 {
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
364 snow_interleave_line_header(&i, width, b, temp);
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
365
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
366 for (; (i & 0xE) != 0xE; i-=2){
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
367 b[i+1] = temp[i>>1];
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
368 b[i] = b[i>>1];
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
369 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
370 for (i-=14; i>=0; i-=16){
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
371 asm volatile(
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
372 "movq (%1), %%mm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
373 "movq 8(%1), %%mm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
374 "movq 16(%1), %%mm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
375 "movq 24(%1), %%mm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
376 "movq (%1), %%mm1 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
377 "movq 8(%1), %%mm3 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
378 "movq 16(%1), %%mm5 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
379 "movq 24(%1), %%mm7 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
380 "punpckldq (%2), %%mm0 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
381 "punpckldq 8(%2), %%mm2 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
382 "punpckldq 16(%2), %%mm4 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
383 "punpckldq 24(%2), %%mm6 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
384 "movq %%mm0, (%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
385 "movq %%mm2, 16(%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
386 "movq %%mm4, 32(%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
387 "movq %%mm6, 48(%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
388 "punpckhdq (%2), %%mm1 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
389 "punpckhdq 8(%2), %%mm3 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
390 "punpckhdq 16(%2), %%mm5 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
391 "punpckhdq 24(%2), %%mm7 \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
392 "movq %%mm1, 8(%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
393 "movq %%mm3, 24(%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
394 "movq %%mm5, 40(%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
395 "movq %%mm7, 56(%0) \n\t"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
396 :: "r"(&b[i]), "r"(&b[i>>1]), "r"(&temp[i>>1])
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
397 : "memory"
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
398 );
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
399 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
400 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
401 }
81cafbc23b8d snow mmx+sse2 optimizations, part 4
corey
parents: 3207
diff changeset
402
3207
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
403 #define snow_vertical_compose_sse2_load_add(op,r,t0,t1,t2,t3)\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
404 ""op" (%%"r",%%"REG_d",4), %%"t0" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
405 ""op" 16(%%"r",%%"REG_d",4), %%"t1" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
406 ""op" 32(%%"r",%%"REG_d",4), %%"t2" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
407 ""op" 48(%%"r",%%"REG_d",4), %%"t3" \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
408
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
409 #define snow_vertical_compose_sse2_load(r,t0,t1,t2,t3)\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
410 snow_vertical_compose_sse2_load_add("movdqa",r,t0,t1,t2,t3)
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
411
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
412 #define snow_vertical_compose_sse2_add(r,t0,t1,t2,t3)\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
413 snow_vertical_compose_sse2_load_add("paddd",r,t0,t1,t2,t3)
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
414
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
415 #define snow_vertical_compose_sse2_sub(s0,s1,s2,s3,t0,t1,t2,t3)\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
416 "psubd %%"s0", %%"t0" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
417 "psubd %%"s1", %%"t1" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
418 "psubd %%"s2", %%"t2" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
419 "psubd %%"s3", %%"t3" \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
420
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
421 #define snow_vertical_compose_sse2_store(w,s0,s1,s2,s3)\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
422 "movdqa %%"s0", (%%"w",%%"REG_d",4) \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
423 "movdqa %%"s1", 16(%%"w",%%"REG_d",4) \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
424 "movdqa %%"s2", 32(%%"w",%%"REG_d",4) \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
425 "movdqa %%"s3", 48(%%"w",%%"REG_d",4) \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
426
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
427 #define snow_vertical_compose_sse2_sra(n,t0,t1,t2,t3)\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
428 "psrad $"n", %%"t0" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
429 "psrad $"n", %%"t1" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
430 "psrad $"n", %%"t2" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
431 "psrad $"n", %%"t3" \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
432
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
433 #define snow_vertical_compose_sse2_r2r_add(s0,s1,s2,s3,t0,t1,t2,t3)\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
434 "paddd %%"s0", %%"t0" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
435 "paddd %%"s1", %%"t1" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
436 "paddd %%"s2", %%"t2" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
437 "paddd %%"s3", %%"t3" \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
438
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
439 #define snow_vertical_compose_sse2_sll(n,t0,t1,t2,t3)\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
440 "pslld $"n", %%"t0" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
441 "pslld $"n", %%"t1" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
442 "pslld $"n", %%"t2" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
443 "pslld $"n", %%"t3" \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
444
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
445 #define snow_vertical_compose_sse2_move(s0,s1,s2,s3,t0,t1,t2,t3)\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
446 "movdqa %%"s0", %%"t0" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
447 "movdqa %%"s1", %%"t1" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
448 "movdqa %%"s2", %%"t2" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
449 "movdqa %%"s3", %%"t3" \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
450
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
451 void ff_snow_vertical_compose97i_sse2(DWTELEM *b0, DWTELEM *b1, DWTELEM *b2, DWTELEM *b3, DWTELEM *b4, DWTELEM *b5, int width){
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
452 long i = width;
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
453
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
454 while(i & 0xF)
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
455 {
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
456 i--;
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
457 b4[i] -= (W_DM*(b3[i] + b5[i])+W_DO)>>W_DS;
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
458 b3[i] -= (W_CM*(b2[i] + b4[i])+W_CO)>>W_CS;
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
459 b2[i] += (W_BM*(b1[i] + b3[i])+4*b2[i]+W_BO)>>W_BS;
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
460 b1[i] += (W_AM*(b0[i] + b2[i])+W_AO)>>W_AS;
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
461 }
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
462
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
463 asm volatile (
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
464 "jmp 2f \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
465 "1: \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
466
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
467 "mov %6, %%"REG_a" \n\t"
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
468 "mov %4, %%"REG_S" \n\t"
3207
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
469
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
470 snow_vertical_compose_sse2_load(REG_S,"xmm0","xmm2","xmm4","xmm6")
3207
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
471 snow_vertical_compose_sse2_add(REG_a,"xmm0","xmm2","xmm4","xmm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
472 snow_vertical_compose_sse2_move("xmm0","xmm2","xmm4","xmm6","xmm1","xmm3","xmm5","xmm7")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
473 snow_vertical_compose_sse2_sll("1","xmm0","xmm2","xmm4","xmm6")\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
474 snow_vertical_compose_sse2_r2r_add("xmm1","xmm3","xmm5","xmm7","xmm0","xmm2","xmm4","xmm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
475
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
476 "pcmpeqd %%xmm1, %%xmm1 \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
477 "pslld $31, %%xmm1 \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
478 "psrld $29, %%xmm1 \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
479 "mov %5, %%"REG_a" \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
480
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
481 snow_vertical_compose_sse2_r2r_add("xmm1","xmm1","xmm1","xmm1","xmm0","xmm2","xmm4","xmm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
482 snow_vertical_compose_sse2_sra("3","xmm0","xmm2","xmm4","xmm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
483 snow_vertical_compose_sse2_load(REG_a,"xmm1","xmm3","xmm5","xmm7")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
484 snow_vertical_compose_sse2_sub("xmm0","xmm2","xmm4","xmm6","xmm1","xmm3","xmm5","xmm7")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
485 snow_vertical_compose_sse2_store(REG_a,"xmm1","xmm3","xmm5","xmm7")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
486 "mov %3, %%"REG_c" \n\t"
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
487 snow_vertical_compose_sse2_load(REG_S,"xmm0","xmm2","xmm4","xmm6")
3207
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
488 snow_vertical_compose_sse2_add(REG_c,"xmm1","xmm3","xmm5","xmm7")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
489 snow_vertical_compose_sse2_sub("xmm1","xmm3","xmm5","xmm7","xmm0","xmm2","xmm4","xmm6")
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
490 snow_vertical_compose_sse2_store(REG_S,"xmm0","xmm2","xmm4","xmm6")
3207
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
491 "mov %2, %%"REG_a" \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
492 snow_vertical_compose_sse2_load(REG_c,"xmm1","xmm3","xmm5","xmm7")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
493 snow_vertical_compose_sse2_add(REG_a,"xmm0","xmm2","xmm4","xmm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
494 snow_vertical_compose_sse2_sll("2","xmm1","xmm3","xmm5","xmm7")\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
495 snow_vertical_compose_sse2_r2r_add("xmm1","xmm3","xmm5","xmm7","xmm0","xmm2","xmm4","xmm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
496
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
497 "pcmpeqd %%xmm1, %%xmm1 \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
498 "pslld $31, %%xmm1 \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
499 "psrld $28, %%xmm1 \n\t"
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
500 "mov %1, %%"REG_S" \n\t"
3207
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
501
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
502 snow_vertical_compose_sse2_r2r_add("xmm1","xmm1","xmm1","xmm1","xmm0","xmm2","xmm4","xmm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
503 snow_vertical_compose_sse2_sra("4","xmm0","xmm2","xmm4","xmm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
504 snow_vertical_compose_sse2_add(REG_c,"xmm0","xmm2","xmm4","xmm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
505 snow_vertical_compose_sse2_store(REG_c,"xmm0","xmm2","xmm4","xmm6")
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
506 snow_vertical_compose_sse2_add(REG_S,"xmm0","xmm2","xmm4","xmm6")
3207
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
507 snow_vertical_compose_sse2_move("xmm0","xmm2","xmm4","xmm6","xmm1","xmm3","xmm5","xmm7")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
508 snow_vertical_compose_sse2_sll("1","xmm0","xmm2","xmm4","xmm6")\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
509 snow_vertical_compose_sse2_r2r_add("xmm1","xmm3","xmm5","xmm7","xmm0","xmm2","xmm4","xmm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
510 snow_vertical_compose_sse2_sra("1","xmm0","xmm2","xmm4","xmm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
511 snow_vertical_compose_sse2_add(REG_a,"xmm0","xmm2","xmm4","xmm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
512 snow_vertical_compose_sse2_store(REG_a,"xmm0","xmm2","xmm4","xmm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
513
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
514 "2: \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
515 "sub $16, %%"REG_d" \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
516 "jge 1b \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
517 :"+d"(i)
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
518 :
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
519 "m"(b0),"m"(b1),"m"(b2),"m"(b3),"m"(b4),"m"(b5):
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
520 "%"REG_a"","%"REG_S"","%"REG_c"");
3207
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
521 }
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
522
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
523 #define snow_vertical_compose_mmx_load_add(op,r,t0,t1,t2,t3)\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
524 ""op" (%%"r",%%"REG_d",4), %%"t0" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
525 ""op" 8(%%"r",%%"REG_d",4), %%"t1" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
526 ""op" 16(%%"r",%%"REG_d",4), %%"t2" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
527 ""op" 24(%%"r",%%"REG_d",4), %%"t3" \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
528
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
529 #define snow_vertical_compose_mmx_load(r,t0,t1,t2,t3)\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
530 snow_vertical_compose_mmx_load_add("movq",r,t0,t1,t2,t3)
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
531
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
532 #define snow_vertical_compose_mmx_add(r,t0,t1,t2,t3)\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
533 snow_vertical_compose_mmx_load_add("paddd",r,t0,t1,t2,t3)
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
534
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
535 #define snow_vertical_compose_mmx_sub(s0,s1,s2,s3,t0,t1,t2,t3)\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
536 snow_vertical_compose_sse2_sub(s0,s1,s2,s3,t0,t1,t2,t3)
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
537
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
538 #define snow_vertical_compose_mmx_store(w,s0,s1,s2,s3)\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
539 "movq %%"s0", (%%"w",%%"REG_d",4) \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
540 "movq %%"s1", 8(%%"w",%%"REG_d",4) \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
541 "movq %%"s2", 16(%%"w",%%"REG_d",4) \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
542 "movq %%"s3", 24(%%"w",%%"REG_d",4) \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
543
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
544 #define snow_vertical_compose_mmx_sra(n,t0,t1,t2,t3)\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
545 snow_vertical_compose_sse2_sra(n,t0,t1,t2,t3)
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
546
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
547 #define snow_vertical_compose_mmx_r2r_add(s0,s1,s2,s3,t0,t1,t2,t3)\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
548 snow_vertical_compose_sse2_r2r_add(s0,s1,s2,s3,t0,t1,t2,t3)
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
549
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
550 #define snow_vertical_compose_mmx_sll(n,t0,t1,t2,t3)\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
551 snow_vertical_compose_sse2_sll(n,t0,t1,t2,t3)
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
552
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
553 #define snow_vertical_compose_mmx_move(s0,s1,s2,s3,t0,t1,t2,t3)\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
554 "movq %%"s0", %%"t0" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
555 "movq %%"s1", %%"t1" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
556 "movq %%"s2", %%"t2" \n\t"\
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
557 "movq %%"s3", %%"t3" \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
558
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
559 void ff_snow_vertical_compose97i_mmx(DWTELEM *b0, DWTELEM *b1, DWTELEM *b2, DWTELEM *b3, DWTELEM *b4, DWTELEM *b5, int width){
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
560 long i = width;
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
561 while(i & 0x7)
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
562 {
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
563 i--;
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
564 b4[i] -= (W_DM*(b3[i] + b5[i])+W_DO)>>W_DS;
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
565 b3[i] -= (W_CM*(b2[i] + b4[i])+W_CO)>>W_CS;
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
566 b2[i] += (W_BM*(b1[i] + b3[i])+4*b2[i]+W_BO)>>W_BS;
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
567 b1[i] += (W_AM*(b0[i] + b2[i])+W_AO)>>W_AS;
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
568 }
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
569
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
570 asm volatile(
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
571 "jmp 2f \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
572 "1: \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
573
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
574 "mov %6, %%"REG_a" \n\t"
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
575 "mov %4, %%"REG_S" \n\t"
3207
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
576
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
577 snow_vertical_compose_mmx_load(REG_S,"mm0","mm2","mm4","mm6")
3207
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
578 snow_vertical_compose_mmx_add(REG_a,"mm0","mm2","mm4","mm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
579 snow_vertical_compose_mmx_move("mm0","mm2","mm4","mm6","mm1","mm3","mm5","mm7")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
580 snow_vertical_compose_mmx_sll("1","mm0","mm2","mm4","mm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
581 snow_vertical_compose_mmx_r2r_add("mm1","mm3","mm5","mm7","mm0","mm2","mm4","mm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
582
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
583 "pcmpeqd %%mm1, %%mm1 \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
584 "pslld $31, %%mm1 \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
585 "psrld $29, %%mm1 \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
586 "mov %5, %%"REG_a" \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
587
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
588 snow_vertical_compose_mmx_r2r_add("mm1","mm1","mm1","mm1","mm0","mm2","mm4","mm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
589 snow_vertical_compose_mmx_sra("3","mm0","mm2","mm4","mm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
590 snow_vertical_compose_mmx_load(REG_a,"mm1","mm3","mm5","mm7")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
591 snow_vertical_compose_mmx_sub("mm0","mm2","mm4","mm6","mm1","mm3","mm5","mm7")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
592 snow_vertical_compose_mmx_store(REG_a,"mm1","mm3","mm5","mm7")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
593 "mov %3, %%"REG_c" \n\t"
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
594 snow_vertical_compose_mmx_load(REG_S,"mm0","mm2","mm4","mm6")
3207
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
595 snow_vertical_compose_mmx_add(REG_c,"mm1","mm3","mm5","mm7")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
596 snow_vertical_compose_mmx_sub("mm1","mm3","mm5","mm7","mm0","mm2","mm4","mm6")
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
597 snow_vertical_compose_mmx_store(REG_S,"mm0","mm2","mm4","mm6")
3207
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
598 "mov %2, %%"REG_a" \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
599 snow_vertical_compose_mmx_load(REG_c,"mm1","mm3","mm5","mm7")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
600 snow_vertical_compose_mmx_add(REG_a,"mm0","mm2","mm4","mm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
601 snow_vertical_compose_mmx_sll("2","mm1","mm3","mm5","mm7")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
602 snow_vertical_compose_mmx_r2r_add("mm1","mm3","mm5","mm7","mm0","mm2","mm4","mm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
603
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
604 "pcmpeqd %%mm1, %%mm1 \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
605 "pslld $31, %%mm1 \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
606 "psrld $28, %%mm1 \n\t"
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
607 "mov %1, %%"REG_S" \n\t"
3207
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
608
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
609 snow_vertical_compose_mmx_r2r_add("mm1","mm1","mm1","mm1","mm0","mm2","mm4","mm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
610 snow_vertical_compose_mmx_sra("4","mm0","mm2","mm4","mm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
611 snow_vertical_compose_mmx_add(REG_c,"mm0","mm2","mm4","mm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
612 snow_vertical_compose_mmx_store(REG_c,"mm0","mm2","mm4","mm6")
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
613 snow_vertical_compose_mmx_add(REG_S,"mm0","mm2","mm4","mm6")
3207
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
614 snow_vertical_compose_mmx_move("mm0","mm2","mm4","mm6","mm1","mm3","mm5","mm7")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
615 snow_vertical_compose_mmx_sll("1","mm0","mm2","mm4","mm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
616 snow_vertical_compose_mmx_r2r_add("mm1","mm3","mm5","mm7","mm0","mm2","mm4","mm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
617 snow_vertical_compose_mmx_sra("1","mm0","mm2","mm4","mm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
618 snow_vertical_compose_mmx_add(REG_a,"mm0","mm2","mm4","mm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
619 snow_vertical_compose_mmx_store(REG_a,"mm0","mm2","mm4","mm6")
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
620
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
621 "2: \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
622 "sub $8, %%"REG_d" \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
623 "jge 1b \n\t"
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
624 :"+d"(i)
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
625 :
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
626 "m"(b0),"m"(b1),"m"(b2),"m"(b3),"m"(b4),"m"(b5):
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
627 "%"REG_a"","%"REG_S"","%"REG_c"");
3207
33110c1008a4 Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff changeset
628 }
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
629
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
630 #define snow_inner_add_yblock_sse2_header \
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
631 DWTELEM * * dst_array = sb->line + src_y;\
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
632 long tmp;\
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
633 asm volatile(\
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
634 "mov %7, %%"REG_c" \n\t"\
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
635 "mov %6, %2 \n\t"\
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
636 "mov %4, %%"REG_S" \n\t"\
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
637 "pxor %%xmm7, %%xmm7 \n\t" /* 0 */\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
638 "pcmpeqd %%xmm3, %%xmm3 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
639 "pslld $31, %%xmm3 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
640 "psrld $24, %%xmm3 \n\t" /* FRAC_BITS >> 1 */\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
641 "1: \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
642 "mov %1, %%"REG_D" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
643 "mov (%%"REG_D"), %%"REG_D" \n\t"\
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
644 "add %3, %%"REG_D" \n\t"
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
645
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
646 #define snow_inner_add_yblock_sse2_start_8(out_reg1, out_reg2, ptr_offset, s_offset)\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
647 "mov "PTR_SIZE"*"ptr_offset"(%%"REG_a"), %%"REG_d"; \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
648 "movq (%%"REG_d"), %%"out_reg1" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
649 "movq (%%"REG_d", %%"REG_c"), %%"out_reg2" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
650 "punpcklbw %%xmm7, %%"out_reg1" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
651 "punpcklbw %%xmm7, %%"out_reg2" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
652 "movq "s_offset"(%%"REG_S"), %%xmm0 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
653 "movq "s_offset"+16(%%"REG_S"), %%xmm4 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
654 "punpcklbw %%xmm7, %%xmm0 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
655 "punpcklbw %%xmm7, %%xmm4 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
656 "pmullw %%xmm0, %%"out_reg1" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
657 "pmullw %%xmm4, %%"out_reg2" \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
658
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
659 #define snow_inner_add_yblock_sse2_start_16(out_reg1, out_reg2, ptr_offset, s_offset)\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
660 "mov "PTR_SIZE"*"ptr_offset"(%%"REG_a"), %%"REG_d"; \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
661 "movq (%%"REG_d"), %%"out_reg1" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
662 "movq 8(%%"REG_d"), %%"out_reg2" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
663 "punpcklbw %%xmm7, %%"out_reg1" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
664 "punpcklbw %%xmm7, %%"out_reg2" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
665 "movq "s_offset"(%%"REG_S"), %%xmm0 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
666 "movq "s_offset"+8(%%"REG_S"), %%xmm4 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
667 "punpcklbw %%xmm7, %%xmm0 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
668 "punpcklbw %%xmm7, %%xmm4 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
669 "pmullw %%xmm0, %%"out_reg1" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
670 "pmullw %%xmm4, %%"out_reg2" \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
671
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
672 #define snow_inner_add_yblock_sse2_accum_8(ptr_offset, s_offset) \
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
673 snow_inner_add_yblock_sse2_start_8("xmm2", "xmm6", ptr_offset, s_offset)\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
674 "paddusw %%xmm2, %%xmm1 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
675 "paddusw %%xmm6, %%xmm5 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
676
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
677 #define snow_inner_add_yblock_sse2_accum_16(ptr_offset, s_offset) \
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
678 snow_inner_add_yblock_sse2_start_16("xmm2", "xmm6", ptr_offset, s_offset)\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
679 "paddusw %%xmm2, %%xmm1 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
680 "paddusw %%xmm6, %%xmm5 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
681
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
682 #define snow_inner_add_yblock_sse2_end_common1\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
683 "add $32, %%"REG_S" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
684 "add %%"REG_c", %0 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
685 "add %%"REG_c", "PTR_SIZE"*3(%%"REG_a");\n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
686 "add %%"REG_c", "PTR_SIZE"*2(%%"REG_a");\n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
687 "add %%"REG_c", "PTR_SIZE"*1(%%"REG_a");\n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
688 "add %%"REG_c", (%%"REG_a") \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
689
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
690 #define snow_inner_add_yblock_sse2_end_common2\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
691 "jnz 1b \n\t"\
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
692 :"+m"(dst8),"+m"(dst_array),"=&r"(tmp)\
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
693 :\
3265
ba26b176dcf8 gcc-2.95 compile fix, patch by Wolfram Gloger <wmglo A dent PIS med PIS uni-muenchen PIS de>
gpoirier
parents: 3223
diff changeset
694 "rm"((long)(src_x<<2)),"m"(obmc),"a"(block),"m"((long)b_h),"m"((long)src_stride):\
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
695 "%"REG_c"","%"REG_S"","%"REG_D"","%"REG_d"");
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
696
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
697 #define snow_inner_add_yblock_sse2_end_8\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
698 "sal $1, %%"REG_c" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
699 "add $"PTR_SIZE"*2, %1 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
700 snow_inner_add_yblock_sse2_end_common1\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
701 "sar $1, %%"REG_c" \n\t"\
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
702 "sub $2, %2 \n\t"\
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
703 snow_inner_add_yblock_sse2_end_common2
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
704
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
705 #define snow_inner_add_yblock_sse2_end_16\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
706 "add $"PTR_SIZE"*1, %1 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
707 snow_inner_add_yblock_sse2_end_common1\
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
708 "dec %2 \n\t"\
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
709 snow_inner_add_yblock_sse2_end_common2
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
710
4436
d3e389536b0a Add the const specifier as needed to reduce the number of warnings.
takis
parents: 3947
diff changeset
711 static void inner_add_yblock_bw_8_obmc_16_bh_even_sse2(const uint8_t *obmc, const long obmc_stride, uint8_t * * block, int b_w, long b_h,
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
712 int src_x, int src_y, long src_stride, slice_buffer * sb, int add, uint8_t * dst8){
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
713 snow_inner_add_yblock_sse2_header
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
714 snow_inner_add_yblock_sse2_start_8("xmm1", "xmm5", "3", "0")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
715 snow_inner_add_yblock_sse2_accum_8("2", "8")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
716 snow_inner_add_yblock_sse2_accum_8("1", "128")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
717 snow_inner_add_yblock_sse2_accum_8("0", "136")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
718
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
719 "mov %0, %%"REG_d" \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
720 "movdqa (%%"REG_D"), %%xmm0 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
721 "movdqa %%xmm1, %%xmm2 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
722
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
723 "punpckhwd %%xmm7, %%xmm1 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
724 "punpcklwd %%xmm7, %%xmm2 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
725 "paddd %%xmm2, %%xmm0 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
726 "movdqa 16(%%"REG_D"), %%xmm2 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
727 "paddd %%xmm1, %%xmm2 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
728 "paddd %%xmm3, %%xmm0 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
729 "paddd %%xmm3, %%xmm2 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
730
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
731 "mov %1, %%"REG_D" \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
732 "mov "PTR_SIZE"(%%"REG_D"), %%"REG_D";\n\t"
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
733 "add %3, %%"REG_D" \n\t"
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
734
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
735 "movdqa (%%"REG_D"), %%xmm4 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
736 "movdqa %%xmm5, %%xmm6 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
737 "punpckhwd %%xmm7, %%xmm5 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
738 "punpcklwd %%xmm7, %%xmm6 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
739 "paddd %%xmm6, %%xmm4 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
740 "movdqa 16(%%"REG_D"), %%xmm6 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
741 "paddd %%xmm5, %%xmm6 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
742 "paddd %%xmm3, %%xmm4 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
743 "paddd %%xmm3, %%xmm6 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
744
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
745 "psrad $8, %%xmm0 \n\t" /* FRAC_BITS. */
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
746 "psrad $8, %%xmm2 \n\t" /* FRAC_BITS. */
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
747 "packssdw %%xmm2, %%xmm0 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
748 "packuswb %%xmm7, %%xmm0 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
749 "movq %%xmm0, (%%"REG_d") \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
750
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
751 "psrad $8, %%xmm4 \n\t" /* FRAC_BITS. */
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
752 "psrad $8, %%xmm6 \n\t" /* FRAC_BITS. */
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
753 "packssdw %%xmm6, %%xmm4 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
754 "packuswb %%xmm7, %%xmm4 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
755 "movq %%xmm4, (%%"REG_d",%%"REG_c");\n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
756 snow_inner_add_yblock_sse2_end_8
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
757 }
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
758
4436
d3e389536b0a Add the const specifier as needed to reduce the number of warnings.
takis
parents: 3947
diff changeset
759 static void inner_add_yblock_bw_16_obmc_32_sse2(const uint8_t *obmc, const long obmc_stride, uint8_t * * block, int b_w, long b_h,
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
760 int src_x, int src_y, long src_stride, slice_buffer * sb, int add, uint8_t * dst8){
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
761 snow_inner_add_yblock_sse2_header
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
762 snow_inner_add_yblock_sse2_start_16("xmm1", "xmm5", "3", "0")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
763 snow_inner_add_yblock_sse2_accum_16("2", "16")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
764 snow_inner_add_yblock_sse2_accum_16("1", "512")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
765 snow_inner_add_yblock_sse2_accum_16("0", "528")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
766
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
767 "mov %0, %%"REG_d" \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
768 "movdqa %%xmm1, %%xmm0 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
769 "movdqa %%xmm5, %%xmm4 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
770 "punpcklwd %%xmm7, %%xmm0 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
771 "paddd (%%"REG_D"), %%xmm0 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
772 "punpckhwd %%xmm7, %%xmm1 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
773 "paddd 16(%%"REG_D"), %%xmm1 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
774 "punpcklwd %%xmm7, %%xmm4 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
775 "paddd 32(%%"REG_D"), %%xmm4 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
776 "punpckhwd %%xmm7, %%xmm5 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
777 "paddd 48(%%"REG_D"), %%xmm5 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
778 "paddd %%xmm3, %%xmm0 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
779 "paddd %%xmm3, %%xmm1 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
780 "paddd %%xmm3, %%xmm4 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
781 "paddd %%xmm3, %%xmm5 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
782 "psrad $8, %%xmm0 \n\t" /* FRAC_BITS. */
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
783 "psrad $8, %%xmm1 \n\t" /* FRAC_BITS. */
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
784 "psrad $8, %%xmm4 \n\t" /* FRAC_BITS. */
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
785 "psrad $8, %%xmm5 \n\t" /* FRAC_BITS. */
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
786
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
787 "packssdw %%xmm1, %%xmm0 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
788 "packssdw %%xmm5, %%xmm4 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
789 "packuswb %%xmm4, %%xmm0 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
790
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
791 "movdqu %%xmm0, (%%"REG_d") \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
792
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
793 snow_inner_add_yblock_sse2_end_16
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
794 }
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
795
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
796 #define snow_inner_add_yblock_mmx_header \
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
797 DWTELEM * * dst_array = sb->line + src_y;\
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
798 long tmp;\
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
799 asm volatile(\
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
800 "mov %7, %%"REG_c" \n\t"\
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
801 "mov %6, %2 \n\t"\
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
802 "mov %4, %%"REG_S" \n\t"\
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
803 "pxor %%mm7, %%mm7 \n\t" /* 0 */\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
804 "pcmpeqd %%mm3, %%mm3 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
805 "pslld $31, %%mm3 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
806 "psrld $24, %%mm3 \n\t" /* FRAC_BITS >> 1 */\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
807 "1: \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
808 "mov %1, %%"REG_D" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
809 "mov (%%"REG_D"), %%"REG_D" \n\t"\
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
810 "add %3, %%"REG_D" \n\t"
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
811
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
812 #define snow_inner_add_yblock_mmx_start(out_reg1, out_reg2, ptr_offset, s_offset, d_offset)\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
813 "mov "PTR_SIZE"*"ptr_offset"(%%"REG_a"), %%"REG_d"; \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
814 "movd "d_offset"(%%"REG_d"), %%"out_reg1" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
815 "movd "d_offset"+4(%%"REG_d"), %%"out_reg2" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
816 "punpcklbw %%mm7, %%"out_reg1" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
817 "punpcklbw %%mm7, %%"out_reg2" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
818 "movd "s_offset"(%%"REG_S"), %%mm0 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
819 "movd "s_offset"+4(%%"REG_S"), %%mm4 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
820 "punpcklbw %%mm7, %%mm0 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
821 "punpcklbw %%mm7, %%mm4 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
822 "pmullw %%mm0, %%"out_reg1" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
823 "pmullw %%mm4, %%"out_reg2" \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
824
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
825 #define snow_inner_add_yblock_mmx_accum(ptr_offset, s_offset, d_offset) \
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
826 snow_inner_add_yblock_mmx_start("mm2", "mm6", ptr_offset, s_offset, d_offset)\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
827 "paddusw %%mm2, %%mm1 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
828 "paddusw %%mm6, %%mm5 \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
829
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
830 #define snow_inner_add_yblock_mmx_mix(read_offset, write_offset)\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
831 "mov %0, %%"REG_d" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
832 "movq %%mm1, %%mm0 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
833 "movq %%mm5, %%mm4 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
834 "punpcklwd %%mm7, %%mm0 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
835 "paddd "read_offset"(%%"REG_D"), %%mm0 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
836 "punpckhwd %%mm7, %%mm1 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
837 "paddd "read_offset"+8(%%"REG_D"), %%mm1 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
838 "punpcklwd %%mm7, %%mm4 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
839 "paddd "read_offset"+16(%%"REG_D"), %%mm4 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
840 "punpckhwd %%mm7, %%mm5 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
841 "paddd "read_offset"+24(%%"REG_D"), %%mm5 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
842 "paddd %%mm3, %%mm0 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
843 "paddd %%mm3, %%mm1 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
844 "paddd %%mm3, %%mm4 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
845 "paddd %%mm3, %%mm5 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
846 "psrad $8, %%mm0 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
847 "psrad $8, %%mm1 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
848 "psrad $8, %%mm4 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
849 "psrad $8, %%mm5 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
850 \
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
851 "packssdw %%mm1, %%mm0 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
852 "packssdw %%mm5, %%mm4 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
853 "packuswb %%mm4, %%mm0 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
854 "movq %%mm0, "write_offset"(%%"REG_d") \n\t"
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
855
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
856 #define snow_inner_add_yblock_mmx_end(s_step)\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
857 "add $"s_step", %%"REG_S" \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
858 "add %%"REG_c", "PTR_SIZE"*3(%%"REG_a");\n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
859 "add %%"REG_c", "PTR_SIZE"*2(%%"REG_a");\n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
860 "add %%"REG_c", "PTR_SIZE"*1(%%"REG_a");\n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
861 "add %%"REG_c", (%%"REG_a") \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
862 "add $"PTR_SIZE"*1, %1 \n\t"\
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
863 "add %%"REG_c", %0 \n\t"\
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
864 "dec %2 \n\t"\
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
865 "jnz 1b \n\t"\
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
866 :"+m"(dst8),"+m"(dst_array),"=&r"(tmp)\
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
867 :\
3265
ba26b176dcf8 gcc-2.95 compile fix, patch by Wolfram Gloger <wmglo A dent PIS med PIS uni-muenchen PIS de>
gpoirier
parents: 3223
diff changeset
868 "rm"((long)(src_x<<2)),"m"(obmc),"a"(block),"m"((long)b_h),"m"((long)src_stride):\
3566
b63ef6fcbc70 Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents: 3398
diff changeset
869 "%"REG_c"","%"REG_S"","%"REG_D"","%"REG_d"");
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
870
4436
d3e389536b0a Add the const specifier as needed to reduce the number of warnings.
takis
parents: 3947
diff changeset
871 static void inner_add_yblock_bw_8_obmc_16_mmx(const uint8_t *obmc, const long obmc_stride, uint8_t * * block, int b_w, long b_h,
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
872 int src_x, int src_y, long src_stride, slice_buffer * sb, int add, uint8_t * dst8){
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
873 snow_inner_add_yblock_mmx_header
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
874 snow_inner_add_yblock_mmx_start("mm1", "mm5", "3", "0", "0")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
875 snow_inner_add_yblock_mmx_accum("2", "8", "0")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
876 snow_inner_add_yblock_mmx_accum("1", "128", "0")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
877 snow_inner_add_yblock_mmx_accum("0", "136", "0")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
878 snow_inner_add_yblock_mmx_mix("0", "0")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
879 snow_inner_add_yblock_mmx_end("16")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
880 }
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
881
4436
d3e389536b0a Add the const specifier as needed to reduce the number of warnings.
takis
parents: 3947
diff changeset
882 static void inner_add_yblock_bw_16_obmc_32_mmx(const uint8_t *obmc, const long obmc_stride, uint8_t * * block, int b_w, long b_h,
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
883 int src_x, int src_y, long src_stride, slice_buffer * sb, int add, uint8_t * dst8){
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
884 snow_inner_add_yblock_mmx_header
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
885 snow_inner_add_yblock_mmx_start("mm1", "mm5", "3", "0", "0")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
886 snow_inner_add_yblock_mmx_accum("2", "16", "0")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
887 snow_inner_add_yblock_mmx_accum("1", "512", "0")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
888 snow_inner_add_yblock_mmx_accum("0", "528", "0")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
889 snow_inner_add_yblock_mmx_mix("0", "0")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
890
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
891 snow_inner_add_yblock_mmx_start("mm1", "mm5", "3", "8", "8")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
892 snow_inner_add_yblock_mmx_accum("2", "24", "8")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
893 snow_inner_add_yblock_mmx_accum("1", "520", "8")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
894 snow_inner_add_yblock_mmx_accum("0", "536", "8")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
895 snow_inner_add_yblock_mmx_mix("32", "8")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
896 snow_inner_add_yblock_mmx_end("32")
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
897 }
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
898
4436
d3e389536b0a Add the const specifier as needed to reduce the number of warnings.
takis
parents: 3947
diff changeset
899 void ff_snow_inner_add_yblock_sse2(const uint8_t *obmc, const int obmc_stride, uint8_t * * block, int b_w, int b_h,
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
900 int src_x, int src_y, int src_stride, slice_buffer * sb, int add, uint8_t * dst8){
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
901
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
902 if (b_w == 16)
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
903 inner_add_yblock_bw_16_obmc_32_sse2(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8);
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
904 else if (b_w == 8 && obmc_stride == 16) {
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
905 if (!(b_h & 1))
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
906 inner_add_yblock_bw_8_obmc_16_bh_even_sse2(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8);
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
907 else
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
908 inner_add_yblock_bw_8_obmc_16_mmx(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8);
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
909 } else
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
910 ff_snow_inner_add_yblock(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8);
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
911 }
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
912
4436
d3e389536b0a Add the const specifier as needed to reduce the number of warnings.
takis
parents: 3947
diff changeset
913 void ff_snow_inner_add_yblock_mmx(const uint8_t *obmc, const int obmc_stride, uint8_t * * block, int b_w, int b_h,
3211
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
914 int src_x, int src_y, int src_stride, slice_buffer * sb, int add, uint8_t * dst8){
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
915 if (b_w == 16)
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
916 inner_add_yblock_bw_16_obmc_32_mmx(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8);
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
917 else if (b_w == 8 && obmc_stride == 16)
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
918 inner_add_yblock_bw_8_obmc_16_mmx(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8);
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
919 else
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
920 ff_snow_inner_add_yblock(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8);
b77b5e7072d6 add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents: 3210
diff changeset
921 }