annotate i386/cputest.c @ 2580:b4f6f89ec2f6 libavcodec

The cvs version 1.103 of h264.c brokes 13 conformance streams, this patch corrects this and decodes the same streams as version 1.102. patch by (Lo«Ác Le Loarer <lll+ffmpeg m4x org>)
author michael
date Sun, 27 Mar 2005 00:27:37 +0000
parents 55a72627a2c5
children ef2149182f1c
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1 /* Cpu detection code, extracted from mmx.h ((c)1997-99 by H. Dietz
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2 and R. Fisher). Converted to C and improved by Fabrice Bellard */
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3
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4 #include <stdlib.h>
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5 #include "../dsputil.h"
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6
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7 #ifdef ARCH_X86_64
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8 # define REG_b "rbx"
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9 # define REG_S "rsi"
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10 #else
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11 # define REG_b "ebx"
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12 # define REG_S "esi"
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13 #endif
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14
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15 /* ebx saving is necessary for PIC. gcc seems unable to see it alone */
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16 #define cpuid(index,eax,ebx,ecx,edx)\
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17 __asm __volatile\
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18 ("mov %%"REG_b", %%"REG_S"\n\t"\
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19 "cpuid\n\t"\
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20 "xchg %%"REG_b", %%"REG_S\
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21 : "=a" (eax), "=S" (ebx),\
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22 "=c" (ecx), "=d" (edx)\
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23 : "0" (index));
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24
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25 /* Function to test if multimedia instructions are supported... */
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26 int mm_support(void)
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27 {
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28 int rval = 0;
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29 int eax, ebx, ecx, edx;
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30 int max_std_level, max_ext_level, std_caps=0, ext_caps=0;
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31 long a, c;
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32
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33 __asm__ __volatile__ (
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34 /* See if CPUID instruction is supported ... */
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35 /* ... Get copies of EFLAGS into eax and ecx */
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36 "pushf\n\t"
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37 "pop %0\n\t"
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38 "mov %0, %1\n\t"
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39
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40 /* ... Toggle the ID bit in one copy and store */
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41 /* to the EFLAGS reg */
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42 "xor $0x200000, %0\n\t"
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43 "push %0\n\t"
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44 "popf\n\t"
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45
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46 /* ... Get the (hopefully modified) EFLAGS */
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47 "pushf\n\t"
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48 "pop %0\n\t"
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49 : "=a" (a), "=c" (c)
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50 :
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51 : "cc"
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52 );
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53
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54 if (a == c)
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55 return 0; /* CPUID not supported */
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56
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57 cpuid(0, max_std_level, ebx, ecx, edx);
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58
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59 if(max_std_level >= 1){
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60 cpuid(1, eax, ebx, ecx, std_caps);
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61 if (std_caps & (1<<23))
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62 rval |= MM_MMX;
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63 if (std_caps & (1<<25))
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64 rval |= MM_MMXEXT | MM_SSE;
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65 if (std_caps & (1<<26))
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66 rval |= MM_SSE2;
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67 }
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68
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69 cpuid(0x80000000, max_ext_level, ebx, ecx, edx);
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70
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71 if(max_ext_level >= 0x80000001){
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72 cpuid(0x80000001, eax, ebx, ecx, ext_caps);
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73 if (ext_caps & (1<<31))
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74 rval |= MM_3DNOW;
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75 if (ext_caps & (1<<30))
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76 rval |= MM_3DNOWEXT;
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77 if (ext_caps & (1<<23))
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78 rval |= MM_MMX;
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79 }
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80
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81 cpuid(0, eax, ebx, ecx, edx);
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82 if ( ebx == 0x68747541 &&
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83 edx == 0x69746e65 &&
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84 ecx == 0x444d4163) {
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85 /* AMD */
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86 if(ext_caps & (1<<22))
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87 rval |= MM_MMXEXT;
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88 } else if (ebx == 0x746e6543 &&
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89 edx == 0x48727561 &&
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90 ecx == 0x736c7561) { /* "CentaurHauls" */
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91 /* VIA C3 */
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92 if(ext_caps & (1<<24))
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93 rval |= MM_MMXEXT;
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94 } else if (ebx == 0x69727943 &&
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95 edx == 0x736e4978 &&
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96 ecx == 0x64616574) {
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97 /* Cyrix Section */
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98 /* See if extended CPUID level 80000001 is supported */
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99 /* The value of CPUID/80000001 for the 6x86MX is undefined
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100 according to the Cyrix CPU Detection Guide (Preliminary
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101 Rev. 1.01 table 1), so we'll check the value of eax for
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102 CPUID/0 to see if standard CPUID level 2 is supported.
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103 According to the table, the only CPU which supports level
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104 2 is also the only one which supports extended CPUID levels.
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105 */
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106 if (eax < 2)
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107 return rval;
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108 if (ext_caps & (1<<24))
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109 rval |= MM_MMXEXT;
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110 }
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111 #if 0
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112 av_log(NULL, AV_LOG_DEBUG, "%s%s%s%s%s%s\n",
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113 (rval&MM_MMX) ? "MMX ":"",
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114 (rval&MM_MMXEXT) ? "MMX2 ":"",
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115 (rval&MM_SSE) ? "SSE ":"",
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116 (rval&MM_SSE2) ? "SSE2 ":"",
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117 (rval&MM_3DNOW) ? "3DNow ":"",
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118 (rval&MM_3DNOWEXT) ? "3DNowExt ":"");
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119 #endif
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120 return rval;
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121 }
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122
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123 #ifdef __TEST__
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124 int main ( void )
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125 {
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126 int mm_flags;
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127 mm_flags = mm_support();
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128 printf("mm_support = 0x%08X\n",mm_flags);
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129 return 0;
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130 }
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131 #endif