annotate ppc/vc1dsp_altivec.c @ 5130:bd2133a6973c libavcodec

Blackfin IDCT has no special permutation it uses normal order
author mhoffman
date Tue, 12 Jun 2007 19:06:39 +0000
parents d5ba514e3f4a
children 2b72f9bc4f06
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1 /*
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2 * VC-1 and WMV3 decoder - DSP functions AltiVec-optimized
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3 * Copyright (c) 2006 Konstantin Shishkov
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4 *
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5 * This file is part of FFmpeg.
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6 *
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7 * FFmpeg is free software; you can redistribute it and/or
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8 * modify it under the terms of the GNU Lesser General Public
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9 * License as published by the Free Software Foundation; either
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10 * version 2.1 of the License, or (at your option) any later version.
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11 *
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12 * FFmpeg is distributed in the hope that it will be useful,
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13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 * Lesser General Public License for more details.
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16 *
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17 * You should have received a copy of the GNU Lesser General Public
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18 * License along with FFmpeg; if not, write to the Free Software
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19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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20 *
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21 */
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22
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23 #include "dsputil.h"
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24
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25 #include "gcc_fixes.h"
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26
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27 #include "dsputil_altivec.h"
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28
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29 // main steps of 8x8 transform
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30 #define STEP8(s0, s1, s2, s3, s4, s5, s6, s7, vec_rnd) \
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31 do { \
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32 t0 = vec_sl(vec_add(s0, s4), vec_2); \
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33 t0 = vec_add(vec_sl(t0, vec_1), t0); \
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34 t0 = vec_add(t0, vec_rnd); \
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35 t1 = vec_sl(vec_sub(s0, s4), vec_2); \
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36 t1 = vec_add(vec_sl(t1, vec_1), t1); \
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37 t1 = vec_add(t1, vec_rnd); \
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38 t2 = vec_add(vec_sl(s6, vec_2), vec_sl(s6, vec_1)); \
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39 t2 = vec_add(t2, vec_sl(s2, vec_4)); \
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40 t3 = vec_add(vec_sl(s2, vec_2), vec_sl(s2, vec_1)); \
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41 t3 = vec_sub(t3, vec_sl(s6, vec_4)); \
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42 t4 = vec_add(t0, t2); \
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43 t5 = vec_add(t1, t3); \
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44 t6 = vec_sub(t1, t3); \
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45 t7 = vec_sub(t0, t2); \
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46 \
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47 t0 = vec_sl(vec_add(s1, s3), vec_4); \
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48 t0 = vec_add(t0, vec_sl(s5, vec_3)); \
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49 t0 = vec_add(t0, vec_sl(s7, vec_2)); \
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50 t0 = vec_add(t0, vec_sub(s5, s3)); \
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51 \
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52 t1 = vec_sl(vec_sub(s1, s5), vec_4); \
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53 t1 = vec_sub(t1, vec_sl(s7, vec_3)); \
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54 t1 = vec_sub(t1, vec_sl(s3, vec_2)); \
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55 t1 = vec_sub(t1, vec_add(s1, s7)); \
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56 \
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57 t2 = vec_sl(vec_sub(s7, s3), vec_4); \
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58 t2 = vec_add(t2, vec_sl(s1, vec_3)); \
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59 t2 = vec_add(t2, vec_sl(s5, vec_2)); \
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60 t2 = vec_add(t2, vec_sub(s1, s7)); \
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61 \
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62 t3 = vec_sl(vec_sub(s5, s7), vec_4); \
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63 t3 = vec_sub(t3, vec_sl(s3, vec_3)); \
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64 t3 = vec_add(t3, vec_sl(s1, vec_2)); \
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65 t3 = vec_sub(t3, vec_add(s3, s5)); \
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66 \
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67 s0 = vec_add(t4, t0); \
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68 s1 = vec_add(t5, t1); \
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69 s2 = vec_add(t6, t2); \
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70 s3 = vec_add(t7, t3); \
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71 s4 = vec_sub(t7, t3); \
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72 s5 = vec_sub(t6, t2); \
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73 s6 = vec_sub(t5, t1); \
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74 s7 = vec_sub(t4, t0); \
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75 }while(0)
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76
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77 #define SHIFT_HOR8(s0, s1, s2, s3, s4, s5, s6, s7) \
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78 do { \
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79 s0 = vec_sra(s0, vec_3); \
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80 s1 = vec_sra(s1, vec_3); \
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81 s2 = vec_sra(s2, vec_3); \
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82 s3 = vec_sra(s3, vec_3); \
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83 s4 = vec_sra(s4, vec_3); \
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84 s5 = vec_sra(s5, vec_3); \
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85 s6 = vec_sra(s6, vec_3); \
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86 s7 = vec_sra(s7, vec_3); \
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87 }while(0)
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88
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89 #define SHIFT_VERT8(s0, s1, s2, s3, s4, s5, s6, s7) \
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90 do { \
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91 s0 = vec_sra(s0, vec_7); \
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92 s1 = vec_sra(s1, vec_7); \
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93 s2 = vec_sra(s2, vec_7); \
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94 s3 = vec_sra(s3, vec_7); \
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95 s4 = vec_sra(vec_add(s4, vec_1s), vec_7); \
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96 s5 = vec_sra(vec_add(s5, vec_1s), vec_7); \
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97 s6 = vec_sra(vec_add(s6, vec_1s), vec_7); \
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98 s7 = vec_sra(vec_add(s7, vec_1s), vec_7); \
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99 }while(0)
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100
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101 /* main steps of 4x4 transform */
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102 #define STEP4(s0, s1, s2, s3, vec_rnd) \
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103 do { \
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104 t1 = vec_add(vec_sl(s0, vec_4), s0); \
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105 t1 = vec_add(t1, vec_rnd); \
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106 t2 = vec_add(vec_sl(s2, vec_4), s2); \
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107 t0 = vec_add(t1, t2); \
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108 t1 = vec_sub(t1, t2); \
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109 t3 = vec_sl(vec_sub(s3, s1), vec_1); \
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110 t3 = vec_add(t3, vec_sl(t3, vec_2)); \
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111 t2 = vec_add(t3, vec_sl(s1, vec_5)); \
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112 t3 = vec_add(t3, vec_sl(s3, vec_3)); \
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113 t3 = vec_add(t3, vec_sl(s3, vec_2)); \
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114 s0 = vec_add(t0, t2); \
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115 s1 = vec_sub(t1, t3); \
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116 s2 = vec_add(t1, t3); \
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117 s3 = vec_sub(t0, t2); \
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118 }while (0)
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119
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120 #define SHIFT_HOR4(s0, s1, s2, s3) \
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121 s0 = vec_sra(s0, vec_3); \
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122 s1 = vec_sra(s1, vec_3); \
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123 s2 = vec_sra(s2, vec_3); \
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124 s3 = vec_sra(s3, vec_3);
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125
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126 #define SHIFT_VERT4(s0, s1, s2, s3) \
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127 s0 = vec_sra(s0, vec_7); \
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128 s1 = vec_sra(s1, vec_7); \
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129 s2 = vec_sra(s2, vec_7); \
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130 s3 = vec_sra(s3, vec_7);
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131
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132 /** Do inverse transform on 8x8 block
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133 */
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134 static void vc1_inv_trans_8x8_altivec(DCTELEM block[64])
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135 {
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136 vector signed short src0, src1, src2, src3, src4, src5, src6, src7;
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137 vector signed int s0, s1, s2, s3, s4, s5, s6, s7;
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138 vector signed int s8, s9, sA, sB, sC, sD, sE, sF;
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139 vector signed int t0, t1, t2, t3, t4, t5, t6, t7;
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140 const vector signed int vec_64 = vec_sl(vec_splat_s32(4), vec_splat_u32(4));
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141 const vector unsigned int vec_7 = vec_splat_u32(7);
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142 const vector unsigned int vec_5 = vec_splat_u32(5);
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143 const vector unsigned int vec_4 = vec_splat_u32(4);
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144 const vector signed int vec_4s = vec_splat_s32(4);
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145 const vector unsigned int vec_3 = vec_splat_u32(3);
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146 const vector unsigned int vec_2 = vec_splat_u32(2);
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147 const vector signed int vec_1s = vec_splat_s32(1);
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148 const vector unsigned int vec_1 = vec_splat_u32(1);
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149
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150
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151 src0 = vec_ld( 0, block);
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152 src1 = vec_ld( 16, block);
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153 src2 = vec_ld( 32, block);
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154 src3 = vec_ld( 48, block);
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diff changeset
155 src4 = vec_ld( 64, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
156 src5 = vec_ld( 80, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
157 src6 = vec_ld( 96, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
158 src7 = vec_ld(112, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
159
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diff changeset
160 TRANSPOSE8(src0, src1, src2, src3, src4, src5, src6, src7);
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diff changeset
161 s0 = vec_unpackl(src0);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
162 s1 = vec_unpackl(src1);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
163 s2 = vec_unpackl(src2);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
164 s3 = vec_unpackl(src3);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
165 s4 = vec_unpackl(src4);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
166 s5 = vec_unpackl(src5);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
167 s6 = vec_unpackl(src6);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
168 s7 = vec_unpackl(src7);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
169 s8 = vec_unpackh(src0);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
170 s9 = vec_unpackh(src1);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
171 sA = vec_unpackh(src2);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
172 sB = vec_unpackh(src3);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
173 sC = vec_unpackh(src4);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
174 sD = vec_unpackh(src5);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
175 sE = vec_unpackh(src6);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
176 sF = vec_unpackh(src7);
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diff changeset
177 STEP8(s0, s1, s2, s3, s4, s5, s6, s7, vec_4s);
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178 SHIFT_HOR8(s0, s1, s2, s3, s4, s5, s6, s7);
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179 STEP8(s8, s9, sA, sB, sC, sD, sE, sF, vec_4s);
f52e3f60481b Some AltiVec optimizations for VC-1
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180 SHIFT_HOR8(s8, s9, sA, sB, sC, sD, sE, sF);
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181 src0 = vec_pack(s8, s0);
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diff changeset
182 src1 = vec_pack(s9, s1);
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diff changeset
183 src2 = vec_pack(sA, s2);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
184 src3 = vec_pack(sB, s3);
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diff changeset
185 src4 = vec_pack(sC, s4);
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diff changeset
186 src5 = vec_pack(sD, s5);
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diff changeset
187 src6 = vec_pack(sE, s6);
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diff changeset
188 src7 = vec_pack(sF, s7);
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189 TRANSPOSE8(src0, src1, src2, src3, src4, src5, src6, src7);
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190
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191 s0 = vec_unpackl(src0);
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192 s1 = vec_unpackl(src1);
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193 s2 = vec_unpackl(src2);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
194 s3 = vec_unpackl(src3);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
195 s4 = vec_unpackl(src4);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
196 s5 = vec_unpackl(src5);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
197 s6 = vec_unpackl(src6);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
198 s7 = vec_unpackl(src7);
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diff changeset
199 s8 = vec_unpackh(src0);
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diff changeset
200 s9 = vec_unpackh(src1);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
201 sA = vec_unpackh(src2);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
202 sB = vec_unpackh(src3);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
203 sC = vec_unpackh(src4);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
204 sD = vec_unpackh(src5);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
205 sE = vec_unpackh(src6);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
206 sF = vec_unpackh(src7);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
207 STEP8(s0, s1, s2, s3, s4, s5, s6, s7, vec_64);
f52e3f60481b Some AltiVec optimizations for VC-1
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208 SHIFT_VERT8(s0, s1, s2, s3, s4, s5, s6, s7);
f52e3f60481b Some AltiVec optimizations for VC-1
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209 STEP8(s8, s9, sA, sB, sC, sD, sE, sF, vec_64);
f52e3f60481b Some AltiVec optimizations for VC-1
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210 SHIFT_VERT8(s8, s9, sA, sB, sC, sD, sE, sF);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
211 src0 = vec_pack(s8, s0);
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diff changeset
212 src1 = vec_pack(s9, s1);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
213 src2 = vec_pack(sA, s2);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
214 src3 = vec_pack(sB, s3);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
215 src4 = vec_pack(sC, s4);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
216 src5 = vec_pack(sD, s5);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
217 src6 = vec_pack(sE, s6);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
218 src7 = vec_pack(sF, s7);
f52e3f60481b Some AltiVec optimizations for VC-1
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219
f52e3f60481b Some AltiVec optimizations for VC-1
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220 vec_st(src0, 0, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
221 vec_st(src1, 16, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
222 vec_st(src2, 32, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
223 vec_st(src3, 48, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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224 vec_st(src4, 64, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
225 vec_st(src5, 80, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
226 vec_st(src6, 96, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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227 vec_st(src7,112, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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228 }
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229
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
230 /** Do inverse transform on 8x4 part of block
f52e3f60481b Some AltiVec optimizations for VC-1
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231 */
f52e3f60481b Some AltiVec optimizations for VC-1
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232 static void vc1_inv_trans_8x4_altivec(DCTELEM block[64], int n)
f52e3f60481b Some AltiVec optimizations for VC-1
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233 {
f52e3f60481b Some AltiVec optimizations for VC-1
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234 vector signed short src0, src1, src2, src3, src4, src5, src6, src7;
f52e3f60481b Some AltiVec optimizations for VC-1
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235 vector signed int s0, s1, s2, s3, s4, s5, s6, s7;
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
236 vector signed int s8, s9, sA, sB, sC, sD, sE, sF;
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
237 vector signed int t0, t1, t2, t3, t4, t5, t6, t7;
f52e3f60481b Some AltiVec optimizations for VC-1
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238 const vector signed int vec_64 = vec_sl(vec_splat_s32(4), vec_splat_u32(4));
f52e3f60481b Some AltiVec optimizations for VC-1
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239 const vector unsigned int vec_7 = vec_splat_u32(7);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
240 const vector unsigned int vec_5 = vec_splat_u32(5);
f52e3f60481b Some AltiVec optimizations for VC-1
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241 const vector unsigned int vec_4 = vec_splat_u32(4);
f52e3f60481b Some AltiVec optimizations for VC-1
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242 const vector signed int vec_4s = vec_splat_s32(4);
f52e3f60481b Some AltiVec optimizations for VC-1
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243 const vector unsigned int vec_3 = vec_splat_u32(3);
f52e3f60481b Some AltiVec optimizations for VC-1
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244 const vector unsigned int vec_2 = vec_splat_u32(2);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
245 const vector unsigned int vec_1 = vec_splat_u32(1);
f52e3f60481b Some AltiVec optimizations for VC-1
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246
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
247 src0 = vec_ld( 0, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
248 src1 = vec_ld( 16, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
249 src2 = vec_ld( 32, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
250 src3 = vec_ld( 48, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
251 src4 = vec_ld( 64, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
252 src5 = vec_ld( 80, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
253 src6 = vec_ld( 96, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
254 src7 = vec_ld(112, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
255
f52e3f60481b Some AltiVec optimizations for VC-1
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256 TRANSPOSE8(src0, src1, src2, src3, src4, src5, src6, src7);
f52e3f60481b Some AltiVec optimizations for VC-1
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257 s0 = vec_unpackl(src0);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
258 s1 = vec_unpackl(src1);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
259 s2 = vec_unpackl(src2);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
260 s3 = vec_unpackl(src3);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
261 s4 = vec_unpackl(src4);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
262 s5 = vec_unpackl(src5);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
263 s6 = vec_unpackl(src6);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
264 s7 = vec_unpackl(src7);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
265 s8 = vec_unpackh(src0);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
266 s9 = vec_unpackh(src1);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
267 sA = vec_unpackh(src2);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
268 sB = vec_unpackh(src3);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
269 sC = vec_unpackh(src4);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
270 sD = vec_unpackh(src5);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
271 sE = vec_unpackh(src6);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
272 sF = vec_unpackh(src7);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
273 STEP8(s0, s1, s2, s3, s4, s5, s6, s7, vec_4s);
f52e3f60481b Some AltiVec optimizations for VC-1
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274 SHIFT_HOR8(s0, s1, s2, s3, s4, s5, s6, s7);
f52e3f60481b Some AltiVec optimizations for VC-1
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275 STEP8(s8, s9, sA, sB, sC, sD, sE, sF, vec_4s);
f52e3f60481b Some AltiVec optimizations for VC-1
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276 SHIFT_HOR8(s8, s9, sA, sB, sC, sD, sE, sF);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
277 src0 = vec_pack(s8, s0);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
278 src1 = vec_pack(s9, s1);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
279 src2 = vec_pack(sA, s2);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
280 src3 = vec_pack(sB, s3);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
281 src4 = vec_pack(sC, s4);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
282 src5 = vec_pack(sD, s5);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
283 src6 = vec_pack(sE, s6);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
284 src7 = vec_pack(sF, s7);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
285 TRANSPOSE8(src0, src1, src2, src3, src4, src5, src6, src7);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
286
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
287 if(!n){ // upper half of block
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
288 s0 = vec_unpackh(src0);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
289 s1 = vec_unpackh(src1);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
290 s2 = vec_unpackh(src2);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
291 s3 = vec_unpackh(src3);
f52e3f60481b Some AltiVec optimizations for VC-1
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parents:
diff changeset
292 s8 = vec_unpackl(src0);
f52e3f60481b Some AltiVec optimizations for VC-1
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parents:
diff changeset
293 s9 = vec_unpackl(src1);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
294 sA = vec_unpackl(src2);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
295 sB = vec_unpackl(src3);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
296 STEP4(s0, s1, s2, s3, vec_64);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
297 SHIFT_VERT4(s0, s1, s2, s3);
f52e3f60481b Some AltiVec optimizations for VC-1
kostya
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diff changeset
298 STEP4(s8, s9, sA, sB, vec_64);
f52e3f60481b Some AltiVec optimizations for VC-1
kostya
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diff changeset
299 SHIFT_VERT4(s8, s9, sA, sB);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
300 src0 = vec_pack(s0, s8);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
301 src1 = vec_pack(s1, s9);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
302 src2 = vec_pack(s2, sA);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
303 src3 = vec_pack(s3, sB);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
304
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
305 vec_st(src0, 0, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
306 vec_st(src1, 16, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
307 vec_st(src2, 32, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
308 vec_st(src3, 48, block);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
309 } else { //lower half of block
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
310 s0 = vec_unpackh(src4);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
311 s1 = vec_unpackh(src5);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
312 s2 = vec_unpackh(src6);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
313 s3 = vec_unpackh(src7);
f52e3f60481b Some AltiVec optimizations for VC-1
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diff changeset
314 s8 = vec_unpackl(src4);
f52e3f60481b Some AltiVec optimizations for VC-1
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315 s9 = vec_unpackl(src5);
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316 sA = vec_unpackl(src6);
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317 sB = vec_unpackl(src7);
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318 STEP4(s0, s1, s2, s3, vec_64);
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319 SHIFT_VERT4(s0, s1, s2, s3);
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320 STEP4(s8, s9, sA, sB, vec_64);
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321 SHIFT_VERT4(s8, s9, sA, sB);
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322 src4 = vec_pack(s0, s8);
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323 src5 = vec_pack(s1, s9);
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324 src6 = vec_pack(s2, sA);
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325 src7 = vec_pack(s3, sB);
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326
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327 vec_st(src4, 64, block);
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328 vec_st(src5, 80, block);
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329 vec_st(src6, 96, block);
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330 vec_st(src7,112, block);
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331 }
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332 }
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333
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334
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335 void vc1dsp_init_altivec(DSPContext* dsp, AVCodecContext *avctx) {
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336 dsp->vc1_inv_trans_8x8 = vc1_inv_trans_8x8_altivec;
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337 dsp->vc1_inv_trans_8x4 = vc1_inv_trans_8x4_altivec;
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338 }