Mercurial > libavcodec.hg
annotate x86/dsputil_mmx.c @ 12498:c997f09d1e10 libavcodec
Move hadamard_diff{,16}_{mmx,mmx2,sse2,ssse3}() from inline asm to yasm,
which will hopefully solve the Win64/FATE failures caused by these functions.
author | rbultje |
---|---|
date | Fri, 17 Sep 2010 01:56:06 +0000 |
parents | 9fef0a8ddd63 |
children |
rev | line source |
---|---|
8430 | 1 /* |
2 * MMX optimized DSP utils | |
8629
04423b2f6e0b
cosmetics: Remove pointless period after copyright statement non-sentences.
diego
parents:
8596
diff
changeset
|
3 * Copyright (c) 2000, 2001 Fabrice Bellard |
8430 | 4 * Copyright (c) 2002-2004 Michael Niedermayer <michaelni@gmx.at> |
5 * | |
6 * This file is part of FFmpeg. | |
7 * | |
8 * FFmpeg is free software; you can redistribute it and/or | |
9 * modify it under the terms of the GNU Lesser General Public | |
10 * License as published by the Free Software Foundation; either | |
11 * version 2.1 of the License, or (at your option) any later version. | |
12 * | |
13 * FFmpeg is distributed in the hope that it will be useful, | |
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
16 * Lesser General Public License for more details. | |
17 * | |
18 * You should have received a copy of the GNU Lesser General Public | |
19 * License along with FFmpeg; if not, write to the Free Software | |
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA | |
21 * | |
22 * MMX optimization by Nick Kurshev <nickols_k@mail.ru> | |
23 */ | |
24 | |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
25 #include "libavutil/cpu.h" |
8430 | 26 #include "libavutil/x86_cpu.h" |
27 #include "libavcodec/dsputil.h" | |
11499 | 28 #include "libavcodec/h264dsp.h" |
8430 | 29 #include "libavcodec/mpegvideo.h" |
30 #include "libavcodec/simple_idct.h" | |
31 #include "dsputil_mmx.h" | |
32 #include "idct_xvid.h" | |
33 | |
34 //#undef NDEBUG | |
35 //#include <assert.h> | |
36 | |
37 /* pixel operations */ | |
11369 | 38 DECLARE_ALIGNED(8, const uint64_t, ff_bone) = 0x0101010101010101ULL; |
39 DECLARE_ALIGNED(8, const uint64_t, ff_wtwo) = 0x0002000200020002ULL; | |
8430 | 40 |
11369 | 41 DECLARE_ALIGNED(16, const uint64_t, ff_pdw_80000000)[2] = |
8430 | 42 {0x8000000080000000ULL, 0x8000000080000000ULL}; |
43 | |
11369 | 44 DECLARE_ALIGNED(8, const uint64_t, ff_pw_3 ) = 0x0003000300030003ULL; |
12143 | 45 DECLARE_ALIGNED(16, const xmm_reg, ff_pw_4 ) = {0x0004000400040004ULL, 0x0004000400040004ULL}; |
11369 | 46 DECLARE_ALIGNED(16, const xmm_reg, ff_pw_5 ) = {0x0005000500050005ULL, 0x0005000500050005ULL}; |
47 DECLARE_ALIGNED(16, const xmm_reg, ff_pw_8 ) = {0x0008000800080008ULL, 0x0008000800080008ULL}; | |
12205
d38e8565ba05
VP8 MBedge loopfilter MMX/MMX2/SSE2 functions for both luma (width=16)
rbultje
parents:
12168
diff
changeset
|
48 DECLARE_ALIGNED(16, const xmm_reg, ff_pw_9 ) = {0x0009000900090009ULL, 0x0009000900090009ULL}; |
11369 | 49 DECLARE_ALIGNED(8, const uint64_t, ff_pw_15 ) = 0x000F000F000F000FULL; |
50 DECLARE_ALIGNED(16, const xmm_reg, ff_pw_16 ) = {0x0010001000100010ULL, 0x0010001000100010ULL}; | |
12205
d38e8565ba05
VP8 MBedge loopfilter MMX/MMX2/SSE2 functions for both luma (width=16)
rbultje
parents:
12168
diff
changeset
|
51 DECLARE_ALIGNED(16, const xmm_reg, ff_pw_18 ) = {0x0012001200120012ULL, 0x0012001200120012ULL}; |
11369 | 52 DECLARE_ALIGNED(8, const uint64_t, ff_pw_20 ) = 0x0014001400140014ULL; |
12205
d38e8565ba05
VP8 MBedge loopfilter MMX/MMX2/SSE2 functions for both luma (width=16)
rbultje
parents:
12168
diff
changeset
|
53 DECLARE_ALIGNED(16, const xmm_reg, ff_pw_27 ) = {0x001B001B001B001BULL, 0x001B001B001B001BULL}; |
11369 | 54 DECLARE_ALIGNED(16, const xmm_reg, ff_pw_28 ) = {0x001C001C001C001CULL, 0x001C001C001C001CULL}; |
55 DECLARE_ALIGNED(16, const xmm_reg, ff_pw_32 ) = {0x0020002000200020ULL, 0x0020002000200020ULL}; | |
56 DECLARE_ALIGNED(8, const uint64_t, ff_pw_42 ) = 0x002A002A002A002AULL; | |
12206 | 57 DECLARE_ALIGNED(8, const uint64_t, ff_pw_53 ) = 0x0035003500350035ULL; |
12205
d38e8565ba05
VP8 MBedge loopfilter MMX/MMX2/SSE2 functions for both luma (width=16)
rbultje
parents:
12168
diff
changeset
|
58 DECLARE_ALIGNED(16, const xmm_reg, ff_pw_63 ) = {0x003F003F003F003FULL, 0x003F003F003F003FULL}; |
11369 | 59 DECLARE_ALIGNED(16, const xmm_reg, ff_pw_64 ) = {0x0040004000400040ULL, 0x0040004000400040ULL}; |
60 DECLARE_ALIGNED(8, const uint64_t, ff_pw_96 ) = 0x0060006000600060ULL; | |
61 DECLARE_ALIGNED(8, const uint64_t, ff_pw_128) = 0x0080008000800080ULL; | |
62 DECLARE_ALIGNED(8, const uint64_t, ff_pw_255) = 0x00ff00ff00ff00ffULL; | |
8430 | 63 |
12454
f4355cd85faa
Port latest x264 deblock asm (before they moved to using NV12 as internal
rbultje
parents:
12450
diff
changeset
|
64 DECLARE_ALIGNED(16, const xmm_reg, ff_pb_0 ) = {0x0000000000000000ULL, 0x0000000000000000ULL}; |
12168
b246b214c2e9
VP8 H/V inner loopfilter MMX/MMXEXT/SSE2 optimizations.
rbultje
parents:
12143
diff
changeset
|
65 DECLARE_ALIGNED(16, const xmm_reg, ff_pb_1 ) = {0x0101010101010101ULL, 0x0101010101010101ULL}; |
11951
afee30fe8c26
16x16 and 8x8c x86 SIMD intra pred functions for VP8 and H.264
darkshikari
parents:
11826
diff
changeset
|
66 DECLARE_ALIGNED(16, const xmm_reg, ff_pb_3 ) = {0x0303030303030303ULL, 0x0303030303030303ULL}; |
12086
d780ae746855
Simple H/V loopfilter for VP8 in MMX, MMX2 and SSE2 (yay for yasm macros).
rbultje
parents:
11981
diff
changeset
|
67 DECLARE_ALIGNED(16, const xmm_reg, ff_pb_4 ) = {0x0404040404040404ULL, 0x0404040404040404ULL}; |
11369 | 68 DECLARE_ALIGNED(8, const uint64_t, ff_pb_7 ) = 0x0707070707070707ULL; |
69 DECLARE_ALIGNED(8, const uint64_t, ff_pb_1F ) = 0x1F1F1F1F1F1F1F1FULL; | |
70 DECLARE_ALIGNED(8, const uint64_t, ff_pb_3F ) = 0x3F3F3F3F3F3F3F3FULL; | |
12086
d780ae746855
Simple H/V loopfilter for VP8 in MMX, MMX2 and SSE2 (yay for yasm macros).
rbultje
parents:
11981
diff
changeset
|
71 DECLARE_ALIGNED(16, const xmm_reg, ff_pb_80 ) = {0x8080808080808080ULL, 0x8080808080808080ULL}; |
11369 | 72 DECLARE_ALIGNED(8, const uint64_t, ff_pb_81 ) = 0x8181818181818181ULL; |
12454
f4355cd85faa
Port latest x264 deblock asm (before they moved to using NV12 as internal
rbultje
parents:
12450
diff
changeset
|
73 DECLARE_ALIGNED(16, const xmm_reg, ff_pb_A1 ) = {0xA1A1A1A1A1A1A1A1ULL, 0xA1A1A1A1A1A1A1A1ULL}; |
12086
d780ae746855
Simple H/V loopfilter for VP8 in MMX, MMX2 and SSE2 (yay for yasm macros).
rbultje
parents:
11981
diff
changeset
|
74 DECLARE_ALIGNED(16, const xmm_reg, ff_pb_F8 ) = {0xF8F8F8F8F8F8F8F8ULL, 0xF8F8F8F8F8F8F8F8ULL}; |
11369 | 75 DECLARE_ALIGNED(8, const uint64_t, ff_pb_FC ) = 0xFCFCFCFCFCFCFCFCULL; |
12086
d780ae746855
Simple H/V loopfilter for VP8 in MMX, MMX2 and SSE2 (yay for yasm macros).
rbultje
parents:
11981
diff
changeset
|
76 DECLARE_ALIGNED(16, const xmm_reg, ff_pb_FE ) = {0xFEFEFEFEFEFEFEFEULL, 0xFEFEFEFEFEFEFEFEULL}; |
8430 | 77 |
11369 | 78 DECLARE_ALIGNED(16, const double, ff_pd_1)[2] = { 1.0, 1.0 }; |
79 DECLARE_ALIGNED(16, const double, ff_pd_2)[2] = { 2.0, 2.0 }; | |
8430 | 80 |
81 #define JUMPALIGN() __asm__ volatile (ASMALIGN(3)::) | |
82 #define MOVQ_ZERO(regd) __asm__ volatile ("pxor %%" #regd ", %%" #regd ::) | |
83 | |
84 #define MOVQ_BFE(regd) \ | |
85 __asm__ volatile ( \ | |
86 "pcmpeqd %%" #regd ", %%" #regd " \n\t"\ | |
87 "paddb %%" #regd ", %%" #regd " \n\t" ::) | |
88 | |
89 #ifndef PIC | |
90 #define MOVQ_BONE(regd) __asm__ volatile ("movq %0, %%" #regd " \n\t" ::"m"(ff_bone)) | |
91 #define MOVQ_WTWO(regd) __asm__ volatile ("movq %0, %%" #regd " \n\t" ::"m"(ff_wtwo)) | |
92 #else | |
93 // for shared library it's better to use this way for accessing constants | |
94 // pcmpeqd -> -1 | |
95 #define MOVQ_BONE(regd) \ | |
96 __asm__ volatile ( \ | |
97 "pcmpeqd %%" #regd ", %%" #regd " \n\t" \ | |
98 "psrlw $15, %%" #regd " \n\t" \ | |
99 "packuswb %%" #regd ", %%" #regd " \n\t" ::) | |
100 | |
101 #define MOVQ_WTWO(regd) \ | |
102 __asm__ volatile ( \ | |
103 "pcmpeqd %%" #regd ", %%" #regd " \n\t" \ | |
104 "psrlw $15, %%" #regd " \n\t" \ | |
105 "psllw $1, %%" #regd " \n\t"::) | |
106 | |
107 #endif | |
108 | |
109 // using regr as temporary and for the output result | |
110 // first argument is unmodifed and second is trashed | |
111 // regfe is supposed to contain 0xfefefefefefefefe | |
112 #define PAVGB_MMX_NO_RND(rega, regb, regr, regfe) \ | |
113 "movq " #rega ", " #regr " \n\t"\ | |
114 "pand " #regb ", " #regr " \n\t"\ | |
115 "pxor " #rega ", " #regb " \n\t"\ | |
116 "pand " #regfe "," #regb " \n\t"\ | |
117 "psrlq $1, " #regb " \n\t"\ | |
118 "paddb " #regb ", " #regr " \n\t" | |
119 | |
120 #define PAVGB_MMX(rega, regb, regr, regfe) \ | |
121 "movq " #rega ", " #regr " \n\t"\ | |
122 "por " #regb ", " #regr " \n\t"\ | |
123 "pxor " #rega ", " #regb " \n\t"\ | |
124 "pand " #regfe "," #regb " \n\t"\ | |
125 "psrlq $1, " #regb " \n\t"\ | |
126 "psubb " #regb ", " #regr " \n\t" | |
127 | |
128 // mm6 is supposed to contain 0xfefefefefefefefe | |
129 #define PAVGBP_MMX_NO_RND(rega, regb, regr, regc, regd, regp) \ | |
130 "movq " #rega ", " #regr " \n\t"\ | |
131 "movq " #regc ", " #regp " \n\t"\ | |
132 "pand " #regb ", " #regr " \n\t"\ | |
133 "pand " #regd ", " #regp " \n\t"\ | |
134 "pxor " #rega ", " #regb " \n\t"\ | |
135 "pxor " #regc ", " #regd " \n\t"\ | |
136 "pand %%mm6, " #regb " \n\t"\ | |
137 "pand %%mm6, " #regd " \n\t"\ | |
138 "psrlq $1, " #regb " \n\t"\ | |
139 "psrlq $1, " #regd " \n\t"\ | |
140 "paddb " #regb ", " #regr " \n\t"\ | |
141 "paddb " #regd ", " #regp " \n\t" | |
142 | |
143 #define PAVGBP_MMX(rega, regb, regr, regc, regd, regp) \ | |
144 "movq " #rega ", " #regr " \n\t"\ | |
145 "movq " #regc ", " #regp " \n\t"\ | |
146 "por " #regb ", " #regr " \n\t"\ | |
147 "por " #regd ", " #regp " \n\t"\ | |
148 "pxor " #rega ", " #regb " \n\t"\ | |
149 "pxor " #regc ", " #regd " \n\t"\ | |
150 "pand %%mm6, " #regb " \n\t"\ | |
151 "pand %%mm6, " #regd " \n\t"\ | |
152 "psrlq $1, " #regd " \n\t"\ | |
153 "psrlq $1, " #regb " \n\t"\ | |
154 "psubb " #regb ", " #regr " \n\t"\ | |
155 "psubb " #regd ", " #regp " \n\t" | |
156 | |
157 /***********************************/ | |
158 /* MMX no rounding */ | |
159 #define DEF(x, y) x ## _no_rnd_ ## y ##_mmx | |
160 #define SET_RND MOVQ_WONE | |
161 #define PAVGBP(a, b, c, d, e, f) PAVGBP_MMX_NO_RND(a, b, c, d, e, f) | |
162 #define PAVGB(a, b, c, e) PAVGB_MMX_NO_RND(a, b, c, e) | |
9445
41245484dc0b
avg_ pixel functions need to use (dst+pix+1)>>1 to average with existing
conrad
parents:
9441
diff
changeset
|
163 #define OP_AVG(a, b, c, e) PAVGB_MMX(a, b, c, e) |
8430 | 164 |
165 #include "dsputil_mmx_rnd_template.c" | |
166 | |
167 #undef DEF | |
168 #undef SET_RND | |
169 #undef PAVGBP | |
170 #undef PAVGB | |
171 /***********************************/ | |
172 /* MMX rounding */ | |
173 | |
174 #define DEF(x, y) x ## _ ## y ##_mmx | |
175 #define SET_RND MOVQ_WTWO | |
176 #define PAVGBP(a, b, c, d, e, f) PAVGBP_MMX(a, b, c, d, e, f) | |
177 #define PAVGB(a, b, c, e) PAVGB_MMX(a, b, c, e) | |
178 | |
179 #include "dsputil_mmx_rnd_template.c" | |
180 | |
181 #undef DEF | |
182 #undef SET_RND | |
183 #undef PAVGBP | |
184 #undef PAVGB | |
9445
41245484dc0b
avg_ pixel functions need to use (dst+pix+1)>>1 to average with existing
conrad
parents:
9441
diff
changeset
|
185 #undef OP_AVG |
8430 | 186 |
187 /***********************************/ | |
188 /* 3Dnow specific */ | |
189 | |
190 #define DEF(x) x ## _3dnow | |
191 #define PAVGB "pavgusb" | |
9445
41245484dc0b
avg_ pixel functions need to use (dst+pix+1)>>1 to average with existing
conrad
parents:
9441
diff
changeset
|
192 #define OP_AVG PAVGB |
8430 | 193 |
194 #include "dsputil_mmx_avg_template.c" | |
195 | |
196 #undef DEF | |
197 #undef PAVGB | |
9445
41245484dc0b
avg_ pixel functions need to use (dst+pix+1)>>1 to average with existing
conrad
parents:
9441
diff
changeset
|
198 #undef OP_AVG |
8430 | 199 |
200 /***********************************/ | |
201 /* MMX2 specific */ | |
202 | |
203 #define DEF(x) x ## _mmx2 | |
204 | |
205 /* Introduced only in MMX2 set */ | |
206 #define PAVGB "pavgb" | |
9445
41245484dc0b
avg_ pixel functions need to use (dst+pix+1)>>1 to average with existing
conrad
parents:
9441
diff
changeset
|
207 #define OP_AVG PAVGB |
8430 | 208 |
209 #include "dsputil_mmx_avg_template.c" | |
210 | |
211 #undef DEF | |
212 #undef PAVGB | |
9445
41245484dc0b
avg_ pixel functions need to use (dst+pix+1)>>1 to average with existing
conrad
parents:
9441
diff
changeset
|
213 #undef OP_AVG |
8430 | 214 |
215 #define put_no_rnd_pixels16_mmx put_pixels16_mmx | |
216 #define put_no_rnd_pixels8_mmx put_pixels8_mmx | |
217 #define put_pixels16_mmx2 put_pixels16_mmx | |
218 #define put_pixels8_mmx2 put_pixels8_mmx | |
219 #define put_pixels4_mmx2 put_pixels4_mmx | |
220 #define put_no_rnd_pixels16_mmx2 put_no_rnd_pixels16_mmx | |
221 #define put_no_rnd_pixels8_mmx2 put_no_rnd_pixels8_mmx | |
222 #define put_pixels16_3dnow put_pixels16_mmx | |
223 #define put_pixels8_3dnow put_pixels8_mmx | |
224 #define put_pixels4_3dnow put_pixels4_mmx | |
225 #define put_no_rnd_pixels16_3dnow put_no_rnd_pixels16_mmx | |
226 #define put_no_rnd_pixels8_3dnow put_no_rnd_pixels8_mmx | |
227 | |
228 /***********************************/ | |
229 /* standard MMX */ | |
230 | |
12435
fe78a4548d12
Put ff_ prefix on non-static {put_signed,put,add}_pixels_clamped_mmx()
rbultje
parents:
12417
diff
changeset
|
231 void ff_put_pixels_clamped_mmx(const DCTELEM *block, uint8_t *pixels, int line_size) |
8430 | 232 { |
233 const DCTELEM *p; | |
234 uint8_t *pix; | |
235 | |
236 /* read the pixels */ | |
237 p = block; | |
238 pix = pixels; | |
239 /* unrolled loop */ | |
240 __asm__ volatile( | |
241 "movq %3, %%mm0 \n\t" | |
242 "movq 8%3, %%mm1 \n\t" | |
243 "movq 16%3, %%mm2 \n\t" | |
244 "movq 24%3, %%mm3 \n\t" | |
245 "movq 32%3, %%mm4 \n\t" | |
246 "movq 40%3, %%mm5 \n\t" | |
247 "movq 48%3, %%mm6 \n\t" | |
248 "movq 56%3, %%mm7 \n\t" | |
249 "packuswb %%mm1, %%mm0 \n\t" | |
250 "packuswb %%mm3, %%mm2 \n\t" | |
251 "packuswb %%mm5, %%mm4 \n\t" | |
252 "packuswb %%mm7, %%mm6 \n\t" | |
253 "movq %%mm0, (%0) \n\t" | |
254 "movq %%mm2, (%0, %1) \n\t" | |
255 "movq %%mm4, (%0, %1, 2) \n\t" | |
256 "movq %%mm6, (%0, %2) \n\t" | |
257 ::"r" (pix), "r" ((x86_reg)line_size), "r" ((x86_reg)line_size*3), "m"(*p) | |
258 :"memory"); | |
259 pix += line_size*4; | |
260 p += 32; | |
261 | |
262 // if here would be an exact copy of the code above | |
263 // compiler would generate some very strange code | |
264 // thus using "r" | |
265 __asm__ volatile( | |
266 "movq (%3), %%mm0 \n\t" | |
267 "movq 8(%3), %%mm1 \n\t" | |
268 "movq 16(%3), %%mm2 \n\t" | |
269 "movq 24(%3), %%mm3 \n\t" | |
270 "movq 32(%3), %%mm4 \n\t" | |
271 "movq 40(%3), %%mm5 \n\t" | |
272 "movq 48(%3), %%mm6 \n\t" | |
273 "movq 56(%3), %%mm7 \n\t" | |
274 "packuswb %%mm1, %%mm0 \n\t" | |
275 "packuswb %%mm3, %%mm2 \n\t" | |
276 "packuswb %%mm5, %%mm4 \n\t" | |
277 "packuswb %%mm7, %%mm6 \n\t" | |
278 "movq %%mm0, (%0) \n\t" | |
279 "movq %%mm2, (%0, %1) \n\t" | |
280 "movq %%mm4, (%0, %1, 2) \n\t" | |
281 "movq %%mm6, (%0, %2) \n\t" | |
282 ::"r" (pix), "r" ((x86_reg)line_size), "r" ((x86_reg)line_size*3), "r"(p) | |
283 :"memory"); | |
284 } | |
285 | |
10961
34a65026fa06
Move array specifiers outside DECLARE_ALIGNED() invocations
mru
parents:
10766
diff
changeset
|
286 DECLARE_ASM_CONST(8, uint8_t, ff_vector128)[8] = |
8430 | 287 { 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80 }; |
288 | |
9337
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
289 #define put_signed_pixels_clamped_mmx_half(off) \ |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
290 "movq "#off"(%2), %%mm1 \n\t"\ |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
291 "movq 16+"#off"(%2), %%mm2 \n\t"\ |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
292 "movq 32+"#off"(%2), %%mm3 \n\t"\ |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
293 "movq 48+"#off"(%2), %%mm4 \n\t"\ |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
294 "packsswb 8+"#off"(%2), %%mm1 \n\t"\ |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
295 "packsswb 24+"#off"(%2), %%mm2 \n\t"\ |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
296 "packsswb 40+"#off"(%2), %%mm3 \n\t"\ |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
297 "packsswb 56+"#off"(%2), %%mm4 \n\t"\ |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
298 "paddb %%mm0, %%mm1 \n\t"\ |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
299 "paddb %%mm0, %%mm2 \n\t"\ |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
300 "paddb %%mm0, %%mm3 \n\t"\ |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
301 "paddb %%mm0, %%mm4 \n\t"\ |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
302 "movq %%mm1, (%0) \n\t"\ |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
303 "movq %%mm2, (%0, %3) \n\t"\ |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
304 "movq %%mm3, (%0, %3, 2) \n\t"\ |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
305 "movq %%mm4, (%0, %1) \n\t" |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
306 |
12435
fe78a4548d12
Put ff_ prefix on non-static {put_signed,put,add}_pixels_clamped_mmx()
rbultje
parents:
12417
diff
changeset
|
307 void ff_put_signed_pixels_clamped_mmx(const DCTELEM *block, uint8_t *pixels, int line_size) |
8430 | 308 { |
9337
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
309 x86_reg line_skip = line_size; |
9341
06532529c428
Mark line_skip3 asm argument as output-only instead of using av_uninit.
reimar
parents:
9340
diff
changeset
|
310 x86_reg line_skip3; |
8430 | 311 |
9337
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
312 __asm__ volatile ( |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
313 "movq "MANGLE(ff_vector128)", %%mm0 \n\t" |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
314 "lea (%3, %3, 2), %1 \n\t" |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
315 put_signed_pixels_clamped_mmx_half(0) |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
316 "lea (%0, %3, 4), %0 \n\t" |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
317 put_signed_pixels_clamped_mmx_half(64) |
9341
06532529c428
Mark line_skip3 asm argument as output-only instead of using av_uninit.
reimar
parents:
9340
diff
changeset
|
318 :"+&r" (pixels), "=&r" (line_skip3) |
9337
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
319 :"r" (block), "r"(line_skip) |
a0d54042ea37
Rewrite put_signed_pixels_clamped_mmx() to eliminate mmx.h from dsputil_mmx.c.
alexc
parents:
8818
diff
changeset
|
320 :"memory"); |
8430 | 321 } |
322 | |
12435
fe78a4548d12
Put ff_ prefix on non-static {put_signed,put,add}_pixels_clamped_mmx()
rbultje
parents:
12417
diff
changeset
|
323 void ff_add_pixels_clamped_mmx(const DCTELEM *block, uint8_t *pixels, int line_size) |
8430 | 324 { |
325 const DCTELEM *p; | |
326 uint8_t *pix; | |
327 int i; | |
328 | |
329 /* read the pixels */ | |
330 p = block; | |
331 pix = pixels; | |
332 MOVQ_ZERO(mm7); | |
333 i = 4; | |
334 do { | |
335 __asm__ volatile( | |
336 "movq (%2), %%mm0 \n\t" | |
337 "movq 8(%2), %%mm1 \n\t" | |
338 "movq 16(%2), %%mm2 \n\t" | |
339 "movq 24(%2), %%mm3 \n\t" | |
340 "movq %0, %%mm4 \n\t" | |
341 "movq %1, %%mm6 \n\t" | |
342 "movq %%mm4, %%mm5 \n\t" | |
343 "punpcklbw %%mm7, %%mm4 \n\t" | |
344 "punpckhbw %%mm7, %%mm5 \n\t" | |
345 "paddsw %%mm4, %%mm0 \n\t" | |
346 "paddsw %%mm5, %%mm1 \n\t" | |
347 "movq %%mm6, %%mm5 \n\t" | |
348 "punpcklbw %%mm7, %%mm6 \n\t" | |
349 "punpckhbw %%mm7, %%mm5 \n\t" | |
350 "paddsw %%mm6, %%mm2 \n\t" | |
351 "paddsw %%mm5, %%mm3 \n\t" | |
352 "packuswb %%mm1, %%mm0 \n\t" | |
353 "packuswb %%mm3, %%mm2 \n\t" | |
354 "movq %%mm0, %0 \n\t" | |
355 "movq %%mm2, %1 \n\t" | |
356 :"+m"(*pix), "+m"(*(pix+line_size)) | |
357 :"r"(p) | |
358 :"memory"); | |
359 pix += line_size*2; | |
360 p += 16; | |
361 } while (--i); | |
362 } | |
363 | |
364 static void put_pixels4_mmx(uint8_t *block, const uint8_t *pixels, int line_size, int h) | |
365 { | |
366 __asm__ volatile( | |
367 "lea (%3, %3), %%"REG_a" \n\t" | |
368 ASMALIGN(3) | |
369 "1: \n\t" | |
370 "movd (%1), %%mm0 \n\t" | |
371 "movd (%1, %3), %%mm1 \n\t" | |
372 "movd %%mm0, (%2) \n\t" | |
373 "movd %%mm1, (%2, %3) \n\t" | |
374 "add %%"REG_a", %1 \n\t" | |
375 "add %%"REG_a", %2 \n\t" | |
376 "movd (%1), %%mm0 \n\t" | |
377 "movd (%1, %3), %%mm1 \n\t" | |
378 "movd %%mm0, (%2) \n\t" | |
379 "movd %%mm1, (%2, %3) \n\t" | |
380 "add %%"REG_a", %1 \n\t" | |
381 "add %%"REG_a", %2 \n\t" | |
382 "subl $4, %0 \n\t" | |
383 "jnz 1b \n\t" | |
384 : "+g"(h), "+r" (pixels), "+r" (block) | |
385 : "r"((x86_reg)line_size) | |
386 : "%"REG_a, "memory" | |
387 ); | |
388 } | |
389 | |
390 static void put_pixels8_mmx(uint8_t *block, const uint8_t *pixels, int line_size, int h) | |
391 { | |
392 __asm__ volatile( | |
393 "lea (%3, %3), %%"REG_a" \n\t" | |
394 ASMALIGN(3) | |
395 "1: \n\t" | |
396 "movq (%1), %%mm0 \n\t" | |
397 "movq (%1, %3), %%mm1 \n\t" | |
398 "movq %%mm0, (%2) \n\t" | |
399 "movq %%mm1, (%2, %3) \n\t" | |
400 "add %%"REG_a", %1 \n\t" | |
401 "add %%"REG_a", %2 \n\t" | |
402 "movq (%1), %%mm0 \n\t" | |
403 "movq (%1, %3), %%mm1 \n\t" | |
404 "movq %%mm0, (%2) \n\t" | |
405 "movq %%mm1, (%2, %3) \n\t" | |
406 "add %%"REG_a", %1 \n\t" | |
407 "add %%"REG_a", %2 \n\t" | |
408 "subl $4, %0 \n\t" | |
409 "jnz 1b \n\t" | |
410 : "+g"(h), "+r" (pixels), "+r" (block) | |
411 : "r"((x86_reg)line_size) | |
412 : "%"REG_a, "memory" | |
413 ); | |
414 } | |
415 | |
416 static void put_pixels16_mmx(uint8_t *block, const uint8_t *pixels, int line_size, int h) | |
417 { | |
418 __asm__ volatile( | |
419 "lea (%3, %3), %%"REG_a" \n\t" | |
420 ASMALIGN(3) | |
421 "1: \n\t" | |
422 "movq (%1), %%mm0 \n\t" | |
423 "movq 8(%1), %%mm4 \n\t" | |
424 "movq (%1, %3), %%mm1 \n\t" | |
425 "movq 8(%1, %3), %%mm5 \n\t" | |
426 "movq %%mm0, (%2) \n\t" | |
427 "movq %%mm4, 8(%2) \n\t" | |
428 "movq %%mm1, (%2, %3) \n\t" | |
429 "movq %%mm5, 8(%2, %3) \n\t" | |
430 "add %%"REG_a", %1 \n\t" | |
431 "add %%"REG_a", %2 \n\t" | |
432 "movq (%1), %%mm0 \n\t" | |
433 "movq 8(%1), %%mm4 \n\t" | |
434 "movq (%1, %3), %%mm1 \n\t" | |
435 "movq 8(%1, %3), %%mm5 \n\t" | |
436 "movq %%mm0, (%2) \n\t" | |
437 "movq %%mm4, 8(%2) \n\t" | |
438 "movq %%mm1, (%2, %3) \n\t" | |
439 "movq %%mm5, 8(%2, %3) \n\t" | |
440 "add %%"REG_a", %1 \n\t" | |
441 "add %%"REG_a", %2 \n\t" | |
442 "subl $4, %0 \n\t" | |
443 "jnz 1b \n\t" | |
444 : "+g"(h), "+r" (pixels), "+r" (block) | |
445 : "r"((x86_reg)line_size) | |
446 : "%"REG_a, "memory" | |
447 ); | |
448 } | |
449 | |
450 static void put_pixels16_sse2(uint8_t *block, const uint8_t *pixels, int line_size, int h) | |
451 { | |
452 __asm__ volatile( | |
453 "1: \n\t" | |
454 "movdqu (%1), %%xmm0 \n\t" | |
455 "movdqu (%1,%3), %%xmm1 \n\t" | |
456 "movdqu (%1,%3,2), %%xmm2 \n\t" | |
457 "movdqu (%1,%4), %%xmm3 \n\t" | |
458 "movdqa %%xmm0, (%2) \n\t" | |
459 "movdqa %%xmm1, (%2,%3) \n\t" | |
460 "movdqa %%xmm2, (%2,%3,2) \n\t" | |
461 "movdqa %%xmm3, (%2,%4) \n\t" | |
462 "subl $4, %0 \n\t" | |
463 "lea (%1,%3,4), %1 \n\t" | |
464 "lea (%2,%3,4), %2 \n\t" | |
465 "jnz 1b \n\t" | |
466 : "+g"(h), "+r" (pixels), "+r" (block) | |
467 : "r"((x86_reg)line_size), "r"((x86_reg)3L*line_size) | |
468 : "memory" | |
469 ); | |
470 } | |
471 | |
472 static void avg_pixels16_sse2(uint8_t *block, const uint8_t *pixels, int line_size, int h) | |
473 { | |
474 __asm__ volatile( | |
475 "1: \n\t" | |
476 "movdqu (%1), %%xmm0 \n\t" | |
477 "movdqu (%1,%3), %%xmm1 \n\t" | |
478 "movdqu (%1,%3,2), %%xmm2 \n\t" | |
479 "movdqu (%1,%4), %%xmm3 \n\t" | |
480 "pavgb (%2), %%xmm0 \n\t" | |
481 "pavgb (%2,%3), %%xmm1 \n\t" | |
482 "pavgb (%2,%3,2), %%xmm2 \n\t" | |
483 "pavgb (%2,%4), %%xmm3 \n\t" | |
484 "movdqa %%xmm0, (%2) \n\t" | |
485 "movdqa %%xmm1, (%2,%3) \n\t" | |
486 "movdqa %%xmm2, (%2,%3,2) \n\t" | |
487 "movdqa %%xmm3, (%2,%4) \n\t" | |
488 "subl $4, %0 \n\t" | |
489 "lea (%1,%3,4), %1 \n\t" | |
490 "lea (%2,%3,4), %2 \n\t" | |
491 "jnz 1b \n\t" | |
492 : "+g"(h), "+r" (pixels), "+r" (block) | |
493 : "r"((x86_reg)line_size), "r"((x86_reg)3L*line_size) | |
494 : "memory" | |
495 ); | |
496 } | |
497 | |
498 #define CLEAR_BLOCKS(name,n) \ | |
499 static void name(DCTELEM *blocks)\ | |
500 {\ | |
501 __asm__ volatile(\ | |
502 "pxor %%mm7, %%mm7 \n\t"\ | |
503 "mov %1, %%"REG_a" \n\t"\ | |
504 "1: \n\t"\ | |
505 "movq %%mm7, (%0, %%"REG_a") \n\t"\ | |
506 "movq %%mm7, 8(%0, %%"REG_a") \n\t"\ | |
507 "movq %%mm7, 16(%0, %%"REG_a") \n\t"\ | |
508 "movq %%mm7, 24(%0, %%"REG_a") \n\t"\ | |
509 "add $32, %%"REG_a" \n\t"\ | |
510 " js 1b \n\t"\ | |
511 : : "r" (((uint8_t *)blocks)+128*n),\ | |
512 "i" (-128*n)\ | |
513 : "%"REG_a\ | |
514 );\ | |
515 } | |
516 CLEAR_BLOCKS(clear_blocks_mmx, 6) | |
517 CLEAR_BLOCKS(clear_block_mmx, 1) | |
518 | |
519 static void clear_block_sse(DCTELEM *block) | |
520 { | |
521 __asm__ volatile( | |
522 "xorps %%xmm0, %%xmm0 \n" | |
523 "movaps %%xmm0, (%0) \n" | |
524 "movaps %%xmm0, 16(%0) \n" | |
525 "movaps %%xmm0, 32(%0) \n" | |
526 "movaps %%xmm0, 48(%0) \n" | |
527 "movaps %%xmm0, 64(%0) \n" | |
528 "movaps %%xmm0, 80(%0) \n" | |
529 "movaps %%xmm0, 96(%0) \n" | |
530 "movaps %%xmm0, 112(%0) \n" | |
531 :: "r"(block) | |
532 : "memory" | |
533 ); | |
534 } | |
535 | |
9861 | 536 static void clear_blocks_sse(DCTELEM *blocks) |
537 {\ | |
538 __asm__ volatile( | |
539 "xorps %%xmm0, %%xmm0 \n" | |
540 "mov %1, %%"REG_a" \n" | |
541 "1: \n" | |
542 "movaps %%xmm0, (%0, %%"REG_a") \n" | |
543 "movaps %%xmm0, 16(%0, %%"REG_a") \n" | |
544 "movaps %%xmm0, 32(%0, %%"REG_a") \n" | |
545 "movaps %%xmm0, 48(%0, %%"REG_a") \n" | |
546 "movaps %%xmm0, 64(%0, %%"REG_a") \n" | |
547 "movaps %%xmm0, 80(%0, %%"REG_a") \n" | |
548 "movaps %%xmm0, 96(%0, %%"REG_a") \n" | |
549 "movaps %%xmm0, 112(%0, %%"REG_a") \n" | |
550 "add $128, %%"REG_a" \n" | |
551 " js 1b \n" | |
552 : : "r" (((uint8_t *)blocks)+128*6), | |
553 "i" (-128*6) | |
554 : "%"REG_a | |
555 ); | |
556 } | |
557 | |
8430 | 558 static void add_bytes_mmx(uint8_t *dst, uint8_t *src, int w){ |
559 x86_reg i=0; | |
560 __asm__ volatile( | |
561 "jmp 2f \n\t" | |
562 "1: \n\t" | |
563 "movq (%1, %0), %%mm0 \n\t" | |
564 "movq (%2, %0), %%mm1 \n\t" | |
565 "paddb %%mm0, %%mm1 \n\t" | |
566 "movq %%mm1, (%2, %0) \n\t" | |
567 "movq 8(%1, %0), %%mm0 \n\t" | |
568 "movq 8(%2, %0), %%mm1 \n\t" | |
569 "paddb %%mm0, %%mm1 \n\t" | |
570 "movq %%mm1, 8(%2, %0) \n\t" | |
571 "add $16, %0 \n\t" | |
572 "2: \n\t" | |
573 "cmp %3, %0 \n\t" | |
574 " js 1b \n\t" | |
575 : "+r" (i) | |
576 : "r"(src), "r"(dst), "r"((x86_reg)w-15) | |
577 ); | |
578 for(; i<w; i++) | |
579 dst[i+0] += src[i+0]; | |
580 } | |
581 | |
582 static void add_bytes_l2_mmx(uint8_t *dst, uint8_t *src1, uint8_t *src2, int w){ | |
583 x86_reg i=0; | |
584 __asm__ volatile( | |
585 "jmp 2f \n\t" | |
586 "1: \n\t" | |
587 "movq (%2, %0), %%mm0 \n\t" | |
588 "movq 8(%2, %0), %%mm1 \n\t" | |
589 "paddb (%3, %0), %%mm0 \n\t" | |
590 "paddb 8(%3, %0), %%mm1 \n\t" | |
591 "movq %%mm0, (%1, %0) \n\t" | |
592 "movq %%mm1, 8(%1, %0) \n\t" | |
593 "add $16, %0 \n\t" | |
594 "2: \n\t" | |
595 "cmp %4, %0 \n\t" | |
596 " js 1b \n\t" | |
597 : "+r" (i) | |
598 : "r"(dst), "r"(src1), "r"(src2), "r"((x86_reg)w-15) | |
599 ); | |
600 for(; i<w; i++) | |
601 dst[i] = src1[i] + src2[i]; | |
602 } | |
603 | |
8798
a5c8210814d7
Add check whether the compiler/assembler supports 10 or more operands.
diego
parents:
8760
diff
changeset
|
604 #if HAVE_7REGS && HAVE_TEN_OPERANDS |
10431 | 605 static void add_hfyu_median_prediction_cmov(uint8_t *dst, const uint8_t *top, const uint8_t *diff, int w, int *left, int *left_top) { |
8760 | 606 x86_reg w2 = -w; |
607 x86_reg x; | |
608 int l = *left & 0xff; | |
609 int tl = *left_top & 0xff; | |
610 int t; | |
611 __asm__ volatile( | |
612 "mov %7, %3 \n" | |
613 "1: \n" | |
614 "movzx (%3,%4), %2 \n" | |
615 "mov %2, %k3 \n" | |
616 "sub %b1, %b3 \n" | |
617 "add %b0, %b3 \n" | |
618 "mov %2, %1 \n" | |
619 "cmp %0, %2 \n" | |
620 "cmovg %0, %2 \n" | |
621 "cmovg %1, %0 \n" | |
622 "cmp %k3, %0 \n" | |
623 "cmovg %k3, %0 \n" | |
624 "mov %7, %3 \n" | |
625 "cmp %2, %0 \n" | |
626 "cmovl %2, %0 \n" | |
627 "add (%6,%4), %b0 \n" | |
628 "mov %b0, (%5,%4) \n" | |
629 "inc %4 \n" | |
630 "jl 1b \n" | |
631 :"+&q"(l), "+&q"(tl), "=&r"(t), "=&q"(x), "+&r"(w2) | |
632 :"r"(dst+w), "r"(diff+w), "rm"(top+w) | |
633 ); | |
634 *left = l; | |
635 *left_top = tl; | |
636 } | |
637 #endif | |
638 | |
8430 | 639 #define H263_LOOP_FILTER \ |
640 "pxor %%mm7, %%mm7 \n\t"\ | |
641 "movq %0, %%mm0 \n\t"\ | |
642 "movq %0, %%mm1 \n\t"\ | |
643 "movq %3, %%mm2 \n\t"\ | |
644 "movq %3, %%mm3 \n\t"\ | |
645 "punpcklbw %%mm7, %%mm0 \n\t"\ | |
646 "punpckhbw %%mm7, %%mm1 \n\t"\ | |
647 "punpcklbw %%mm7, %%mm2 \n\t"\ | |
648 "punpckhbw %%mm7, %%mm3 \n\t"\ | |
649 "psubw %%mm2, %%mm0 \n\t"\ | |
650 "psubw %%mm3, %%mm1 \n\t"\ | |
651 "movq %1, %%mm2 \n\t"\ | |
652 "movq %1, %%mm3 \n\t"\ | |
653 "movq %2, %%mm4 \n\t"\ | |
654 "movq %2, %%mm5 \n\t"\ | |
655 "punpcklbw %%mm7, %%mm2 \n\t"\ | |
656 "punpckhbw %%mm7, %%mm3 \n\t"\ | |
657 "punpcklbw %%mm7, %%mm4 \n\t"\ | |
658 "punpckhbw %%mm7, %%mm5 \n\t"\ | |
659 "psubw %%mm2, %%mm4 \n\t"\ | |
660 "psubw %%mm3, %%mm5 \n\t"\ | |
661 "psllw $2, %%mm4 \n\t"\ | |
662 "psllw $2, %%mm5 \n\t"\ | |
663 "paddw %%mm0, %%mm4 \n\t"\ | |
664 "paddw %%mm1, %%mm5 \n\t"\ | |
665 "pxor %%mm6, %%mm6 \n\t"\ | |
666 "pcmpgtw %%mm4, %%mm6 \n\t"\ | |
667 "pcmpgtw %%mm5, %%mm7 \n\t"\ | |
668 "pxor %%mm6, %%mm4 \n\t"\ | |
669 "pxor %%mm7, %%mm5 \n\t"\ | |
670 "psubw %%mm6, %%mm4 \n\t"\ | |
671 "psubw %%mm7, %%mm5 \n\t"\ | |
672 "psrlw $3, %%mm4 \n\t"\ | |
673 "psrlw $3, %%mm5 \n\t"\ | |
674 "packuswb %%mm5, %%mm4 \n\t"\ | |
675 "packsswb %%mm7, %%mm6 \n\t"\ | |
676 "pxor %%mm7, %%mm7 \n\t"\ | |
677 "movd %4, %%mm2 \n\t"\ | |
678 "punpcklbw %%mm2, %%mm2 \n\t"\ | |
679 "punpcklbw %%mm2, %%mm2 \n\t"\ | |
680 "punpcklbw %%mm2, %%mm2 \n\t"\ | |
681 "psubusb %%mm4, %%mm2 \n\t"\ | |
682 "movq %%mm2, %%mm3 \n\t"\ | |
683 "psubusb %%mm4, %%mm3 \n\t"\ | |
684 "psubb %%mm3, %%mm2 \n\t"\ | |
685 "movq %1, %%mm3 \n\t"\ | |
686 "movq %2, %%mm4 \n\t"\ | |
687 "pxor %%mm6, %%mm3 \n\t"\ | |
688 "pxor %%mm6, %%mm4 \n\t"\ | |
689 "paddusb %%mm2, %%mm3 \n\t"\ | |
690 "psubusb %%mm2, %%mm4 \n\t"\ | |
691 "pxor %%mm6, %%mm3 \n\t"\ | |
692 "pxor %%mm6, %%mm4 \n\t"\ | |
693 "paddusb %%mm2, %%mm2 \n\t"\ | |
694 "packsswb %%mm1, %%mm0 \n\t"\ | |
695 "pcmpgtb %%mm0, %%mm7 \n\t"\ | |
696 "pxor %%mm7, %%mm0 \n\t"\ | |
697 "psubb %%mm7, %%mm0 \n\t"\ | |
698 "movq %%mm0, %%mm1 \n\t"\ | |
699 "psubusb %%mm2, %%mm0 \n\t"\ | |
700 "psubb %%mm0, %%mm1 \n\t"\ | |
701 "pand %5, %%mm1 \n\t"\ | |
702 "psrlw $2, %%mm1 \n\t"\ | |
703 "pxor %%mm7, %%mm1 \n\t"\ | |
704 "psubb %%mm7, %%mm1 \n\t"\ | |
705 "movq %0, %%mm5 \n\t"\ | |
706 "movq %3, %%mm6 \n\t"\ | |
707 "psubb %%mm1, %%mm5 \n\t"\ | |
708 "paddb %%mm1, %%mm6 \n\t" | |
709 | |
710 static void h263_v_loop_filter_mmx(uint8_t *src, int stride, int qscale){ | |
10749
5cca4b6c459d
Get rid of pointless CONFIG_ANY_H263 preprocessor definition.
diego
parents:
10645
diff
changeset
|
711 if(CONFIG_H263_DECODER || CONFIG_H263_ENCODER) { |
8430 | 712 const int strength= ff_h263_loop_filter_strength[qscale]; |
713 | |
714 __asm__ volatile( | |
715 | |
716 H263_LOOP_FILTER | |
717 | |
718 "movq %%mm3, %1 \n\t" | |
719 "movq %%mm4, %2 \n\t" | |
720 "movq %%mm5, %0 \n\t" | |
721 "movq %%mm6, %3 \n\t" | |
722 : "+m" (*(uint64_t*)(src - 2*stride)), | |
723 "+m" (*(uint64_t*)(src - 1*stride)), | |
724 "+m" (*(uint64_t*)(src + 0*stride)), | |
725 "+m" (*(uint64_t*)(src + 1*stride)) | |
726 : "g" (2*strength), "m"(ff_pb_FC) | |
727 ); | |
728 } | |
729 } | |
730 | |
731 static void h263_h_loop_filter_mmx(uint8_t *src, int stride, int qscale){ | |
10749
5cca4b6c459d
Get rid of pointless CONFIG_ANY_H263 preprocessor definition.
diego
parents:
10645
diff
changeset
|
732 if(CONFIG_H263_DECODER || CONFIG_H263_ENCODER) { |
8430 | 733 const int strength= ff_h263_loop_filter_strength[qscale]; |
10961
34a65026fa06
Move array specifiers outside DECLARE_ALIGNED() invocations
mru
parents:
10766
diff
changeset
|
734 DECLARE_ALIGNED(8, uint64_t, temp)[4]; |
8430 | 735 uint8_t *btemp= (uint8_t*)temp; |
736 | |
737 src -= 2; | |
738 | |
739 transpose4x4(btemp , src , 8, stride); | |
740 transpose4x4(btemp+4, src + 4*stride, 8, stride); | |
741 __asm__ volatile( | |
742 H263_LOOP_FILTER // 5 3 4 6 | |
743 | |
744 : "+m" (temp[0]), | |
745 "+m" (temp[1]), | |
746 "+m" (temp[2]), | |
747 "+m" (temp[3]) | |
748 : "g" (2*strength), "m"(ff_pb_FC) | |
749 ); | |
750 | |
751 __asm__ volatile( | |
752 "movq %%mm5, %%mm1 \n\t" | |
753 "movq %%mm4, %%mm0 \n\t" | |
754 "punpcklbw %%mm3, %%mm5 \n\t" | |
755 "punpcklbw %%mm6, %%mm4 \n\t" | |
756 "punpckhbw %%mm3, %%mm1 \n\t" | |
757 "punpckhbw %%mm6, %%mm0 \n\t" | |
758 "movq %%mm5, %%mm3 \n\t" | |
759 "movq %%mm1, %%mm6 \n\t" | |
760 "punpcklwd %%mm4, %%mm5 \n\t" | |
761 "punpcklwd %%mm0, %%mm1 \n\t" | |
762 "punpckhwd %%mm4, %%mm3 \n\t" | |
763 "punpckhwd %%mm0, %%mm6 \n\t" | |
764 "movd %%mm5, (%0) \n\t" | |
765 "punpckhdq %%mm5, %%mm5 \n\t" | |
766 "movd %%mm5, (%0,%2) \n\t" | |
767 "movd %%mm3, (%0,%2,2) \n\t" | |
768 "punpckhdq %%mm3, %%mm3 \n\t" | |
769 "movd %%mm3, (%0,%3) \n\t" | |
770 "movd %%mm1, (%1) \n\t" | |
771 "punpckhdq %%mm1, %%mm1 \n\t" | |
772 "movd %%mm1, (%1,%2) \n\t" | |
773 "movd %%mm6, (%1,%2,2) \n\t" | |
774 "punpckhdq %%mm6, %%mm6 \n\t" | |
775 "movd %%mm6, (%1,%3) \n\t" | |
776 :: "r" (src), | |
777 "r" (src + 4*stride), | |
778 "r" ((x86_reg) stride ), | |
779 "r" ((x86_reg)(3*stride)) | |
780 ); | |
781 } | |
782 } | |
783 | |
784 /* draw the edges of width 'w' of an image of size width, height | |
785 this mmx version can only handle w==8 || w==16 */ | |
786 static void draw_edges_mmx(uint8_t *buf, int wrap, int width, int height, int w) | |
787 { | |
788 uint8_t *ptr, *last_line; | |
789 int i; | |
790 | |
791 last_line = buf + (height - 1) * wrap; | |
792 /* left and right */ | |
793 ptr = buf; | |
794 if(w==8) | |
795 { | |
796 __asm__ volatile( | |
797 "1: \n\t" | |
798 "movd (%0), %%mm0 \n\t" | |
799 "punpcklbw %%mm0, %%mm0 \n\t" | |
800 "punpcklwd %%mm0, %%mm0 \n\t" | |
801 "punpckldq %%mm0, %%mm0 \n\t" | |
802 "movq %%mm0, -8(%0) \n\t" | |
803 "movq -8(%0, %2), %%mm1 \n\t" | |
804 "punpckhbw %%mm1, %%mm1 \n\t" | |
805 "punpckhwd %%mm1, %%mm1 \n\t" | |
806 "punpckhdq %%mm1, %%mm1 \n\t" | |
807 "movq %%mm1, (%0, %2) \n\t" | |
808 "add %1, %0 \n\t" | |
809 "cmp %3, %0 \n\t" | |
810 " jb 1b \n\t" | |
811 : "+r" (ptr) | |
812 : "r" ((x86_reg)wrap), "r" ((x86_reg)width), "r" (ptr + wrap*height) | |
813 ); | |
814 } | |
815 else | |
816 { | |
817 __asm__ volatile( | |
818 "1: \n\t" | |
819 "movd (%0), %%mm0 \n\t" | |
820 "punpcklbw %%mm0, %%mm0 \n\t" | |
821 "punpcklwd %%mm0, %%mm0 \n\t" | |
822 "punpckldq %%mm0, %%mm0 \n\t" | |
823 "movq %%mm0, -8(%0) \n\t" | |
824 "movq %%mm0, -16(%0) \n\t" | |
825 "movq -8(%0, %2), %%mm1 \n\t" | |
826 "punpckhbw %%mm1, %%mm1 \n\t" | |
827 "punpckhwd %%mm1, %%mm1 \n\t" | |
828 "punpckhdq %%mm1, %%mm1 \n\t" | |
829 "movq %%mm1, (%0, %2) \n\t" | |
830 "movq %%mm1, 8(%0, %2) \n\t" | |
831 "add %1, %0 \n\t" | |
832 "cmp %3, %0 \n\t" | |
833 " jb 1b \n\t" | |
834 : "+r" (ptr) | |
835 : "r" ((x86_reg)wrap), "r" ((x86_reg)width), "r" (ptr + wrap*height) | |
836 ); | |
837 } | |
838 | |
839 for(i=0;i<w;i+=4) { | |
840 /* top and bottom (and hopefully also the corners) */ | |
841 ptr= buf - (i + 1) * wrap - w; | |
842 __asm__ volatile( | |
843 "1: \n\t" | |
844 "movq (%1, %0), %%mm0 \n\t" | |
845 "movq %%mm0, (%0) \n\t" | |
846 "movq %%mm0, (%0, %2) \n\t" | |
847 "movq %%mm0, (%0, %2, 2) \n\t" | |
848 "movq %%mm0, (%0, %3) \n\t" | |
849 "add $8, %0 \n\t" | |
850 "cmp %4, %0 \n\t" | |
851 " jb 1b \n\t" | |
852 : "+r" (ptr) | |
853 : "r" ((x86_reg)buf - (x86_reg)ptr - w), "r" ((x86_reg)-wrap), "r" ((x86_reg)-wrap*3), "r" (ptr+width+2*w) | |
854 ); | |
855 ptr= last_line + (i + 1) * wrap - w; | |
856 __asm__ volatile( | |
857 "1: \n\t" | |
858 "movq (%1, %0), %%mm0 \n\t" | |
859 "movq %%mm0, (%0) \n\t" | |
860 "movq %%mm0, (%0, %2) \n\t" | |
861 "movq %%mm0, (%0, %2, 2) \n\t" | |
862 "movq %%mm0, (%0, %3) \n\t" | |
863 "add $8, %0 \n\t" | |
864 "cmp %4, %0 \n\t" | |
865 " jb 1b \n\t" | |
866 : "+r" (ptr) | |
867 : "r" ((x86_reg)last_line - (x86_reg)ptr - w), "r" ((x86_reg)wrap), "r" ((x86_reg)wrap*3), "r" (ptr+width+2*w) | |
868 ); | |
869 } | |
870 } | |
871 | |
872 #define PAETH(cpu, abs3)\ | |
873 static void add_png_paeth_prediction_##cpu(uint8_t *dst, uint8_t *src, uint8_t *top, int w, int bpp)\ | |
874 {\ | |
875 x86_reg i = -bpp;\ | |
876 x86_reg end = w-3;\ | |
877 __asm__ volatile(\ | |
878 "pxor %%mm7, %%mm7 \n"\ | |
879 "movd (%1,%0), %%mm0 \n"\ | |
880 "movd (%2,%0), %%mm1 \n"\ | |
881 "punpcklbw %%mm7, %%mm0 \n"\ | |
882 "punpcklbw %%mm7, %%mm1 \n"\ | |
883 "add %4, %0 \n"\ | |
884 "1: \n"\ | |
885 "movq %%mm1, %%mm2 \n"\ | |
886 "movd (%2,%0), %%mm1 \n"\ | |
887 "movq %%mm2, %%mm3 \n"\ | |
888 "punpcklbw %%mm7, %%mm1 \n"\ | |
889 "movq %%mm2, %%mm4 \n"\ | |
890 "psubw %%mm1, %%mm3 \n"\ | |
891 "psubw %%mm0, %%mm4 \n"\ | |
892 "movq %%mm3, %%mm5 \n"\ | |
893 "paddw %%mm4, %%mm5 \n"\ | |
894 abs3\ | |
895 "movq %%mm4, %%mm6 \n"\ | |
896 "pminsw %%mm5, %%mm6 \n"\ | |
897 "pcmpgtw %%mm6, %%mm3 \n"\ | |
898 "pcmpgtw %%mm5, %%mm4 \n"\ | |
899 "movq %%mm4, %%mm6 \n"\ | |
900 "pand %%mm3, %%mm4 \n"\ | |
901 "pandn %%mm3, %%mm6 \n"\ | |
902 "pandn %%mm0, %%mm3 \n"\ | |
903 "movd (%3,%0), %%mm0 \n"\ | |
904 "pand %%mm1, %%mm6 \n"\ | |
905 "pand %%mm4, %%mm2 \n"\ | |
906 "punpcklbw %%mm7, %%mm0 \n"\ | |
907 "movq %6, %%mm5 \n"\ | |
908 "paddw %%mm6, %%mm0 \n"\ | |
909 "paddw %%mm2, %%mm3 \n"\ | |
910 "paddw %%mm3, %%mm0 \n"\ | |
911 "pand %%mm5, %%mm0 \n"\ | |
912 "movq %%mm0, %%mm3 \n"\ | |
913 "packuswb %%mm3, %%mm3 \n"\ | |
914 "movd %%mm3, (%1,%0) \n"\ | |
915 "add %4, %0 \n"\ | |
916 "cmp %5, %0 \n"\ | |
917 "jle 1b \n"\ | |
918 :"+r"(i)\ | |
919 :"r"(dst), "r"(top), "r"(src), "r"((x86_reg)bpp), "g"(end),\ | |
920 "m"(ff_pw_255)\ | |
921 :"memory"\ | |
922 );\ | |
923 } | |
924 | |
925 #define ABS3_MMX2\ | |
926 "psubw %%mm5, %%mm7 \n"\ | |
927 "pmaxsw %%mm7, %%mm5 \n"\ | |
928 "pxor %%mm6, %%mm6 \n"\ | |
929 "pxor %%mm7, %%mm7 \n"\ | |
930 "psubw %%mm3, %%mm6 \n"\ | |
931 "psubw %%mm4, %%mm7 \n"\ | |
932 "pmaxsw %%mm6, %%mm3 \n"\ | |
933 "pmaxsw %%mm7, %%mm4 \n"\ | |
934 "pxor %%mm7, %%mm7 \n" | |
935 | |
936 #define ABS3_SSSE3\ | |
937 "pabsw %%mm3, %%mm3 \n"\ | |
938 "pabsw %%mm4, %%mm4 \n"\ | |
939 "pabsw %%mm5, %%mm5 \n" | |
940 | |
941 PAETH(mmx2, ABS3_MMX2) | |
8590 | 942 #if HAVE_SSSE3 |
8430 | 943 PAETH(ssse3, ABS3_SSSE3) |
944 #endif | |
945 | |
946 #define QPEL_V_LOW(m3,m4,m5,m6, pw_20, pw_3, rnd, in0, in1, in2, in7, out, OP)\ | |
947 "paddw " #m4 ", " #m3 " \n\t" /* x1 */\ | |
948 "movq "MANGLE(ff_pw_20)", %%mm4 \n\t" /* 20 */\ | |
949 "pmullw " #m3 ", %%mm4 \n\t" /* 20x1 */\ | |
950 "movq "#in7", " #m3 " \n\t" /* d */\ | |
951 "movq "#in0", %%mm5 \n\t" /* D */\ | |
952 "paddw " #m3 ", %%mm5 \n\t" /* x4 */\ | |
953 "psubw %%mm5, %%mm4 \n\t" /* 20x1 - x4 */\ | |
954 "movq "#in1", %%mm5 \n\t" /* C */\ | |
955 "movq "#in2", %%mm6 \n\t" /* B */\ | |
956 "paddw " #m6 ", %%mm5 \n\t" /* x3 */\ | |
957 "paddw " #m5 ", %%mm6 \n\t" /* x2 */\ | |
958 "paddw %%mm6, %%mm6 \n\t" /* 2x2 */\ | |
959 "psubw %%mm6, %%mm5 \n\t" /* -2x2 + x3 */\ | |
960 "pmullw "MANGLE(ff_pw_3)", %%mm5 \n\t" /* -6x2 + 3x3 */\ | |
961 "paddw " #rnd ", %%mm4 \n\t" /* x2 */\ | |
962 "paddw %%mm4, %%mm5 \n\t" /* 20x1 - 6x2 + 3x3 - x4 */\ | |
963 "psraw $5, %%mm5 \n\t"\ | |
964 "packuswb %%mm5, %%mm5 \n\t"\ | |
965 OP(%%mm5, out, %%mm7, d) | |
966 | |
967 #define QPEL_BASE(OPNAME, ROUNDER, RND, OP_MMX2, OP_3DNOW)\ | |
968 static void OPNAME ## mpeg4_qpel16_h_lowpass_mmx2(uint8_t *dst, uint8_t *src, int dstStride, int srcStride, int h){\ | |
969 uint64_t temp;\ | |
970 \ | |
971 __asm__ volatile(\ | |
972 "pxor %%mm7, %%mm7 \n\t"\ | |
973 "1: \n\t"\ | |
974 "movq (%0), %%mm0 \n\t" /* ABCDEFGH */\ | |
975 "movq %%mm0, %%mm1 \n\t" /* ABCDEFGH */\ | |
976 "movq %%mm0, %%mm2 \n\t" /* ABCDEFGH */\ | |
977 "punpcklbw %%mm7, %%mm0 \n\t" /* 0A0B0C0D */\ | |
978 "punpckhbw %%mm7, %%mm1 \n\t" /* 0E0F0G0H */\ | |
979 "pshufw $0x90, %%mm0, %%mm5 \n\t" /* 0A0A0B0C */\ | |
980 "pshufw $0x41, %%mm0, %%mm6 \n\t" /* 0B0A0A0B */\ | |
981 "movq %%mm2, %%mm3 \n\t" /* ABCDEFGH */\ | |
982 "movq %%mm2, %%mm4 \n\t" /* ABCDEFGH */\ | |
983 "psllq $8, %%mm2 \n\t" /* 0ABCDEFG */\ | |
984 "psllq $16, %%mm3 \n\t" /* 00ABCDEF */\ | |
985 "psllq $24, %%mm4 \n\t" /* 000ABCDE */\ | |
986 "punpckhbw %%mm7, %%mm2 \n\t" /* 0D0E0F0G */\ | |
987 "punpckhbw %%mm7, %%mm3 \n\t" /* 0C0D0E0F */\ | |
988 "punpckhbw %%mm7, %%mm4 \n\t" /* 0B0C0D0E */\ | |
989 "paddw %%mm3, %%mm5 \n\t" /* b */\ | |
990 "paddw %%mm2, %%mm6 \n\t" /* c */\ | |
991 "paddw %%mm5, %%mm5 \n\t" /* 2b */\ | |
992 "psubw %%mm5, %%mm6 \n\t" /* c - 2b */\ | |
993 "pshufw $0x06, %%mm0, %%mm5 \n\t" /* 0C0B0A0A */\ | |
994 "pmullw "MANGLE(ff_pw_3)", %%mm6 \n\t" /* 3c - 6b */\ | |
995 "paddw %%mm4, %%mm0 \n\t" /* a */\ | |
996 "paddw %%mm1, %%mm5 \n\t" /* d */\ | |
997 "pmullw "MANGLE(ff_pw_20)", %%mm0 \n\t" /* 20a */\ | |
998 "psubw %%mm5, %%mm0 \n\t" /* 20a - d */\ | |
999 "paddw %6, %%mm6 \n\t"\ | |
1000 "paddw %%mm6, %%mm0 \n\t" /* 20a - 6b + 3c - d */\ | |
1001 "psraw $5, %%mm0 \n\t"\ | |
1002 "movq %%mm0, %5 \n\t"\ | |
1003 /* mm1=EFGH, mm2=DEFG, mm3=CDEF, mm4=BCDE, mm7=0 */\ | |
1004 \ | |
1005 "movq 5(%0), %%mm0 \n\t" /* FGHIJKLM */\ | |
1006 "movq %%mm0, %%mm5 \n\t" /* FGHIJKLM */\ | |
1007 "movq %%mm0, %%mm6 \n\t" /* FGHIJKLM */\ | |
1008 "psrlq $8, %%mm0 \n\t" /* GHIJKLM0 */\ | |
1009 "psrlq $16, %%mm5 \n\t" /* HIJKLM00 */\ | |
1010 "punpcklbw %%mm7, %%mm0 \n\t" /* 0G0H0I0J */\ | |
1011 "punpcklbw %%mm7, %%mm5 \n\t" /* 0H0I0J0K */\ | |
1012 "paddw %%mm0, %%mm2 \n\t" /* b */\ | |
1013 "paddw %%mm5, %%mm3 \n\t" /* c */\ | |
1014 "paddw %%mm2, %%mm2 \n\t" /* 2b */\ | |
1015 "psubw %%mm2, %%mm3 \n\t" /* c - 2b */\ | |
1016 "movq %%mm6, %%mm2 \n\t" /* FGHIJKLM */\ | |
1017 "psrlq $24, %%mm6 \n\t" /* IJKLM000 */\ | |
1018 "punpcklbw %%mm7, %%mm2 \n\t" /* 0F0G0H0I */\ | |
1019 "punpcklbw %%mm7, %%mm6 \n\t" /* 0I0J0K0L */\ | |
1020 "pmullw "MANGLE(ff_pw_3)", %%mm3 \n\t" /* 3c - 6b */\ | |
1021 "paddw %%mm2, %%mm1 \n\t" /* a */\ | |
1022 "paddw %%mm6, %%mm4 \n\t" /* d */\ | |
1023 "pmullw "MANGLE(ff_pw_20)", %%mm1 \n\t" /* 20a */\ | |
1024 "psubw %%mm4, %%mm3 \n\t" /* - 6b +3c - d */\ | |
1025 "paddw %6, %%mm1 \n\t"\ | |
1026 "paddw %%mm1, %%mm3 \n\t" /* 20a - 6b +3c - d */\ | |
1027 "psraw $5, %%mm3 \n\t"\ | |
1028 "movq %5, %%mm1 \n\t"\ | |
1029 "packuswb %%mm3, %%mm1 \n\t"\ | |
1030 OP_MMX2(%%mm1, (%1),%%mm4, q)\ | |
1031 /* mm0= GHIJ, mm2=FGHI, mm5=HIJK, mm6=IJKL, mm7=0 */\ | |
1032 \ | |
1033 "movq 9(%0), %%mm1 \n\t" /* JKLMNOPQ */\ | |
1034 "movq %%mm1, %%mm4 \n\t" /* JKLMNOPQ */\ | |
1035 "movq %%mm1, %%mm3 \n\t" /* JKLMNOPQ */\ | |
1036 "psrlq $8, %%mm1 \n\t" /* KLMNOPQ0 */\ | |
1037 "psrlq $16, %%mm4 \n\t" /* LMNOPQ00 */\ | |
1038 "punpcklbw %%mm7, %%mm1 \n\t" /* 0K0L0M0N */\ | |
1039 "punpcklbw %%mm7, %%mm4 \n\t" /* 0L0M0N0O */\ | |
1040 "paddw %%mm1, %%mm5 \n\t" /* b */\ | |
1041 "paddw %%mm4, %%mm0 \n\t" /* c */\ | |
1042 "paddw %%mm5, %%mm5 \n\t" /* 2b */\ | |
1043 "psubw %%mm5, %%mm0 \n\t" /* c - 2b */\ | |
1044 "movq %%mm3, %%mm5 \n\t" /* JKLMNOPQ */\ | |
1045 "psrlq $24, %%mm3 \n\t" /* MNOPQ000 */\ | |
1046 "pmullw "MANGLE(ff_pw_3)", %%mm0 \n\t" /* 3c - 6b */\ | |
1047 "punpcklbw %%mm7, %%mm3 \n\t" /* 0M0N0O0P */\ | |
1048 "paddw %%mm3, %%mm2 \n\t" /* d */\ | |
1049 "psubw %%mm2, %%mm0 \n\t" /* -6b + 3c - d */\ | |
1050 "movq %%mm5, %%mm2 \n\t" /* JKLMNOPQ */\ | |
1051 "punpcklbw %%mm7, %%mm2 \n\t" /* 0J0K0L0M */\ | |
1052 "punpckhbw %%mm7, %%mm5 \n\t" /* 0N0O0P0Q */\ | |
1053 "paddw %%mm2, %%mm6 \n\t" /* a */\ | |
1054 "pmullw "MANGLE(ff_pw_20)", %%mm6 \n\t" /* 20a */\ | |
1055 "paddw %6, %%mm0 \n\t"\ | |
1056 "paddw %%mm6, %%mm0 \n\t" /* 20a - 6b + 3c - d */\ | |
1057 "psraw $5, %%mm0 \n\t"\ | |
1058 /* mm1=KLMN, mm2=JKLM, mm3=MNOP, mm4=LMNO, mm5=NOPQ mm7=0 */\ | |
1059 \ | |
1060 "paddw %%mm5, %%mm3 \n\t" /* a */\ | |
1061 "pshufw $0xF9, %%mm5, %%mm6 \n\t" /* 0O0P0Q0Q */\ | |
1062 "paddw %%mm4, %%mm6 \n\t" /* b */\ | |
1063 "pshufw $0xBE, %%mm5, %%mm4 \n\t" /* 0P0Q0Q0P */\ | |
1064 "pshufw $0x6F, %%mm5, %%mm5 \n\t" /* 0Q0Q0P0O */\ | |
1065 "paddw %%mm1, %%mm4 \n\t" /* c */\ | |
1066 "paddw %%mm2, %%mm5 \n\t" /* d */\ | |
1067 "paddw %%mm6, %%mm6 \n\t" /* 2b */\ | |
1068 "psubw %%mm6, %%mm4 \n\t" /* c - 2b */\ | |
1069 "pmullw "MANGLE(ff_pw_20)", %%mm3 \n\t" /* 20a */\ | |
1070 "pmullw "MANGLE(ff_pw_3)", %%mm4 \n\t" /* 3c - 6b */\ | |
1071 "psubw %%mm5, %%mm3 \n\t" /* -6b + 3c - d */\ | |
1072 "paddw %6, %%mm4 \n\t"\ | |
1073 "paddw %%mm3, %%mm4 \n\t" /* 20a - 6b + 3c - d */\ | |
1074 "psraw $5, %%mm4 \n\t"\ | |
1075 "packuswb %%mm4, %%mm0 \n\t"\ | |
1076 OP_MMX2(%%mm0, 8(%1), %%mm4, q)\ | |
1077 \ | |
1078 "add %3, %0 \n\t"\ | |
1079 "add %4, %1 \n\t"\ | |
1080 "decl %2 \n\t"\ | |
1081 " jnz 1b \n\t"\ | |
1082 : "+a"(src), "+c"(dst), "+D"(h)\ | |
1083 : "d"((x86_reg)srcStride), "S"((x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(temp), "m"(ROUNDER)\ | |
1084 : "memory"\ | |
1085 );\ | |
1086 }\ | |
1087 \ | |
1088 static void OPNAME ## mpeg4_qpel16_h_lowpass_3dnow(uint8_t *dst, uint8_t *src, int dstStride, int srcStride, int h){\ | |
1089 int i;\ | |
1090 int16_t temp[16];\ | |
1091 /* quick HACK, XXX FIXME MUST be optimized */\ | |
1092 for(i=0; i<h; i++)\ | |
1093 {\ | |
1094 temp[ 0]= (src[ 0]+src[ 1])*20 - (src[ 0]+src[ 2])*6 + (src[ 1]+src[ 3])*3 - (src[ 2]+src[ 4]);\ | |
1095 temp[ 1]= (src[ 1]+src[ 2])*20 - (src[ 0]+src[ 3])*6 + (src[ 0]+src[ 4])*3 - (src[ 1]+src[ 5]);\ | |
1096 temp[ 2]= (src[ 2]+src[ 3])*20 - (src[ 1]+src[ 4])*6 + (src[ 0]+src[ 5])*3 - (src[ 0]+src[ 6]);\ | |
1097 temp[ 3]= (src[ 3]+src[ 4])*20 - (src[ 2]+src[ 5])*6 + (src[ 1]+src[ 6])*3 - (src[ 0]+src[ 7]);\ | |
1098 temp[ 4]= (src[ 4]+src[ 5])*20 - (src[ 3]+src[ 6])*6 + (src[ 2]+src[ 7])*3 - (src[ 1]+src[ 8]);\ | |
1099 temp[ 5]= (src[ 5]+src[ 6])*20 - (src[ 4]+src[ 7])*6 + (src[ 3]+src[ 8])*3 - (src[ 2]+src[ 9]);\ | |
1100 temp[ 6]= (src[ 6]+src[ 7])*20 - (src[ 5]+src[ 8])*6 + (src[ 4]+src[ 9])*3 - (src[ 3]+src[10]);\ | |
1101 temp[ 7]= (src[ 7]+src[ 8])*20 - (src[ 6]+src[ 9])*6 + (src[ 5]+src[10])*3 - (src[ 4]+src[11]);\ | |
1102 temp[ 8]= (src[ 8]+src[ 9])*20 - (src[ 7]+src[10])*6 + (src[ 6]+src[11])*3 - (src[ 5]+src[12]);\ | |
1103 temp[ 9]= (src[ 9]+src[10])*20 - (src[ 8]+src[11])*6 + (src[ 7]+src[12])*3 - (src[ 6]+src[13]);\ | |
1104 temp[10]= (src[10]+src[11])*20 - (src[ 9]+src[12])*6 + (src[ 8]+src[13])*3 - (src[ 7]+src[14]);\ | |
1105 temp[11]= (src[11]+src[12])*20 - (src[10]+src[13])*6 + (src[ 9]+src[14])*3 - (src[ 8]+src[15]);\ | |
1106 temp[12]= (src[12]+src[13])*20 - (src[11]+src[14])*6 + (src[10]+src[15])*3 - (src[ 9]+src[16]);\ | |
1107 temp[13]= (src[13]+src[14])*20 - (src[12]+src[15])*6 + (src[11]+src[16])*3 - (src[10]+src[16]);\ | |
1108 temp[14]= (src[14]+src[15])*20 - (src[13]+src[16])*6 + (src[12]+src[16])*3 - (src[11]+src[15]);\ | |
1109 temp[15]= (src[15]+src[16])*20 - (src[14]+src[16])*6 + (src[13]+src[15])*3 - (src[12]+src[14]);\ | |
1110 __asm__ volatile(\ | |
1111 "movq (%0), %%mm0 \n\t"\ | |
1112 "movq 8(%0), %%mm1 \n\t"\ | |
1113 "paddw %2, %%mm0 \n\t"\ | |
1114 "paddw %2, %%mm1 \n\t"\ | |
1115 "psraw $5, %%mm0 \n\t"\ | |
1116 "psraw $5, %%mm1 \n\t"\ | |
1117 "packuswb %%mm1, %%mm0 \n\t"\ | |
1118 OP_3DNOW(%%mm0, (%1), %%mm1, q)\ | |
1119 "movq 16(%0), %%mm0 \n\t"\ | |
1120 "movq 24(%0), %%mm1 \n\t"\ | |
1121 "paddw %2, %%mm0 \n\t"\ | |
1122 "paddw %2, %%mm1 \n\t"\ | |
1123 "psraw $5, %%mm0 \n\t"\ | |
1124 "psraw $5, %%mm1 \n\t"\ | |
1125 "packuswb %%mm1, %%mm0 \n\t"\ | |
1126 OP_3DNOW(%%mm0, 8(%1), %%mm1, q)\ | |
1127 :: "r"(temp), "r"(dst), "m"(ROUNDER)\ | |
1128 : "memory"\ | |
1129 );\ | |
1130 dst+=dstStride;\ | |
1131 src+=srcStride;\ | |
1132 }\ | |
1133 }\ | |
1134 \ | |
1135 static void OPNAME ## mpeg4_qpel8_h_lowpass_mmx2(uint8_t *dst, uint8_t *src, int dstStride, int srcStride, int h){\ | |
1136 __asm__ volatile(\ | |
1137 "pxor %%mm7, %%mm7 \n\t"\ | |
1138 "1: \n\t"\ | |
1139 "movq (%0), %%mm0 \n\t" /* ABCDEFGH */\ | |
1140 "movq %%mm0, %%mm1 \n\t" /* ABCDEFGH */\ | |
1141 "movq %%mm0, %%mm2 \n\t" /* ABCDEFGH */\ | |
1142 "punpcklbw %%mm7, %%mm0 \n\t" /* 0A0B0C0D */\ | |
1143 "punpckhbw %%mm7, %%mm1 \n\t" /* 0E0F0G0H */\ | |
1144 "pshufw $0x90, %%mm0, %%mm5 \n\t" /* 0A0A0B0C */\ | |
1145 "pshufw $0x41, %%mm0, %%mm6 \n\t" /* 0B0A0A0B */\ | |
1146 "movq %%mm2, %%mm3 \n\t" /* ABCDEFGH */\ | |
1147 "movq %%mm2, %%mm4 \n\t" /* ABCDEFGH */\ | |
1148 "psllq $8, %%mm2 \n\t" /* 0ABCDEFG */\ | |
1149 "psllq $16, %%mm3 \n\t" /* 00ABCDEF */\ | |
1150 "psllq $24, %%mm4 \n\t" /* 000ABCDE */\ | |
1151 "punpckhbw %%mm7, %%mm2 \n\t" /* 0D0E0F0G */\ | |
1152 "punpckhbw %%mm7, %%mm3 \n\t" /* 0C0D0E0F */\ | |
1153 "punpckhbw %%mm7, %%mm4 \n\t" /* 0B0C0D0E */\ | |
1154 "paddw %%mm3, %%mm5 \n\t" /* b */\ | |
1155 "paddw %%mm2, %%mm6 \n\t" /* c */\ | |
1156 "paddw %%mm5, %%mm5 \n\t" /* 2b */\ | |
1157 "psubw %%mm5, %%mm6 \n\t" /* c - 2b */\ | |
1158 "pshufw $0x06, %%mm0, %%mm5 \n\t" /* 0C0B0A0A */\ | |
1159 "pmullw "MANGLE(ff_pw_3)", %%mm6 \n\t" /* 3c - 6b */\ | |
1160 "paddw %%mm4, %%mm0 \n\t" /* a */\ | |
1161 "paddw %%mm1, %%mm5 \n\t" /* d */\ | |
1162 "pmullw "MANGLE(ff_pw_20)", %%mm0 \n\t" /* 20a */\ | |
1163 "psubw %%mm5, %%mm0 \n\t" /* 20a - d */\ | |
1164 "paddw %5, %%mm6 \n\t"\ | |
1165 "paddw %%mm6, %%mm0 \n\t" /* 20a - 6b + 3c - d */\ | |
1166 "psraw $5, %%mm0 \n\t"\ | |
1167 /* mm1=EFGH, mm2=DEFG, mm3=CDEF, mm4=BCDE, mm7=0 */\ | |
1168 \ | |
1169 "movd 5(%0), %%mm5 \n\t" /* FGHI */\ | |
1170 "punpcklbw %%mm7, %%mm5 \n\t" /* 0F0G0H0I */\ | |
1171 "pshufw $0xF9, %%mm5, %%mm6 \n\t" /* 0G0H0I0I */\ | |
1172 "paddw %%mm5, %%mm1 \n\t" /* a */\ | |
1173 "paddw %%mm6, %%mm2 \n\t" /* b */\ | |
1174 "pshufw $0xBE, %%mm5, %%mm6 \n\t" /* 0H0I0I0H */\ | |
1175 "pshufw $0x6F, %%mm5, %%mm5 \n\t" /* 0I0I0H0G */\ | |
1176 "paddw %%mm6, %%mm3 \n\t" /* c */\ | |
1177 "paddw %%mm5, %%mm4 \n\t" /* d */\ | |
1178 "paddw %%mm2, %%mm2 \n\t" /* 2b */\ | |
1179 "psubw %%mm2, %%mm3 \n\t" /* c - 2b */\ | |
1180 "pmullw "MANGLE(ff_pw_20)", %%mm1 \n\t" /* 20a */\ | |
1181 "pmullw "MANGLE(ff_pw_3)", %%mm3 \n\t" /* 3c - 6b */\ | |
1182 "psubw %%mm4, %%mm3 \n\t" /* -6b + 3c - d */\ | |
1183 "paddw %5, %%mm1 \n\t"\ | |
1184 "paddw %%mm1, %%mm3 \n\t" /* 20a - 6b + 3c - d */\ | |
1185 "psraw $5, %%mm3 \n\t"\ | |
1186 "packuswb %%mm3, %%mm0 \n\t"\ | |
1187 OP_MMX2(%%mm0, (%1), %%mm4, q)\ | |
1188 \ | |
1189 "add %3, %0 \n\t"\ | |
1190 "add %4, %1 \n\t"\ | |
1191 "decl %2 \n\t"\ | |
1192 " jnz 1b \n\t"\ | |
1193 : "+a"(src), "+c"(dst), "+d"(h)\ | |
1194 : "S"((x86_reg)srcStride), "D"((x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(ROUNDER)\ | |
1195 : "memory"\ | |
1196 );\ | |
1197 }\ | |
1198 \ | |
1199 static void OPNAME ## mpeg4_qpel8_h_lowpass_3dnow(uint8_t *dst, uint8_t *src, int dstStride, int srcStride, int h){\ | |
1200 int i;\ | |
1201 int16_t temp[8];\ | |
1202 /* quick HACK, XXX FIXME MUST be optimized */\ | |
1203 for(i=0; i<h; i++)\ | |
1204 {\ | |
1205 temp[ 0]= (src[ 0]+src[ 1])*20 - (src[ 0]+src[ 2])*6 + (src[ 1]+src[ 3])*3 - (src[ 2]+src[ 4]);\ | |
1206 temp[ 1]= (src[ 1]+src[ 2])*20 - (src[ 0]+src[ 3])*6 + (src[ 0]+src[ 4])*3 - (src[ 1]+src[ 5]);\ | |
1207 temp[ 2]= (src[ 2]+src[ 3])*20 - (src[ 1]+src[ 4])*6 + (src[ 0]+src[ 5])*3 - (src[ 0]+src[ 6]);\ | |
1208 temp[ 3]= (src[ 3]+src[ 4])*20 - (src[ 2]+src[ 5])*6 + (src[ 1]+src[ 6])*3 - (src[ 0]+src[ 7]);\ | |
1209 temp[ 4]= (src[ 4]+src[ 5])*20 - (src[ 3]+src[ 6])*6 + (src[ 2]+src[ 7])*3 - (src[ 1]+src[ 8]);\ | |
1210 temp[ 5]= (src[ 5]+src[ 6])*20 - (src[ 4]+src[ 7])*6 + (src[ 3]+src[ 8])*3 - (src[ 2]+src[ 8]);\ | |
1211 temp[ 6]= (src[ 6]+src[ 7])*20 - (src[ 5]+src[ 8])*6 + (src[ 4]+src[ 8])*3 - (src[ 3]+src[ 7]);\ | |
1212 temp[ 7]= (src[ 7]+src[ 8])*20 - (src[ 6]+src[ 8])*6 + (src[ 5]+src[ 7])*3 - (src[ 4]+src[ 6]);\ | |
1213 __asm__ volatile(\ | |
1214 "movq (%0), %%mm0 \n\t"\ | |
1215 "movq 8(%0), %%mm1 \n\t"\ | |
1216 "paddw %2, %%mm0 \n\t"\ | |
1217 "paddw %2, %%mm1 \n\t"\ | |
1218 "psraw $5, %%mm0 \n\t"\ | |
1219 "psraw $5, %%mm1 \n\t"\ | |
1220 "packuswb %%mm1, %%mm0 \n\t"\ | |
1221 OP_3DNOW(%%mm0, (%1), %%mm1, q)\ | |
1222 :: "r"(temp), "r"(dst), "m"(ROUNDER)\ | |
1223 :"memory"\ | |
1224 );\ | |
1225 dst+=dstStride;\ | |
1226 src+=srcStride;\ | |
1227 }\ | |
1228 } | |
1229 | |
1230 #define QPEL_OP(OPNAME, ROUNDER, RND, OP, MMX)\ | |
1231 \ | |
1232 static void OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(uint8_t *dst, uint8_t *src, int dstStride, int srcStride){\ | |
1233 uint64_t temp[17*4];\ | |
1234 uint64_t *temp_ptr= temp;\ | |
1235 int count= 17;\ | |
1236 \ | |
1237 /*FIXME unroll */\ | |
1238 __asm__ volatile(\ | |
1239 "pxor %%mm7, %%mm7 \n\t"\ | |
1240 "1: \n\t"\ | |
1241 "movq (%0), %%mm0 \n\t"\ | |
1242 "movq (%0), %%mm1 \n\t"\ | |
1243 "movq 8(%0), %%mm2 \n\t"\ | |
1244 "movq 8(%0), %%mm3 \n\t"\ | |
1245 "punpcklbw %%mm7, %%mm0 \n\t"\ | |
1246 "punpckhbw %%mm7, %%mm1 \n\t"\ | |
1247 "punpcklbw %%mm7, %%mm2 \n\t"\ | |
1248 "punpckhbw %%mm7, %%mm3 \n\t"\ | |
1249 "movq %%mm0, (%1) \n\t"\ | |
1250 "movq %%mm1, 17*8(%1) \n\t"\ | |
1251 "movq %%mm2, 2*17*8(%1) \n\t"\ | |
1252 "movq %%mm3, 3*17*8(%1) \n\t"\ | |
1253 "add $8, %1 \n\t"\ | |
1254 "add %3, %0 \n\t"\ | |
1255 "decl %2 \n\t"\ | |
1256 " jnz 1b \n\t"\ | |
1257 : "+r" (src), "+r" (temp_ptr), "+r"(count)\ | |
1258 : "r" ((x86_reg)srcStride)\ | |
1259 : "memory"\ | |
1260 );\ | |
1261 \ | |
1262 temp_ptr= temp;\ | |
1263 count=4;\ | |
1264 \ | |
1265 /*FIXME reorder for speed */\ | |
1266 __asm__ volatile(\ | |
1267 /*"pxor %%mm7, %%mm7 \n\t"*/\ | |
1268 "1: \n\t"\ | |
1269 "movq (%0), %%mm0 \n\t"\ | |
1270 "movq 8(%0), %%mm1 \n\t"\ | |
1271 "movq 16(%0), %%mm2 \n\t"\ | |
1272 "movq 24(%0), %%mm3 \n\t"\ | |
1273 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 16(%0), 8(%0), (%0), 32(%0), (%1), OP)\ | |
1274 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 8(%0), (%0), (%0), 40(%0), (%1, %3), OP)\ | |
1275 "add %4, %1 \n\t"\ | |
1276 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, (%0), (%0), 8(%0), 48(%0), (%1), OP)\ | |
1277 \ | |
1278 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, (%0), 8(%0), 16(%0), 56(%0), (%1, %3), OP)\ | |
1279 "add %4, %1 \n\t"\ | |
1280 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 8(%0), 16(%0), 24(%0), 64(%0), (%1), OP)\ | |
1281 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 16(%0), 24(%0), 32(%0), 72(%0), (%1, %3), OP)\ | |
1282 "add %4, %1 \n\t"\ | |
1283 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, 24(%0), 32(%0), 40(%0), 80(%0), (%1), OP)\ | |
1284 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, 32(%0), 40(%0), 48(%0), 88(%0), (%1, %3), OP)\ | |
1285 "add %4, %1 \n\t"\ | |
1286 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 40(%0), 48(%0), 56(%0), 96(%0), (%1), OP)\ | |
1287 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 48(%0), 56(%0), 64(%0),104(%0), (%1, %3), OP)\ | |
1288 "add %4, %1 \n\t"\ | |
1289 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, 56(%0), 64(%0), 72(%0),112(%0), (%1), OP)\ | |
1290 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, 64(%0), 72(%0), 80(%0),120(%0), (%1, %3), OP)\ | |
1291 "add %4, %1 \n\t"\ | |
1292 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 72(%0), 80(%0), 88(%0),128(%0), (%1), OP)\ | |
1293 \ | |
1294 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 80(%0), 88(%0), 96(%0),128(%0), (%1, %3), OP)\ | |
1295 "add %4, %1 \n\t" \ | |
1296 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, 88(%0), 96(%0),104(%0),120(%0), (%1), OP)\ | |
1297 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, 96(%0),104(%0),112(%0),112(%0), (%1, %3), OP)\ | |
1298 \ | |
1299 "add $136, %0 \n\t"\ | |
1300 "add %6, %1 \n\t"\ | |
1301 "decl %2 \n\t"\ | |
1302 " jnz 1b \n\t"\ | |
1303 \ | |
1304 : "+r"(temp_ptr), "+r"(dst), "+g"(count)\ | |
1305 : "r"((x86_reg)dstStride), "r"(2*(x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(ROUNDER), "g"(4-14*(x86_reg)dstStride)\ | |
1306 :"memory"\ | |
1307 );\ | |
1308 }\ | |
1309 \ | |
1310 static void OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(uint8_t *dst, uint8_t *src, int dstStride, int srcStride){\ | |
1311 uint64_t temp[9*2];\ | |
1312 uint64_t *temp_ptr= temp;\ | |
1313 int count= 9;\ | |
1314 \ | |
1315 /*FIXME unroll */\ | |
1316 __asm__ volatile(\ | |
1317 "pxor %%mm7, %%mm7 \n\t"\ | |
1318 "1: \n\t"\ | |
1319 "movq (%0), %%mm0 \n\t"\ | |
1320 "movq (%0), %%mm1 \n\t"\ | |
1321 "punpcklbw %%mm7, %%mm0 \n\t"\ | |
1322 "punpckhbw %%mm7, %%mm1 \n\t"\ | |
1323 "movq %%mm0, (%1) \n\t"\ | |
1324 "movq %%mm1, 9*8(%1) \n\t"\ | |
1325 "add $8, %1 \n\t"\ | |
1326 "add %3, %0 \n\t"\ | |
1327 "decl %2 \n\t"\ | |
1328 " jnz 1b \n\t"\ | |
1329 : "+r" (src), "+r" (temp_ptr), "+r"(count)\ | |
1330 : "r" ((x86_reg)srcStride)\ | |
1331 : "memory"\ | |
1332 );\ | |
1333 \ | |
1334 temp_ptr= temp;\ | |
1335 count=2;\ | |
1336 \ | |
1337 /*FIXME reorder for speed */\ | |
1338 __asm__ volatile(\ | |
1339 /*"pxor %%mm7, %%mm7 \n\t"*/\ | |
1340 "1: \n\t"\ | |
1341 "movq (%0), %%mm0 \n\t"\ | |
1342 "movq 8(%0), %%mm1 \n\t"\ | |
1343 "movq 16(%0), %%mm2 \n\t"\ | |
1344 "movq 24(%0), %%mm3 \n\t"\ | |
1345 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 16(%0), 8(%0), (%0), 32(%0), (%1), OP)\ | |
1346 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 8(%0), (%0), (%0), 40(%0), (%1, %3), OP)\ | |
1347 "add %4, %1 \n\t"\ | |
1348 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, (%0), (%0), 8(%0), 48(%0), (%1), OP)\ | |
1349 \ | |
1350 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, (%0), 8(%0), 16(%0), 56(%0), (%1, %3), OP)\ | |
1351 "add %4, %1 \n\t"\ | |
1352 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 8(%0), 16(%0), 24(%0), 64(%0), (%1), OP)\ | |
1353 \ | |
1354 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 16(%0), 24(%0), 32(%0), 64(%0), (%1, %3), OP)\ | |
1355 "add %4, %1 \n\t"\ | |
1356 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, 24(%0), 32(%0), 40(%0), 56(%0), (%1), OP)\ | |
1357 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, 32(%0), 40(%0), 48(%0), 48(%0), (%1, %3), OP)\ | |
1358 \ | |
1359 "add $72, %0 \n\t"\ | |
1360 "add %6, %1 \n\t"\ | |
1361 "decl %2 \n\t"\ | |
1362 " jnz 1b \n\t"\ | |
1363 \ | |
1364 : "+r"(temp_ptr), "+r"(dst), "+g"(count)\ | |
1365 : "r"((x86_reg)dstStride), "r"(2*(x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(ROUNDER), "g"(4-6*(x86_reg)dstStride)\ | |
1366 : "memory"\ | |
1367 );\ | |
1368 }\ | |
1369 \ | |
1370 static void OPNAME ## qpel8_mc00_ ## MMX (uint8_t *dst, uint8_t *src, int stride){\ | |
1371 OPNAME ## pixels8_ ## MMX(dst, src, stride, 8);\ | |
1372 }\ | |
1373 \ | |
1374 static void OPNAME ## qpel8_mc10_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1375 uint64_t temp[8];\ | |
1376 uint8_t * const half= (uint8_t*)temp;\ | |
1377 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(half, src, 8, stride, 8);\ | |
1378 OPNAME ## pixels8_l2_ ## MMX(dst, src, half, stride, stride, 8);\ | |
1379 }\ | |
1380 \ | |
1381 static void OPNAME ## qpel8_mc20_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1382 OPNAME ## mpeg4_qpel8_h_lowpass_ ## MMX(dst, src, stride, stride, 8);\ | |
1383 }\ | |
1384 \ | |
1385 static void OPNAME ## qpel8_mc30_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1386 uint64_t temp[8];\ | |
1387 uint8_t * const half= (uint8_t*)temp;\ | |
1388 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(half, src, 8, stride, 8);\ | |
1389 OPNAME ## pixels8_l2_ ## MMX(dst, src+1, half, stride, stride, 8);\ | |
1390 }\ | |
1391 \ | |
1392 static void OPNAME ## qpel8_mc01_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1393 uint64_t temp[8];\ | |
1394 uint8_t * const half= (uint8_t*)temp;\ | |
1395 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(half, src, 8, stride);\ | |
1396 OPNAME ## pixels8_l2_ ## MMX(dst, src, half, stride, stride, 8);\ | |
1397 }\ | |
1398 \ | |
1399 static void OPNAME ## qpel8_mc02_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1400 OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(dst, src, stride, stride);\ | |
1401 }\ | |
1402 \ | |
1403 static void OPNAME ## qpel8_mc03_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1404 uint64_t temp[8];\ | |
1405 uint8_t * const half= (uint8_t*)temp;\ | |
1406 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(half, src, 8, stride);\ | |
1407 OPNAME ## pixels8_l2_ ## MMX(dst, src+stride, half, stride, stride, 8);\ | |
1408 }\ | |
1409 static void OPNAME ## qpel8_mc11_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1410 uint64_t half[8 + 9];\ | |
1411 uint8_t * const halfH= ((uint8_t*)half) + 64;\ | |
1412 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1413 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
1414 put ## RND ## pixels8_l2_ ## MMX(halfH, src, halfH, 8, stride, 9);\ | |
1415 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ | |
1416 OPNAME ## pixels8_l2_ ## MMX(dst, halfH, halfHV, stride, 8, 8);\ | |
1417 }\ | |
1418 static void OPNAME ## qpel8_mc31_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1419 uint64_t half[8 + 9];\ | |
1420 uint8_t * const halfH= ((uint8_t*)half) + 64;\ | |
1421 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1422 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
1423 put ## RND ## pixels8_l2_ ## MMX(halfH, src+1, halfH, 8, stride, 9);\ | |
1424 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ | |
1425 OPNAME ## pixels8_l2_ ## MMX(dst, halfH, halfHV, stride, 8, 8);\ | |
1426 }\ | |
1427 static void OPNAME ## qpel8_mc13_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1428 uint64_t half[8 + 9];\ | |
1429 uint8_t * const halfH= ((uint8_t*)half) + 64;\ | |
1430 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1431 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
1432 put ## RND ## pixels8_l2_ ## MMX(halfH, src, halfH, 8, stride, 9);\ | |
1433 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ | |
1434 OPNAME ## pixels8_l2_ ## MMX(dst, halfH+8, halfHV, stride, 8, 8);\ | |
1435 }\ | |
1436 static void OPNAME ## qpel8_mc33_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1437 uint64_t half[8 + 9];\ | |
1438 uint8_t * const halfH= ((uint8_t*)half) + 64;\ | |
1439 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1440 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
1441 put ## RND ## pixels8_l2_ ## MMX(halfH, src+1, halfH, 8, stride, 9);\ | |
1442 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ | |
1443 OPNAME ## pixels8_l2_ ## MMX(dst, halfH+8, halfHV, stride, 8, 8);\ | |
1444 }\ | |
1445 static void OPNAME ## qpel8_mc21_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1446 uint64_t half[8 + 9];\ | |
1447 uint8_t * const halfH= ((uint8_t*)half) + 64;\ | |
1448 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1449 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
1450 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ | |
1451 OPNAME ## pixels8_l2_ ## MMX(dst, halfH, halfHV, stride, 8, 8);\ | |
1452 }\ | |
1453 static void OPNAME ## qpel8_mc23_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1454 uint64_t half[8 + 9];\ | |
1455 uint8_t * const halfH= ((uint8_t*)half) + 64;\ | |
1456 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1457 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
1458 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ | |
1459 OPNAME ## pixels8_l2_ ## MMX(dst, halfH+8, halfHV, stride, 8, 8);\ | |
1460 }\ | |
1461 static void OPNAME ## qpel8_mc12_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1462 uint64_t half[8 + 9];\ | |
1463 uint8_t * const halfH= ((uint8_t*)half);\ | |
1464 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
1465 put ## RND ## pixels8_l2_ ## MMX(halfH, src, halfH, 8, stride, 9);\ | |
1466 OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(dst, halfH, stride, 8);\ | |
1467 }\ | |
1468 static void OPNAME ## qpel8_mc32_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1469 uint64_t half[8 + 9];\ | |
1470 uint8_t * const halfH= ((uint8_t*)half);\ | |
1471 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
1472 put ## RND ## pixels8_l2_ ## MMX(halfH, src+1, halfH, 8, stride, 9);\ | |
1473 OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(dst, halfH, stride, 8);\ | |
1474 }\ | |
1475 static void OPNAME ## qpel8_mc22_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1476 uint64_t half[9];\ | |
1477 uint8_t * const halfH= ((uint8_t*)half);\ | |
1478 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
1479 OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(dst, halfH, stride, 8);\ | |
1480 }\ | |
1481 static void OPNAME ## qpel16_mc00_ ## MMX (uint8_t *dst, uint8_t *src, int stride){\ | |
1482 OPNAME ## pixels16_ ## MMX(dst, src, stride, 16);\ | |
1483 }\ | |
1484 \ | |
1485 static void OPNAME ## qpel16_mc10_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1486 uint64_t temp[32];\ | |
1487 uint8_t * const half= (uint8_t*)temp;\ | |
1488 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(half, src, 16, stride, 16);\ | |
1489 OPNAME ## pixels16_l2_ ## MMX(dst, src, half, stride, stride, 16);\ | |
1490 }\ | |
1491 \ | |
1492 static void OPNAME ## qpel16_mc20_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1493 OPNAME ## mpeg4_qpel16_h_lowpass_ ## MMX(dst, src, stride, stride, 16);\ | |
1494 }\ | |
1495 \ | |
1496 static void OPNAME ## qpel16_mc30_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1497 uint64_t temp[32];\ | |
1498 uint8_t * const half= (uint8_t*)temp;\ | |
1499 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(half, src, 16, stride, 16);\ | |
1500 OPNAME ## pixels16_l2_ ## MMX(dst, src+1, half, stride, stride, 16);\ | |
1501 }\ | |
1502 \ | |
1503 static void OPNAME ## qpel16_mc01_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1504 uint64_t temp[32];\ | |
1505 uint8_t * const half= (uint8_t*)temp;\ | |
1506 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(half, src, 16, stride);\ | |
1507 OPNAME ## pixels16_l2_ ## MMX(dst, src, half, stride, stride, 16);\ | |
1508 }\ | |
1509 \ | |
1510 static void OPNAME ## qpel16_mc02_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1511 OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(dst, src, stride, stride);\ | |
1512 }\ | |
1513 \ | |
1514 static void OPNAME ## qpel16_mc03_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1515 uint64_t temp[32];\ | |
1516 uint8_t * const half= (uint8_t*)temp;\ | |
1517 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(half, src, 16, stride);\ | |
1518 OPNAME ## pixels16_l2_ ## MMX(dst, src+stride, half, stride, stride, 16);\ | |
1519 }\ | |
1520 static void OPNAME ## qpel16_mc11_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1521 uint64_t half[16*2 + 17*2];\ | |
1522 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1523 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1524 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
1525 put ## RND ## pixels16_l2_ ## MMX(halfH, src, halfH, 16, stride, 17);\ | |
1526 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ | |
1527 OPNAME ## pixels16_l2_ ## MMX(dst, halfH, halfHV, stride, 16, 16);\ | |
1528 }\ | |
1529 static void OPNAME ## qpel16_mc31_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1530 uint64_t half[16*2 + 17*2];\ | |
1531 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1532 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1533 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
1534 put ## RND ## pixels16_l2_ ## MMX(halfH, src+1, halfH, 16, stride, 17);\ | |
1535 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ | |
1536 OPNAME ## pixels16_l2_ ## MMX(dst, halfH, halfHV, stride, 16, 16);\ | |
1537 }\ | |
1538 static void OPNAME ## qpel16_mc13_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1539 uint64_t half[16*2 + 17*2];\ | |
1540 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1541 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1542 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
1543 put ## RND ## pixels16_l2_ ## MMX(halfH, src, halfH, 16, stride, 17);\ | |
1544 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ | |
1545 OPNAME ## pixels16_l2_ ## MMX(dst, halfH+16, halfHV, stride, 16, 16);\ | |
1546 }\ | |
1547 static void OPNAME ## qpel16_mc33_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1548 uint64_t half[16*2 + 17*2];\ | |
1549 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1550 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1551 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
1552 put ## RND ## pixels16_l2_ ## MMX(halfH, src+1, halfH, 16, stride, 17);\ | |
1553 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ | |
1554 OPNAME ## pixels16_l2_ ## MMX(dst, halfH+16, halfHV, stride, 16, 16);\ | |
1555 }\ | |
1556 static void OPNAME ## qpel16_mc21_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1557 uint64_t half[16*2 + 17*2];\ | |
1558 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1559 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1560 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
1561 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ | |
1562 OPNAME ## pixels16_l2_ ## MMX(dst, halfH, halfHV, stride, 16, 16);\ | |
1563 }\ | |
1564 static void OPNAME ## qpel16_mc23_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1565 uint64_t half[16*2 + 17*2];\ | |
1566 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1567 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1568 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
1569 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ | |
1570 OPNAME ## pixels16_l2_ ## MMX(dst, halfH+16, halfHV, stride, 16, 16);\ | |
1571 }\ | |
1572 static void OPNAME ## qpel16_mc12_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1573 uint64_t half[17*2];\ | |
1574 uint8_t * const halfH= ((uint8_t*)half);\ | |
1575 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
1576 put ## RND ## pixels16_l2_ ## MMX(halfH, src, halfH, 16, stride, 17);\ | |
1577 OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(dst, halfH, stride, 16);\ | |
1578 }\ | |
1579 static void OPNAME ## qpel16_mc32_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1580 uint64_t half[17*2];\ | |
1581 uint8_t * const halfH= ((uint8_t*)half);\ | |
1582 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
1583 put ## RND ## pixels16_l2_ ## MMX(halfH, src+1, halfH, 16, stride, 17);\ | |
1584 OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(dst, halfH, stride, 16);\ | |
1585 }\ | |
1586 static void OPNAME ## qpel16_mc22_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1587 uint64_t half[17*2];\ | |
1588 uint8_t * const halfH= ((uint8_t*)half);\ | |
1589 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
1590 OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(dst, halfH, stride, 16);\ | |
1591 } | |
1592 | |
1593 #define PUT_OP(a,b,temp, size) "mov" #size " " #a ", " #b " \n\t" | |
1594 #define AVG_3DNOW_OP(a,b,temp, size) \ | |
1595 "mov" #size " " #b ", " #temp " \n\t"\ | |
1596 "pavgusb " #temp ", " #a " \n\t"\ | |
1597 "mov" #size " " #a ", " #b " \n\t" | |
1598 #define AVG_MMX2_OP(a,b,temp, size) \ | |
1599 "mov" #size " " #b ", " #temp " \n\t"\ | |
1600 "pavgb " #temp ", " #a " \n\t"\ | |
1601 "mov" #size " " #a ", " #b " \n\t" | |
1602 | |
1603 QPEL_BASE(put_ , ff_pw_16, _ , PUT_OP, PUT_OP) | |
1604 QPEL_BASE(avg_ , ff_pw_16, _ , AVG_MMX2_OP, AVG_3DNOW_OP) | |
1605 QPEL_BASE(put_no_rnd_, ff_pw_15, _no_rnd_, PUT_OP, PUT_OP) | |
1606 QPEL_OP(put_ , ff_pw_16, _ , PUT_OP, 3dnow) | |
1607 QPEL_OP(avg_ , ff_pw_16, _ , AVG_3DNOW_OP, 3dnow) | |
1608 QPEL_OP(put_no_rnd_, ff_pw_15, _no_rnd_, PUT_OP, 3dnow) | |
1609 QPEL_OP(put_ , ff_pw_16, _ , PUT_OP, mmx2) | |
1610 QPEL_OP(avg_ , ff_pw_16, _ , AVG_MMX2_OP, mmx2) | |
1611 QPEL_OP(put_no_rnd_, ff_pw_15, _no_rnd_, PUT_OP, mmx2) | |
1612 | |
1613 /***********************************/ | |
1614 /* bilinear qpel: not compliant to any spec, only for -lavdopts fast */ | |
1615 | |
1616 #define QPEL_2TAP_XY(OPNAME, SIZE, MMX, XY, HPEL)\ | |
1617 static void OPNAME ## 2tap_qpel ## SIZE ## _mc ## XY ## _ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1618 OPNAME ## pixels ## SIZE ## HPEL(dst, src, stride, SIZE);\ | |
1619 } | |
1620 #define QPEL_2TAP_L3(OPNAME, SIZE, MMX, XY, S0, S1, S2)\ | |
1621 static void OPNAME ## 2tap_qpel ## SIZE ## _mc ## XY ## _ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1622 OPNAME ## 2tap_qpel ## SIZE ## _l3_ ## MMX(dst, src+S0, stride, SIZE, S1, S2);\ | |
1623 } | |
1624 | |
1625 #define QPEL_2TAP(OPNAME, SIZE, MMX)\ | |
1626 QPEL_2TAP_XY(OPNAME, SIZE, MMX, 20, _x2_ ## MMX)\ | |
1627 QPEL_2TAP_XY(OPNAME, SIZE, MMX, 02, _y2_ ## MMX)\ | |
1628 QPEL_2TAP_XY(OPNAME, SIZE, MMX, 22, _xy2_mmx)\ | |
1629 static const qpel_mc_func OPNAME ## 2tap_qpel ## SIZE ## _mc00_ ## MMX =\ | |
1630 OPNAME ## qpel ## SIZE ## _mc00_ ## MMX;\ | |
1631 static const qpel_mc_func OPNAME ## 2tap_qpel ## SIZE ## _mc21_ ## MMX =\ | |
1632 OPNAME ## 2tap_qpel ## SIZE ## _mc20_ ## MMX;\ | |
1633 static const qpel_mc_func OPNAME ## 2tap_qpel ## SIZE ## _mc12_ ## MMX =\ | |
1634 OPNAME ## 2tap_qpel ## SIZE ## _mc02_ ## MMX;\ | |
1635 static void OPNAME ## 2tap_qpel ## SIZE ## _mc32_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1636 OPNAME ## pixels ## SIZE ## _y2_ ## MMX(dst, src+1, stride, SIZE);\ | |
1637 }\ | |
1638 static void OPNAME ## 2tap_qpel ## SIZE ## _mc23_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ | |
1639 OPNAME ## pixels ## SIZE ## _x2_ ## MMX(dst, src+stride, stride, SIZE);\ | |
1640 }\ | |
1641 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 10, 0, 1, 0)\ | |
1642 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 30, 1, -1, 0)\ | |
1643 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 01, 0, stride, 0)\ | |
1644 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 03, stride, -stride, 0)\ | |
1645 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 11, 0, stride, 1)\ | |
1646 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 31, 1, stride, -1)\ | |
1647 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 13, stride, -stride, 1)\ | |
1648 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 33, stride+1, -stride, -1)\ | |
1649 | |
1650 QPEL_2TAP(put_, 16, mmx2) | |
1651 QPEL_2TAP(avg_, 16, mmx2) | |
1652 QPEL_2TAP(put_, 8, mmx2) | |
1653 QPEL_2TAP(avg_, 8, mmx2) | |
1654 QPEL_2TAP(put_, 16, 3dnow) | |
1655 QPEL_2TAP(avg_, 16, 3dnow) | |
1656 QPEL_2TAP(put_, 8, 3dnow) | |
1657 QPEL_2TAP(avg_, 8, 3dnow) | |
1658 | |
1659 | |
1660 #if 0 | |
8527
f8bf438c6000
Add missing 'void' keyword to parameterless function declarations.
diego
parents:
8519
diff
changeset
|
1661 static void just_return(void) { return; } |
8430 | 1662 #endif |
1663 | |
1664 static void gmc_mmx(uint8_t *dst, uint8_t *src, int stride, int h, int ox, int oy, | |
1665 int dxx, int dxy, int dyx, int dyy, int shift, int r, int width, int height){ | |
1666 const int w = 8; | |
1667 const int ix = ox>>(16+shift); | |
1668 const int iy = oy>>(16+shift); | |
1669 const int oxs = ox>>4; | |
1670 const int oys = oy>>4; | |
1671 const int dxxs = dxx>>4; | |
1672 const int dxys = dxy>>4; | |
1673 const int dyxs = dyx>>4; | |
1674 const int dyys = dyy>>4; | |
1675 const uint16_t r4[4] = {r,r,r,r}; | |
1676 const uint16_t dxy4[4] = {dxys,dxys,dxys,dxys}; | |
1677 const uint16_t dyy4[4] = {dyys,dyys,dyys,dyys}; | |
1678 const uint64_t shift2 = 2*shift; | |
1679 uint8_t edge_buf[(h+1)*stride]; | |
1680 int x, y; | |
1681 | |
1682 const int dxw = (dxx-(1<<(16+shift)))*(w-1); | |
1683 const int dyh = (dyy-(1<<(16+shift)))*(h-1); | |
1684 const int dxh = dxy*(h-1); | |
1685 const int dyw = dyx*(w-1); | |
1686 if( // non-constant fullpel offset (3% of blocks) | |
1687 ((ox^(ox+dxw)) | (ox^(ox+dxh)) | (ox^(ox+dxw+dxh)) | | |
1688 (oy^(oy+dyw)) | (oy^(oy+dyh)) | (oy^(oy+dyw+dyh))) >> (16+shift) | |
1689 // uses more than 16 bits of subpel mv (only at huge resolution) | |
1690 || (dxx|dxy|dyx|dyy)&15 ) | |
1691 { | |
1692 //FIXME could still use mmx for some of the rows | |
1693 ff_gmc_c(dst, src, stride, h, ox, oy, dxx, dxy, dyx, dyy, shift, r, width, height); | |
1694 return; | |
1695 } | |
1696 | |
1697 src += ix + iy*stride; | |
1698 if( (unsigned)ix >= width-w || | |
1699 (unsigned)iy >= height-h ) | |
1700 { | |
1701 ff_emulated_edge_mc(edge_buf, src, stride, w+1, h+1, ix, iy, width, height); | |
1702 src = edge_buf; | |
1703 } | |
1704 | |
1705 __asm__ volatile( | |
1706 "movd %0, %%mm6 \n\t" | |
1707 "pxor %%mm7, %%mm7 \n\t" | |
1708 "punpcklwd %%mm6, %%mm6 \n\t" | |
1709 "punpcklwd %%mm6, %%mm6 \n\t" | |
1710 :: "r"(1<<shift) | |
1711 ); | |
1712 | |
1713 for(x=0; x<w; x+=4){ | |
1714 uint16_t dx4[4] = { oxs - dxys + dxxs*(x+0), | |
1715 oxs - dxys + dxxs*(x+1), | |
1716 oxs - dxys + dxxs*(x+2), | |
1717 oxs - dxys + dxxs*(x+3) }; | |
1718 uint16_t dy4[4] = { oys - dyys + dyxs*(x+0), | |
1719 oys - dyys + dyxs*(x+1), | |
1720 oys - dyys + dyxs*(x+2), | |
1721 oys - dyys + dyxs*(x+3) }; | |
1722 | |
1723 for(y=0; y<h; y++){ | |
1724 __asm__ volatile( | |
1725 "movq %0, %%mm4 \n\t" | |
1726 "movq %1, %%mm5 \n\t" | |
1727 "paddw %2, %%mm4 \n\t" | |
1728 "paddw %3, %%mm5 \n\t" | |
1729 "movq %%mm4, %0 \n\t" | |
1730 "movq %%mm5, %1 \n\t" | |
1731 "psrlw $12, %%mm4 \n\t" | |
1732 "psrlw $12, %%mm5 \n\t" | |
1733 : "+m"(*dx4), "+m"(*dy4) | |
1734 : "m"(*dxy4), "m"(*dyy4) | |
1735 ); | |
1736 | |
1737 __asm__ volatile( | |
1738 "movq %%mm6, %%mm2 \n\t" | |
1739 "movq %%mm6, %%mm1 \n\t" | |
1740 "psubw %%mm4, %%mm2 \n\t" | |
1741 "psubw %%mm5, %%mm1 \n\t" | |
1742 "movq %%mm2, %%mm0 \n\t" | |
1743 "movq %%mm4, %%mm3 \n\t" | |
1744 "pmullw %%mm1, %%mm0 \n\t" // (s-dx)*(s-dy) | |
1745 "pmullw %%mm5, %%mm3 \n\t" // dx*dy | |
1746 "pmullw %%mm5, %%mm2 \n\t" // (s-dx)*dy | |
1747 "pmullw %%mm4, %%mm1 \n\t" // dx*(s-dy) | |
1748 | |
1749 "movd %4, %%mm5 \n\t" | |
1750 "movd %3, %%mm4 \n\t" | |
1751 "punpcklbw %%mm7, %%mm5 \n\t" | |
1752 "punpcklbw %%mm7, %%mm4 \n\t" | |
1753 "pmullw %%mm5, %%mm3 \n\t" // src[1,1] * dx*dy | |
1754 "pmullw %%mm4, %%mm2 \n\t" // src[0,1] * (s-dx)*dy | |
1755 | |
1756 "movd %2, %%mm5 \n\t" | |
1757 "movd %1, %%mm4 \n\t" | |
1758 "punpcklbw %%mm7, %%mm5 \n\t" | |
1759 "punpcklbw %%mm7, %%mm4 \n\t" | |
1760 "pmullw %%mm5, %%mm1 \n\t" // src[1,0] * dx*(s-dy) | |
1761 "pmullw %%mm4, %%mm0 \n\t" // src[0,0] * (s-dx)*(s-dy) | |
1762 "paddw %5, %%mm1 \n\t" | |
1763 "paddw %%mm3, %%mm2 \n\t" | |
1764 "paddw %%mm1, %%mm0 \n\t" | |
1765 "paddw %%mm2, %%mm0 \n\t" | |
1766 | |
1767 "psrlw %6, %%mm0 \n\t" | |
1768 "packuswb %%mm0, %%mm0 \n\t" | |
1769 "movd %%mm0, %0 \n\t" | |
1770 | |
1771 : "=m"(dst[x+y*stride]) | |
1772 : "m"(src[0]), "m"(src[1]), | |
1773 "m"(src[stride]), "m"(src[stride+1]), | |
1774 "m"(*r4), "m"(shift2) | |
1775 ); | |
1776 src += stride; | |
1777 } | |
1778 src += 4-h*stride; | |
1779 } | |
1780 } | |
1781 | |
1782 #define PREFETCH(name, op) \ | |
1783 static void name(void *mem, int stride, int h){\ | |
1784 const uint8_t *p= mem;\ | |
1785 do{\ | |
1786 __asm__ volatile(#op" %0" :: "m"(*p));\ | |
1787 p+= stride;\ | |
1788 }while(--h);\ | |
1789 } | |
1790 PREFETCH(prefetch_mmx2, prefetcht0) | |
1791 PREFETCH(prefetch_3dnow, prefetch) | |
1792 #undef PREFETCH | |
1793 | |
12450
3941687b4fa9
Split h264dsp_mmx.c (which was #included in dsputil_mmx.c) in h264_qpel_mmx.c,
rbultje
parents:
12439
diff
changeset
|
1794 #include "h264_qpel_mmx.c" |
12437
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1795 |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1796 void ff_put_h264_chroma_mc8_mmx_rnd (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1797 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1798 void ff_put_vc1_chroma_mc8_mmx_nornd (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1799 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1800 void ff_put_rv40_chroma_mc8_mmx (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1801 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1802 void ff_avg_h264_chroma_mc8_mmx2_rnd (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1803 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1804 void ff_avg_vc1_chroma_mc8_mmx2_nornd (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1805 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1806 void ff_avg_rv40_chroma_mc8_mmx2 (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1807 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1808 void ff_avg_h264_chroma_mc8_3dnow_rnd (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1809 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1810 void ff_avg_vc1_chroma_mc8_3dnow_nornd(uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1811 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1812 void ff_avg_rv40_chroma_mc8_3dnow (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1813 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1814 |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1815 void ff_put_h264_chroma_mc4_mmx (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1816 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1817 void ff_put_rv40_chroma_mc4_mmx (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1818 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1819 void ff_avg_h264_chroma_mc4_mmx2 (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1820 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1821 void ff_avg_rv40_chroma_mc4_mmx2 (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1822 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1823 void ff_avg_h264_chroma_mc4_3dnow (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1824 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1825 void ff_avg_rv40_chroma_mc4_3dnow (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1826 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1827 |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1828 void ff_put_h264_chroma_mc2_mmx2 (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1829 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1830 void ff_avg_h264_chroma_mc2_mmx2 (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1831 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1832 |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1833 void ff_put_h264_chroma_mc8_ssse3_rnd (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1834 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1835 void ff_put_vc1_chroma_mc8_ssse3_nornd(uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1836 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1837 void ff_put_h264_chroma_mc4_ssse3 (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1838 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1839 |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1840 void ff_avg_h264_chroma_mc8_ssse3_rnd (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1841 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1842 void ff_avg_vc1_chroma_mc8_ssse3_nornd(uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1843 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1844 void ff_avg_h264_chroma_mc4_ssse3 (uint8_t *dst, uint8_t *src, |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1845 int stride, int h, int x, int y); |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
1846 |
8430 | 1847 |
1848 /* CAVS specific */ | |
1849 void ff_put_cavs_qpel8_mc00_mmx2(uint8_t *dst, uint8_t *src, int stride) { | |
1850 put_pixels8_mmx(dst, src, stride, 8); | |
1851 } | |
1852 void ff_avg_cavs_qpel8_mc00_mmx2(uint8_t *dst, uint8_t *src, int stride) { | |
1853 avg_pixels8_mmx(dst, src, stride, 8); | |
1854 } | |
1855 void ff_put_cavs_qpel16_mc00_mmx2(uint8_t *dst, uint8_t *src, int stride) { | |
1856 put_pixels16_mmx(dst, src, stride, 16); | |
1857 } | |
1858 void ff_avg_cavs_qpel16_mc00_mmx2(uint8_t *dst, uint8_t *src, int stride) { | |
1859 avg_pixels16_mmx(dst, src, stride, 16); | |
1860 } | |
1861 | |
1862 /* VC1 specific */ | |
1863 void ff_put_vc1_mspel_mc00_mmx(uint8_t *dst, const uint8_t *src, int stride, int rnd) { | |
1864 put_pixels8_mmx(dst, src, stride, 8); | |
1865 } | |
9441 | 1866 void ff_avg_vc1_mspel_mc00_mmx2(uint8_t *dst, const uint8_t *src, int stride, int rnd) { |
1867 avg_pixels8_mmx2(dst, src, stride, 8); | |
1868 } | |
8430 | 1869 |
1870 /* XXX: those functions should be suppressed ASAP when all IDCTs are | |
1871 converted */ | |
8590 | 1872 #if CONFIG_GPL |
8430 | 1873 static void ff_libmpeg2mmx_idct_put(uint8_t *dest, int line_size, DCTELEM *block) |
1874 { | |
1875 ff_mmx_idct (block); | |
12435
fe78a4548d12
Put ff_ prefix on non-static {put_signed,put,add}_pixels_clamped_mmx()
rbultje
parents:
12417
diff
changeset
|
1876 ff_put_pixels_clamped_mmx(block, dest, line_size); |
8430 | 1877 } |
1878 static void ff_libmpeg2mmx_idct_add(uint8_t *dest, int line_size, DCTELEM *block) | |
1879 { | |
1880 ff_mmx_idct (block); | |
12435
fe78a4548d12
Put ff_ prefix on non-static {put_signed,put,add}_pixels_clamped_mmx()
rbultje
parents:
12417
diff
changeset
|
1881 ff_add_pixels_clamped_mmx(block, dest, line_size); |
8430 | 1882 } |
1883 static void ff_libmpeg2mmx2_idct_put(uint8_t *dest, int line_size, DCTELEM *block) | |
1884 { | |
1885 ff_mmxext_idct (block); | |
12435
fe78a4548d12
Put ff_ prefix on non-static {put_signed,put,add}_pixels_clamped_mmx()
rbultje
parents:
12417
diff
changeset
|
1886 ff_put_pixels_clamped_mmx(block, dest, line_size); |
8430 | 1887 } |
1888 static void ff_libmpeg2mmx2_idct_add(uint8_t *dest, int line_size, DCTELEM *block) | |
1889 { | |
1890 ff_mmxext_idct (block); | |
12435
fe78a4548d12
Put ff_ prefix on non-static {put_signed,put,add}_pixels_clamped_mmx()
rbultje
parents:
12417
diff
changeset
|
1891 ff_add_pixels_clamped_mmx(block, dest, line_size); |
8430 | 1892 } |
1893 #endif | |
1894 static void ff_idct_xvid_mmx_put(uint8_t *dest, int line_size, DCTELEM *block) | |
1895 { | |
1896 ff_idct_xvid_mmx (block); | |
12435
fe78a4548d12
Put ff_ prefix on non-static {put_signed,put,add}_pixels_clamped_mmx()
rbultje
parents:
12417
diff
changeset
|
1897 ff_put_pixels_clamped_mmx(block, dest, line_size); |
8430 | 1898 } |
1899 static void ff_idct_xvid_mmx_add(uint8_t *dest, int line_size, DCTELEM *block) | |
1900 { | |
1901 ff_idct_xvid_mmx (block); | |
12435
fe78a4548d12
Put ff_ prefix on non-static {put_signed,put,add}_pixels_clamped_mmx()
rbultje
parents:
12417
diff
changeset
|
1902 ff_add_pixels_clamped_mmx(block, dest, line_size); |
8430 | 1903 } |
1904 static void ff_idct_xvid_mmx2_put(uint8_t *dest, int line_size, DCTELEM *block) | |
1905 { | |
1906 ff_idct_xvid_mmx2 (block); | |
12435
fe78a4548d12
Put ff_ prefix on non-static {put_signed,put,add}_pixels_clamped_mmx()
rbultje
parents:
12417
diff
changeset
|
1907 ff_put_pixels_clamped_mmx(block, dest, line_size); |
8430 | 1908 } |
1909 static void ff_idct_xvid_mmx2_add(uint8_t *dest, int line_size, DCTELEM *block) | |
1910 { | |
1911 ff_idct_xvid_mmx2 (block); | |
12435
fe78a4548d12
Put ff_ prefix on non-static {put_signed,put,add}_pixels_clamped_mmx()
rbultje
parents:
12417
diff
changeset
|
1912 ff_add_pixels_clamped_mmx(block, dest, line_size); |
8430 | 1913 } |
1914 | |
1915 static void vorbis_inverse_coupling_3dnow(float *mag, float *ang, int blocksize) | |
1916 { | |
1917 int i; | |
1918 __asm__ volatile("pxor %%mm7, %%mm7":); | |
1919 for(i=0; i<blocksize; i+=2) { | |
1920 __asm__ volatile( | |
1921 "movq %0, %%mm0 \n\t" | |
1922 "movq %1, %%mm1 \n\t" | |
1923 "movq %%mm0, %%mm2 \n\t" | |
1924 "movq %%mm1, %%mm3 \n\t" | |
1925 "pfcmpge %%mm7, %%mm2 \n\t" // m <= 0.0 | |
1926 "pfcmpge %%mm7, %%mm3 \n\t" // a <= 0.0 | |
1927 "pslld $31, %%mm2 \n\t" // keep only the sign bit | |
1928 "pxor %%mm2, %%mm1 \n\t" | |
1929 "movq %%mm3, %%mm4 \n\t" | |
1930 "pand %%mm1, %%mm3 \n\t" | |
1931 "pandn %%mm1, %%mm4 \n\t" | |
1932 "pfadd %%mm0, %%mm3 \n\t" // a = m + ((a<0) & (a ^ sign(m))) | |
1933 "pfsub %%mm4, %%mm0 \n\t" // m = m + ((a>0) & (a ^ sign(m))) | |
1934 "movq %%mm3, %1 \n\t" | |
1935 "movq %%mm0, %0 \n\t" | |
1936 :"+m"(mag[i]), "+m"(ang[i]) | |
1937 ::"memory" | |
1938 ); | |
1939 } | |
1940 __asm__ volatile("femms"); | |
1941 } | |
1942 static void vorbis_inverse_coupling_sse(float *mag, float *ang, int blocksize) | |
1943 { | |
1944 int i; | |
1945 | |
1946 __asm__ volatile( | |
1947 "movaps %0, %%xmm5 \n\t" | |
1948 ::"m"(ff_pdw_80000000[0]) | |
1949 ); | |
1950 for(i=0; i<blocksize; i+=4) { | |
1951 __asm__ volatile( | |
1952 "movaps %0, %%xmm0 \n\t" | |
1953 "movaps %1, %%xmm1 \n\t" | |
1954 "xorps %%xmm2, %%xmm2 \n\t" | |
1955 "xorps %%xmm3, %%xmm3 \n\t" | |
1956 "cmpleps %%xmm0, %%xmm2 \n\t" // m <= 0.0 | |
1957 "cmpleps %%xmm1, %%xmm3 \n\t" // a <= 0.0 | |
1958 "andps %%xmm5, %%xmm2 \n\t" // keep only the sign bit | |
1959 "xorps %%xmm2, %%xmm1 \n\t" | |
1960 "movaps %%xmm3, %%xmm4 \n\t" | |
1961 "andps %%xmm1, %%xmm3 \n\t" | |
1962 "andnps %%xmm1, %%xmm4 \n\t" | |
1963 "addps %%xmm0, %%xmm3 \n\t" // a = m + ((a<0) & (a ^ sign(m))) | |
1964 "subps %%xmm4, %%xmm0 \n\t" // m = m + ((a>0) & (a ^ sign(m))) | |
1965 "movaps %%xmm3, %1 \n\t" | |
1966 "movaps %%xmm0, %0 \n\t" | |
1967 :"+m"(mag[i]), "+m"(ang[i]) | |
1968 ::"memory" | |
1969 ); | |
1970 } | |
1971 } | |
1972 | |
1973 #define IF1(x) x | |
1974 #define IF0(x) | |
1975 | |
1976 #define MIX5(mono,stereo)\ | |
1977 __asm__ volatile(\ | |
1978 "movss 0(%2), %%xmm5 \n"\ | |
1979 "movss 8(%2), %%xmm6 \n"\ | |
1980 "movss 24(%2), %%xmm7 \n"\ | |
1981 "shufps $0, %%xmm5, %%xmm5 \n"\ | |
1982 "shufps $0, %%xmm6, %%xmm6 \n"\ | |
1983 "shufps $0, %%xmm7, %%xmm7 \n"\ | |
1984 "1: \n"\ | |
1985 "movaps (%0,%1), %%xmm0 \n"\ | |
1986 "movaps 0x400(%0,%1), %%xmm1 \n"\ | |
1987 "movaps 0x800(%0,%1), %%xmm2 \n"\ | |
1988 "movaps 0xc00(%0,%1), %%xmm3 \n"\ | |
1989 "movaps 0x1000(%0,%1), %%xmm4 \n"\ | |
1990 "mulps %%xmm5, %%xmm0 \n"\ | |
1991 "mulps %%xmm6, %%xmm1 \n"\ | |
1992 "mulps %%xmm5, %%xmm2 \n"\ | |
1993 "mulps %%xmm7, %%xmm3 \n"\ | |
1994 "mulps %%xmm7, %%xmm4 \n"\ | |
1995 stereo("addps %%xmm1, %%xmm0 \n")\ | |
1996 "addps %%xmm1, %%xmm2 \n"\ | |
1997 "addps %%xmm3, %%xmm0 \n"\ | |
1998 "addps %%xmm4, %%xmm2 \n"\ | |
1999 mono("addps %%xmm2, %%xmm0 \n")\ | |
2000 "movaps %%xmm0, (%0,%1) \n"\ | |
2001 stereo("movaps %%xmm2, 0x400(%0,%1) \n")\ | |
2002 "add $16, %0 \n"\ | |
2003 "jl 1b \n"\ | |
2004 :"+&r"(i)\ | |
2005 :"r"(samples[0]+len), "r"(matrix)\ | |
2006 :"memory"\ | |
2007 ); | |
2008 | |
2009 #define MIX_MISC(stereo)\ | |
2010 __asm__ volatile(\ | |
2011 "1: \n"\ | |
2012 "movaps (%3,%0), %%xmm0 \n"\ | |
2013 stereo("movaps %%xmm0, %%xmm1 \n")\ | |
2014 "mulps %%xmm6, %%xmm0 \n"\ | |
2015 stereo("mulps %%xmm7, %%xmm1 \n")\ | |
2016 "lea 1024(%3,%0), %1 \n"\ | |
2017 "mov %5, %2 \n"\ | |
2018 "2: \n"\ | |
2019 "movaps (%1), %%xmm2 \n"\ | |
2020 stereo("movaps %%xmm2, %%xmm3 \n")\ | |
2021 "mulps (%4,%2), %%xmm2 \n"\ | |
2022 stereo("mulps 16(%4,%2), %%xmm3 \n")\ | |
2023 "addps %%xmm2, %%xmm0 \n"\ | |
2024 stereo("addps %%xmm3, %%xmm1 \n")\ | |
2025 "add $1024, %1 \n"\ | |
2026 "add $32, %2 \n"\ | |
2027 "jl 2b \n"\ | |
2028 "movaps %%xmm0, (%3,%0) \n"\ | |
2029 stereo("movaps %%xmm1, 1024(%3,%0) \n")\ | |
2030 "add $16, %0 \n"\ | |
2031 "jl 1b \n"\ | |
2032 :"+&r"(i), "=&r"(j), "=&r"(k)\ | |
2033 :"r"(samples[0]+len), "r"(matrix_simd+in_ch), "g"((intptr_t)-32*(in_ch-1))\ | |
2034 :"memory"\ | |
2035 ); | |
2036 | |
2037 static void ac3_downmix_sse(float (*samples)[256], float (*matrix)[2], int out_ch, int in_ch, int len) | |
2038 { | |
2039 int (*matrix_cmp)[2] = (int(*)[2])matrix; | |
2040 intptr_t i,j,k; | |
2041 | |
2042 i = -len*sizeof(float); | |
2043 if(in_ch == 5 && out_ch == 2 && !(matrix_cmp[0][1]|matrix_cmp[2][0]|matrix_cmp[3][1]|matrix_cmp[4][0]|(matrix_cmp[1][0]^matrix_cmp[1][1])|(matrix_cmp[0][0]^matrix_cmp[2][1]))) { | |
2044 MIX5(IF0,IF1); | |
2045 } else if(in_ch == 5 && out_ch == 1 && matrix_cmp[0][0]==matrix_cmp[2][0] && matrix_cmp[3][0]==matrix_cmp[4][0]) { | |
2046 MIX5(IF1,IF0); | |
2047 } else { | |
11369 | 2048 DECLARE_ALIGNED(16, float, matrix_simd)[in_ch][2][4]; |
8430 | 2049 j = 2*in_ch*sizeof(float); |
2050 __asm__ volatile( | |
2051 "1: \n" | |
2052 "sub $8, %0 \n" | |
2053 "movss (%2,%0), %%xmm6 \n" | |
2054 "movss 4(%2,%0), %%xmm7 \n" | |
2055 "shufps $0, %%xmm6, %%xmm6 \n" | |
2056 "shufps $0, %%xmm7, %%xmm7 \n" | |
2057 "movaps %%xmm6, (%1,%0,4) \n" | |
2058 "movaps %%xmm7, 16(%1,%0,4) \n" | |
2059 "jg 1b \n" | |
2060 :"+&r"(j) | |
2061 :"r"(matrix_simd), "r"(matrix) | |
2062 :"memory" | |
2063 ); | |
2064 if(out_ch == 2) { | |
2065 MIX_MISC(IF1); | |
2066 } else { | |
2067 MIX_MISC(IF0); | |
2068 } | |
2069 } | |
2070 } | |
2071 | |
2072 static void vector_fmul_3dnow(float *dst, const float *src, int len){ | |
2073 x86_reg i = (len-4)*4; | |
2074 __asm__ volatile( | |
2075 "1: \n\t" | |
2076 "movq (%1,%0), %%mm0 \n\t" | |
2077 "movq 8(%1,%0), %%mm1 \n\t" | |
2078 "pfmul (%2,%0), %%mm0 \n\t" | |
2079 "pfmul 8(%2,%0), %%mm1 \n\t" | |
2080 "movq %%mm0, (%1,%0) \n\t" | |
2081 "movq %%mm1, 8(%1,%0) \n\t" | |
2082 "sub $16, %0 \n\t" | |
2083 "jge 1b \n\t" | |
2084 "femms \n\t" | |
2085 :"+r"(i) | |
2086 :"r"(dst), "r"(src) | |
2087 :"memory" | |
2088 ); | |
2089 } | |
2090 static void vector_fmul_sse(float *dst, const float *src, int len){ | |
2091 x86_reg i = (len-8)*4; | |
2092 __asm__ volatile( | |
2093 "1: \n\t" | |
2094 "movaps (%1,%0), %%xmm0 \n\t" | |
2095 "movaps 16(%1,%0), %%xmm1 \n\t" | |
2096 "mulps (%2,%0), %%xmm0 \n\t" | |
2097 "mulps 16(%2,%0), %%xmm1 \n\t" | |
2098 "movaps %%xmm0, (%1,%0) \n\t" | |
2099 "movaps %%xmm1, 16(%1,%0) \n\t" | |
2100 "sub $32, %0 \n\t" | |
2101 "jge 1b \n\t" | |
2102 :"+r"(i) | |
2103 :"r"(dst), "r"(src) | |
2104 :"memory" | |
2105 ); | |
2106 } | |
2107 | |
2108 static void vector_fmul_reverse_3dnow2(float *dst, const float *src0, const float *src1, int len){ | |
2109 x86_reg i = len*4-16; | |
2110 __asm__ volatile( | |
2111 "1: \n\t" | |
2112 "pswapd 8(%1), %%mm0 \n\t" | |
2113 "pswapd (%1), %%mm1 \n\t" | |
2114 "pfmul (%3,%0), %%mm0 \n\t" | |
2115 "pfmul 8(%3,%0), %%mm1 \n\t" | |
2116 "movq %%mm0, (%2,%0) \n\t" | |
2117 "movq %%mm1, 8(%2,%0) \n\t" | |
2118 "add $16, %1 \n\t" | |
2119 "sub $16, %0 \n\t" | |
2120 "jge 1b \n\t" | |
2121 :"+r"(i), "+r"(src1) | |
2122 :"r"(dst), "r"(src0) | |
2123 ); | |
2124 __asm__ volatile("femms"); | |
2125 } | |
2126 static void vector_fmul_reverse_sse(float *dst, const float *src0, const float *src1, int len){ | |
2127 x86_reg i = len*4-32; | |
2128 __asm__ volatile( | |
2129 "1: \n\t" | |
2130 "movaps 16(%1), %%xmm0 \n\t" | |
2131 "movaps (%1), %%xmm1 \n\t" | |
2132 "shufps $0x1b, %%xmm0, %%xmm0 \n\t" | |
2133 "shufps $0x1b, %%xmm1, %%xmm1 \n\t" | |
2134 "mulps (%3,%0), %%xmm0 \n\t" | |
2135 "mulps 16(%3,%0), %%xmm1 \n\t" | |
2136 "movaps %%xmm0, (%2,%0) \n\t" | |
2137 "movaps %%xmm1, 16(%2,%0) \n\t" | |
2138 "add $32, %1 \n\t" | |
2139 "sub $32, %0 \n\t" | |
2140 "jge 1b \n\t" | |
2141 :"+r"(i), "+r"(src1) | |
2142 :"r"(dst), "r"(src0) | |
2143 ); | |
2144 } | |
2145 | |
10300
4d1b9ca628fc
Drop unused args from vector_fmul_add_add, simpify code, and rename
mru
parents:
10107
diff
changeset
|
2146 static void vector_fmul_add_3dnow(float *dst, const float *src0, const float *src1, |
4d1b9ca628fc
Drop unused args from vector_fmul_add_add, simpify code, and rename
mru
parents:
10107
diff
changeset
|
2147 const float *src2, int len){ |
8430 | 2148 x86_reg i = (len-4)*4; |
10301 | 2149 __asm__ volatile( |
2150 "1: \n\t" | |
2151 "movq (%2,%0), %%mm0 \n\t" | |
2152 "movq 8(%2,%0), %%mm1 \n\t" | |
2153 "pfmul (%3,%0), %%mm0 \n\t" | |
2154 "pfmul 8(%3,%0), %%mm1 \n\t" | |
2155 "pfadd (%4,%0), %%mm0 \n\t" | |
2156 "pfadd 8(%4,%0), %%mm1 \n\t" | |
2157 "movq %%mm0, (%1,%0) \n\t" | |
2158 "movq %%mm1, 8(%1,%0) \n\t" | |
2159 "sub $16, %0 \n\t" | |
2160 "jge 1b \n\t" | |
2161 :"+r"(i) | |
2162 :"r"(dst), "r"(src0), "r"(src1), "r"(src2) | |
2163 :"memory" | |
2164 ); | |
8430 | 2165 __asm__ volatile("femms"); |
2166 } | |
10300
4d1b9ca628fc
Drop unused args from vector_fmul_add_add, simpify code, and rename
mru
parents:
10107
diff
changeset
|
2167 static void vector_fmul_add_sse(float *dst, const float *src0, const float *src1, |
4d1b9ca628fc
Drop unused args from vector_fmul_add_add, simpify code, and rename
mru
parents:
10107
diff
changeset
|
2168 const float *src2, int len){ |
8430 | 2169 x86_reg i = (len-8)*4; |
10301 | 2170 __asm__ volatile( |
2171 "1: \n\t" | |
2172 "movaps (%2,%0), %%xmm0 \n\t" | |
2173 "movaps 16(%2,%0), %%xmm1 \n\t" | |
2174 "mulps (%3,%0), %%xmm0 \n\t" | |
2175 "mulps 16(%3,%0), %%xmm1 \n\t" | |
2176 "addps (%4,%0), %%xmm0 \n\t" | |
2177 "addps 16(%4,%0), %%xmm1 \n\t" | |
2178 "movaps %%xmm0, (%1,%0) \n\t" | |
2179 "movaps %%xmm1, 16(%1,%0) \n\t" | |
2180 "sub $32, %0 \n\t" | |
2181 "jge 1b \n\t" | |
2182 :"+r"(i) | |
2183 :"r"(dst), "r"(src0), "r"(src1), "r"(src2) | |
2184 :"memory" | |
2185 ); | |
8430 | 2186 } |
2187 | |
2188 static void vector_fmul_window_3dnow2(float *dst, const float *src0, const float *src1, | |
2189 const float *win, float add_bias, int len){ | |
8590 | 2190 #if HAVE_6REGS |
8430 | 2191 if(add_bias == 0){ |
2192 x86_reg i = -len*4; | |
2193 x86_reg j = len*4-8; | |
2194 __asm__ volatile( | |
2195 "1: \n" | |
2196 "pswapd (%5,%1), %%mm1 \n" | |
2197 "movq (%5,%0), %%mm0 \n" | |
2198 "pswapd (%4,%1), %%mm5 \n" | |
2199 "movq (%3,%0), %%mm4 \n" | |
2200 "movq %%mm0, %%mm2 \n" | |
2201 "movq %%mm1, %%mm3 \n" | |
2202 "pfmul %%mm4, %%mm2 \n" // src0[len+i]*win[len+i] | |
2203 "pfmul %%mm5, %%mm3 \n" // src1[ j]*win[len+j] | |
2204 "pfmul %%mm4, %%mm1 \n" // src0[len+i]*win[len+j] | |
2205 "pfmul %%mm5, %%mm0 \n" // src1[ j]*win[len+i] | |
2206 "pfadd %%mm3, %%mm2 \n" | |
2207 "pfsub %%mm0, %%mm1 \n" | |
2208 "pswapd %%mm2, %%mm2 \n" | |
2209 "movq %%mm1, (%2,%0) \n" | |
2210 "movq %%mm2, (%2,%1) \n" | |
2211 "sub $8, %1 \n" | |
2212 "add $8, %0 \n" | |
2213 "jl 1b \n" | |
2214 "femms \n" | |
2215 :"+r"(i), "+r"(j) | |
2216 :"r"(dst+len), "r"(src0+len), "r"(src1), "r"(win+len) | |
2217 ); | |
2218 }else | |
2219 #endif | |
2220 ff_vector_fmul_window_c(dst, src0, src1, win, add_bias, len); | |
2221 } | |
2222 | |
2223 static void vector_fmul_window_sse(float *dst, const float *src0, const float *src1, | |
2224 const float *win, float add_bias, int len){ | |
8590 | 2225 #if HAVE_6REGS |
8430 | 2226 if(add_bias == 0){ |
2227 x86_reg i = -len*4; | |
2228 x86_reg j = len*4-16; | |
2229 __asm__ volatile( | |
2230 "1: \n" | |
2231 "movaps (%5,%1), %%xmm1 \n" | |
2232 "movaps (%5,%0), %%xmm0 \n" | |
2233 "movaps (%4,%1), %%xmm5 \n" | |
2234 "movaps (%3,%0), %%xmm4 \n" | |
2235 "shufps $0x1b, %%xmm1, %%xmm1 \n" | |
2236 "shufps $0x1b, %%xmm5, %%xmm5 \n" | |
2237 "movaps %%xmm0, %%xmm2 \n" | |
2238 "movaps %%xmm1, %%xmm3 \n" | |
2239 "mulps %%xmm4, %%xmm2 \n" // src0[len+i]*win[len+i] | |
2240 "mulps %%xmm5, %%xmm3 \n" // src1[ j]*win[len+j] | |
2241 "mulps %%xmm4, %%xmm1 \n" // src0[len+i]*win[len+j] | |
2242 "mulps %%xmm5, %%xmm0 \n" // src1[ j]*win[len+i] | |
2243 "addps %%xmm3, %%xmm2 \n" | |
2244 "subps %%xmm0, %%xmm1 \n" | |
2245 "shufps $0x1b, %%xmm2, %%xmm2 \n" | |
2246 "movaps %%xmm1, (%2,%0) \n" | |
2247 "movaps %%xmm2, (%2,%1) \n" | |
2248 "sub $16, %1 \n" | |
2249 "add $16, %0 \n" | |
2250 "jl 1b \n" | |
2251 :"+r"(i), "+r"(j) | |
2252 :"r"(dst+len), "r"(src0+len), "r"(src1), "r"(win+len) | |
2253 ); | |
2254 }else | |
2255 #endif | |
2256 ff_vector_fmul_window_c(dst, src0, src1, win, add_bias, len); | |
2257 } | |
2258 | |
2259 static void int32_to_float_fmul_scalar_sse(float *dst, const int *src, float mul, int len) | |
2260 { | |
2261 x86_reg i = -4*len; | |
2262 __asm__ volatile( | |
2263 "movss %3, %%xmm4 \n" | |
2264 "shufps $0, %%xmm4, %%xmm4 \n" | |
2265 "1: \n" | |
2266 "cvtpi2ps (%2,%0), %%xmm0 \n" | |
2267 "cvtpi2ps 8(%2,%0), %%xmm1 \n" | |
2268 "cvtpi2ps 16(%2,%0), %%xmm2 \n" | |
2269 "cvtpi2ps 24(%2,%0), %%xmm3 \n" | |
2270 "movlhps %%xmm1, %%xmm0 \n" | |
2271 "movlhps %%xmm3, %%xmm2 \n" | |
2272 "mulps %%xmm4, %%xmm0 \n" | |
2273 "mulps %%xmm4, %%xmm2 \n" | |
2274 "movaps %%xmm0, (%1,%0) \n" | |
2275 "movaps %%xmm2, 16(%1,%0) \n" | |
2276 "add $32, %0 \n" | |
2277 "jl 1b \n" | |
2278 :"+r"(i) | |
2279 :"r"(dst+len), "r"(src+len), "m"(mul) | |
2280 ); | |
2281 } | |
2282 | |
2283 static void int32_to_float_fmul_scalar_sse2(float *dst, const int *src, float mul, int len) | |
2284 { | |
2285 x86_reg i = -4*len; | |
2286 __asm__ volatile( | |
2287 "movss %3, %%xmm4 \n" | |
2288 "shufps $0, %%xmm4, %%xmm4 \n" | |
2289 "1: \n" | |
2290 "cvtdq2ps (%2,%0), %%xmm0 \n" | |
2291 "cvtdq2ps 16(%2,%0), %%xmm1 \n" | |
2292 "mulps %%xmm4, %%xmm0 \n" | |
2293 "mulps %%xmm4, %%xmm1 \n" | |
2294 "movaps %%xmm0, (%1,%0) \n" | |
2295 "movaps %%xmm1, 16(%1,%0) \n" | |
2296 "add $32, %0 \n" | |
2297 "jl 1b \n" | |
2298 :"+r"(i) | |
2299 :"r"(dst+len), "r"(src+len), "m"(mul) | |
2300 ); | |
2301 } | |
2302 | |
10105 | 2303 static void vector_clipf_sse(float *dst, const float *src, float min, float max, |
10104
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2304 int len) |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2305 { |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2306 x86_reg i = (len-16)*4; |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2307 __asm__ volatile( |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2308 "movss %3, %%xmm4 \n" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2309 "movss %4, %%xmm5 \n" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2310 "shufps $0, %%xmm4, %%xmm4 \n" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2311 "shufps $0, %%xmm5, %%xmm5 \n" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2312 "1: \n\t" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2313 "movaps (%2,%0), %%xmm0 \n\t" // 3/1 on intel |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2314 "movaps 16(%2,%0), %%xmm1 \n\t" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2315 "movaps 32(%2,%0), %%xmm2 \n\t" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2316 "movaps 48(%2,%0), %%xmm3 \n\t" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2317 "maxps %%xmm4, %%xmm0 \n\t" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2318 "maxps %%xmm4, %%xmm1 \n\t" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2319 "maxps %%xmm4, %%xmm2 \n\t" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2320 "maxps %%xmm4, %%xmm3 \n\t" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2321 "minps %%xmm5, %%xmm0 \n\t" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2322 "minps %%xmm5, %%xmm1 \n\t" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2323 "minps %%xmm5, %%xmm2 \n\t" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2324 "minps %%xmm5, %%xmm3 \n\t" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2325 "movaps %%xmm0, (%1,%0) \n\t" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2326 "movaps %%xmm1, 16(%1,%0) \n\t" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2327 "movaps %%xmm2, 32(%1,%0) \n\t" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2328 "movaps %%xmm3, 48(%1,%0) \n\t" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2329 "sub $64, %0 \n\t" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2330 "jge 1b \n\t" |
10107
3b61bc6ce377
Mark "i" parameter of vector_clipf_sse() as early-clobber
vitor
parents:
10105
diff
changeset
|
2331 :"+&r"(i) |
10104
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2332 :"r"(dst), "r"(src), "m"(min), "m"(max) |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2333 :"memory" |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2334 ); |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2335 } |
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2336 |
8430 | 2337 static void float_to_int16_3dnow(int16_t *dst, const float *src, long len){ |
2338 x86_reg reglen = len; | |
2339 // not bit-exact: pf2id uses different rounding than C and SSE | |
2340 __asm__ volatile( | |
2341 "add %0 , %0 \n\t" | |
2342 "lea (%2,%0,2) , %2 \n\t" | |
2343 "add %0 , %1 \n\t" | |
2344 "neg %0 \n\t" | |
2345 "1: \n\t" | |
2346 "pf2id (%2,%0,2) , %%mm0 \n\t" | |
2347 "pf2id 8(%2,%0,2) , %%mm1 \n\t" | |
2348 "pf2id 16(%2,%0,2) , %%mm2 \n\t" | |
2349 "pf2id 24(%2,%0,2) , %%mm3 \n\t" | |
2350 "packssdw %%mm1 , %%mm0 \n\t" | |
2351 "packssdw %%mm3 , %%mm2 \n\t" | |
2352 "movq %%mm0 , (%1,%0) \n\t" | |
2353 "movq %%mm2 , 8(%1,%0) \n\t" | |
2354 "add $16 , %0 \n\t" | |
2355 " js 1b \n\t" | |
2356 "femms \n\t" | |
2357 :"+r"(reglen), "+r"(dst), "+r"(src) | |
2358 ); | |
2359 } | |
2360 static void float_to_int16_sse(int16_t *dst, const float *src, long len){ | |
2361 x86_reg reglen = len; | |
2362 __asm__ volatile( | |
2363 "add %0 , %0 \n\t" | |
2364 "lea (%2,%0,2) , %2 \n\t" | |
2365 "add %0 , %1 \n\t" | |
2366 "neg %0 \n\t" | |
2367 "1: \n\t" | |
2368 "cvtps2pi (%2,%0,2) , %%mm0 \n\t" | |
2369 "cvtps2pi 8(%2,%0,2) , %%mm1 \n\t" | |
2370 "cvtps2pi 16(%2,%0,2) , %%mm2 \n\t" | |
2371 "cvtps2pi 24(%2,%0,2) , %%mm3 \n\t" | |
2372 "packssdw %%mm1 , %%mm0 \n\t" | |
2373 "packssdw %%mm3 , %%mm2 \n\t" | |
2374 "movq %%mm0 , (%1,%0) \n\t" | |
2375 "movq %%mm2 , 8(%1,%0) \n\t" | |
2376 "add $16 , %0 \n\t" | |
2377 " js 1b \n\t" | |
2378 "emms \n\t" | |
2379 :"+r"(reglen), "+r"(dst), "+r"(src) | |
2380 ); | |
2381 } | |
2382 | |
2383 static void float_to_int16_sse2(int16_t *dst, const float *src, long len){ | |
2384 x86_reg reglen = len; | |
2385 __asm__ volatile( | |
2386 "add %0 , %0 \n\t" | |
2387 "lea (%2,%0,2) , %2 \n\t" | |
2388 "add %0 , %1 \n\t" | |
2389 "neg %0 \n\t" | |
2390 "1: \n\t" | |
2391 "cvtps2dq (%2,%0,2) , %%xmm0 \n\t" | |
2392 "cvtps2dq 16(%2,%0,2) , %%xmm1 \n\t" | |
2393 "packssdw %%xmm1 , %%xmm0 \n\t" | |
2394 "movdqa %%xmm0 , (%1,%0) \n\t" | |
2395 "add $16 , %0 \n\t" | |
2396 " js 1b \n\t" | |
2397 :"+r"(reglen), "+r"(dst), "+r"(src) | |
2398 ); | |
2399 } | |
2400 | |
12436
d6d0a43848b4
Move VP3 IDCT functions from inline ASM to YASM. This fixes part of the VP3/5/6
rbultje
parents:
12435
diff
changeset
|
2401 void ff_vp3_idct_mmx(int16_t *input_data); |
d6d0a43848b4
Move VP3 IDCT functions from inline ASM to YASM. This fixes part of the VP3/5/6
rbultje
parents:
12435
diff
changeset
|
2402 void ff_vp3_idct_put_mmx(uint8_t *dest, int line_size, DCTELEM *block); |
d6d0a43848b4
Move VP3 IDCT functions from inline ASM to YASM. This fixes part of the VP3/5/6
rbultje
parents:
12435
diff
changeset
|
2403 void ff_vp3_idct_add_mmx(uint8_t *dest, int line_size, DCTELEM *block); |
d6d0a43848b4
Move VP3 IDCT functions from inline ASM to YASM. This fixes part of the VP3/5/6
rbultje
parents:
12435
diff
changeset
|
2404 |
d6d0a43848b4
Move VP3 IDCT functions from inline ASM to YASM. This fixes part of the VP3/5/6
rbultje
parents:
12435
diff
changeset
|
2405 void ff_vp3_idct_dc_add_mmx2(uint8_t *dest, int line_size, const DCTELEM *block); |
d6d0a43848b4
Move VP3 IDCT functions from inline ASM to YASM. This fixes part of the VP3/5/6
rbultje
parents:
12435
diff
changeset
|
2406 |
d6d0a43848b4
Move VP3 IDCT functions from inline ASM to YASM. This fixes part of the VP3/5/6
rbultje
parents:
12435
diff
changeset
|
2407 void ff_vp3_v_loop_filter_mmx2(uint8_t *src, int stride, int *bounding_values); |
d6d0a43848b4
Move VP3 IDCT functions from inline ASM to YASM. This fixes part of the VP3/5/6
rbultje
parents:
12435
diff
changeset
|
2408 void ff_vp3_h_loop_filter_mmx2(uint8_t *src, int stride, int *bounding_values); |
d6d0a43848b4
Move VP3 IDCT functions from inline ASM to YASM. This fixes part of the VP3/5/6
rbultje
parents:
12435
diff
changeset
|
2409 |
d6d0a43848b4
Move VP3 IDCT functions from inline ASM to YASM. This fixes part of the VP3/5/6
rbultje
parents:
12435
diff
changeset
|
2410 void ff_vp3_idct_sse2(int16_t *input_data); |
d6d0a43848b4
Move VP3 IDCT functions from inline ASM to YASM. This fixes part of the VP3/5/6
rbultje
parents:
12435
diff
changeset
|
2411 void ff_vp3_idct_put_sse2(uint8_t *dest, int line_size, DCTELEM *block); |
d6d0a43848b4
Move VP3 IDCT functions from inline ASM to YASM. This fixes part of the VP3/5/6
rbultje
parents:
12435
diff
changeset
|
2412 void ff_vp3_idct_add_sse2(uint8_t *dest, int line_size, DCTELEM *block); |
d6d0a43848b4
Move VP3 IDCT functions from inline ASM to YASM. This fixes part of the VP3/5/6
rbultje
parents:
12435
diff
changeset
|
2413 |
8430 | 2414 void ff_float_to_int16_interleave6_sse(int16_t *dst, const float **src, int len); |
2415 void ff_float_to_int16_interleave6_3dnow(int16_t *dst, const float **src, int len); | |
2416 void ff_float_to_int16_interleave6_3dn2(int16_t *dst, const float **src, int len); | |
11981 | 2417 int32_t ff_scalarproduct_int16_mmx2(const int16_t *v1, const int16_t *v2, int order, int shift); |
2418 int32_t ff_scalarproduct_int16_sse2(const int16_t *v1, const int16_t *v2, int order, int shift); | |
2419 int32_t ff_scalarproduct_and_madd_int16_mmx2(int16_t *v1, const int16_t *v2, const int16_t *v3, int order, int mul); | |
2420 int32_t ff_scalarproduct_and_madd_int16_sse2(int16_t *v1, const int16_t *v2, const int16_t *v3, int order, int mul); | |
2421 int32_t ff_scalarproduct_and_madd_int16_ssse3(int16_t *v1, const int16_t *v2, const int16_t *v3, int order, int mul); | |
10431 | 2422 void ff_add_hfyu_median_prediction_mmx2(uint8_t *dst, const uint8_t *top, const uint8_t *diff, int w, int *left, int *left_top); |
2423 int ff_add_hfyu_left_prediction_ssse3(uint8_t *dst, const uint8_t *src, int w, int left); | |
2424 int ff_add_hfyu_left_prediction_sse4(uint8_t *dst, const uint8_t *src, int w, int left); | |
10645 | 2425 |
12450
3941687b4fa9
Split h264dsp_mmx.c (which was #included in dsputil_mmx.c) in h264_qpel_mmx.c,
rbultje
parents:
12439
diff
changeset
|
2426 #if !HAVE_YASM |
8430 | 2427 #define ff_float_to_int16_interleave6_sse(a,b,c) float_to_int16_interleave_misc_sse(a,b,c,6) |
2428 #define ff_float_to_int16_interleave6_3dnow(a,b,c) float_to_int16_interleave_misc_3dnow(a,b,c,6) | |
2429 #define ff_float_to_int16_interleave6_3dn2(a,b,c) float_to_int16_interleave_misc_3dnow(a,b,c,6) | |
2430 #endif | |
2431 #define ff_float_to_int16_interleave6_sse2 ff_float_to_int16_interleave6_sse | |
2432 | |
2433 #define FLOAT_TO_INT16_INTERLEAVE(cpu, body) \ | |
2434 /* gcc pessimizes register allocation if this is in the same function as float_to_int16_interleave_sse2*/\ | |
2435 static av_noinline void float_to_int16_interleave_misc_##cpu(int16_t *dst, const float **src, long len, int channels){\ | |
11369 | 2436 DECLARE_ALIGNED(16, int16_t, tmp)[len];\ |
8430 | 2437 int i,j,c;\ |
2438 for(c=0; c<channels; c++){\ | |
2439 float_to_int16_##cpu(tmp, src[c], len);\ | |
2440 for(i=0, j=c; i<len; i++, j+=channels)\ | |
2441 dst[j] = tmp[i];\ | |
2442 }\ | |
2443 }\ | |
2444 \ | |
2445 static void float_to_int16_interleave_##cpu(int16_t *dst, const float **src, long len, int channels){\ | |
2446 if(channels==1)\ | |
2447 float_to_int16_##cpu(dst, src[0], len);\ | |
2448 else if(channels==2){\ | |
2449 x86_reg reglen = len; \ | |
2450 const float *src0 = src[0];\ | |
2451 const float *src1 = src[1];\ | |
2452 __asm__ volatile(\ | |
2453 "shl $2, %0 \n"\ | |
2454 "add %0, %1 \n"\ | |
2455 "add %0, %2 \n"\ | |
2456 "add %0, %3 \n"\ | |
2457 "neg %0 \n"\ | |
2458 body\ | |
2459 :"+r"(reglen), "+r"(dst), "+r"(src0), "+r"(src1)\ | |
2460 );\ | |
2461 }else if(channels==6){\ | |
2462 ff_float_to_int16_interleave6_##cpu(dst, src, len);\ | |
2463 }else\ | |
2464 float_to_int16_interleave_misc_##cpu(dst, src, len, channels);\ | |
2465 } | |
2466 | |
2467 FLOAT_TO_INT16_INTERLEAVE(3dnow, | |
2468 "1: \n" | |
2469 "pf2id (%2,%0), %%mm0 \n" | |
2470 "pf2id 8(%2,%0), %%mm1 \n" | |
2471 "pf2id (%3,%0), %%mm2 \n" | |
2472 "pf2id 8(%3,%0), %%mm3 \n" | |
2473 "packssdw %%mm1, %%mm0 \n" | |
2474 "packssdw %%mm3, %%mm2 \n" | |
2475 "movq %%mm0, %%mm1 \n" | |
2476 "punpcklwd %%mm2, %%mm0 \n" | |
2477 "punpckhwd %%mm2, %%mm1 \n" | |
2478 "movq %%mm0, (%1,%0)\n" | |
2479 "movq %%mm1, 8(%1,%0)\n" | |
2480 "add $16, %0 \n" | |
2481 "js 1b \n" | |
2482 "femms \n" | |
2483 ) | |
2484 | |
2485 FLOAT_TO_INT16_INTERLEAVE(sse, | |
2486 "1: \n" | |
2487 "cvtps2pi (%2,%0), %%mm0 \n" | |
2488 "cvtps2pi 8(%2,%0), %%mm1 \n" | |
2489 "cvtps2pi (%3,%0), %%mm2 \n" | |
2490 "cvtps2pi 8(%3,%0), %%mm3 \n" | |
2491 "packssdw %%mm1, %%mm0 \n" | |
2492 "packssdw %%mm3, %%mm2 \n" | |
2493 "movq %%mm0, %%mm1 \n" | |
2494 "punpcklwd %%mm2, %%mm0 \n" | |
2495 "punpckhwd %%mm2, %%mm1 \n" | |
2496 "movq %%mm0, (%1,%0)\n" | |
2497 "movq %%mm1, 8(%1,%0)\n" | |
2498 "add $16, %0 \n" | |
2499 "js 1b \n" | |
2500 "emms \n" | |
2501 ) | |
2502 | |
2503 FLOAT_TO_INT16_INTERLEAVE(sse2, | |
2504 "1: \n" | |
2505 "cvtps2dq (%2,%0), %%xmm0 \n" | |
2506 "cvtps2dq (%3,%0), %%xmm1 \n" | |
2507 "packssdw %%xmm1, %%xmm0 \n" | |
2508 "movhlps %%xmm0, %%xmm1 \n" | |
2509 "punpcklwd %%xmm1, %%xmm0 \n" | |
2510 "movdqa %%xmm0, (%1,%0) \n" | |
2511 "add $16, %0 \n" | |
2512 "js 1b \n" | |
2513 ) | |
2514 | |
2515 static void float_to_int16_interleave_3dn2(int16_t *dst, const float **src, long len, int channels){ | |
2516 if(channels==6) | |
2517 ff_float_to_int16_interleave6_3dn2(dst, src, len); | |
2518 else | |
2519 float_to_int16_interleave_3dnow(dst, src, len, channels); | |
2520 } | |
2521 | |
10964 | 2522 float ff_scalarproduct_float_sse(const float *v1, const float *v2, int order); |
2523 | |
8430 | 2524 void dsputil_init_mmx(DSPContext* c, AVCodecContext *avctx) |
2525 { | |
12475
9fef0a8ddd63
Move mm_support() from libavcodec to libavutil, make it a public
stefano
parents:
12456
diff
changeset
|
2526 int mm_flags = av_get_cpu_flags(); |
8430 | 2527 |
2528 if (avctx->dsp_mask) { | |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2529 if (avctx->dsp_mask & AV_CPU_FLAG_FORCE) |
8430 | 2530 mm_flags |= (avctx->dsp_mask & 0xffff); |
2531 else | |
2532 mm_flags &= ~(avctx->dsp_mask & 0xffff); | |
2533 } | |
2534 | |
2535 #if 0 | |
2536 av_log(avctx, AV_LOG_INFO, "libavcodec: CPU flags:"); | |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2537 if (mm_flags & AV_CPU_FLAG_MMX) |
8430 | 2538 av_log(avctx, AV_LOG_INFO, " mmx"); |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2539 if (mm_flags & AV_CPU_FLAG_MMX2) |
9342
7f594601d5e9
Rename FF_MM_MMXEXT to FF_MM_MMX2, for both clarity and consistency
stefano
parents:
9341
diff
changeset
|
2540 av_log(avctx, AV_LOG_INFO, " mmx2"); |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2541 if (mm_flags & AV_CPU_FLAG_3DNOW) |
8430 | 2542 av_log(avctx, AV_LOG_INFO, " 3dnow"); |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2543 if (mm_flags & AV_CPU_FLAG_SSE) |
8430 | 2544 av_log(avctx, AV_LOG_INFO, " sse"); |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2545 if (mm_flags & AV_CPU_FLAG_SSE2) |
8430 | 2546 av_log(avctx, AV_LOG_INFO, " sse2"); |
2547 av_log(avctx, AV_LOG_INFO, "\n"); | |
2548 #endif | |
2549 | |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2550 if (mm_flags & AV_CPU_FLAG_MMX) { |
8430 | 2551 const int idct_algo= avctx->idct_algo; |
2552 | |
2553 if(avctx->lowres==0){ | |
2554 if(idct_algo==FF_IDCT_AUTO || idct_algo==FF_IDCT_SIMPLEMMX){ | |
2555 c->idct_put= ff_simple_idct_put_mmx; | |
2556 c->idct_add= ff_simple_idct_add_mmx; | |
2557 c->idct = ff_simple_idct_mmx; | |
2558 c->idct_permutation_type= FF_SIMPLE_IDCT_PERM; | |
8590 | 2559 #if CONFIG_GPL |
8430 | 2560 }else if(idct_algo==FF_IDCT_LIBMPEG2MMX){ |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2561 if(mm_flags & AV_CPU_FLAG_MMX2){ |
8430 | 2562 c->idct_put= ff_libmpeg2mmx2_idct_put; |
2563 c->idct_add= ff_libmpeg2mmx2_idct_add; | |
2564 c->idct = ff_mmxext_idct; | |
2565 }else{ | |
2566 c->idct_put= ff_libmpeg2mmx_idct_put; | |
2567 c->idct_add= ff_libmpeg2mmx_idct_add; | |
2568 c->idct = ff_mmx_idct; | |
2569 } | |
2570 c->idct_permutation_type= FF_LIBMPEG2_IDCT_PERM; | |
2571 #endif | |
9975
d6d7e8d4a04d
Do not redundantly check for both CONFIG_THEORA_DECODER and CONFIG_VP3_DECODER.
diego
parents:
9959
diff
changeset
|
2572 }else if((CONFIG_VP3_DECODER || CONFIG_VP5_DECODER || CONFIG_VP6_DECODER) && |
12439
51fc247eed32
Fix compilation failure if yasm is disabled (missing vp3 symbols).
rbultje
parents:
12437
diff
changeset
|
2573 idct_algo==FF_IDCT_VP3 && HAVE_YASM){ |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2574 if(mm_flags & AV_CPU_FLAG_SSE2){ |
8430 | 2575 c->idct_put= ff_vp3_idct_put_sse2; |
2576 c->idct_add= ff_vp3_idct_add_sse2; | |
2577 c->idct = ff_vp3_idct_sse2; | |
2578 c->idct_permutation_type= FF_TRANSPOSE_IDCT_PERM; | |
2579 }else{ | |
2580 c->idct_put= ff_vp3_idct_put_mmx; | |
2581 c->idct_add= ff_vp3_idct_add_mmx; | |
2582 c->idct = ff_vp3_idct_mmx; | |
2583 c->idct_permutation_type= FF_PARTTRANS_IDCT_PERM; | |
2584 } | |
2585 }else if(idct_algo==FF_IDCT_CAVS){ | |
2586 c->idct_permutation_type= FF_TRANSPOSE_IDCT_PERM; | |
2587 }else if(idct_algo==FF_IDCT_XVIDMMX){ | |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2588 if(mm_flags & AV_CPU_FLAG_SSE2){ |
8430 | 2589 c->idct_put= ff_idct_xvid_sse2_put; |
2590 c->idct_add= ff_idct_xvid_sse2_add; | |
2591 c->idct = ff_idct_xvid_sse2; | |
2592 c->idct_permutation_type= FF_SSE2_IDCT_PERM; | |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2593 }else if(mm_flags & AV_CPU_FLAG_MMX2){ |
8430 | 2594 c->idct_put= ff_idct_xvid_mmx2_put; |
2595 c->idct_add= ff_idct_xvid_mmx2_add; | |
2596 c->idct = ff_idct_xvid_mmx2; | |
2597 }else{ | |
2598 c->idct_put= ff_idct_xvid_mmx_put; | |
2599 c->idct_add= ff_idct_xvid_mmx_add; | |
2600 c->idct = ff_idct_xvid_mmx; | |
2601 } | |
2602 } | |
2603 } | |
2604 | |
12435
fe78a4548d12
Put ff_ prefix on non-static {put_signed,put,add}_pixels_clamped_mmx()
rbultje
parents:
12417
diff
changeset
|
2605 c->put_pixels_clamped = ff_put_pixels_clamped_mmx; |
fe78a4548d12
Put ff_ prefix on non-static {put_signed,put,add}_pixels_clamped_mmx()
rbultje
parents:
12417
diff
changeset
|
2606 c->put_signed_pixels_clamped = ff_put_signed_pixels_clamped_mmx; |
fe78a4548d12
Put ff_ prefix on non-static {put_signed,put,add}_pixels_clamped_mmx()
rbultje
parents:
12417
diff
changeset
|
2607 c->add_pixels_clamped = ff_add_pixels_clamped_mmx; |
8430 | 2608 c->clear_block = clear_block_mmx; |
2609 c->clear_blocks = clear_blocks_mmx; | |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2610 if ((mm_flags & AV_CPU_FLAG_SSE) && |
10766
78c2be62260a
Fix XvMC. XvMCCreateBlocks() may not allocate 16-byte aligned blocks,
gb
parents:
10749
diff
changeset
|
2611 !(CONFIG_MPEG_XVMC_DECODER && avctx->xvmc_acceleration > 1)){ |
78c2be62260a
Fix XvMC. XvMCCreateBlocks() may not allocate 16-byte aligned blocks,
gb
parents:
10749
diff
changeset
|
2612 /* XvMCCreateBlocks() may not allocate 16-byte aligned blocks */ |
9861 | 2613 c->clear_block = clear_block_sse; |
2614 c->clear_blocks = clear_blocks_sse; | |
2615 } | |
8430 | 2616 |
2617 #define SET_HPEL_FUNCS(PFX, IDX, SIZE, CPU) \ | |
2618 c->PFX ## _pixels_tab[IDX][0] = PFX ## _pixels ## SIZE ## _ ## CPU; \ | |
2619 c->PFX ## _pixels_tab[IDX][1] = PFX ## _pixels ## SIZE ## _x2_ ## CPU; \ | |
2620 c->PFX ## _pixels_tab[IDX][2] = PFX ## _pixels ## SIZE ## _y2_ ## CPU; \ | |
2621 c->PFX ## _pixels_tab[IDX][3] = PFX ## _pixels ## SIZE ## _xy2_ ## CPU | |
2622 | |
2623 SET_HPEL_FUNCS(put, 0, 16, mmx); | |
2624 SET_HPEL_FUNCS(put_no_rnd, 0, 16, mmx); | |
2625 SET_HPEL_FUNCS(avg, 0, 16, mmx); | |
2626 SET_HPEL_FUNCS(avg_no_rnd, 0, 16, mmx); | |
2627 SET_HPEL_FUNCS(put, 1, 8, mmx); | |
2628 SET_HPEL_FUNCS(put_no_rnd, 1, 8, mmx); | |
2629 SET_HPEL_FUNCS(avg, 1, 8, mmx); | |
2630 SET_HPEL_FUNCS(avg_no_rnd, 1, 8, mmx); | |
2631 | |
2632 c->gmc= gmc_mmx; | |
2633 | |
2634 c->add_bytes= add_bytes_mmx; | |
2635 c->add_bytes_l2= add_bytes_l2_mmx; | |
2636 | |
2637 c->draw_edges = draw_edges_mmx; | |
2638 | |
10749
5cca4b6c459d
Get rid of pointless CONFIG_ANY_H263 preprocessor definition.
diego
parents:
10645
diff
changeset
|
2639 if (CONFIG_H263_DECODER || CONFIG_H263_ENCODER) { |
8430 | 2640 c->h263_v_loop_filter= h263_v_loop_filter_mmx; |
2641 c->h263_h_loop_filter= h263_h_loop_filter_mmx; | |
2642 } | |
2643 | |
12437
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2644 #if HAVE_YASM |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2645 c->put_h264_chroma_pixels_tab[0]= ff_put_h264_chroma_mc8_mmx_rnd; |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2646 c->put_h264_chroma_pixels_tab[1]= ff_put_h264_chroma_mc4_mmx; |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2647 c->put_no_rnd_vc1_chroma_pixels_tab[0]= ff_put_vc1_chroma_mc8_mmx_nornd; |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2648 |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2649 c->put_rv40_chroma_pixels_tab[0]= ff_put_rv40_chroma_mc8_mmx; |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2650 c->put_rv40_chroma_pixels_tab[1]= ff_put_rv40_chroma_mc4_mmx; |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2651 #endif |
8519
cc64e1343397
Use H264 MMX chroma functions to accelerate RV40 decoding.
cehoyos
parents:
8510
diff
changeset
|
2652 |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2653 if (mm_flags & AV_CPU_FLAG_MMX2) { |
8430 | 2654 c->prefetch = prefetch_mmx2; |
2655 | |
2656 c->put_pixels_tab[0][1] = put_pixels16_x2_mmx2; | |
2657 c->put_pixels_tab[0][2] = put_pixels16_y2_mmx2; | |
2658 | |
2659 c->avg_pixels_tab[0][0] = avg_pixels16_mmx2; | |
2660 c->avg_pixels_tab[0][1] = avg_pixels16_x2_mmx2; | |
2661 c->avg_pixels_tab[0][2] = avg_pixels16_y2_mmx2; | |
2662 | |
2663 c->put_pixels_tab[1][1] = put_pixels8_x2_mmx2; | |
2664 c->put_pixels_tab[1][2] = put_pixels8_y2_mmx2; | |
2665 | |
2666 c->avg_pixels_tab[1][0] = avg_pixels8_mmx2; | |
2667 c->avg_pixels_tab[1][1] = avg_pixels8_x2_mmx2; | |
2668 c->avg_pixels_tab[1][2] = avg_pixels8_y2_mmx2; | |
2669 | |
2670 if(!(avctx->flags & CODEC_FLAG_BITEXACT)){ | |
2671 c->put_no_rnd_pixels_tab[0][1] = put_no_rnd_pixels16_x2_mmx2; | |
2672 c->put_no_rnd_pixels_tab[0][2] = put_no_rnd_pixels16_y2_mmx2; | |
2673 c->put_no_rnd_pixels_tab[1][1] = put_no_rnd_pixels8_x2_mmx2; | |
2674 c->put_no_rnd_pixels_tab[1][2] = put_no_rnd_pixels8_y2_mmx2; | |
2675 c->avg_pixels_tab[0][3] = avg_pixels16_xy2_mmx2; | |
2676 c->avg_pixels_tab[1][3] = avg_pixels8_xy2_mmx2; | |
2677 | |
12439
51fc247eed32
Fix compilation failure if yasm is disabled (missing vp3 symbols).
rbultje
parents:
12437
diff
changeset
|
2678 if (CONFIG_VP3_DECODER && HAVE_YASM) { |
8430 | 2679 c->vp3_v_loop_filter= ff_vp3_v_loop_filter_mmx2; |
2680 c->vp3_h_loop_filter= ff_vp3_h_loop_filter_mmx2; | |
2681 } | |
2682 } | |
12439
51fc247eed32
Fix compilation failure if yasm is disabled (missing vp3 symbols).
rbultje
parents:
12437
diff
changeset
|
2683 if (CONFIG_VP3_DECODER && HAVE_YASM) { |
11637 | 2684 c->vp3_idct_dc_add = ff_vp3_idct_dc_add_mmx2; |
2685 } | |
8430 | 2686 |
11826
11c5a87497d3
Add bitexact versions of put_no_rnd_pixels8 _x2 and _y2 for vp3/theora
conrad
parents:
11637
diff
changeset
|
2687 if (CONFIG_VP3_DECODER |
11c5a87497d3
Add bitexact versions of put_no_rnd_pixels8 _x2 and _y2 for vp3/theora
conrad
parents:
11637
diff
changeset
|
2688 && (avctx->codec_id == CODEC_ID_VP3 || avctx->codec_id == CODEC_ID_THEORA)) { |
11c5a87497d3
Add bitexact versions of put_no_rnd_pixels8 _x2 and _y2 for vp3/theora
conrad
parents:
11637
diff
changeset
|
2689 c->put_no_rnd_pixels_tab[1][1] = put_no_rnd_pixels8_x2_exact_mmx2; |
11c5a87497d3
Add bitexact versions of put_no_rnd_pixels8 _x2 and _y2 for vp3/theora
conrad
parents:
11637
diff
changeset
|
2690 c->put_no_rnd_pixels_tab[1][2] = put_no_rnd_pixels8_y2_exact_mmx2; |
11c5a87497d3
Add bitexact versions of put_no_rnd_pixels8 _x2 and _y2 for vp3/theora
conrad
parents:
11637
diff
changeset
|
2691 } |
11c5a87497d3
Add bitexact versions of put_no_rnd_pixels8 _x2 and _y2 for vp3/theora
conrad
parents:
11637
diff
changeset
|
2692 |
8430 | 2693 #define SET_QPEL_FUNCS(PFX, IDX, SIZE, CPU) \ |
2694 c->PFX ## _pixels_tab[IDX][ 0] = PFX ## SIZE ## _mc00_ ## CPU; \ | |
2695 c->PFX ## _pixels_tab[IDX][ 1] = PFX ## SIZE ## _mc10_ ## CPU; \ | |
2696 c->PFX ## _pixels_tab[IDX][ 2] = PFX ## SIZE ## _mc20_ ## CPU; \ | |
2697 c->PFX ## _pixels_tab[IDX][ 3] = PFX ## SIZE ## _mc30_ ## CPU; \ | |
2698 c->PFX ## _pixels_tab[IDX][ 4] = PFX ## SIZE ## _mc01_ ## CPU; \ | |
2699 c->PFX ## _pixels_tab[IDX][ 5] = PFX ## SIZE ## _mc11_ ## CPU; \ | |
2700 c->PFX ## _pixels_tab[IDX][ 6] = PFX ## SIZE ## _mc21_ ## CPU; \ | |
2701 c->PFX ## _pixels_tab[IDX][ 7] = PFX ## SIZE ## _mc31_ ## CPU; \ | |
2702 c->PFX ## _pixels_tab[IDX][ 8] = PFX ## SIZE ## _mc02_ ## CPU; \ | |
2703 c->PFX ## _pixels_tab[IDX][ 9] = PFX ## SIZE ## _mc12_ ## CPU; \ | |
2704 c->PFX ## _pixels_tab[IDX][10] = PFX ## SIZE ## _mc22_ ## CPU; \ | |
2705 c->PFX ## _pixels_tab[IDX][11] = PFX ## SIZE ## _mc32_ ## CPU; \ | |
2706 c->PFX ## _pixels_tab[IDX][12] = PFX ## SIZE ## _mc03_ ## CPU; \ | |
2707 c->PFX ## _pixels_tab[IDX][13] = PFX ## SIZE ## _mc13_ ## CPU; \ | |
2708 c->PFX ## _pixels_tab[IDX][14] = PFX ## SIZE ## _mc23_ ## CPU; \ | |
2709 c->PFX ## _pixels_tab[IDX][15] = PFX ## SIZE ## _mc33_ ## CPU | |
2710 | |
2711 SET_QPEL_FUNCS(put_qpel, 0, 16, mmx2); | |
2712 SET_QPEL_FUNCS(put_qpel, 1, 8, mmx2); | |
2713 SET_QPEL_FUNCS(put_no_rnd_qpel, 0, 16, mmx2); | |
2714 SET_QPEL_FUNCS(put_no_rnd_qpel, 1, 8, mmx2); | |
2715 SET_QPEL_FUNCS(avg_qpel, 0, 16, mmx2); | |
2716 SET_QPEL_FUNCS(avg_qpel, 1, 8, mmx2); | |
2717 | |
2718 SET_QPEL_FUNCS(put_h264_qpel, 0, 16, mmx2); | |
2719 SET_QPEL_FUNCS(put_h264_qpel, 1, 8, mmx2); | |
2720 SET_QPEL_FUNCS(put_h264_qpel, 2, 4, mmx2); | |
2721 SET_QPEL_FUNCS(avg_h264_qpel, 0, 16, mmx2); | |
2722 SET_QPEL_FUNCS(avg_h264_qpel, 1, 8, mmx2); | |
2723 SET_QPEL_FUNCS(avg_h264_qpel, 2, 4, mmx2); | |
2724 | |
2725 SET_QPEL_FUNCS(put_2tap_qpel, 0, 16, mmx2); | |
2726 SET_QPEL_FUNCS(put_2tap_qpel, 1, 8, mmx2); | |
2727 SET_QPEL_FUNCS(avg_2tap_qpel, 0, 16, mmx2); | |
2728 SET_QPEL_FUNCS(avg_2tap_qpel, 1, 8, mmx2); | |
2729 | |
12437
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2730 #if HAVE_YASM |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2731 c->avg_rv40_chroma_pixels_tab[0]= ff_avg_rv40_chroma_mc8_mmx2; |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2732 c->avg_rv40_chroma_pixels_tab[1]= ff_avg_rv40_chroma_mc4_mmx2; |
8519
cc64e1343397
Use H264 MMX chroma functions to accelerate RV40 decoding.
cehoyos
parents:
8510
diff
changeset
|
2733 |
12437
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2734 c->avg_no_rnd_vc1_chroma_pixels_tab[0]= ff_avg_vc1_chroma_mc8_mmx2_nornd; |
9440 | 2735 |
12437
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2736 c->avg_h264_chroma_pixels_tab[0]= ff_avg_h264_chroma_mc8_mmx2_rnd; |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2737 c->avg_h264_chroma_pixels_tab[1]= ff_avg_h264_chroma_mc4_mmx2; |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2738 c->avg_h264_chroma_pixels_tab[2]= ff_avg_h264_chroma_mc2_mmx2; |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2739 c->put_h264_chroma_pixels_tab[2]= ff_put_h264_chroma_mc2_mmx2; |
8430 | 2740 |
8760 | 2741 c->add_hfyu_median_prediction = ff_add_hfyu_median_prediction_mmx2; |
2742 #endif | |
8798
a5c8210814d7
Add check whether the compiler/assembler supports 10 or more operands.
diego
parents:
8760
diff
changeset
|
2743 #if HAVE_7REGS && HAVE_TEN_OPERANDS |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2744 if( mm_flags&AV_CPU_FLAG_3DNOW ) |
8760 | 2745 c->add_hfyu_median_prediction = add_hfyu_median_prediction_cmov; |
2746 #endif | |
2747 | |
9995
3141f69e3905
Do not check for both CONFIG_VC1_DECODER and CONFIG_WMV3_DECODER,
diego
parents:
9975
diff
changeset
|
2748 if (CONFIG_VC1_DECODER) |
8430 | 2749 ff_vc1dsp_init_mmx(c, avctx); |
2750 | |
2751 c->add_png_paeth_prediction= add_png_paeth_prediction_mmx2; | |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2752 } else if (mm_flags & AV_CPU_FLAG_3DNOW) { |
8430 | 2753 c->prefetch = prefetch_3dnow; |
2754 | |
2755 c->put_pixels_tab[0][1] = put_pixels16_x2_3dnow; | |
2756 c->put_pixels_tab[0][2] = put_pixels16_y2_3dnow; | |
2757 | |
2758 c->avg_pixels_tab[0][0] = avg_pixels16_3dnow; | |
2759 c->avg_pixels_tab[0][1] = avg_pixels16_x2_3dnow; | |
2760 c->avg_pixels_tab[0][2] = avg_pixels16_y2_3dnow; | |
2761 | |
2762 c->put_pixels_tab[1][1] = put_pixels8_x2_3dnow; | |
2763 c->put_pixels_tab[1][2] = put_pixels8_y2_3dnow; | |
2764 | |
2765 c->avg_pixels_tab[1][0] = avg_pixels8_3dnow; | |
2766 c->avg_pixels_tab[1][1] = avg_pixels8_x2_3dnow; | |
2767 c->avg_pixels_tab[1][2] = avg_pixels8_y2_3dnow; | |
2768 | |
2769 if(!(avctx->flags & CODEC_FLAG_BITEXACT)){ | |
2770 c->put_no_rnd_pixels_tab[0][1] = put_no_rnd_pixels16_x2_3dnow; | |
2771 c->put_no_rnd_pixels_tab[0][2] = put_no_rnd_pixels16_y2_3dnow; | |
2772 c->put_no_rnd_pixels_tab[1][1] = put_no_rnd_pixels8_x2_3dnow; | |
2773 c->put_no_rnd_pixels_tab[1][2] = put_no_rnd_pixels8_y2_3dnow; | |
2774 c->avg_pixels_tab[0][3] = avg_pixels16_xy2_3dnow; | |
2775 c->avg_pixels_tab[1][3] = avg_pixels8_xy2_3dnow; | |
2776 } | |
2777 | |
11826
11c5a87497d3
Add bitexact versions of put_no_rnd_pixels8 _x2 and _y2 for vp3/theora
conrad
parents:
11637
diff
changeset
|
2778 if (CONFIG_VP3_DECODER |
11c5a87497d3
Add bitexact versions of put_no_rnd_pixels8 _x2 and _y2 for vp3/theora
conrad
parents:
11637
diff
changeset
|
2779 && (avctx->codec_id == CODEC_ID_VP3 || avctx->codec_id == CODEC_ID_THEORA)) { |
11c5a87497d3
Add bitexact versions of put_no_rnd_pixels8 _x2 and _y2 for vp3/theora
conrad
parents:
11637
diff
changeset
|
2780 c->put_no_rnd_pixels_tab[1][1] = put_no_rnd_pixels8_x2_exact_3dnow; |
11c5a87497d3
Add bitexact versions of put_no_rnd_pixels8 _x2 and _y2 for vp3/theora
conrad
parents:
11637
diff
changeset
|
2781 c->put_no_rnd_pixels_tab[1][2] = put_no_rnd_pixels8_y2_exact_3dnow; |
11c5a87497d3
Add bitexact versions of put_no_rnd_pixels8 _x2 and _y2 for vp3/theora
conrad
parents:
11637
diff
changeset
|
2782 } |
11c5a87497d3
Add bitexact versions of put_no_rnd_pixels8 _x2 and _y2 for vp3/theora
conrad
parents:
11637
diff
changeset
|
2783 |
8430 | 2784 SET_QPEL_FUNCS(put_qpel, 0, 16, 3dnow); |
2785 SET_QPEL_FUNCS(put_qpel, 1, 8, 3dnow); | |
2786 SET_QPEL_FUNCS(put_no_rnd_qpel, 0, 16, 3dnow); | |
2787 SET_QPEL_FUNCS(put_no_rnd_qpel, 1, 8, 3dnow); | |
2788 SET_QPEL_FUNCS(avg_qpel, 0, 16, 3dnow); | |
2789 SET_QPEL_FUNCS(avg_qpel, 1, 8, 3dnow); | |
2790 | |
2791 SET_QPEL_FUNCS(put_h264_qpel, 0, 16, 3dnow); | |
2792 SET_QPEL_FUNCS(put_h264_qpel, 1, 8, 3dnow); | |
2793 SET_QPEL_FUNCS(put_h264_qpel, 2, 4, 3dnow); | |
2794 SET_QPEL_FUNCS(avg_h264_qpel, 0, 16, 3dnow); | |
2795 SET_QPEL_FUNCS(avg_h264_qpel, 1, 8, 3dnow); | |
2796 SET_QPEL_FUNCS(avg_h264_qpel, 2, 4, 3dnow); | |
2797 | |
2798 SET_QPEL_FUNCS(put_2tap_qpel, 0, 16, 3dnow); | |
2799 SET_QPEL_FUNCS(put_2tap_qpel, 1, 8, 3dnow); | |
2800 SET_QPEL_FUNCS(avg_2tap_qpel, 0, 16, 3dnow); | |
2801 SET_QPEL_FUNCS(avg_2tap_qpel, 1, 8, 3dnow); | |
2802 | |
12437
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2803 #if HAVE_YASM |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2804 c->avg_h264_chroma_pixels_tab[0]= ff_avg_h264_chroma_mc8_3dnow_rnd; |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2805 c->avg_h264_chroma_pixels_tab[1]= ff_avg_h264_chroma_mc4_3dnow; |
8430 | 2806 |
12437
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2807 c->avg_no_rnd_vc1_chroma_pixels_tab[0]= ff_avg_vc1_chroma_mc8_3dnow_nornd; |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2808 |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2809 c->avg_rv40_chroma_pixels_tab[0]= ff_avg_rv40_chroma_mc8_3dnow; |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2810 c->avg_rv40_chroma_pixels_tab[1]= ff_avg_rv40_chroma_mc4_3dnow; |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2811 #endif |
8430 | 2812 } |
2813 | |
2814 | |
2815 #define H264_QPEL_FUNCS(x, y, CPU)\ | |
2816 c->put_h264_qpel_pixels_tab[0][x+y*4] = put_h264_qpel16_mc##x##y##_##CPU;\ | |
2817 c->put_h264_qpel_pixels_tab[1][x+y*4] = put_h264_qpel8_mc##x##y##_##CPU;\ | |
2818 c->avg_h264_qpel_pixels_tab[0][x+y*4] = avg_h264_qpel16_mc##x##y##_##CPU;\ | |
2819 c->avg_h264_qpel_pixels_tab[1][x+y*4] = avg_h264_qpel8_mc##x##y##_##CPU; | |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2820 if((mm_flags & AV_CPU_FLAG_SSE2) && !(mm_flags & AV_CPU_FLAG_3DNOW)){ |
8430 | 2821 // these functions are slower than mmx on AMD, but faster on Intel |
2822 c->put_pixels_tab[0][0] = put_pixels16_sse2; | |
2823 c->avg_pixels_tab[0][0] = avg_pixels16_sse2; | |
2824 H264_QPEL_FUNCS(0, 0, sse2); | |
2825 } | |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2826 if(mm_flags & AV_CPU_FLAG_SSE2){ |
8430 | 2827 H264_QPEL_FUNCS(0, 1, sse2); |
2828 H264_QPEL_FUNCS(0, 2, sse2); | |
2829 H264_QPEL_FUNCS(0, 3, sse2); | |
2830 H264_QPEL_FUNCS(1, 1, sse2); | |
2831 H264_QPEL_FUNCS(1, 2, sse2); | |
2832 H264_QPEL_FUNCS(1, 3, sse2); | |
2833 H264_QPEL_FUNCS(2, 1, sse2); | |
2834 H264_QPEL_FUNCS(2, 2, sse2); | |
2835 H264_QPEL_FUNCS(2, 3, sse2); | |
2836 H264_QPEL_FUNCS(3, 1, sse2); | |
2837 H264_QPEL_FUNCS(3, 2, sse2); | |
2838 H264_QPEL_FUNCS(3, 3, sse2); | |
2839 } | |
8590 | 2840 #if HAVE_SSSE3 |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2841 if(mm_flags & AV_CPU_FLAG_SSSE3){ |
8430 | 2842 H264_QPEL_FUNCS(1, 0, ssse3); |
2843 H264_QPEL_FUNCS(1, 1, ssse3); | |
2844 H264_QPEL_FUNCS(1, 2, ssse3); | |
2845 H264_QPEL_FUNCS(1, 3, ssse3); | |
2846 H264_QPEL_FUNCS(2, 0, ssse3); | |
2847 H264_QPEL_FUNCS(2, 1, ssse3); | |
2848 H264_QPEL_FUNCS(2, 2, ssse3); | |
2849 H264_QPEL_FUNCS(2, 3, ssse3); | |
2850 H264_QPEL_FUNCS(3, 0, ssse3); | |
2851 H264_QPEL_FUNCS(3, 1, ssse3); | |
2852 H264_QPEL_FUNCS(3, 2, ssse3); | |
2853 H264_QPEL_FUNCS(3, 3, ssse3); | |
2854 c->add_png_paeth_prediction= add_png_paeth_prediction_ssse3; | |
10430 | 2855 #if HAVE_YASM |
12437
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2856 c->put_no_rnd_vc1_chroma_pixels_tab[0]= ff_put_vc1_chroma_mc8_ssse3_nornd; |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2857 c->avg_no_rnd_vc1_chroma_pixels_tab[0]= ff_avg_vc1_chroma_mc8_ssse3_nornd; |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2858 c->put_h264_chroma_pixels_tab[0]= ff_put_h264_chroma_mc8_ssse3_rnd; |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2859 c->avg_h264_chroma_pixels_tab[0]= ff_avg_h264_chroma_mc8_ssse3_rnd; |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2860 c->put_h264_chroma_pixels_tab[1]= ff_put_h264_chroma_mc4_ssse3; |
b242eb86ea9a
Move H264 chroma MC from inline asm to yasm. This fixes VP3/5/6 and VC-1
rbultje
parents:
12436
diff
changeset
|
2861 c->avg_h264_chroma_pixels_tab[1]= ff_avg_h264_chroma_mc4_ssse3; |
10430 | 2862 c->add_hfyu_left_prediction = ff_add_hfyu_left_prediction_ssse3; |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2863 if (mm_flags & AV_CPU_FLAG_SSE4) // not really sse4, just slow on Conroe |
10430 | 2864 c->add_hfyu_left_prediction = ff_add_hfyu_left_prediction_sse4; |
2865 #endif | |
8430 | 2866 } |
2867 #endif | |
2868 | |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2869 if(mm_flags & AV_CPU_FLAG_3DNOW){ |
8430 | 2870 c->vorbis_inverse_coupling = vorbis_inverse_coupling_3dnow; |
2871 c->vector_fmul = vector_fmul_3dnow; | |
2872 if(!(avctx->flags & CODEC_FLAG_BITEXACT)){ | |
2873 c->float_to_int16 = float_to_int16_3dnow; | |
2874 c->float_to_int16_interleave = float_to_int16_interleave_3dnow; | |
2875 } | |
2876 } | |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2877 if(mm_flags & AV_CPU_FLAG_3DNOWEXT){ |
8430 | 2878 c->vector_fmul_reverse = vector_fmul_reverse_3dnow2; |
2879 c->vector_fmul_window = vector_fmul_window_3dnow2; | |
2880 if(!(avctx->flags & CODEC_FLAG_BITEXACT)){ | |
2881 c->float_to_int16_interleave = float_to_int16_interleave_3dn2; | |
2882 } | |
2883 } | |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2884 if(mm_flags & AV_CPU_FLAG_MMX2){ |
10633 | 2885 #if HAVE_YASM |
2886 c->scalarproduct_int16 = ff_scalarproduct_int16_mmx2; | |
10644 | 2887 c->scalarproduct_and_madd_int16 = ff_scalarproduct_and_madd_int16_mmx2; |
10633 | 2888 #endif |
2889 } | |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2890 if(mm_flags & AV_CPU_FLAG_SSE){ |
8430 | 2891 c->vorbis_inverse_coupling = vorbis_inverse_coupling_sse; |
2892 c->ac3_downmix = ac3_downmix_sse; | |
2893 c->vector_fmul = vector_fmul_sse; | |
2894 c->vector_fmul_reverse = vector_fmul_reverse_sse; | |
10300
4d1b9ca628fc
Drop unused args from vector_fmul_add_add, simpify code, and rename
mru
parents:
10107
diff
changeset
|
2895 c->vector_fmul_add = vector_fmul_add_sse; |
8430 | 2896 c->vector_fmul_window = vector_fmul_window_sse; |
2897 c->int32_to_float_fmul_scalar = int32_to_float_fmul_scalar_sse; | |
10104
0fa3d21b317e
SSE optimized vector_clipf(). 10% faster TwinVQ decoding.
vitor
parents:
9995
diff
changeset
|
2898 c->vector_clipf = vector_clipf_sse; |
8430 | 2899 c->float_to_int16 = float_to_int16_sse; |
2900 c->float_to_int16_interleave = float_to_int16_interleave_sse; | |
10964 | 2901 #if HAVE_YASM |
2902 c->scalarproduct_float = ff_scalarproduct_float_sse; | |
2903 #endif | |
8430 | 2904 } |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2905 if(mm_flags & AV_CPU_FLAG_3DNOW) |
10300
4d1b9ca628fc
Drop unused args from vector_fmul_add_add, simpify code, and rename
mru
parents:
10107
diff
changeset
|
2906 c->vector_fmul_add = vector_fmul_add_3dnow; // faster than sse |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2907 if(mm_flags & AV_CPU_FLAG_SSE2){ |
8430 | 2908 c->int32_to_float_fmul_scalar = int32_to_float_fmul_scalar_sse2; |
2909 c->float_to_int16 = float_to_int16_sse2; | |
2910 c->float_to_int16_interleave = float_to_int16_interleave_sse2; | |
10633 | 2911 #if HAVE_YASM |
2912 c->scalarproduct_int16 = ff_scalarproduct_int16_sse2; | |
10644 | 2913 c->scalarproduct_and_madd_int16 = ff_scalarproduct_and_madd_int16_sse2; |
10633 | 2914 #endif |
8430 | 2915 } |
12456
a5ddb39627fd
Rename FF_MM_ symbols related to CPU features flags as AV_CPU_FLAG_
stefano
parents:
12454
diff
changeset
|
2916 if((mm_flags & AV_CPU_FLAG_SSSE3) && !(mm_flags & (AV_CPU_FLAG_SSE42|AV_CPU_FLAG_3DNOW)) && HAVE_YASM) // cachesplit |
10644 | 2917 c->scalarproduct_and_madd_int16 = ff_scalarproduct_and_madd_int16_ssse3; |
8430 | 2918 } |
2919 | |
8596
68e959302527
replace all occurrence of ENABLE_ by the corresponding CONFIG_, HAVE_ or ARCH_
aurel
parents:
8590
diff
changeset
|
2920 if (CONFIG_ENCODERS) |
8430 | 2921 dsputilenc_init_mmx(c, avctx); |
2922 | |
2923 #if 0 | |
2924 // for speed testing | |
2925 get_pixels = just_return; | |
2926 put_pixels_clamped = just_return; | |
2927 add_pixels_clamped = just_return; | |
2928 | |
2929 pix_abs16x16 = just_return; | |
2930 pix_abs16x16_x2 = just_return; | |
2931 pix_abs16x16_y2 = just_return; | |
2932 pix_abs16x16_xy2 = just_return; | |
2933 | |
2934 put_pixels_tab[0] = just_return; | |
2935 put_pixels_tab[1] = just_return; | |
2936 put_pixels_tab[2] = just_return; | |
2937 put_pixels_tab[3] = just_return; | |
2938 | |
2939 put_no_rnd_pixels_tab[0] = just_return; | |
2940 put_no_rnd_pixels_tab[1] = just_return; | |
2941 put_no_rnd_pixels_tab[2] = just_return; | |
2942 put_no_rnd_pixels_tab[3] = just_return; | |
2943 | |
2944 avg_pixels_tab[0] = just_return; | |
2945 avg_pixels_tab[1] = just_return; | |
2946 avg_pixels_tab[2] = just_return; | |
2947 avg_pixels_tab[3] = just_return; | |
2948 | |
2949 avg_no_rnd_pixels_tab[0] = just_return; | |
2950 avg_no_rnd_pixels_tab[1] = just_return; | |
2951 avg_no_rnd_pixels_tab[2] = just_return; | |
2952 avg_no_rnd_pixels_tab[3] = just_return; | |
2953 | |
2954 //av_fdct = just_return; | |
2955 //ff_idct = just_return; | |
2956 #endif | |
2957 } |