annotate ppc/idct_altivec.c @ 11347:d48922f77738 libavcodec

Fixed DXVA2 H264 hwaccel compilation.
author fenrir
date Wed, 03 Mar 2010 19:54:12 +0000
parents dd2b5e52336a
children 50415a8f1451
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1 /*
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2 * Copyright (c) 2001 Michel Lespinasse
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3 *
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4 * This file is part of FFmpeg.
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5 *
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6 * FFmpeg is free software; you can redistribute it and/or
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7 * modify it under the terms of the GNU Lesser General Public
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8 * License as published by the Free Software Foundation; either
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9 * version 2.1 of the License, or (at your option) any later version.
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10 *
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11 * FFmpeg is distributed in the hope that it will be useful,
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12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
ace3ccd18dd2 Altivec Patch (Mark III) by (Dieter Shirley <dieters at schemasoft dot com>)
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14 * Lesser General Public License for more details.
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15 *
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16 * You should have received a copy of the GNU Lesser General Public
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17 * License along with FFmpeg; if not, write to the Free Software
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18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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19 */
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20
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21 /*
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22 * NOTE: This code is based on GPL code from the libmpeg2 project. The
ace3ccd18dd2 Altivec Patch (Mark III) by (Dieter Shirley <dieters at schemasoft dot com>)
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23 * author, Michel Lespinasses, has given explicit permission to release
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24 * under LGPL as part of FFmpeg.
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25 */
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26
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27 /*
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28 * FFmpeg integration by Dieter Shirley
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29 *
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30 * This file is a direct copy of the AltiVec IDCT module from the libmpeg2
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31 * project. I've deleted all of the libmpeg2-specific code, renamed the
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32 * functions and reordered the function parameters. The only change to the
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33 * IDCT function itself was to factor out the partial transposition, and to
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34 * perform a full transpose at the end of the function.
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35 */
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36
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37
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38 #include <stdlib.h> /* malloc(), free() */
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39 #include <string.h>
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40 #include "config.h"
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41 #if HAVE_ALTIVEC_H
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42 #include <altivec.h>
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43 #endif
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44 #include "libavcodec/dsputil.h"
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45 #include "types_altivec.h"
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46 #include "dsputil_ppc.h"
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47
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48 #define IDCT_HALF \
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49 /* 1st stage */ \
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50 t1 = vec_mradds (a1, vx7, vx1 ); \
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51 t8 = vec_mradds (a1, vx1, vec_subs (zero, vx7)); \
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52 t7 = vec_mradds (a2, vx5, vx3); \
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53 t3 = vec_mradds (ma2, vx3, vx5); \
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54 \
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55 /* 2nd stage */ \
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56 t5 = vec_adds (vx0, vx4); \
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57 t0 = vec_subs (vx0, vx4); \
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58 t2 = vec_mradds (a0, vx6, vx2); \
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59 t4 = vec_mradds (a0, vx2, vec_subs (zero, vx6)); \
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60 t6 = vec_adds (t8, t3); \
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61 t3 = vec_subs (t8, t3); \
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62 t8 = vec_subs (t1, t7); \
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63 t1 = vec_adds (t1, t7); \
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64 \
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65 /* 3rd stage */ \
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66 t7 = vec_adds (t5, t2); \
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67 t2 = vec_subs (t5, t2); \
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68 t5 = vec_adds (t0, t4); \
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69 t0 = vec_subs (t0, t4); \
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70 t4 = vec_subs (t8, t3); \
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71 t3 = vec_adds (t8, t3); \
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72 \
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73 /* 4th stage */ \
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74 vy0 = vec_adds (t7, t1); \
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75 vy7 = vec_subs (t7, t1); \
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76 vy1 = vec_mradds (c4, t3, t5); \
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77 vy6 = vec_mradds (mc4, t3, t5); \
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78 vy2 = vec_mradds (c4, t4, t0); \
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79 vy5 = vec_mradds (mc4, t4, t0); \
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80 vy3 = vec_adds (t2, t6); \
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81 vy4 = vec_subs (t2, t6);
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82
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83
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84 #define IDCT \
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85 vec_s16 vx0, vx1, vx2, vx3, vx4, vx5, vx6, vx7; \
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86 vec_s16 vy0, vy1, vy2, vy3, vy4, vy5, vy6, vy7; \
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87 vec_s16 a0, a1, a2, ma2, c4, mc4, zero, bias; \
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88 vec_s16 t0, t1, t2, t3, t4, t5, t6, t7, t8; \
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89 vec_u16 shift; \
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90 \
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91 c4 = vec_splat (constants[0], 0); \
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92 a0 = vec_splat (constants[0], 1); \
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93 a1 = vec_splat (constants[0], 2); \
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94 a2 = vec_splat (constants[0], 3); \
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95 mc4 = vec_splat (constants[0], 4); \
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96 ma2 = vec_splat (constants[0], 5); \
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97 bias = (vec_s16)vec_splat ((vec_s32)constants[0], 3); \
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98 \
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99 zero = vec_splat_s16 (0); \
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100 shift = vec_splat_u16 (4); \
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101 \
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102 vx0 = vec_mradds (vec_sl (block[0], shift), constants[1], zero); \
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103 vx1 = vec_mradds (vec_sl (block[1], shift), constants[2], zero); \
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104 vx2 = vec_mradds (vec_sl (block[2], shift), constants[3], zero); \
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105 vx3 = vec_mradds (vec_sl (block[3], shift), constants[4], zero); \
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106 vx4 = vec_mradds (vec_sl (block[4], shift), constants[1], zero); \
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107 vx5 = vec_mradds (vec_sl (block[5], shift), constants[4], zero); \
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108 vx6 = vec_mradds (vec_sl (block[6], shift), constants[3], zero); \
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109 vx7 = vec_mradds (vec_sl (block[7], shift), constants[2], zero); \
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110 \
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111 IDCT_HALF \
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112 \
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113 vx0 = vec_mergeh (vy0, vy4); \
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114 vx1 = vec_mergel (vy0, vy4); \
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115 vx2 = vec_mergeh (vy1, vy5); \
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116 vx3 = vec_mergel (vy1, vy5); \
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117 vx4 = vec_mergeh (vy2, vy6); \
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118 vx5 = vec_mergel (vy2, vy6); \
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119 vx6 = vec_mergeh (vy3, vy7); \
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120 vx7 = vec_mergel (vy3, vy7); \
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121 \
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122 vy0 = vec_mergeh (vx0, vx4); \
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123 vy1 = vec_mergel (vx0, vx4); \
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124 vy2 = vec_mergeh (vx1, vx5); \
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125 vy3 = vec_mergel (vx1, vx5); \
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126 vy4 = vec_mergeh (vx2, vx6); \
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127 vy5 = vec_mergel (vx2, vx6); \
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128 vy6 = vec_mergeh (vx3, vx7); \
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129 vy7 = vec_mergel (vx3, vx7); \
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130 \
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131 vx0 = vec_adds (vec_mergeh (vy0, vy4), bias); \
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132 vx1 = vec_mergel (vy0, vy4); \
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133 vx2 = vec_mergeh (vy1, vy5); \
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134 vx3 = vec_mergel (vy1, vy5); \
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135 vx4 = vec_mergeh (vy2, vy6); \
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136 vx5 = vec_mergel (vy2, vy6); \
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137 vx6 = vec_mergeh (vy3, vy7); \
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138 vx7 = vec_mergel (vy3, vy7); \
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139 \
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140 IDCT_HALF \
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141 \
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142 shift = vec_splat_u16 (6); \
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143 vx0 = vec_sra (vy0, shift); \
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144 vx1 = vec_sra (vy1, shift); \
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145 vx2 = vec_sra (vy2, shift); \
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146 vx3 = vec_sra (vy3, shift); \
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147 vx4 = vec_sra (vy4, shift); \
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148 vx5 = vec_sra (vy5, shift); \
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149 vx6 = vec_sra (vy6, shift); \
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150 vx7 = vec_sra (vy7, shift);
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151
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152
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153 static const vec_s16 constants[5] = {
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154 {23170, 13573, 6518, 21895, -23170, -21895, 32, 31},
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155 {16384, 22725, 21407, 19266, 16384, 19266, 21407, 22725},
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156 {22725, 31521, 29692, 26722, 22725, 26722, 29692, 31521},
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157 {21407, 29692, 27969, 25172, 21407, 25172, 27969, 29692},
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158 {19266, 26722, 25172, 22654, 19266, 22654, 25172, 26722}
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159 };
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160
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161 void idct_put_altivec(uint8_t* dest, int stride, vec_s16* block)
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162 {
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163 POWERPC_PERF_DECLARE(altivec_idct_put_num, 1);
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164 vec_u8 tmp;
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165
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166 #if CONFIG_POWERPC_PERF
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167 POWERPC_PERF_START_COUNT(altivec_idct_put_num, 1);
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168 #endif
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169 IDCT
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170
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171 #define COPY(dest,src) \
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172 tmp = vec_packsu (src, src); \
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173 vec_ste ((vec_u32)tmp, 0, (unsigned int *)dest); \
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174 vec_ste ((vec_u32)tmp, 4, (unsigned int *)dest);
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175
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176 COPY (dest, vx0) dest += stride;
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177 COPY (dest, vx1) dest += stride;
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178 COPY (dest, vx2) dest += stride;
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179 COPY (dest, vx3) dest += stride;
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180 COPY (dest, vx4) dest += stride;
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181 COPY (dest, vx5) dest += stride;
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182 COPY (dest, vx6) dest += stride;
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183 COPY (dest, vx7)
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184
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185 POWERPC_PERF_STOP_COUNT(altivec_idct_put_num, 1);
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186 }
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187
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188 void idct_add_altivec(uint8_t* dest, int stride, vec_s16* block)
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189 {
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190 POWERPC_PERF_DECLARE(altivec_idct_add_num, 1);
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191 vec_u8 tmp;
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192 vec_s16 tmp2, tmp3;
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193 vec_u8 perm0;
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194 vec_u8 perm1;
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195 vec_u8 p0, p1, p;
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196
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197 #if CONFIG_POWERPC_PERF
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198 POWERPC_PERF_START_COUNT(altivec_idct_add_num, 1);
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199 #endif
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200
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201 IDCT
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202
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203 p0 = vec_lvsl (0, dest);
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204 p1 = vec_lvsl (stride, dest);
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205 p = vec_splat_u8 (-1);
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206 perm0 = vec_mergeh (p, p0);
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207 perm1 = vec_mergeh (p, p1);
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208
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209 #define ADD(dest,src,perm) \
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210 /* *(uint64_t *)&tmp = *(uint64_t *)dest; */ \
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211 tmp = vec_ld (0, dest); \
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212 tmp2 = (vec_s16)vec_perm (tmp, (vec_u8)zero, perm); \
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213 tmp3 = vec_adds (tmp2, src); \
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214 tmp = vec_packsu (tmp3, tmp3); \
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215 vec_ste ((vec_u32)tmp, 0, (unsigned int *)dest); \
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216 vec_ste ((vec_u32)tmp, 4, (unsigned int *)dest);
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217
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218 ADD (dest, vx0, perm0) dest += stride;
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219 ADD (dest, vx1, perm1) dest += stride;
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220 ADD (dest, vx2, perm0) dest += stride;
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221 ADD (dest, vx3, perm1) dest += stride;
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222 ADD (dest, vx4, perm0) dest += stride;
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223 ADD (dest, vx5, perm1) dest += stride;
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224 ADD (dest, vx6, perm0) dest += stride;
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225 ADD (dest, vx7, perm1)
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226
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227 POWERPC_PERF_STOP_COUNT(altivec_idct_add_num, 1);
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228 }
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229