annotate i386/cputest.c @ 2343:d8d2d1b01dfe libavcodec

10l (CONFIG_ZLIB)
author michael
date Thu, 11 Nov 2004 10:33:11 +0000
parents 40542ea560d5
children 9214c91cdfb7
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1 /* Cpu detection code, extracted from mmx.h ((c)1997-99 by H. Dietz
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2 and R. Fisher). Converted to C and improved by Fabrice Bellard */
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3
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4 #include <stdlib.h>
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5 #include "../dsputil.h"
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6
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7 #ifdef ARCH_X86_64
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8 # define REG_b "rbx"
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9 # define REG_S "rsi"
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10 #else
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11 # define REG_b "ebx"
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12 # define REG_S "esi"
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13 #endif
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14
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15 /* ebx saving is necessary for PIC. gcc seems unable to see it alone */
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16 #define cpuid(index,eax,ebx,ecx,edx)\
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17 __asm __volatile\
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18 ("mov %%"REG_b", %%"REG_S"\n\t"\
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19 "cpuid\n\t"\
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20 "xchg %%"REG_b", %%"REG_S\
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21 : "=a" (eax), "=S" (ebx),\
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22 "=c" (ecx), "=d" (edx)\
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23 : "0" (index));
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24
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25 /* Function to test if multimedia instructions are supported... */
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26 int mm_support(void)
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27 {
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28 int rval;
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29 int eax, ebx, ecx, edx;
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30 long a, c;
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31
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32 __asm__ __volatile__ (
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33 /* See if CPUID instruction is supported ... */
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34 /* ... Get copies of EFLAGS into eax and ecx */
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35 "pushf\n\t"
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36 "pop %0\n\t"
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37 "mov %0, %1\n\t"
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38
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39 /* ... Toggle the ID bit in one copy and store */
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40 /* to the EFLAGS reg */
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41 "xor $0x200000, %0\n\t"
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42 "push %0\n\t"
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43 "popf\n\t"
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44
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45 /* ... Get the (hopefully modified) EFLAGS */
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46 "pushf\n\t"
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47 "pop %0\n\t"
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48 : "=a" (a), "=c" (c)
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49 :
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50 : "cc"
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51 );
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52
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53 if (a == c)
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54 return 0; /* CPUID not supported */
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55
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56 cpuid(0, eax, ebx, ecx, edx);
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57
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58 if (ebx == 0x756e6547 &&
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59 edx == 0x49656e69 &&
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60 ecx == 0x6c65746e) {
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61
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62 /* intel */
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63 inteltest:
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64 cpuid(1, eax, ebx, ecx, edx);
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65 if ((edx & 0x00800000) == 0)
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66 return 0;
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67 rval = MM_MMX;
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68 if (edx & 0x02000000)
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69 rval |= MM_MMXEXT | MM_SSE;
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70 if (edx & 0x04000000)
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71 rval |= MM_SSE2;
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72 return rval;
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73 } else if (ebx == 0x68747541 &&
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74 edx == 0x69746e65 &&
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75 ecx == 0x444d4163) {
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76 /* AMD */
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77 cpuid(0x80000000, eax, ebx, ecx, edx);
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78 if ((unsigned)eax < 0x80000001)
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79 goto inteltest;
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80 cpuid(0x80000001, eax, ebx, ecx, edx);
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81 if ((edx & 0x00800000) == 0)
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82 return 0;
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83 rval = MM_MMX;
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84 if (edx & 0x80000000)
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85 rval |= MM_3DNOW;
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86 if (edx & 0x00400000)
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87 rval |= MM_MMXEXT;
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88 return rval;
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89 } else if (ebx == 0x746e6543 &&
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90 edx == 0x48727561 &&
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91 ecx == 0x736c7561) { /* "CentaurHauls" */
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92 /* VIA C3 */
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93 cpuid(0x80000000, eax, ebx, ecx, edx);
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94 if ((unsigned)eax < 0x80000001)
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95 goto inteltest;
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96 cpuid(0x80000001, eax, ebx, ecx, edx);
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97 rval = 0;
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98 if( edx & ( 1 << 31) )
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99 rval |= MM_3DNOW;
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100 if( edx & ( 1 << 23) )
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101 rval |= MM_MMX;
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102 if( edx & ( 1 << 24) )
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103 rval |= MM_MMXEXT;
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104 if(rval==0)
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105 goto inteltest;
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106 return rval;
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107 } else if (ebx == 0x69727943 &&
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108 edx == 0x736e4978 &&
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109 ecx == 0x64616574) {
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110 /* Cyrix Section */
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111 /* See if extended CPUID level 80000001 is supported */
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112 /* The value of CPUID/80000001 for the 6x86MX is undefined
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113 according to the Cyrix CPU Detection Guide (Preliminary
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114 Rev. 1.01 table 1), so we'll check the value of eax for
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115 CPUID/0 to see if standard CPUID level 2 is supported.
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116 According to the table, the only CPU which supports level
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117 2 is also the only one which supports extended CPUID levels.
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118 */
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119 if (eax != 2)
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120 goto inteltest;
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121 cpuid(0x80000001, eax, ebx, ecx, edx);
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122 if ((eax & 0x00800000) == 0)
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123 return 0;
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124 rval = MM_MMX;
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125 if (eax & 0x01000000)
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126 rval |= MM_MMXEXT;
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127 return rval;
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128 } else if (ebx == 0x756e6547 &&
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129 edx == 0x54656e69 &&
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130 ecx == 0x3638784d) {
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131 /* Tranmeta Crusoe */
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132 cpuid(0x80000000, eax, ebx, ecx, edx);
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133 if ((unsigned)eax < 0x80000001)
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134 return 0;
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135 cpuid(0x80000001, eax, ebx, ecx, edx);
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136 if ((edx & 0x00800000) == 0)
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137 return 0;
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138 return MM_MMX;
0
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139 } else {
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140 return 0;
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141 }
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142 }
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143
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144 #ifdef __TEST__
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145 int main ( void )
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146 {
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147 int mm_flags;
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148 mm_flags = mm_support();
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149 printf("mm_support = 0x%08X\n",mm_flags);
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150 return 0;
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151 }
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152 #endif