Mercurial > libavcodec.hg
annotate i386/dsputil_mmx.c @ 6858:f8365275c4f4 libavcodec
Indent
author | vitor |
---|---|
date | Sat, 24 May 2008 20:52:50 +0000 |
parents | f7cbb7733146 |
children | 9c0f579ebb6b |
rev | line source |
---|---|
0 | 1 /* |
2 * MMX optimized DSP utils | |
429 | 3 * Copyright (c) 2000, 2001 Fabrice Bellard. |
1739
07a484280a82
copyright year update of the files i touched and remembered, things look annoyingly unmaintained otherwise
michael
parents:
1729
diff
changeset
|
4 * Copyright (c) 2002-2004 Michael Niedermayer <michaelni@gmx.at> |
0 | 5 * |
3947
c8c591fe26f8
Change license headers to say 'FFmpeg' instead of 'this program/this library'
diego
parents:
3932
diff
changeset
|
6 * This file is part of FFmpeg. |
c8c591fe26f8
Change license headers to say 'FFmpeg' instead of 'this program/this library'
diego
parents:
3932
diff
changeset
|
7 * |
c8c591fe26f8
Change license headers to say 'FFmpeg' instead of 'this program/this library'
diego
parents:
3932
diff
changeset
|
8 * FFmpeg is free software; you can redistribute it and/or |
429 | 9 * modify it under the terms of the GNU Lesser General Public |
10 * License as published by the Free Software Foundation; either | |
3947
c8c591fe26f8
Change license headers to say 'FFmpeg' instead of 'this program/this library'
diego
parents:
3932
diff
changeset
|
11 * version 2.1 of the License, or (at your option) any later version. |
0 | 12 * |
3947
c8c591fe26f8
Change license headers to say 'FFmpeg' instead of 'this program/this library'
diego
parents:
3932
diff
changeset
|
13 * FFmpeg is distributed in the hope that it will be useful, |
0 | 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
429 | 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
16 * Lesser General Public License for more details. | |
0 | 17 * |
429 | 18 * You should have received a copy of the GNU Lesser General Public |
3947
c8c591fe26f8
Change license headers to say 'FFmpeg' instead of 'this program/this library'
diego
parents:
3932
diff
changeset
|
19 * License along with FFmpeg; if not, write to the Free Software |
3036
0b546eab515d
Update licensing information: The FSF changed postal address.
diego
parents:
2979
diff
changeset
|
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
0 | 21 * |
22 * MMX optimization by Nick Kurshev <nickols_k@mail.ru> | |
23 */ | |
24 | |
6763 | 25 #include "libavutil/x86_cpu.h" |
26 #include "libavcodec/dsputil.h" | |
27 #include "libavcodec/h263.h" | |
28 #include "libavcodec/mpegvideo.h" | |
29 #include "libavcodec/simple_idct.h" | |
5946
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
30 #include "dsputil_mmx.h" |
1984
ef919e9ef73e
separate out put_signed_pixels_clamped() into its own function and
melanson
parents:
1977
diff
changeset
|
31 #include "mmx.h" |
5014
42b99a3aadde
better separation of vp3dsp functions from dsputil_mmx.c
aurel
parents:
5010
diff
changeset
|
32 #include "vp3dsp_mmx.h" |
42b99a3aadde
better separation of vp3dsp functions from dsputil_mmx.c
aurel
parents:
5010
diff
changeset
|
33 #include "vp3dsp_sse2.h" |
6585 | 34 #include "idct_xvid.h" |
0 | 35 |
1729 | 36 //#undef NDEBUG |
37 //#include <assert.h> | |
38 | |
4197 | 39 int mm_flags; /* multimedia extension flags */ |
936 | 40 |
0 | 41 /* pixel operations */ |
5947 | 42 DECLARE_ALIGNED_8 (const uint64_t, ff_bone) = 0x0101010101010101ULL; |
43 DECLARE_ALIGNED_8 (const uint64_t, ff_wtwo) = 0x0002000200020002ULL; | |
5946
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
44 |
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
45 DECLARE_ALIGNED_16(const uint64_t, ff_pdw_80000000[2]) = |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
46 {0x8000000080000000ULL, 0x8000000080000000ULL}; |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
47 |
5946
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
48 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_3 ) = 0x0003000300030003ULL; |
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
49 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_4 ) = 0x0004000400040004ULL; |
6331 | 50 DECLARE_ALIGNED_16(const xmm_t, ff_pw_5 ) = {0x0005000500050005ULL, 0x0005000500050005ULL}; |
5946
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
51 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_8 ) = 0x0008000800080008ULL; |
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
52 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_15 ) = 0x000F000F000F000FULL; |
6331 | 53 DECLARE_ALIGNED_16(const xmm_t, ff_pw_16 ) = {0x0010001000100010ULL, 0x0010001000100010ULL}; |
5946
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
54 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_20 ) = 0x0014001400140014ULL; |
6557 | 55 DECLARE_ALIGNED_16(const xmm_t, ff_pw_28 ) = {0x001C001C001C001CULL, 0x001C001C001C001CULL}; |
6329
5969caa9190d
clean up an ugliness introduced in r11826. this syntax will require fewer changes when adding future sse2 code.
lorenm
parents:
6327
diff
changeset
|
56 DECLARE_ALIGNED_16(const xmm_t, ff_pw_32 ) = {0x0020002000200020ULL, 0x0020002000200020ULL}; |
5946
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
57 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_42 ) = 0x002A002A002A002AULL; |
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
58 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_64 ) = 0x0040004000400040ULL; |
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
59 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_96 ) = 0x0060006000600060ULL; |
6333 | 60 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_128) = 0x0080008000800080ULL; |
6384 | 61 DECLARE_ALIGNED_8 (const uint64_t, ff_pw_255) = 0x00ff00ff00ff00ffULL; |
5946
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
62 |
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
63 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_1 ) = 0x0101010101010101ULL; |
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
64 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_3 ) = 0x0303030303030303ULL; |
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
65 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_7 ) = 0x0707070707070707ULL; |
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
66 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_3F ) = 0x3F3F3F3F3F3F3F3FULL; |
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
67 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_A1 ) = 0xA1A1A1A1A1A1A1A1ULL; |
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
68 DECLARE_ALIGNED_8 (const uint64_t, ff_pb_FC ) = 0xFCFCFCFCFCFCFCFCULL; |
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
69 |
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
70 DECLARE_ALIGNED_16(const double, ff_pd_1[2]) = { 1.0, 1.0 }; |
55251379b5b1
make ff_p* vars extern so that they can be used in various *_mmx.c files
aurel
parents:
5933
diff
changeset
|
71 DECLARE_ALIGNED_16(const double, ff_pd_2[2]) = { 2.0, 2.0 }; |
5737 | 72 |
6391
3dc36ec2dcad
__asm __volatile -> asm volatile, improves code consistency and works
reimar
parents:
6384
diff
changeset
|
73 #define JUMPALIGN() asm volatile (ASMALIGN(3)::) |
3dc36ec2dcad
__asm __volatile -> asm volatile, improves code consistency and works
reimar
parents:
6384
diff
changeset
|
74 #define MOVQ_ZERO(regd) asm volatile ("pxor %%" #regd ", %%" #regd ::) |
247
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
75 |
448 | 76 #define MOVQ_BFE(regd) \ |
6391
3dc36ec2dcad
__asm __volatile -> asm volatile, improves code consistency and works
reimar
parents:
6384
diff
changeset
|
77 asm volatile ( \ |
448 | 78 "pcmpeqd %%" #regd ", %%" #regd " \n\t"\ |
79 "paddb %%" #regd ", %%" #regd " \n\t" ::) | |
80 | |
247
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
81 #ifndef PIC |
6391
3dc36ec2dcad
__asm __volatile -> asm volatile, improves code consistency and works
reimar
parents:
6384
diff
changeset
|
82 #define MOVQ_BONE(regd) asm volatile ("movq %0, %%" #regd " \n\t" ::"m"(ff_bone)) |
3dc36ec2dcad
__asm __volatile -> asm volatile, improves code consistency and works
reimar
parents:
6384
diff
changeset
|
83 #define MOVQ_WTWO(regd) asm volatile ("movq %0, %%" #regd " \n\t" ::"m"(ff_wtwo)) |
247
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
84 #else |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
85 // for shared library it's better to use this way for accessing constants |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
86 // pcmpeqd -> -1 |
448 | 87 #define MOVQ_BONE(regd) \ |
6391
3dc36ec2dcad
__asm __volatile -> asm volatile, improves code consistency and works
reimar
parents:
6384
diff
changeset
|
88 asm volatile ( \ |
448 | 89 "pcmpeqd %%" #regd ", %%" #regd " \n\t" \ |
90 "psrlw $15, %%" #regd " \n\t" \ | |
91 "packuswb %%" #regd ", %%" #regd " \n\t" ::) | |
247
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
92 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
93 #define MOVQ_WTWO(regd) \ |
6391
3dc36ec2dcad
__asm __volatile -> asm volatile, improves code consistency and works
reimar
parents:
6384
diff
changeset
|
94 asm volatile ( \ |
448 | 95 "pcmpeqd %%" #regd ", %%" #regd " \n\t" \ |
96 "psrlw $15, %%" #regd " \n\t" \ | |
97 "psllw $1, %%" #regd " \n\t"::) | |
387 | 98 |
247
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
99 #endif |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
100 |
448 | 101 // using regr as temporary and for the output result |
444
a5edef76dac6
* new mmx code - based upon http://aggregate.org/MAGIC
kabi
parents:
438
diff
changeset
|
102 // first argument is unmodifed and second is trashed |
471 | 103 // regfe is supposed to contain 0xfefefefefefefefe |
104 #define PAVGB_MMX_NO_RND(rega, regb, regr, regfe) \ | |
2979 | 105 "movq " #rega ", " #regr " \n\t"\ |
106 "pand " #regb ", " #regr " \n\t"\ | |
107 "pxor " #rega ", " #regb " \n\t"\ | |
108 "pand " #regfe "," #regb " \n\t"\ | |
109 "psrlq $1, " #regb " \n\t"\ | |
110 "paddb " #regb ", " #regr " \n\t" | |
444
a5edef76dac6
* new mmx code - based upon http://aggregate.org/MAGIC
kabi
parents:
438
diff
changeset
|
111 |
471 | 112 #define PAVGB_MMX(rega, regb, regr, regfe) \ |
2979 | 113 "movq " #rega ", " #regr " \n\t"\ |
114 "por " #regb ", " #regr " \n\t"\ | |
115 "pxor " #rega ", " #regb " \n\t"\ | |
116 "pand " #regfe "," #regb " \n\t"\ | |
117 "psrlq $1, " #regb " \n\t"\ | |
118 "psubb " #regb ", " #regr " \n\t" | |
445
62c01dbdc1e0
* code with new PAVGB for MMX only CPU splited into separate file
kabi
parents:
444
diff
changeset
|
119 |
471 | 120 // mm6 is supposed to contain 0xfefefefefefefefe |
446
efe0c0d40577
* reenabled original xy2 put routine - rounding error is really bad with
kabi
parents:
445
diff
changeset
|
121 #define PAVGBP_MMX_NO_RND(rega, regb, regr, regc, regd, regp) \ |
2979 | 122 "movq " #rega ", " #regr " \n\t"\ |
123 "movq " #regc ", " #regp " \n\t"\ | |
124 "pand " #regb ", " #regr " \n\t"\ | |
125 "pand " #regd ", " #regp " \n\t"\ | |
126 "pxor " #rega ", " #regb " \n\t"\ | |
127 "pxor " #regc ", " #regd " \n\t"\ | |
128 "pand %%mm6, " #regb " \n\t"\ | |
129 "pand %%mm6, " #regd " \n\t"\ | |
130 "psrlq $1, " #regb " \n\t"\ | |
131 "psrlq $1, " #regd " \n\t"\ | |
132 "paddb " #regb ", " #regr " \n\t"\ | |
133 "paddb " #regd ", " #regp " \n\t" | |
446
efe0c0d40577
* reenabled original xy2 put routine - rounding error is really bad with
kabi
parents:
445
diff
changeset
|
134 |
efe0c0d40577
* reenabled original xy2 put routine - rounding error is really bad with
kabi
parents:
445
diff
changeset
|
135 #define PAVGBP_MMX(rega, regb, regr, regc, regd, regp) \ |
2979 | 136 "movq " #rega ", " #regr " \n\t"\ |
137 "movq " #regc ", " #regp " \n\t"\ | |
138 "por " #regb ", " #regr " \n\t"\ | |
139 "por " #regd ", " #regp " \n\t"\ | |
140 "pxor " #rega ", " #regb " \n\t"\ | |
141 "pxor " #regc ", " #regd " \n\t"\ | |
142 "pand %%mm6, " #regb " \n\t"\ | |
143 "pand %%mm6, " #regd " \n\t"\ | |
144 "psrlq $1, " #regd " \n\t"\ | |
145 "psrlq $1, " #regb " \n\t"\ | |
146 "psubb " #regb ", " #regr " \n\t"\ | |
147 "psubb " #regd ", " #regp " \n\t" | |
446
efe0c0d40577
* reenabled original xy2 put routine - rounding error is really bad with
kabi
parents:
445
diff
changeset
|
148 |
445
62c01dbdc1e0
* code with new PAVGB for MMX only CPU splited into separate file
kabi
parents:
444
diff
changeset
|
149 /***********************************/ |
62c01dbdc1e0
* code with new PAVGB for MMX only CPU splited into separate file
kabi
parents:
444
diff
changeset
|
150 /* MMX no rounding */ |
62c01dbdc1e0
* code with new PAVGB for MMX only CPU splited into separate file
kabi
parents:
444
diff
changeset
|
151 #define DEF(x, y) x ## _no_rnd_ ## y ##_mmx |
448 | 152 #define SET_RND MOVQ_WONE |
2979 | 153 #define PAVGBP(a, b, c, d, e, f) PAVGBP_MMX_NO_RND(a, b, c, d, e, f) |
154 #define PAVGB(a, b, c, e) PAVGB_MMX_NO_RND(a, b, c, e) | |
445
62c01dbdc1e0
* code with new PAVGB for MMX only CPU splited into separate file
kabi
parents:
444
diff
changeset
|
155 |
62c01dbdc1e0
* code with new PAVGB for MMX only CPU splited into separate file
kabi
parents:
444
diff
changeset
|
156 #include "dsputil_mmx_rnd.h" |
444
a5edef76dac6
* new mmx code - based upon http://aggregate.org/MAGIC
kabi
parents:
438
diff
changeset
|
157 |
445
62c01dbdc1e0
* code with new PAVGB for MMX only CPU splited into separate file
kabi
parents:
444
diff
changeset
|
158 #undef DEF |
448 | 159 #undef SET_RND |
446
efe0c0d40577
* reenabled original xy2 put routine - rounding error is really bad with
kabi
parents:
445
diff
changeset
|
160 #undef PAVGBP |
471 | 161 #undef PAVGB |
445
62c01dbdc1e0
* code with new PAVGB for MMX only CPU splited into separate file
kabi
parents:
444
diff
changeset
|
162 /***********************************/ |
62c01dbdc1e0
* code with new PAVGB for MMX only CPU splited into separate file
kabi
parents:
444
diff
changeset
|
163 /* MMX rounding */ |
62c01dbdc1e0
* code with new PAVGB for MMX only CPU splited into separate file
kabi
parents:
444
diff
changeset
|
164 |
62c01dbdc1e0
* code with new PAVGB for MMX only CPU splited into separate file
kabi
parents:
444
diff
changeset
|
165 #define DEF(x, y) x ## _ ## y ##_mmx |
448 | 166 #define SET_RND MOVQ_WTWO |
2979 | 167 #define PAVGBP(a, b, c, d, e, f) PAVGBP_MMX(a, b, c, d, e, f) |
168 #define PAVGB(a, b, c, e) PAVGB_MMX(a, b, c, e) | |
445
62c01dbdc1e0
* code with new PAVGB for MMX only CPU splited into separate file
kabi
parents:
444
diff
changeset
|
169 |
62c01dbdc1e0
* code with new PAVGB for MMX only CPU splited into separate file
kabi
parents:
444
diff
changeset
|
170 #include "dsputil_mmx_rnd.h" |
62c01dbdc1e0
* code with new PAVGB for MMX only CPU splited into separate file
kabi
parents:
444
diff
changeset
|
171 |
62c01dbdc1e0
* code with new PAVGB for MMX only CPU splited into separate file
kabi
parents:
444
diff
changeset
|
172 #undef DEF |
448 | 173 #undef SET_RND |
446
efe0c0d40577
* reenabled original xy2 put routine - rounding error is really bad with
kabi
parents:
445
diff
changeset
|
174 #undef PAVGBP |
471 | 175 #undef PAVGB |
387 | 176 |
0 | 177 /***********************************/ |
178 /* 3Dnow specific */ | |
179 | |
180 #define DEF(x) x ## _3dnow | |
181 #define PAVGB "pavgusb" | |
182 | |
183 #include "dsputil_mmx_avg.h" | |
184 | |
185 #undef DEF | |
186 #undef PAVGB | |
187 | |
188 /***********************************/ | |
189 /* MMX2 specific */ | |
190 | |
386 | 191 #define DEF(x) x ## _mmx2 |
0 | 192 |
193 /* Introduced only in MMX2 set */ | |
194 #define PAVGB "pavgb" | |
195 | |
196 #include "dsputil_mmx_avg.h" | |
197 | |
198 #undef DEF | |
199 #undef PAVGB | |
200 | |
6327 | 201 #define put_no_rnd_pixels16_mmx put_pixels16_mmx |
202 #define put_no_rnd_pixels8_mmx put_pixels8_mmx | |
6321 | 203 #define put_pixels16_mmx2 put_pixels16_mmx |
204 #define put_pixels8_mmx2 put_pixels8_mmx | |
205 #define put_pixels4_mmx2 put_pixels4_mmx | |
206 #define put_no_rnd_pixels16_mmx2 put_no_rnd_pixels16_mmx | |
207 #define put_no_rnd_pixels8_mmx2 put_no_rnd_pixels8_mmx | |
208 #define put_pixels16_3dnow put_pixels16_mmx | |
209 #define put_pixels8_3dnow put_pixels8_mmx | |
210 #define put_pixels4_3dnow put_pixels4_mmx | |
211 #define put_no_rnd_pixels16_3dnow put_no_rnd_pixels16_mmx | |
212 #define put_no_rnd_pixels8_3dnow put_no_rnd_pixels8_mmx | |
213 | |
0 | 214 /***********************************/ |
215 /* standard MMX */ | |
216 | |
1064 | 217 void put_pixels_clamped_mmx(const DCTELEM *block, uint8_t *pixels, int line_size) |
0 | 218 { |
219 const DCTELEM *p; | |
1064 | 220 uint8_t *pix; |
0 | 221 |
222 /* read the pixels */ | |
223 p = block; | |
224 pix = pixels; | |
247
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
225 /* unrolled loop */ |
6391
3dc36ec2dcad
__asm __volatile -> asm volatile, improves code consistency and works
reimar
parents:
6384
diff
changeset
|
226 asm volatile( |
2979 | 227 "movq %3, %%mm0 \n\t" |
228 "movq 8%3, %%mm1 \n\t" | |
229 "movq 16%3, %%mm2 \n\t" | |
230 "movq 24%3, %%mm3 \n\t" | |
231 "movq 32%3, %%mm4 \n\t" | |
232 "movq 40%3, %%mm5 \n\t" | |
233 "movq 48%3, %%mm6 \n\t" | |
234 "movq 56%3, %%mm7 \n\t" | |
235 "packuswb %%mm1, %%mm0 \n\t" | |
236 "packuswb %%mm3, %%mm2 \n\t" | |
237 "packuswb %%mm5, %%mm4 \n\t" | |
238 "packuswb %%mm7, %%mm6 \n\t" | |
239 "movq %%mm0, (%0) \n\t" | |
240 "movq %%mm2, (%0, %1) \n\t" | |
241 "movq %%mm4, (%0, %1, 2) \n\t" | |
242 "movq %%mm6, (%0, %2) \n\t" | |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
243 ::"r" (pix), "r" ((x86_reg)line_size), "r" ((x86_reg)line_size*3), "m"(*p) |
2979 | 244 :"memory"); |
0 | 245 pix += line_size*4; |
246 p += 32; | |
247
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
247 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
248 // if here would be an exact copy of the code above |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
249 // compiler would generate some very strange code |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
250 // thus using "r" |
6391
3dc36ec2dcad
__asm __volatile -> asm volatile, improves code consistency and works
reimar
parents:
6384
diff
changeset
|
251 asm volatile( |
2979 | 252 "movq (%3), %%mm0 \n\t" |
253 "movq 8(%3), %%mm1 \n\t" | |
254 "movq 16(%3), %%mm2 \n\t" | |
255 "movq 24(%3), %%mm3 \n\t" | |
256 "movq 32(%3), %%mm4 \n\t" | |
257 "movq 40(%3), %%mm5 \n\t" | |
258 "movq 48(%3), %%mm6 \n\t" | |
259 "movq 56(%3), %%mm7 \n\t" | |
260 "packuswb %%mm1, %%mm0 \n\t" | |
261 "packuswb %%mm3, %%mm2 \n\t" | |
262 "packuswb %%mm5, %%mm4 \n\t" | |
263 "packuswb %%mm7, %%mm6 \n\t" | |
264 "movq %%mm0, (%0) \n\t" | |
265 "movq %%mm2, (%0, %1) \n\t" | |
266 "movq %%mm4, (%0, %1, 2) \n\t" | |
267 "movq %%mm6, (%0, %2) \n\t" | |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
268 ::"r" (pix), "r" ((x86_reg)line_size), "r" ((x86_reg)line_size*3), "r"(p) |
2979 | 269 :"memory"); |
0 | 270 } |
271 | |
3089 | 272 static DECLARE_ALIGNED_8(const unsigned char, vector128[8]) = |
1985
b2bc62fdecc0
move the 0x80 vector outside of the function, thus saving the compiler
melanson
parents:
1984
diff
changeset
|
273 { 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80 }; |
b2bc62fdecc0
move the 0x80 vector outside of the function, thus saving the compiler
melanson
parents:
1984
diff
changeset
|
274 |
1984
ef919e9ef73e
separate out put_signed_pixels_clamped() into its own function and
melanson
parents:
1977
diff
changeset
|
275 void put_signed_pixels_clamped_mmx(const DCTELEM *block, uint8_t *pixels, int line_size) |
ef919e9ef73e
separate out put_signed_pixels_clamped() into its own function and
melanson
parents:
1977
diff
changeset
|
276 { |
ef919e9ef73e
separate out put_signed_pixels_clamped() into its own function and
melanson
parents:
1977
diff
changeset
|
277 int i; |
ef919e9ef73e
separate out put_signed_pixels_clamped() into its own function and
melanson
parents:
1977
diff
changeset
|
278 |
ef919e9ef73e
separate out put_signed_pixels_clamped() into its own function and
melanson
parents:
1977
diff
changeset
|
279 movq_m2r(*vector128, mm1); |
ef919e9ef73e
separate out put_signed_pixels_clamped() into its own function and
melanson
parents:
1977
diff
changeset
|
280 for (i = 0; i < 8; i++) { |
ef919e9ef73e
separate out put_signed_pixels_clamped() into its own function and
melanson
parents:
1977
diff
changeset
|
281 movq_m2r(*(block), mm0); |
ef919e9ef73e
separate out put_signed_pixels_clamped() into its own function and
melanson
parents:
1977
diff
changeset
|
282 packsswb_m2r(*(block + 4), mm0); |
ef919e9ef73e
separate out put_signed_pixels_clamped() into its own function and
melanson
parents:
1977
diff
changeset
|
283 block += 8; |
ef919e9ef73e
separate out put_signed_pixels_clamped() into its own function and
melanson
parents:
1977
diff
changeset
|
284 paddb_r2r(mm1, mm0); |
ef919e9ef73e
separate out put_signed_pixels_clamped() into its own function and
melanson
parents:
1977
diff
changeset
|
285 movq_r2m(mm0, *pixels); |
ef919e9ef73e
separate out put_signed_pixels_clamped() into its own function and
melanson
parents:
1977
diff
changeset
|
286 pixels += line_size; |
ef919e9ef73e
separate out put_signed_pixels_clamped() into its own function and
melanson
parents:
1977
diff
changeset
|
287 } |
ef919e9ef73e
separate out put_signed_pixels_clamped() into its own function and
melanson
parents:
1977
diff
changeset
|
288 } |
ef919e9ef73e
separate out put_signed_pixels_clamped() into its own function and
melanson
parents:
1977
diff
changeset
|
289 |
1064 | 290 void add_pixels_clamped_mmx(const DCTELEM *block, uint8_t *pixels, int line_size) |
0 | 291 { |
292 const DCTELEM *p; | |
1064 | 293 uint8_t *pix; |
0 | 294 int i; |
295 | |
296 /* read the pixels */ | |
297 p = block; | |
298 pix = pixels; | |
247
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
299 MOVQ_ZERO(mm7); |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
300 i = 4; |
342
8635a7036395
* fixes problem with -funroll-loops and buggy gcc compiler
kabi
parents:
324
diff
changeset
|
301 do { |
6391
3dc36ec2dcad
__asm __volatile -> asm volatile, improves code consistency and works
reimar
parents:
6384
diff
changeset
|
302 asm volatile( |
2979 | 303 "movq (%2), %%mm0 \n\t" |
304 "movq 8(%2), %%mm1 \n\t" | |
305 "movq 16(%2), %%mm2 \n\t" | |
306 "movq 24(%2), %%mm3 \n\t" | |
307 "movq %0, %%mm4 \n\t" | |
308 "movq %1, %%mm6 \n\t" | |
309 "movq %%mm4, %%mm5 \n\t" | |
310 "punpcklbw %%mm7, %%mm4 \n\t" | |
311 "punpckhbw %%mm7, %%mm5 \n\t" | |
312 "paddsw %%mm4, %%mm0 \n\t" | |
313 "paddsw %%mm5, %%mm1 \n\t" | |
314 "movq %%mm6, %%mm5 \n\t" | |
315 "punpcklbw %%mm7, %%mm6 \n\t" | |
316 "punpckhbw %%mm7, %%mm5 \n\t" | |
317 "paddsw %%mm6, %%mm2 \n\t" | |
318 "paddsw %%mm5, %%mm3 \n\t" | |
319 "packuswb %%mm1, %%mm0 \n\t" | |
320 "packuswb %%mm3, %%mm2 \n\t" | |
321 "movq %%mm0, %0 \n\t" | |
322 "movq %%mm2, %1 \n\t" | |
323 :"+m"(*pix), "+m"(*(pix+line_size)) | |
324 :"r"(p) | |
325 :"memory"); | |
0 | 326 pix += line_size*2; |
327 p += 16; | |
342
8635a7036395
* fixes problem with -funroll-loops and buggy gcc compiler
kabi
parents:
324
diff
changeset
|
328 } while (--i); |
0 | 329 } |
330 | |
2209 | 331 static void put_pixels4_mmx(uint8_t *block, const uint8_t *pixels, int line_size, int h) |
332 { | |
6391
3dc36ec2dcad
__asm __volatile -> asm volatile, improves code consistency and works
reimar
parents:
6384
diff
changeset
|
333 asm volatile( |
2979 | 334 "lea (%3, %3), %%"REG_a" \n\t" |
3576
f7125bf10892
Support for MacIntel, last part: balign directives
gpoirier
parents:
3574
diff
changeset
|
335 ASMALIGN(3) |
2979 | 336 "1: \n\t" |
337 "movd (%1), %%mm0 \n\t" | |
338 "movd (%1, %3), %%mm1 \n\t" | |
339 "movd %%mm0, (%2) \n\t" | |
340 "movd %%mm1, (%2, %3) \n\t" | |
341 "add %%"REG_a", %1 \n\t" | |
342 "add %%"REG_a", %2 \n\t" | |
343 "movd (%1), %%mm0 \n\t" | |
344 "movd (%1, %3), %%mm1 \n\t" | |
345 "movd %%mm0, (%2) \n\t" | |
346 "movd %%mm1, (%2, %3) \n\t" | |
347 "add %%"REG_a", %1 \n\t" | |
348 "add %%"REG_a", %2 \n\t" | |
349 "subl $4, %0 \n\t" | |
350 "jnz 1b \n\t" | |
351 : "+g"(h), "+r" (pixels), "+r" (block) | |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
352 : "r"((x86_reg)line_size) |
2979 | 353 : "%"REG_a, "memory" |
354 ); | |
2209 | 355 } |
356 | |
1064 | 357 static void put_pixels8_mmx(uint8_t *block, const uint8_t *pixels, int line_size, int h) |
0 | 358 { |
6391
3dc36ec2dcad
__asm __volatile -> asm volatile, improves code consistency and works
reimar
parents:
6384
diff
changeset
|
359 asm volatile( |
2979 | 360 "lea (%3, %3), %%"REG_a" \n\t" |
3576
f7125bf10892
Support for MacIntel, last part: balign directives
gpoirier
parents:
3574
diff
changeset
|
361 ASMALIGN(3) |
2979 | 362 "1: \n\t" |
363 "movq (%1), %%mm0 \n\t" | |
364 "movq (%1, %3), %%mm1 \n\t" | |
365 "movq %%mm0, (%2) \n\t" | |
366 "movq %%mm1, (%2, %3) \n\t" | |
367 "add %%"REG_a", %1 \n\t" | |
368 "add %%"REG_a", %2 \n\t" | |
369 "movq (%1), %%mm0 \n\t" | |
370 "movq (%1, %3), %%mm1 \n\t" | |
371 "movq %%mm0, (%2) \n\t" | |
372 "movq %%mm1, (%2, %3) \n\t" | |
373 "add %%"REG_a", %1 \n\t" | |
374 "add %%"REG_a", %2 \n\t" | |
375 "subl $4, %0 \n\t" | |
376 "jnz 1b \n\t" | |
377 : "+g"(h), "+r" (pixels), "+r" (block) | |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
378 : "r"((x86_reg)line_size) |
2979 | 379 : "%"REG_a, "memory" |
380 ); | |
0 | 381 } |
382 | |
1064 | 383 static void put_pixels16_mmx(uint8_t *block, const uint8_t *pixels, int line_size, int h) |
651 | 384 { |
6391
3dc36ec2dcad
__asm __volatile -> asm volatile, improves code consistency and works
reimar
parents:
6384
diff
changeset
|
385 asm volatile( |
2979 | 386 "lea (%3, %3), %%"REG_a" \n\t" |
3576
f7125bf10892
Support for MacIntel, last part: balign directives
gpoirier
parents:
3574
diff
changeset
|
387 ASMALIGN(3) |
2979 | 388 "1: \n\t" |
389 "movq (%1), %%mm0 \n\t" | |
390 "movq 8(%1), %%mm4 \n\t" | |
391 "movq (%1, %3), %%mm1 \n\t" | |
392 "movq 8(%1, %3), %%mm5 \n\t" | |
393 "movq %%mm0, (%2) \n\t" | |
394 "movq %%mm4, 8(%2) \n\t" | |
395 "movq %%mm1, (%2, %3) \n\t" | |
396 "movq %%mm5, 8(%2, %3) \n\t" | |
397 "add %%"REG_a", %1 \n\t" | |
398 "add %%"REG_a", %2 \n\t" | |
399 "movq (%1), %%mm0 \n\t" | |
400 "movq 8(%1), %%mm4 \n\t" | |
401 "movq (%1, %3), %%mm1 \n\t" | |
402 "movq 8(%1, %3), %%mm5 \n\t" | |
403 "movq %%mm0, (%2) \n\t" | |
404 "movq %%mm4, 8(%2) \n\t" | |
405 "movq %%mm1, (%2, %3) \n\t" | |
406 "movq %%mm5, 8(%2, %3) \n\t" | |
407 "add %%"REG_a", %1 \n\t" | |
408 "add %%"REG_a", %2 \n\t" | |
409 "subl $4, %0 \n\t" | |
410 "jnz 1b \n\t" | |
411 : "+g"(h), "+r" (pixels), "+r" (block) | |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
412 : "r"((x86_reg)line_size) |
2979 | 413 : "%"REG_a, "memory" |
414 ); | |
651 | 415 } |
416 | |
6331 | 417 static void put_pixels16_sse2(uint8_t *block, const uint8_t *pixels, int line_size, int h) |
418 { | |
6391
3dc36ec2dcad
__asm __volatile -> asm volatile, improves code consistency and works
reimar
parents:
6384
diff
changeset
|
419 asm volatile( |
6331 | 420 "1: \n\t" |
421 "movdqu (%1), %%xmm0 \n\t" | |
422 "movdqu (%1,%3), %%xmm1 \n\t" | |
423 "movdqu (%1,%3,2), %%xmm2 \n\t" | |
424 "movdqu (%1,%4), %%xmm3 \n\t" | |
425 "movdqa %%xmm0, (%2) \n\t" | |
426 "movdqa %%xmm1, (%2,%3) \n\t" | |
427 "movdqa %%xmm2, (%2,%3,2) \n\t" | |
428 "movdqa %%xmm3, (%2,%4) \n\t" | |
429 "subl $4, %0 \n\t" | |
430 "lea (%1,%3,4), %1 \n\t" | |
431 "lea (%2,%3,4), %2 \n\t" | |
432 "jnz 1b \n\t" | |
433 : "+g"(h), "+r" (pixels), "+r" (block) | |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
434 : "r"((x86_reg)line_size), "r"((x86_reg)3L*line_size) |
6331 | 435 : "memory" |
436 ); | |
437 } | |
438 | |
439 static void avg_pixels16_sse2(uint8_t *block, const uint8_t *pixels, int line_size, int h) | |
440 { | |
6391
3dc36ec2dcad
__asm __volatile -> asm volatile, improves code consistency and works
reimar
parents:
6384
diff
changeset
|
441 asm volatile( |
6331 | 442 "1: \n\t" |
443 "movdqu (%1), %%xmm0 \n\t" | |
444 "movdqu (%1,%3), %%xmm1 \n\t" | |
445 "movdqu (%1,%3,2), %%xmm2 \n\t" | |
446 "movdqu (%1,%4), %%xmm3 \n\t" | |
447 "pavgb (%2), %%xmm0 \n\t" | |
448 "pavgb (%2,%3), %%xmm1 \n\t" | |
449 "pavgb (%2,%3,2), %%xmm2 \n\t" | |
450 "pavgb (%2,%4), %%xmm3 \n\t" | |
451 "movdqa %%xmm0, (%2) \n\t" | |
452 "movdqa %%xmm1, (%2,%3) \n\t" | |
453 "movdqa %%xmm2, (%2,%3,2) \n\t" | |
454 "movdqa %%xmm3, (%2,%4) \n\t" | |
455 "subl $4, %0 \n\t" | |
456 "lea (%1,%3,4), %1 \n\t" | |
457 "lea (%2,%3,4), %2 \n\t" | |
458 "jnz 1b \n\t" | |
459 : "+g"(h), "+r" (pixels), "+r" (block) | |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
460 : "r"((x86_reg)line_size), "r"((x86_reg)3L*line_size) |
6331 | 461 : "memory" |
462 ); | |
463 } | |
464 | |
296 | 465 static void clear_blocks_mmx(DCTELEM *blocks) |
466 { | |
6391
3dc36ec2dcad
__asm __volatile -> asm volatile, improves code consistency and works
reimar
parents:
6384
diff
changeset
|
467 asm volatile( |
2979 | 468 "pxor %%mm7, %%mm7 \n\t" |
469 "mov $-128*6, %%"REG_a" \n\t" | |
470 "1: \n\t" | |
471 "movq %%mm7, (%0, %%"REG_a") \n\t" | |
472 "movq %%mm7, 8(%0, %%"REG_a") \n\t" | |
473 "movq %%mm7, 16(%0, %%"REG_a") \n\t" | |
474 "movq %%mm7, 24(%0, %%"REG_a") \n\t" | |
475 "add $32, %%"REG_a" \n\t" | |
476 " js 1b \n\t" | |
2293
15cfba1b97b5
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64 patch by (Aurelien Jacobs <aurel at gnuage dot org>)
michael
parents:
2256
diff
changeset
|
477 : : "r" (((uint8_t *)blocks)+128*6) |
15cfba1b97b5
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64 patch by (Aurelien Jacobs <aurel at gnuage dot org>)
michael
parents:
2256
diff
changeset
|
478 : "%"REG_a |
296 | 479 ); |
480 } | |
481 | |
866 | 482 static void add_bytes_mmx(uint8_t *dst, uint8_t *src, int w){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
483 x86_reg i=0; |
866 | 484 asm volatile( |
2979 | 485 "1: \n\t" |
486 "movq (%1, %0), %%mm0 \n\t" | |
487 "movq (%2, %0), %%mm1 \n\t" | |
488 "paddb %%mm0, %%mm1 \n\t" | |
489 "movq %%mm1, (%2, %0) \n\t" | |
490 "movq 8(%1, %0), %%mm0 \n\t" | |
491 "movq 8(%2, %0), %%mm1 \n\t" | |
492 "paddb %%mm0, %%mm1 \n\t" | |
493 "movq %%mm1, 8(%2, %0) \n\t" | |
494 "add $16, %0 \n\t" | |
495 "cmp %3, %0 \n\t" | |
496 " jb 1b \n\t" | |
866 | 497 : "+r" (i) |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
498 : "r"(src), "r"(dst), "r"((x86_reg)w-15) |
866 | 499 ); |
500 for(; i<w; i++) | |
501 dst[i+0] += src[i+0]; | |
502 } | |
503 | |
6384 | 504 static void add_bytes_l2_mmx(uint8_t *dst, uint8_t *src1, uint8_t *src2, int w){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
505 x86_reg i=0; |
6384 | 506 asm volatile( |
507 "1: \n\t" | |
508 "movq (%2, %0), %%mm0 \n\t" | |
509 "movq 8(%2, %0), %%mm1 \n\t" | |
510 "paddb (%3, %0), %%mm0 \n\t" | |
511 "paddb 8(%3, %0), %%mm1 \n\t" | |
512 "movq %%mm0, (%1, %0) \n\t" | |
513 "movq %%mm1, 8(%1, %0) \n\t" | |
514 "add $16, %0 \n\t" | |
515 "cmp %4, %0 \n\t" | |
516 " jb 1b \n\t" | |
517 : "+r" (i) | |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
518 : "r"(dst), "r"(src1), "r"(src2), "r"((x86_reg)w-15) |
6384 | 519 ); |
520 for(; i<w; i++) | |
521 dst[i] = src1[i] + src2[i]; | |
522 } | |
523 | |
1648 | 524 #define H263_LOOP_FILTER \ |
2979 | 525 "pxor %%mm7, %%mm7 \n\t"\ |
526 "movq %0, %%mm0 \n\t"\ | |
527 "movq %0, %%mm1 \n\t"\ | |
528 "movq %3, %%mm2 \n\t"\ | |
529 "movq %3, %%mm3 \n\t"\ | |
530 "punpcklbw %%mm7, %%mm0 \n\t"\ | |
531 "punpckhbw %%mm7, %%mm1 \n\t"\ | |
532 "punpcklbw %%mm7, %%mm2 \n\t"\ | |
533 "punpckhbw %%mm7, %%mm3 \n\t"\ | |
534 "psubw %%mm2, %%mm0 \n\t"\ | |
535 "psubw %%mm3, %%mm1 \n\t"\ | |
536 "movq %1, %%mm2 \n\t"\ | |
537 "movq %1, %%mm3 \n\t"\ | |
538 "movq %2, %%mm4 \n\t"\ | |
539 "movq %2, %%mm5 \n\t"\ | |
540 "punpcklbw %%mm7, %%mm2 \n\t"\ | |
541 "punpckhbw %%mm7, %%mm3 \n\t"\ | |
542 "punpcklbw %%mm7, %%mm4 \n\t"\ | |
543 "punpckhbw %%mm7, %%mm5 \n\t"\ | |
544 "psubw %%mm2, %%mm4 \n\t"\ | |
545 "psubw %%mm3, %%mm5 \n\t"\ | |
546 "psllw $2, %%mm4 \n\t"\ | |
547 "psllw $2, %%mm5 \n\t"\ | |
548 "paddw %%mm0, %%mm4 \n\t"\ | |
549 "paddw %%mm1, %%mm5 \n\t"\ | |
550 "pxor %%mm6, %%mm6 \n\t"\ | |
551 "pcmpgtw %%mm4, %%mm6 \n\t"\ | |
552 "pcmpgtw %%mm5, %%mm7 \n\t"\ | |
553 "pxor %%mm6, %%mm4 \n\t"\ | |
554 "pxor %%mm7, %%mm5 \n\t"\ | |
555 "psubw %%mm6, %%mm4 \n\t"\ | |
556 "psubw %%mm7, %%mm5 \n\t"\ | |
557 "psrlw $3, %%mm4 \n\t"\ | |
558 "psrlw $3, %%mm5 \n\t"\ | |
559 "packuswb %%mm5, %%mm4 \n\t"\ | |
560 "packsswb %%mm7, %%mm6 \n\t"\ | |
561 "pxor %%mm7, %%mm7 \n\t"\ | |
562 "movd %4, %%mm2 \n\t"\ | |
563 "punpcklbw %%mm2, %%mm2 \n\t"\ | |
564 "punpcklbw %%mm2, %%mm2 \n\t"\ | |
565 "punpcklbw %%mm2, %%mm2 \n\t"\ | |
566 "psubusb %%mm4, %%mm2 \n\t"\ | |
567 "movq %%mm2, %%mm3 \n\t"\ | |
568 "psubusb %%mm4, %%mm3 \n\t"\ | |
569 "psubb %%mm3, %%mm2 \n\t"\ | |
570 "movq %1, %%mm3 \n\t"\ | |
571 "movq %2, %%mm4 \n\t"\ | |
572 "pxor %%mm6, %%mm3 \n\t"\ | |
573 "pxor %%mm6, %%mm4 \n\t"\ | |
574 "paddusb %%mm2, %%mm3 \n\t"\ | |
575 "psubusb %%mm2, %%mm4 \n\t"\ | |
576 "pxor %%mm6, %%mm3 \n\t"\ | |
577 "pxor %%mm6, %%mm4 \n\t"\ | |
578 "paddusb %%mm2, %%mm2 \n\t"\ | |
579 "packsswb %%mm1, %%mm0 \n\t"\ | |
580 "pcmpgtb %%mm0, %%mm7 \n\t"\ | |
581 "pxor %%mm7, %%mm0 \n\t"\ | |
582 "psubb %%mm7, %%mm0 \n\t"\ | |
583 "movq %%mm0, %%mm1 \n\t"\ | |
584 "psubusb %%mm2, %%mm0 \n\t"\ | |
585 "psubb %%mm0, %%mm1 \n\t"\ | |
586 "pand %5, %%mm1 \n\t"\ | |
587 "psrlw $2, %%mm1 \n\t"\ | |
588 "pxor %%mm7, %%mm1 \n\t"\ | |
589 "psubb %%mm7, %%mm1 \n\t"\ | |
590 "movq %0, %%mm5 \n\t"\ | |
591 "movq %3, %%mm6 \n\t"\ | |
592 "psubb %%mm1, %%mm5 \n\t"\ | |
593 "paddb %%mm1, %%mm6 \n\t" | |
1648 | 594 |
1647 | 595 static void h263_v_loop_filter_mmx(uint8_t *src, int stride, int qscale){ |
5394
e9a6215f4e3a
help some gcc version to optimize out those functions
aurel
parents:
5278
diff
changeset
|
596 if(ENABLE_ANY_H263) { |
1647 | 597 const int strength= ff_h263_loop_filter_strength[qscale]; |
598 | |
599 asm volatile( | |
2967 | 600 |
1648 | 601 H263_LOOP_FILTER |
2967 | 602 |
2979 | 603 "movq %%mm3, %1 \n\t" |
604 "movq %%mm4, %2 \n\t" | |
605 "movq %%mm5, %0 \n\t" | |
606 "movq %%mm6, %3 \n\t" | |
1647 | 607 : "+m" (*(uint64_t*)(src - 2*stride)), |
608 "+m" (*(uint64_t*)(src - 1*stride)), | |
609 "+m" (*(uint64_t*)(src + 0*stride)), | |
610 "+m" (*(uint64_t*)(src + 1*stride)) | |
611 : "g" (2*strength), "m"(ff_pb_FC) | |
612 ); | |
5394
e9a6215f4e3a
help some gcc version to optimize out those functions
aurel
parents:
5278
diff
changeset
|
613 } |
1647 | 614 } |
615 | |
1648 | 616 static inline void transpose4x4(uint8_t *dst, uint8_t *src, int dst_stride, int src_stride){ |
617 asm volatile( //FIXME could save 1 instruction if done as 8x4 ... | |
2979 | 618 "movd %4, %%mm0 \n\t" |
619 "movd %5, %%mm1 \n\t" | |
620 "movd %6, %%mm2 \n\t" | |
621 "movd %7, %%mm3 \n\t" | |
622 "punpcklbw %%mm1, %%mm0 \n\t" | |
623 "punpcklbw %%mm3, %%mm2 \n\t" | |
624 "movq %%mm0, %%mm1 \n\t" | |
625 "punpcklwd %%mm2, %%mm0 \n\t" | |
626 "punpckhwd %%mm2, %%mm1 \n\t" | |
627 "movd %%mm0, %0 \n\t" | |
628 "punpckhdq %%mm0, %%mm0 \n\t" | |
629 "movd %%mm0, %1 \n\t" | |
630 "movd %%mm1, %2 \n\t" | |
631 "punpckhdq %%mm1, %%mm1 \n\t" | |
632 "movd %%mm1, %3 \n\t" | |
2967 | 633 |
1648 | 634 : "=m" (*(uint32_t*)(dst + 0*dst_stride)), |
635 "=m" (*(uint32_t*)(dst + 1*dst_stride)), | |
636 "=m" (*(uint32_t*)(dst + 2*dst_stride)), | |
637 "=m" (*(uint32_t*)(dst + 3*dst_stride)) | |
638 : "m" (*(uint32_t*)(src + 0*src_stride)), | |
639 "m" (*(uint32_t*)(src + 1*src_stride)), | |
640 "m" (*(uint32_t*)(src + 2*src_stride)), | |
641 "m" (*(uint32_t*)(src + 3*src_stride)) | |
642 ); | |
643 } | |
644 | |
645 static void h263_h_loop_filter_mmx(uint8_t *src, int stride, int qscale){ | |
5394
e9a6215f4e3a
help some gcc version to optimize out those functions
aurel
parents:
5278
diff
changeset
|
646 if(ENABLE_ANY_H263) { |
1648 | 647 const int strength= ff_h263_loop_filter_strength[qscale]; |
6181 | 648 DECLARE_ALIGNED(8, uint64_t, temp[4]); |
1648 | 649 uint8_t *btemp= (uint8_t*)temp; |
2967 | 650 |
1648 | 651 src -= 2; |
652 | |
653 transpose4x4(btemp , src , 8, stride); | |
654 transpose4x4(btemp+4, src + 4*stride, 8, stride); | |
655 asm volatile( | |
656 H263_LOOP_FILTER // 5 3 4 6 | |
2967 | 657 |
1648 | 658 : "+m" (temp[0]), |
659 "+m" (temp[1]), | |
660 "+m" (temp[2]), | |
661 "+m" (temp[3]) | |
662 : "g" (2*strength), "m"(ff_pb_FC) | |
663 ); | |
664 | |
665 asm volatile( | |
2979 | 666 "movq %%mm5, %%mm1 \n\t" |
667 "movq %%mm4, %%mm0 \n\t" | |
668 "punpcklbw %%mm3, %%mm5 \n\t" | |
669 "punpcklbw %%mm6, %%mm4 \n\t" | |
670 "punpckhbw %%mm3, %%mm1 \n\t" | |
671 "punpckhbw %%mm6, %%mm0 \n\t" | |
672 "movq %%mm5, %%mm3 \n\t" | |
673 "movq %%mm1, %%mm6 \n\t" | |
674 "punpcklwd %%mm4, %%mm5 \n\t" | |
675 "punpcklwd %%mm0, %%mm1 \n\t" | |
676 "punpckhwd %%mm4, %%mm3 \n\t" | |
677 "punpckhwd %%mm0, %%mm6 \n\t" | |
678 "movd %%mm5, (%0) \n\t" | |
679 "punpckhdq %%mm5, %%mm5 \n\t" | |
680 "movd %%mm5, (%0,%2) \n\t" | |
681 "movd %%mm3, (%0,%2,2) \n\t" | |
682 "punpckhdq %%mm3, %%mm3 \n\t" | |
683 "movd %%mm3, (%0,%3) \n\t" | |
684 "movd %%mm1, (%1) \n\t" | |
685 "punpckhdq %%mm1, %%mm1 \n\t" | |
686 "movd %%mm1, (%1,%2) \n\t" | |
687 "movd %%mm6, (%1,%2,2) \n\t" | |
688 "punpckhdq %%mm6, %%mm6 \n\t" | |
689 "movd %%mm6, (%1,%3) \n\t" | |
2505
86e2b1424801
optimization and gcc 4.0 bug workaround patch by (Martin Drab >drab kepler.fjfi.cvut cz<)
michael
parents:
2293
diff
changeset
|
690 :: "r" (src), |
86e2b1424801
optimization and gcc 4.0 bug workaround patch by (Martin Drab >drab kepler.fjfi.cvut cz<)
michael
parents:
2293
diff
changeset
|
691 "r" (src + 4*stride), |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
692 "r" ((x86_reg) stride ), |
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
693 "r" ((x86_reg)(3*stride)) |
1648 | 694 ); |
5394
e9a6215f4e3a
help some gcc version to optimize out those functions
aurel
parents:
5278
diff
changeset
|
695 } |
1648 | 696 } |
697 | |
6437 | 698 /* draw the edges of width 'w' of an image of size width, height |
699 this mmx version can only handle w==8 || w==16 */ | |
700 static void draw_edges_mmx(uint8_t *buf, int wrap, int width, int height, int w) | |
701 { | |
702 uint8_t *ptr, *last_line; | |
703 int i; | |
704 | |
705 last_line = buf + (height - 1) * wrap; | |
706 /* left and right */ | |
707 ptr = buf; | |
708 if(w==8) | |
709 { | |
710 asm volatile( | |
711 "1: \n\t" | |
712 "movd (%0), %%mm0 \n\t" | |
713 "punpcklbw %%mm0, %%mm0 \n\t" | |
714 "punpcklwd %%mm0, %%mm0 \n\t" | |
715 "punpckldq %%mm0, %%mm0 \n\t" | |
716 "movq %%mm0, -8(%0) \n\t" | |
717 "movq -8(%0, %2), %%mm1 \n\t" | |
718 "punpckhbw %%mm1, %%mm1 \n\t" | |
719 "punpckhwd %%mm1, %%mm1 \n\t" | |
720 "punpckhdq %%mm1, %%mm1 \n\t" | |
721 "movq %%mm1, (%0, %2) \n\t" | |
722 "add %1, %0 \n\t" | |
723 "cmp %3, %0 \n\t" | |
724 " jb 1b \n\t" | |
725 : "+r" (ptr) | |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
726 : "r" ((x86_reg)wrap), "r" ((x86_reg)width), "r" (ptr + wrap*height) |
6437 | 727 ); |
728 } | |
729 else | |
730 { | |
731 asm volatile( | |
732 "1: \n\t" | |
733 "movd (%0), %%mm0 \n\t" | |
734 "punpcklbw %%mm0, %%mm0 \n\t" | |
735 "punpcklwd %%mm0, %%mm0 \n\t" | |
736 "punpckldq %%mm0, %%mm0 \n\t" | |
737 "movq %%mm0, -8(%0) \n\t" | |
738 "movq %%mm0, -16(%0) \n\t" | |
739 "movq -8(%0, %2), %%mm1 \n\t" | |
740 "punpckhbw %%mm1, %%mm1 \n\t" | |
741 "punpckhwd %%mm1, %%mm1 \n\t" | |
742 "punpckhdq %%mm1, %%mm1 \n\t" | |
743 "movq %%mm1, (%0, %2) \n\t" | |
744 "movq %%mm1, 8(%0, %2) \n\t" | |
745 "add %1, %0 \n\t" | |
746 "cmp %3, %0 \n\t" | |
747 " jb 1b \n\t" | |
748 : "+r" (ptr) | |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
749 : "r" ((x86_reg)wrap), "r" ((x86_reg)width), "r" (ptr + wrap*height) |
6437 | 750 ); |
751 } | |
752 | |
753 for(i=0;i<w;i+=4) { | |
754 /* top and bottom (and hopefully also the corners) */ | |
755 ptr= buf - (i + 1) * wrap - w; | |
756 asm volatile( | |
757 "1: \n\t" | |
758 "movq (%1, %0), %%mm0 \n\t" | |
759 "movq %%mm0, (%0) \n\t" | |
760 "movq %%mm0, (%0, %2) \n\t" | |
761 "movq %%mm0, (%0, %2, 2) \n\t" | |
762 "movq %%mm0, (%0, %3) \n\t" | |
763 "add $8, %0 \n\t" | |
764 "cmp %4, %0 \n\t" | |
765 " jb 1b \n\t" | |
766 : "+r" (ptr) | |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
767 : "r" ((x86_reg)buf - (x86_reg)ptr - w), "r" ((x86_reg)-wrap), "r" ((x86_reg)-wrap*3), "r" (ptr+width+2*w) |
6437 | 768 ); |
769 ptr= last_line + (i + 1) * wrap - w; | |
770 asm volatile( | |
771 "1: \n\t" | |
772 "movq (%1, %0), %%mm0 \n\t" | |
773 "movq %%mm0, (%0) \n\t" | |
774 "movq %%mm0, (%0, %2) \n\t" | |
775 "movq %%mm0, (%0, %2, 2) \n\t" | |
776 "movq %%mm0, (%0, %3) \n\t" | |
777 "add $8, %0 \n\t" | |
778 "cmp %4, %0 \n\t" | |
779 " jb 1b \n\t" | |
780 : "+r" (ptr) | |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
781 : "r" ((x86_reg)last_line - (x86_reg)ptr - w), "r" ((x86_reg)wrap), "r" ((x86_reg)wrap*3), "r" (ptr+width+2*w) |
6437 | 782 ); |
783 } | |
784 } | |
785 | |
6384 | 786 #define PAETH(cpu, abs3)\ |
787 void add_png_paeth_prediction_##cpu(uint8_t *dst, uint8_t *src, uint8_t *top, int w, int bpp)\ | |
788 {\ | |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
789 x86_reg i = -bpp;\ |
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
790 x86_reg end = w-3;\ |
6384 | 791 asm volatile(\ |
792 "pxor %%mm7, %%mm7 \n"\ | |
793 "movd (%1,%0), %%mm0 \n"\ | |
794 "movd (%2,%0), %%mm1 \n"\ | |
795 "punpcklbw %%mm7, %%mm0 \n"\ | |
796 "punpcklbw %%mm7, %%mm1 \n"\ | |
797 "add %4, %0 \n"\ | |
798 "1: \n"\ | |
799 "movq %%mm1, %%mm2 \n"\ | |
800 "movd (%2,%0), %%mm1 \n"\ | |
801 "movq %%mm2, %%mm3 \n"\ | |
802 "punpcklbw %%mm7, %%mm1 \n"\ | |
803 "movq %%mm2, %%mm4 \n"\ | |
804 "psubw %%mm1, %%mm3 \n"\ | |
805 "psubw %%mm0, %%mm4 \n"\ | |
806 "movq %%mm3, %%mm5 \n"\ | |
807 "paddw %%mm4, %%mm5 \n"\ | |
808 abs3\ | |
809 "movq %%mm4, %%mm6 \n"\ | |
810 "pminsw %%mm5, %%mm6 \n"\ | |
811 "pcmpgtw %%mm6, %%mm3 \n"\ | |
812 "pcmpgtw %%mm5, %%mm4 \n"\ | |
813 "movq %%mm4, %%mm6 \n"\ | |
814 "pand %%mm3, %%mm4 \n"\ | |
815 "pandn %%mm3, %%mm6 \n"\ | |
816 "pandn %%mm0, %%mm3 \n"\ | |
817 "movd (%3,%0), %%mm0 \n"\ | |
818 "pand %%mm1, %%mm6 \n"\ | |
819 "pand %%mm4, %%mm2 \n"\ | |
820 "punpcklbw %%mm7, %%mm0 \n"\ | |
821 "movq %6, %%mm5 \n"\ | |
822 "paddw %%mm6, %%mm0 \n"\ | |
823 "paddw %%mm2, %%mm3 \n"\ | |
824 "paddw %%mm3, %%mm0 \n"\ | |
825 "pand %%mm5, %%mm0 \n"\ | |
826 "movq %%mm0, %%mm3 \n"\ | |
827 "packuswb %%mm3, %%mm3 \n"\ | |
828 "movd %%mm3, (%1,%0) \n"\ | |
829 "add %4, %0 \n"\ | |
830 "cmp %5, %0 \n"\ | |
831 "jle 1b \n"\ | |
832 :"+r"(i)\ | |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
833 :"r"(dst), "r"(top), "r"(src), "r"((x86_reg)bpp), "g"(end),\ |
6384 | 834 "m"(ff_pw_255)\ |
835 :"memory"\ | |
836 );\ | |
837 } | |
838 | |
839 #define ABS3_MMX2\ | |
840 "psubw %%mm5, %%mm7 \n"\ | |
841 "pmaxsw %%mm7, %%mm5 \n"\ | |
842 "pxor %%mm6, %%mm6 \n"\ | |
843 "pxor %%mm7, %%mm7 \n"\ | |
844 "psubw %%mm3, %%mm6 \n"\ | |
845 "psubw %%mm4, %%mm7 \n"\ | |
846 "pmaxsw %%mm6, %%mm3 \n"\ | |
847 "pmaxsw %%mm7, %%mm4 \n"\ | |
848 "pxor %%mm7, %%mm7 \n" | |
849 | |
850 #define ABS3_SSSE3\ | |
851 "pabsw %%mm3, %%mm3 \n"\ | |
852 "pabsw %%mm4, %%mm4 \n"\ | |
853 "pabsw %%mm5, %%mm5 \n" | |
854 | |
855 PAETH(mmx2, ABS3_MMX2) | |
856 #ifdef HAVE_SSSE3 | |
857 PAETH(ssse3, ABS3_SSSE3) | |
858 #endif | |
859 | |
954 | 860 #define QPEL_V_LOW(m3,m4,m5,m6, pw_20, pw_3, rnd, in0, in1, in2, in7, out, OP)\ |
2979 | 861 "paddw " #m4 ", " #m3 " \n\t" /* x1 */\ |
862 "movq "MANGLE(ff_pw_20)", %%mm4 \n\t" /* 20 */\ | |
863 "pmullw " #m3 ", %%mm4 \n\t" /* 20x1 */\ | |
864 "movq "#in7", " #m3 " \n\t" /* d */\ | |
865 "movq "#in0", %%mm5 \n\t" /* D */\ | |
866 "paddw " #m3 ", %%mm5 \n\t" /* x4 */\ | |
867 "psubw %%mm5, %%mm4 \n\t" /* 20x1 - x4 */\ | |
868 "movq "#in1", %%mm5 \n\t" /* C */\ | |
869 "movq "#in2", %%mm6 \n\t" /* B */\ | |
870 "paddw " #m6 ", %%mm5 \n\t" /* x3 */\ | |
871 "paddw " #m5 ", %%mm6 \n\t" /* x2 */\ | |
872 "paddw %%mm6, %%mm6 \n\t" /* 2x2 */\ | |
873 "psubw %%mm6, %%mm5 \n\t" /* -2x2 + x3 */\ | |
874 "pmullw "MANGLE(ff_pw_3)", %%mm5 \n\t" /* -6x2 + 3x3 */\ | |
875 "paddw " #rnd ", %%mm4 \n\t" /* x2 */\ | |
876 "paddw %%mm4, %%mm5 \n\t" /* 20x1 - 6x2 + 3x3 - x4 */\ | |
877 "psraw $5, %%mm5 \n\t"\ | |
878 "packuswb %%mm5, %%mm5 \n\t"\ | |
954 | 879 OP(%%mm5, out, %%mm7, d) |
880 | |
959 | 881 #define QPEL_BASE(OPNAME, ROUNDER, RND, OP_MMX2, OP_3DNOW)\ |
1057 | 882 static void OPNAME ## mpeg4_qpel16_h_lowpass_mmx2(uint8_t *dst, uint8_t *src, int dstStride, int srcStride, int h){\ |
954 | 883 uint64_t temp;\ |
884 \ | |
885 asm volatile(\ | |
2979 | 886 "pxor %%mm7, %%mm7 \n\t"\ |
887 "1: \n\t"\ | |
888 "movq (%0), %%mm0 \n\t" /* ABCDEFGH */\ | |
889 "movq %%mm0, %%mm1 \n\t" /* ABCDEFGH */\ | |
890 "movq %%mm0, %%mm2 \n\t" /* ABCDEFGH */\ | |
891 "punpcklbw %%mm7, %%mm0 \n\t" /* 0A0B0C0D */\ | |
892 "punpckhbw %%mm7, %%mm1 \n\t" /* 0E0F0G0H */\ | |
893 "pshufw $0x90, %%mm0, %%mm5 \n\t" /* 0A0A0B0C */\ | |
894 "pshufw $0x41, %%mm0, %%mm6 \n\t" /* 0B0A0A0B */\ | |
895 "movq %%mm2, %%mm3 \n\t" /* ABCDEFGH */\ | |
896 "movq %%mm2, %%mm4 \n\t" /* ABCDEFGH */\ | |
897 "psllq $8, %%mm2 \n\t" /* 0ABCDEFG */\ | |
898 "psllq $16, %%mm3 \n\t" /* 00ABCDEF */\ | |
899 "psllq $24, %%mm4 \n\t" /* 000ABCDE */\ | |
900 "punpckhbw %%mm7, %%mm2 \n\t" /* 0D0E0F0G */\ | |
901 "punpckhbw %%mm7, %%mm3 \n\t" /* 0C0D0E0F */\ | |
902 "punpckhbw %%mm7, %%mm4 \n\t" /* 0B0C0D0E */\ | |
903 "paddw %%mm3, %%mm5 \n\t" /* b */\ | |
904 "paddw %%mm2, %%mm6 \n\t" /* c */\ | |
905 "paddw %%mm5, %%mm5 \n\t" /* 2b */\ | |
906 "psubw %%mm5, %%mm6 \n\t" /* c - 2b */\ | |
907 "pshufw $0x06, %%mm0, %%mm5 \n\t" /* 0C0B0A0A */\ | |
908 "pmullw "MANGLE(ff_pw_3)", %%mm6 \n\t" /* 3c - 6b */\ | |
909 "paddw %%mm4, %%mm0 \n\t" /* a */\ | |
910 "paddw %%mm1, %%mm5 \n\t" /* d */\ | |
911 "pmullw "MANGLE(ff_pw_20)", %%mm0 \n\t" /* 20a */\ | |
912 "psubw %%mm5, %%mm0 \n\t" /* 20a - d */\ | |
913 "paddw %6, %%mm6 \n\t"\ | |
914 "paddw %%mm6, %%mm0 \n\t" /* 20a - 6b + 3c - d */\ | |
915 "psraw $5, %%mm0 \n\t"\ | |
916 "movq %%mm0, %5 \n\t"\ | |
954 | 917 /* mm1=EFGH, mm2=DEFG, mm3=CDEF, mm4=BCDE, mm7=0 */\ |
918 \ | |
2979 | 919 "movq 5(%0), %%mm0 \n\t" /* FGHIJKLM */\ |
920 "movq %%mm0, %%mm5 \n\t" /* FGHIJKLM */\ | |
921 "movq %%mm0, %%mm6 \n\t" /* FGHIJKLM */\ | |
922 "psrlq $8, %%mm0 \n\t" /* GHIJKLM0 */\ | |
923 "psrlq $16, %%mm5 \n\t" /* HIJKLM00 */\ | |
924 "punpcklbw %%mm7, %%mm0 \n\t" /* 0G0H0I0J */\ | |
925 "punpcklbw %%mm7, %%mm5 \n\t" /* 0H0I0J0K */\ | |
926 "paddw %%mm0, %%mm2 \n\t" /* b */\ | |
927 "paddw %%mm5, %%mm3 \n\t" /* c */\ | |
928 "paddw %%mm2, %%mm2 \n\t" /* 2b */\ | |
929 "psubw %%mm2, %%mm3 \n\t" /* c - 2b */\ | |
930 "movq %%mm6, %%mm2 \n\t" /* FGHIJKLM */\ | |
931 "psrlq $24, %%mm6 \n\t" /* IJKLM000 */\ | |
932 "punpcklbw %%mm7, %%mm2 \n\t" /* 0F0G0H0I */\ | |
933 "punpcklbw %%mm7, %%mm6 \n\t" /* 0I0J0K0L */\ | |
934 "pmullw "MANGLE(ff_pw_3)", %%mm3 \n\t" /* 3c - 6b */\ | |
935 "paddw %%mm2, %%mm1 \n\t" /* a */\ | |
936 "paddw %%mm6, %%mm4 \n\t" /* d */\ | |
937 "pmullw "MANGLE(ff_pw_20)", %%mm1 \n\t" /* 20a */\ | |
938 "psubw %%mm4, %%mm3 \n\t" /* - 6b +3c - d */\ | |
939 "paddw %6, %%mm1 \n\t"\ | |
940 "paddw %%mm1, %%mm3 \n\t" /* 20a - 6b +3c - d */\ | |
941 "psraw $5, %%mm3 \n\t"\ | |
942 "movq %5, %%mm1 \n\t"\ | |
943 "packuswb %%mm3, %%mm1 \n\t"\ | |
959 | 944 OP_MMX2(%%mm1, (%1),%%mm4, q)\ |
954 | 945 /* mm0= GHIJ, mm2=FGHI, mm5=HIJK, mm6=IJKL, mm7=0 */\ |
946 \ | |
2979 | 947 "movq 9(%0), %%mm1 \n\t" /* JKLMNOPQ */\ |
948 "movq %%mm1, %%mm4 \n\t" /* JKLMNOPQ */\ | |
949 "movq %%mm1, %%mm3 \n\t" /* JKLMNOPQ */\ | |
950 "psrlq $8, %%mm1 \n\t" /* KLMNOPQ0 */\ | |
951 "psrlq $16, %%mm4 \n\t" /* LMNOPQ00 */\ | |
952 "punpcklbw %%mm7, %%mm1 \n\t" /* 0K0L0M0N */\ | |
953 "punpcklbw %%mm7, %%mm4 \n\t" /* 0L0M0N0O */\ | |
954 "paddw %%mm1, %%mm5 \n\t" /* b */\ | |
955 "paddw %%mm4, %%mm0 \n\t" /* c */\ | |
956 "paddw %%mm5, %%mm5 \n\t" /* 2b */\ | |
957 "psubw %%mm5, %%mm0 \n\t" /* c - 2b */\ | |
958 "movq %%mm3, %%mm5 \n\t" /* JKLMNOPQ */\ | |
959 "psrlq $24, %%mm3 \n\t" /* MNOPQ000 */\ | |
960 "pmullw "MANGLE(ff_pw_3)", %%mm0 \n\t" /* 3c - 6b */\ | |
961 "punpcklbw %%mm7, %%mm3 \n\t" /* 0M0N0O0P */\ | |
962 "paddw %%mm3, %%mm2 \n\t" /* d */\ | |
963 "psubw %%mm2, %%mm0 \n\t" /* -6b + 3c - d */\ | |
964 "movq %%mm5, %%mm2 \n\t" /* JKLMNOPQ */\ | |
965 "punpcklbw %%mm7, %%mm2 \n\t" /* 0J0K0L0M */\ | |
966 "punpckhbw %%mm7, %%mm5 \n\t" /* 0N0O0P0Q */\ | |
967 "paddw %%mm2, %%mm6 \n\t" /* a */\ | |
968 "pmullw "MANGLE(ff_pw_20)", %%mm6 \n\t" /* 20a */\ | |
969 "paddw %6, %%mm0 \n\t"\ | |
970 "paddw %%mm6, %%mm0 \n\t" /* 20a - 6b + 3c - d */\ | |
971 "psraw $5, %%mm0 \n\t"\ | |
954 | 972 /* mm1=KLMN, mm2=JKLM, mm3=MNOP, mm4=LMNO, mm5=NOPQ mm7=0 */\ |
973 \ | |
2979 | 974 "paddw %%mm5, %%mm3 \n\t" /* a */\ |
975 "pshufw $0xF9, %%mm5, %%mm6 \n\t" /* 0O0P0Q0Q */\ | |
976 "paddw %%mm4, %%mm6 \n\t" /* b */\ | |
977 "pshufw $0xBE, %%mm5, %%mm4 \n\t" /* 0P0Q0Q0P */\ | |
978 "pshufw $0x6F, %%mm5, %%mm5 \n\t" /* 0Q0Q0P0O */\ | |
979 "paddw %%mm1, %%mm4 \n\t" /* c */\ | |
980 "paddw %%mm2, %%mm5 \n\t" /* d */\ | |
981 "paddw %%mm6, %%mm6 \n\t" /* 2b */\ | |
982 "psubw %%mm6, %%mm4 \n\t" /* c - 2b */\ | |
983 "pmullw "MANGLE(ff_pw_20)", %%mm3 \n\t" /* 20a */\ | |
984 "pmullw "MANGLE(ff_pw_3)", %%mm4 \n\t" /* 3c - 6b */\ | |
985 "psubw %%mm5, %%mm3 \n\t" /* -6b + 3c - d */\ | |
986 "paddw %6, %%mm4 \n\t"\ | |
987 "paddw %%mm3, %%mm4 \n\t" /* 20a - 6b + 3c - d */\ | |
988 "psraw $5, %%mm4 \n\t"\ | |
989 "packuswb %%mm4, %%mm0 \n\t"\ | |
959 | 990 OP_MMX2(%%mm0, 8(%1), %%mm4, q)\ |
954 | 991 \ |
2979 | 992 "add %3, %0 \n\t"\ |
993 "add %4, %1 \n\t"\ | |
994 "decl %2 \n\t"\ | |
995 " jnz 1b \n\t"\ | |
6513
713c4fd84e0b
Hardcode register to prevent aparent miscompilation.
michael
parents:
6512
diff
changeset
|
996 : "+a"(src), "+c"(dst), "+D"(h)\ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
997 : "d"((x86_reg)srcStride), "S"((x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(temp), "m"(ROUNDER)\ |
966 | 998 : "memory"\ |
954 | 999 );\ |
1000 }\ | |
1001 \ | |
1002 static void OPNAME ## mpeg4_qpel16_h_lowpass_3dnow(uint8_t *dst, uint8_t *src, int dstStride, int srcStride, int h){\ | |
1003 int i;\ | |
1004 int16_t temp[16];\ | |
1005 /* quick HACK, XXX FIXME MUST be optimized */\ | |
1006 for(i=0; i<h; i++)\ | |
1007 {\ | |
1008 temp[ 0]= (src[ 0]+src[ 1])*20 - (src[ 0]+src[ 2])*6 + (src[ 1]+src[ 3])*3 - (src[ 2]+src[ 4]);\ | |
1009 temp[ 1]= (src[ 1]+src[ 2])*20 - (src[ 0]+src[ 3])*6 + (src[ 0]+src[ 4])*3 - (src[ 1]+src[ 5]);\ | |
1010 temp[ 2]= (src[ 2]+src[ 3])*20 - (src[ 1]+src[ 4])*6 + (src[ 0]+src[ 5])*3 - (src[ 0]+src[ 6]);\ | |
1011 temp[ 3]= (src[ 3]+src[ 4])*20 - (src[ 2]+src[ 5])*6 + (src[ 1]+src[ 6])*3 - (src[ 0]+src[ 7]);\ | |
1012 temp[ 4]= (src[ 4]+src[ 5])*20 - (src[ 3]+src[ 6])*6 + (src[ 2]+src[ 7])*3 - (src[ 1]+src[ 8]);\ | |
1013 temp[ 5]= (src[ 5]+src[ 6])*20 - (src[ 4]+src[ 7])*6 + (src[ 3]+src[ 8])*3 - (src[ 2]+src[ 9]);\ | |
1014 temp[ 6]= (src[ 6]+src[ 7])*20 - (src[ 5]+src[ 8])*6 + (src[ 4]+src[ 9])*3 - (src[ 3]+src[10]);\ | |
1015 temp[ 7]= (src[ 7]+src[ 8])*20 - (src[ 6]+src[ 9])*6 + (src[ 5]+src[10])*3 - (src[ 4]+src[11]);\ | |
1016 temp[ 8]= (src[ 8]+src[ 9])*20 - (src[ 7]+src[10])*6 + (src[ 6]+src[11])*3 - (src[ 5]+src[12]);\ | |
1017 temp[ 9]= (src[ 9]+src[10])*20 - (src[ 8]+src[11])*6 + (src[ 7]+src[12])*3 - (src[ 6]+src[13]);\ | |
1018 temp[10]= (src[10]+src[11])*20 - (src[ 9]+src[12])*6 + (src[ 8]+src[13])*3 - (src[ 7]+src[14]);\ | |
1019 temp[11]= (src[11]+src[12])*20 - (src[10]+src[13])*6 + (src[ 9]+src[14])*3 - (src[ 8]+src[15]);\ | |
1020 temp[12]= (src[12]+src[13])*20 - (src[11]+src[14])*6 + (src[10]+src[15])*3 - (src[ 9]+src[16]);\ | |
1021 temp[13]= (src[13]+src[14])*20 - (src[12]+src[15])*6 + (src[11]+src[16])*3 - (src[10]+src[16]);\ | |
1022 temp[14]= (src[14]+src[15])*20 - (src[13]+src[16])*6 + (src[12]+src[16])*3 - (src[11]+src[15]);\ | |
1023 temp[15]= (src[15]+src[16])*20 - (src[14]+src[16])*6 + (src[13]+src[15])*3 - (src[12]+src[14]);\ | |
1024 asm volatile(\ | |
2979 | 1025 "movq (%0), %%mm0 \n\t"\ |
1026 "movq 8(%0), %%mm1 \n\t"\ | |
1027 "paddw %2, %%mm0 \n\t"\ | |
1028 "paddw %2, %%mm1 \n\t"\ | |
1029 "psraw $5, %%mm0 \n\t"\ | |
1030 "psraw $5, %%mm1 \n\t"\ | |
1031 "packuswb %%mm1, %%mm0 \n\t"\ | |
959 | 1032 OP_3DNOW(%%mm0, (%1), %%mm1, q)\ |
2979 | 1033 "movq 16(%0), %%mm0 \n\t"\ |
1034 "movq 24(%0), %%mm1 \n\t"\ | |
1035 "paddw %2, %%mm0 \n\t"\ | |
1036 "paddw %2, %%mm1 \n\t"\ | |
1037 "psraw $5, %%mm0 \n\t"\ | |
1038 "psraw $5, %%mm1 \n\t"\ | |
1039 "packuswb %%mm1, %%mm0 \n\t"\ | |
959 | 1040 OP_3DNOW(%%mm0, 8(%1), %%mm1, q)\ |
954 | 1041 :: "r"(temp), "r"(dst), "m"(ROUNDER)\ |
966 | 1042 : "memory"\ |
954 | 1043 );\ |
1044 dst+=dstStride;\ | |
1045 src+=srcStride;\ | |
1046 }\ | |
1047 }\ | |
1048 \ | |
1057 | 1049 static void OPNAME ## mpeg4_qpel8_h_lowpass_mmx2(uint8_t *dst, uint8_t *src, int dstStride, int srcStride, int h){\ |
959 | 1050 asm volatile(\ |
2979 | 1051 "pxor %%mm7, %%mm7 \n\t"\ |
1052 "1: \n\t"\ | |
1053 "movq (%0), %%mm0 \n\t" /* ABCDEFGH */\ | |
1054 "movq %%mm0, %%mm1 \n\t" /* ABCDEFGH */\ | |
1055 "movq %%mm0, %%mm2 \n\t" /* ABCDEFGH */\ | |
1056 "punpcklbw %%mm7, %%mm0 \n\t" /* 0A0B0C0D */\ | |
1057 "punpckhbw %%mm7, %%mm1 \n\t" /* 0E0F0G0H */\ | |
1058 "pshufw $0x90, %%mm0, %%mm5 \n\t" /* 0A0A0B0C */\ | |
1059 "pshufw $0x41, %%mm0, %%mm6 \n\t" /* 0B0A0A0B */\ | |
1060 "movq %%mm2, %%mm3 \n\t" /* ABCDEFGH */\ | |
1061 "movq %%mm2, %%mm4 \n\t" /* ABCDEFGH */\ | |
1062 "psllq $8, %%mm2 \n\t" /* 0ABCDEFG */\ | |
1063 "psllq $16, %%mm3 \n\t" /* 00ABCDEF */\ | |
1064 "psllq $24, %%mm4 \n\t" /* 000ABCDE */\ | |
1065 "punpckhbw %%mm7, %%mm2 \n\t" /* 0D0E0F0G */\ | |
1066 "punpckhbw %%mm7, %%mm3 \n\t" /* 0C0D0E0F */\ | |
1067 "punpckhbw %%mm7, %%mm4 \n\t" /* 0B0C0D0E */\ | |
1068 "paddw %%mm3, %%mm5 \n\t" /* b */\ | |
1069 "paddw %%mm2, %%mm6 \n\t" /* c */\ | |
1070 "paddw %%mm5, %%mm5 \n\t" /* 2b */\ | |
1071 "psubw %%mm5, %%mm6 \n\t" /* c - 2b */\ | |
1072 "pshufw $0x06, %%mm0, %%mm5 \n\t" /* 0C0B0A0A */\ | |
1073 "pmullw "MANGLE(ff_pw_3)", %%mm6 \n\t" /* 3c - 6b */\ | |
1074 "paddw %%mm4, %%mm0 \n\t" /* a */\ | |
1075 "paddw %%mm1, %%mm5 \n\t" /* d */\ | |
1076 "pmullw "MANGLE(ff_pw_20)", %%mm0 \n\t" /* 20a */\ | |
1077 "psubw %%mm5, %%mm0 \n\t" /* 20a - d */\ | |
6512 | 1078 "paddw %5, %%mm6 \n\t"\ |
2979 | 1079 "paddw %%mm6, %%mm0 \n\t" /* 20a - 6b + 3c - d */\ |
1080 "psraw $5, %%mm0 \n\t"\ | |
959 | 1081 /* mm1=EFGH, mm2=DEFG, mm3=CDEF, mm4=BCDE, mm7=0 */\ |
1082 \ | |
2979 | 1083 "movd 5(%0), %%mm5 \n\t" /* FGHI */\ |
1084 "punpcklbw %%mm7, %%mm5 \n\t" /* 0F0G0H0I */\ | |
1085 "pshufw $0xF9, %%mm5, %%mm6 \n\t" /* 0G0H0I0I */\ | |
1086 "paddw %%mm5, %%mm1 \n\t" /* a */\ | |
1087 "paddw %%mm6, %%mm2 \n\t" /* b */\ | |
1088 "pshufw $0xBE, %%mm5, %%mm6 \n\t" /* 0H0I0I0H */\ | |
1089 "pshufw $0x6F, %%mm5, %%mm5 \n\t" /* 0I0I0H0G */\ | |
1090 "paddw %%mm6, %%mm3 \n\t" /* c */\ | |
1091 "paddw %%mm5, %%mm4 \n\t" /* d */\ | |
1092 "paddw %%mm2, %%mm2 \n\t" /* 2b */\ | |
1093 "psubw %%mm2, %%mm3 \n\t" /* c - 2b */\ | |
1094 "pmullw "MANGLE(ff_pw_20)", %%mm1 \n\t" /* 20a */\ | |
1095 "pmullw "MANGLE(ff_pw_3)", %%mm3 \n\t" /* 3c - 6b */\ | |
1096 "psubw %%mm4, %%mm3 \n\t" /* -6b + 3c - d */\ | |
6512 | 1097 "paddw %5, %%mm1 \n\t"\ |
2979 | 1098 "paddw %%mm1, %%mm3 \n\t" /* 20a - 6b + 3c - d */\ |
1099 "psraw $5, %%mm3 \n\t"\ | |
1100 "packuswb %%mm3, %%mm0 \n\t"\ | |
959 | 1101 OP_MMX2(%%mm0, (%1), %%mm4, q)\ |
1102 \ | |
2979 | 1103 "add %3, %0 \n\t"\ |
1104 "add %4, %1 \n\t"\ | |
1105 "decl %2 \n\t"\ | |
1106 " jnz 1b \n\t"\ | |
6513
713c4fd84e0b
Hardcode register to prevent aparent miscompilation.
michael
parents:
6512
diff
changeset
|
1107 : "+a"(src), "+c"(dst), "+d"(h)\ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1108 : "S"((x86_reg)srcStride), "D"((x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(ROUNDER)\ |
966 | 1109 : "memory"\ |
959 | 1110 );\ |
1111 }\ | |
1112 \ | |
1113 static void OPNAME ## mpeg4_qpel8_h_lowpass_3dnow(uint8_t *dst, uint8_t *src, int dstStride, int srcStride, int h){\ | |
1114 int i;\ | |
1115 int16_t temp[8];\ | |
1116 /* quick HACK, XXX FIXME MUST be optimized */\ | |
1117 for(i=0; i<h; i++)\ | |
1118 {\ | |
1119 temp[ 0]= (src[ 0]+src[ 1])*20 - (src[ 0]+src[ 2])*6 + (src[ 1]+src[ 3])*3 - (src[ 2]+src[ 4]);\ | |
1120 temp[ 1]= (src[ 1]+src[ 2])*20 - (src[ 0]+src[ 3])*6 + (src[ 0]+src[ 4])*3 - (src[ 1]+src[ 5]);\ | |
1121 temp[ 2]= (src[ 2]+src[ 3])*20 - (src[ 1]+src[ 4])*6 + (src[ 0]+src[ 5])*3 - (src[ 0]+src[ 6]);\ | |
1122 temp[ 3]= (src[ 3]+src[ 4])*20 - (src[ 2]+src[ 5])*6 + (src[ 1]+src[ 6])*3 - (src[ 0]+src[ 7]);\ | |
1123 temp[ 4]= (src[ 4]+src[ 5])*20 - (src[ 3]+src[ 6])*6 + (src[ 2]+src[ 7])*3 - (src[ 1]+src[ 8]);\ | |
1124 temp[ 5]= (src[ 5]+src[ 6])*20 - (src[ 4]+src[ 7])*6 + (src[ 3]+src[ 8])*3 - (src[ 2]+src[ 8]);\ | |
1125 temp[ 6]= (src[ 6]+src[ 7])*20 - (src[ 5]+src[ 8])*6 + (src[ 4]+src[ 8])*3 - (src[ 3]+src[ 7]);\ | |
1126 temp[ 7]= (src[ 7]+src[ 8])*20 - (src[ 6]+src[ 8])*6 + (src[ 5]+src[ 7])*3 - (src[ 4]+src[ 6]);\ | |
1127 asm volatile(\ | |
2979 | 1128 "movq (%0), %%mm0 \n\t"\ |
1129 "movq 8(%0), %%mm1 \n\t"\ | |
1130 "paddw %2, %%mm0 \n\t"\ | |
1131 "paddw %2, %%mm1 \n\t"\ | |
1132 "psraw $5, %%mm0 \n\t"\ | |
1133 "psraw $5, %%mm1 \n\t"\ | |
1134 "packuswb %%mm1, %%mm0 \n\t"\ | |
959 | 1135 OP_3DNOW(%%mm0, (%1), %%mm1, q)\ |
1136 :: "r"(temp), "r"(dst), "m"(ROUNDER)\ | |
966 | 1137 :"memory"\ |
959 | 1138 );\ |
1139 dst+=dstStride;\ | |
1140 src+=srcStride;\ | |
1141 }\ | |
1142 } | |
1143 | |
1144 #define QPEL_OP(OPNAME, ROUNDER, RND, OP, MMX)\ | |
1145 \ | |
1146 static void OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(uint8_t *dst, uint8_t *src, int dstStride, int srcStride){\ | |
954 | 1147 uint64_t temp[17*4];\ |
1148 uint64_t *temp_ptr= temp;\ | |
1149 int count= 17;\ | |
1150 \ | |
1151 /*FIXME unroll */\ | |
1152 asm volatile(\ | |
2979 | 1153 "pxor %%mm7, %%mm7 \n\t"\ |
1154 "1: \n\t"\ | |
1155 "movq (%0), %%mm0 \n\t"\ | |
1156 "movq (%0), %%mm1 \n\t"\ | |
1157 "movq 8(%0), %%mm2 \n\t"\ | |
1158 "movq 8(%0), %%mm3 \n\t"\ | |
1159 "punpcklbw %%mm7, %%mm0 \n\t"\ | |
1160 "punpckhbw %%mm7, %%mm1 \n\t"\ | |
1161 "punpcklbw %%mm7, %%mm2 \n\t"\ | |
1162 "punpckhbw %%mm7, %%mm3 \n\t"\ | |
1163 "movq %%mm0, (%1) \n\t"\ | |
1164 "movq %%mm1, 17*8(%1) \n\t"\ | |
1165 "movq %%mm2, 2*17*8(%1) \n\t"\ | |
1166 "movq %%mm3, 3*17*8(%1) \n\t"\ | |
1167 "add $8, %1 \n\t"\ | |
1168 "add %3, %0 \n\t"\ | |
1169 "decl %2 \n\t"\ | |
1170 " jnz 1b \n\t"\ | |
954 | 1171 : "+r" (src), "+r" (temp_ptr), "+r"(count)\ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1172 : "r" ((x86_reg)srcStride)\ |
966 | 1173 : "memory"\ |
954 | 1174 );\ |
1175 \ | |
1176 temp_ptr= temp;\ | |
1177 count=4;\ | |
1178 \ | |
1179 /*FIXME reorder for speed */\ | |
1180 asm volatile(\ | |
2979 | 1181 /*"pxor %%mm7, %%mm7 \n\t"*/\ |
1182 "1: \n\t"\ | |
1183 "movq (%0), %%mm0 \n\t"\ | |
1184 "movq 8(%0), %%mm1 \n\t"\ | |
1185 "movq 16(%0), %%mm2 \n\t"\ | |
1186 "movq 24(%0), %%mm3 \n\t"\ | |
961 | 1187 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 16(%0), 8(%0), (%0), 32(%0), (%1), OP)\ |
1188 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 8(%0), (%0), (%0), 40(%0), (%1, %3), OP)\ | |
2979 | 1189 "add %4, %1 \n\t"\ |
961 | 1190 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, (%0), (%0), 8(%0), 48(%0), (%1), OP)\ |
954 | 1191 \ |
961 | 1192 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, (%0), 8(%0), 16(%0), 56(%0), (%1, %3), OP)\ |
2979 | 1193 "add %4, %1 \n\t"\ |
961 | 1194 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 8(%0), 16(%0), 24(%0), 64(%0), (%1), OP)\ |
1195 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 16(%0), 24(%0), 32(%0), 72(%0), (%1, %3), OP)\ | |
2979 | 1196 "add %4, %1 \n\t"\ |
961 | 1197 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, 24(%0), 32(%0), 40(%0), 80(%0), (%1), OP)\ |
1198 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, 32(%0), 40(%0), 48(%0), 88(%0), (%1, %3), OP)\ | |
2979 | 1199 "add %4, %1 \n\t"\ |
961 | 1200 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 40(%0), 48(%0), 56(%0), 96(%0), (%1), OP)\ |
1201 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 48(%0), 56(%0), 64(%0),104(%0), (%1, %3), OP)\ | |
2979 | 1202 "add %4, %1 \n\t"\ |
961 | 1203 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, 56(%0), 64(%0), 72(%0),112(%0), (%1), OP)\ |
1204 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, 64(%0), 72(%0), 80(%0),120(%0), (%1, %3), OP)\ | |
2979 | 1205 "add %4, %1 \n\t"\ |
961 | 1206 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 72(%0), 80(%0), 88(%0),128(%0), (%1), OP)\ |
954 | 1207 \ |
961 | 1208 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 80(%0), 88(%0), 96(%0),128(%0), (%1, %3), OP)\ |
2979 | 1209 "add %4, %1 \n\t" \ |
961 | 1210 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, 88(%0), 96(%0),104(%0),120(%0), (%1), OP)\ |
1211 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, 96(%0),104(%0),112(%0),112(%0), (%1, %3), OP)\ | |
954 | 1212 \ |
2979 | 1213 "add $136, %0 \n\t"\ |
1214 "add %6, %1 \n\t"\ | |
1215 "decl %2 \n\t"\ | |
1216 " jnz 1b \n\t"\ | |
958
9bb668034ecf
slowdown / gcc 2.95.* bug workaround (this should be reversed as soon as gcc 2.95.* support is droped)
michaelni
parents:
954
diff
changeset
|
1217 \ |
967 | 1218 : "+r"(temp_ptr), "+r"(dst), "+g"(count)\ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1219 : "r"((x86_reg)dstStride), "r"(2*(x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(ROUNDER), "g"(4-14*(x86_reg)dstStride)\ |
966 | 1220 :"memory"\ |
954 | 1221 );\ |
1222 }\ | |
1223 \ | |
1057 | 1224 static void OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(uint8_t *dst, uint8_t *src, int dstStride, int srcStride){\ |
2209 | 1225 uint64_t temp[9*2];\ |
954 | 1226 uint64_t *temp_ptr= temp;\ |
1227 int count= 9;\ | |
1228 \ | |
1229 /*FIXME unroll */\ | |
1230 asm volatile(\ | |
2979 | 1231 "pxor %%mm7, %%mm7 \n\t"\ |
1232 "1: \n\t"\ | |
1233 "movq (%0), %%mm0 \n\t"\ | |
1234 "movq (%0), %%mm1 \n\t"\ | |
1235 "punpcklbw %%mm7, %%mm0 \n\t"\ | |
1236 "punpckhbw %%mm7, %%mm1 \n\t"\ | |
1237 "movq %%mm0, (%1) \n\t"\ | |
1238 "movq %%mm1, 9*8(%1) \n\t"\ | |
1239 "add $8, %1 \n\t"\ | |
1240 "add %3, %0 \n\t"\ | |
1241 "decl %2 \n\t"\ | |
1242 " jnz 1b \n\t"\ | |
954 | 1243 : "+r" (src), "+r" (temp_ptr), "+r"(count)\ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1244 : "r" ((x86_reg)srcStride)\ |
966 | 1245 : "memory"\ |
954 | 1246 );\ |
1247 \ | |
1248 temp_ptr= temp;\ | |
1249 count=2;\ | |
1250 \ | |
1251 /*FIXME reorder for speed */\ | |
1252 asm volatile(\ | |
2979 | 1253 /*"pxor %%mm7, %%mm7 \n\t"*/\ |
1254 "1: \n\t"\ | |
1255 "movq (%0), %%mm0 \n\t"\ | |
1256 "movq 8(%0), %%mm1 \n\t"\ | |
1257 "movq 16(%0), %%mm2 \n\t"\ | |
1258 "movq 24(%0), %%mm3 \n\t"\ | |
961 | 1259 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 16(%0), 8(%0), (%0), 32(%0), (%1), OP)\ |
1260 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 8(%0), (%0), (%0), 40(%0), (%1, %3), OP)\ | |
2979 | 1261 "add %4, %1 \n\t"\ |
961 | 1262 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, (%0), (%0), 8(%0), 48(%0), (%1), OP)\ |
954 | 1263 \ |
961 | 1264 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, (%0), 8(%0), 16(%0), 56(%0), (%1, %3), OP)\ |
2979 | 1265 "add %4, %1 \n\t"\ |
961 | 1266 QPEL_V_LOW(%%mm0, %%mm1, %%mm2, %%mm3, %5, %6, %5, 8(%0), 16(%0), 24(%0), 64(%0), (%1), OP)\ |
954 | 1267 \ |
961 | 1268 QPEL_V_LOW(%%mm1, %%mm2, %%mm3, %%mm0, %5, %6, %5, 16(%0), 24(%0), 32(%0), 64(%0), (%1, %3), OP)\ |
2979 | 1269 "add %4, %1 \n\t"\ |
961 | 1270 QPEL_V_LOW(%%mm2, %%mm3, %%mm0, %%mm1, %5, %6, %5, 24(%0), 32(%0), 40(%0), 56(%0), (%1), OP)\ |
1271 QPEL_V_LOW(%%mm3, %%mm0, %%mm1, %%mm2, %5, %6, %5, 32(%0), 40(%0), 48(%0), 48(%0), (%1, %3), OP)\ | |
954 | 1272 \ |
2979 | 1273 "add $72, %0 \n\t"\ |
1274 "add %6, %1 \n\t"\ | |
1275 "decl %2 \n\t"\ | |
1276 " jnz 1b \n\t"\ | |
954 | 1277 \ |
961 | 1278 : "+r"(temp_ptr), "+r"(dst), "+g"(count)\ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1279 : "r"((x86_reg)dstStride), "r"(2*(x86_reg)dstStride), /*"m"(ff_pw_20), "m"(ff_pw_3),*/ "m"(ROUNDER), "g"(4-6*(x86_reg)dstStride)\ |
966 | 1280 : "memory"\ |
1281 );\ | |
959 | 1282 }\ |
954 | 1283 \ |
1064 | 1284 static void OPNAME ## qpel8_mc00_ ## MMX (uint8_t *dst, uint8_t *src, int stride){\ |
6321 | 1285 OPNAME ## pixels8_ ## MMX(dst, src, stride, 8);\ |
954 | 1286 }\ |
1287 \ | |
1064 | 1288 static void OPNAME ## qpel8_mc10_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1289 uint64_t temp[8];\ |
954 | 1290 uint8_t * const half= (uint8_t*)temp;\ |
1291 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(half, src, 8, stride, 8);\ | |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1292 OPNAME ## pixels8_l2_ ## MMX(dst, src, half, stride, stride, 8);\ |
954 | 1293 }\ |
1294 \ | |
1064 | 1295 static void OPNAME ## qpel8_mc20_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1296 OPNAME ## mpeg4_qpel8_h_lowpass_ ## MMX(dst, src, stride, stride, 8);\ |
1297 }\ | |
1298 \ | |
1064 | 1299 static void OPNAME ## qpel8_mc30_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1300 uint64_t temp[8];\ |
954 | 1301 uint8_t * const half= (uint8_t*)temp;\ |
1302 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(half, src, 8, stride, 8);\ | |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1303 OPNAME ## pixels8_l2_ ## MMX(dst, src+1, half, stride, stride, 8);\ |
954 | 1304 }\ |
1305 \ | |
1064 | 1306 static void OPNAME ## qpel8_mc01_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1307 uint64_t temp[8];\ |
954 | 1308 uint8_t * const half= (uint8_t*)temp;\ |
959 | 1309 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(half, src, 8, stride);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1310 OPNAME ## pixels8_l2_ ## MMX(dst, src, half, stride, stride, 8);\ |
954 | 1311 }\ |
1312 \ | |
1064 | 1313 static void OPNAME ## qpel8_mc02_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
959 | 1314 OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(dst, src, stride, stride);\ |
954 | 1315 }\ |
1316 \ | |
1064 | 1317 static void OPNAME ## qpel8_mc03_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1318 uint64_t temp[8];\ |
954 | 1319 uint8_t * const half= (uint8_t*)temp;\ |
959 | 1320 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(half, src, 8, stride);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1321 OPNAME ## pixels8_l2_ ## MMX(dst, src+stride, half, stride, stride, 8);\ |
954 | 1322 }\ |
1064 | 1323 static void OPNAME ## qpel8_mc11_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1324 uint64_t half[8 + 9];\ |
1325 uint8_t * const halfH= ((uint8_t*)half) + 64;\ | |
1326 uint8_t * const halfHV= ((uint8_t*)half);\ | |
954 | 1327 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1328 put ## RND ## pixels8_l2_ ## MMX(halfH, src, halfH, 8, stride, 9);\ |
959 | 1329 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1330 OPNAME ## pixels8_l2_ ## MMX(dst, halfH, halfHV, stride, 8, 8);\ |
954 | 1331 }\ |
1064 | 1332 static void OPNAME ## qpel8_mc31_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1333 uint64_t half[8 + 9];\ |
1334 uint8_t * const halfH= ((uint8_t*)half) + 64;\ | |
1335 uint8_t * const halfHV= ((uint8_t*)half);\ | |
954 | 1336 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1337 put ## RND ## pixels8_l2_ ## MMX(halfH, src+1, halfH, 8, stride, 9);\ |
959 | 1338 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1339 OPNAME ## pixels8_l2_ ## MMX(dst, halfH, halfHV, stride, 8, 8);\ |
954 | 1340 }\ |
1064 | 1341 static void OPNAME ## qpel8_mc13_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1342 uint64_t half[8 + 9];\ |
1343 uint8_t * const halfH= ((uint8_t*)half) + 64;\ | |
1344 uint8_t * const halfHV= ((uint8_t*)half);\ | |
954 | 1345 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1346 put ## RND ## pixels8_l2_ ## MMX(halfH, src, halfH, 8, stride, 9);\ |
959 | 1347 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1348 OPNAME ## pixels8_l2_ ## MMX(dst, halfH+8, halfHV, stride, 8, 8);\ |
954 | 1349 }\ |
1064 | 1350 static void OPNAME ## qpel8_mc33_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1351 uint64_t half[8 + 9];\ |
1352 uint8_t * const halfH= ((uint8_t*)half) + 64;\ | |
1353 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1354 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1355 put ## RND ## pixels8_l2_ ## MMX(halfH, src+1, halfH, 8, stride, 9);\ |
959 | 1356 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1357 OPNAME ## pixels8_l2_ ## MMX(dst, halfH+8, halfHV, stride, 8, 8);\ |
954 | 1358 }\ |
1064 | 1359 static void OPNAME ## qpel8_mc21_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1360 uint64_t half[8 + 9];\ |
954 | 1361 uint8_t * const halfH= ((uint8_t*)half) + 64;\ |
1362 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1363 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
959 | 1364 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1365 OPNAME ## pixels8_l2_ ## MMX(dst, halfH, halfHV, stride, 8, 8);\ |
954 | 1366 }\ |
1064 | 1367 static void OPNAME ## qpel8_mc23_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1368 uint64_t half[8 + 9];\ |
954 | 1369 uint8_t * const halfH= ((uint8_t*)half) + 64;\ |
1370 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1371 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
959 | 1372 put ## RND ## mpeg4_qpel8_v_lowpass_ ## MMX(halfHV, halfH, 8, 8);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1373 OPNAME ## pixels8_l2_ ## MMX(dst, halfH+8, halfHV, stride, 8, 8);\ |
954 | 1374 }\ |
1064 | 1375 static void OPNAME ## qpel8_mc12_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1376 uint64_t half[8 + 9];\ |
1377 uint8_t * const halfH= ((uint8_t*)half);\ | |
954 | 1378 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1379 put ## RND ## pixels8_l2_ ## MMX(halfH, src, halfH, 8, stride, 9);\ |
984 | 1380 OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(dst, halfH, stride, 8);\ |
954 | 1381 }\ |
1064 | 1382 static void OPNAME ## qpel8_mc32_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1383 uint64_t half[8 + 9];\ |
1384 uint8_t * const halfH= ((uint8_t*)half);\ | |
954 | 1385 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1386 put ## RND ## pixels8_l2_ ## MMX(halfH, src+1, halfH, 8, stride, 9);\ |
984 | 1387 OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(dst, halfH, stride, 8);\ |
954 | 1388 }\ |
1064 | 1389 static void OPNAME ## qpel8_mc22_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1390 uint64_t half[9];\ |
954 | 1391 uint8_t * const halfH= ((uint8_t*)half);\ |
1392 put ## RND ## mpeg4_qpel8_h_lowpass_ ## MMX(halfH, src, 8, stride, 9);\ | |
959 | 1393 OPNAME ## mpeg4_qpel8_v_lowpass_ ## MMX(dst, halfH, stride, 8);\ |
954 | 1394 }\ |
1064 | 1395 static void OPNAME ## qpel16_mc00_ ## MMX (uint8_t *dst, uint8_t *src, int stride){\ |
6321 | 1396 OPNAME ## pixels16_ ## MMX(dst, src, stride, 16);\ |
954 | 1397 }\ |
1398 \ | |
1064 | 1399 static void OPNAME ## qpel16_mc10_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1400 uint64_t temp[32];\ |
1401 uint8_t * const half= (uint8_t*)temp;\ | |
1402 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(half, src, 16, stride, 16);\ | |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1403 OPNAME ## pixels16_l2_ ## MMX(dst, src, half, stride, stride, 16);\ |
954 | 1404 }\ |
1405 \ | |
1064 | 1406 static void OPNAME ## qpel16_mc20_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1407 OPNAME ## mpeg4_qpel16_h_lowpass_ ## MMX(dst, src, stride, stride, 16);\ |
1408 }\ | |
1409 \ | |
1064 | 1410 static void OPNAME ## qpel16_mc30_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1411 uint64_t temp[32];\ |
1412 uint8_t * const half= (uint8_t*)temp;\ | |
1413 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(half, src, 16, stride, 16);\ | |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1414 OPNAME ## pixels16_l2_ ## MMX(dst, src+1, half, stride, stride, 16);\ |
954 | 1415 }\ |
1416 \ | |
1064 | 1417 static void OPNAME ## qpel16_mc01_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1418 uint64_t temp[32];\ |
1419 uint8_t * const half= (uint8_t*)temp;\ | |
959 | 1420 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(half, src, 16, stride);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1421 OPNAME ## pixels16_l2_ ## MMX(dst, src, half, stride, stride, 16);\ |
954 | 1422 }\ |
1423 \ | |
1064 | 1424 static void OPNAME ## qpel16_mc02_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
959 | 1425 OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(dst, src, stride, stride);\ |
954 | 1426 }\ |
1427 \ | |
1064 | 1428 static void OPNAME ## qpel16_mc03_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1429 uint64_t temp[32];\ |
1430 uint8_t * const half= (uint8_t*)temp;\ | |
959 | 1431 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(half, src, 16, stride);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1432 OPNAME ## pixels16_l2_ ## MMX(dst, src+stride, half, stride, stride, 16);\ |
954 | 1433 }\ |
1064 | 1434 static void OPNAME ## qpel16_mc11_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1435 uint64_t half[16*2 + 17*2];\ |
1436 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1437 uint8_t * const halfHV= ((uint8_t*)half);\ | |
954 | 1438 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1439 put ## RND ## pixels16_l2_ ## MMX(halfH, src, halfH, 16, stride, 17);\ |
959 | 1440 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1441 OPNAME ## pixels16_l2_ ## MMX(dst, halfH, halfHV, stride, 16, 16);\ |
954 | 1442 }\ |
1064 | 1443 static void OPNAME ## qpel16_mc31_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1444 uint64_t half[16*2 + 17*2];\ |
1445 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1446 uint8_t * const halfHV= ((uint8_t*)half);\ | |
954 | 1447 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1448 put ## RND ## pixels16_l2_ ## MMX(halfH, src+1, halfH, 16, stride, 17);\ |
959 | 1449 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1450 OPNAME ## pixels16_l2_ ## MMX(dst, halfH, halfHV, stride, 16, 16);\ |
954 | 1451 }\ |
1064 | 1452 static void OPNAME ## qpel16_mc13_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1453 uint64_t half[16*2 + 17*2];\ |
1454 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1455 uint8_t * const halfHV= ((uint8_t*)half);\ | |
954 | 1456 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1457 put ## RND ## pixels16_l2_ ## MMX(halfH, src, halfH, 16, stride, 17);\ |
959 | 1458 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1459 OPNAME ## pixels16_l2_ ## MMX(dst, halfH+16, halfHV, stride, 16, 16);\ |
954 | 1460 }\ |
1064 | 1461 static void OPNAME ## qpel16_mc33_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1462 uint64_t half[16*2 + 17*2];\ |
1463 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1464 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1465 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1466 put ## RND ## pixels16_l2_ ## MMX(halfH, src+1, halfH, 16, stride, 17);\ |
959 | 1467 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1468 OPNAME ## pixels16_l2_ ## MMX(dst, halfH+16, halfHV, stride, 16, 16);\ |
954 | 1469 }\ |
1064 | 1470 static void OPNAME ## qpel16_mc21_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1471 uint64_t half[16*2 + 17*2];\ |
1472 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1473 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1474 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
959 | 1475 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1476 OPNAME ## pixels16_l2_ ## MMX(dst, halfH, halfHV, stride, 16, 16);\ |
954 | 1477 }\ |
1064 | 1478 static void OPNAME ## qpel16_mc23_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1479 uint64_t half[16*2 + 17*2];\ |
1480 uint8_t * const halfH= ((uint8_t*)half) + 256;\ | |
1481 uint8_t * const halfHV= ((uint8_t*)half);\ | |
1482 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
959 | 1483 put ## RND ## mpeg4_qpel16_v_lowpass_ ## MMX(halfHV, halfH, 16, 16);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1484 OPNAME ## pixels16_l2_ ## MMX(dst, halfH+16, halfHV, stride, 16, 16);\ |
954 | 1485 }\ |
1064 | 1486 static void OPNAME ## qpel16_mc12_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1487 uint64_t half[17*2];\ |
1488 uint8_t * const halfH= ((uint8_t*)half);\ | |
954 | 1489 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1490 put ## RND ## pixels16_l2_ ## MMX(halfH, src, halfH, 16, stride, 17);\ |
984 | 1491 OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(dst, halfH, stride, 16);\ |
954 | 1492 }\ |
1064 | 1493 static void OPNAME ## qpel16_mc32_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
984 | 1494 uint64_t half[17*2];\ |
1495 uint8_t * const halfH= ((uint8_t*)half);\ | |
954 | 1496 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ |
2207
22b768f1261a
10000l fix and use more mmx2/3dnow code for mpeg4 qpel which has been written and commited long time ago but appearently never used, qpel motion compensation is 5% faster
michael
parents:
2067
diff
changeset
|
1497 put ## RND ## pixels16_l2_ ## MMX(halfH, src+1, halfH, 16, stride, 17);\ |
984 | 1498 OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(dst, halfH, stride, 16);\ |
954 | 1499 }\ |
1064 | 1500 static void OPNAME ## qpel16_mc22_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
954 | 1501 uint64_t half[17*2];\ |
1502 uint8_t * const halfH= ((uint8_t*)half);\ | |
1503 put ## RND ## mpeg4_qpel16_h_lowpass_ ## MMX(halfH, src, 16, stride, 17);\ | |
959 | 1504 OPNAME ## mpeg4_qpel16_v_lowpass_ ## MMX(dst, halfH, stride, 16);\ |
954 | 1505 } |
1506 | |
2979 | 1507 #define PUT_OP(a,b,temp, size) "mov" #size " " #a ", " #b " \n\t" |
959 | 1508 #define AVG_3DNOW_OP(a,b,temp, size) \ |
2979 | 1509 "mov" #size " " #b ", " #temp " \n\t"\ |
1510 "pavgusb " #temp ", " #a " \n\t"\ | |
1511 "mov" #size " " #a ", " #b " \n\t" | |
959 | 1512 #define AVG_MMX2_OP(a,b,temp, size) \ |
2979 | 1513 "mov" #size " " #b ", " #temp " \n\t"\ |
1514 "pavgb " #temp ", " #a " \n\t"\ | |
1515 "mov" #size " " #a ", " #b " \n\t" | |
959 | 1516 |
1517 QPEL_BASE(put_ , ff_pw_16, _ , PUT_OP, PUT_OP) | |
1518 QPEL_BASE(avg_ , ff_pw_16, _ , AVG_MMX2_OP, AVG_3DNOW_OP) | |
1519 QPEL_BASE(put_no_rnd_, ff_pw_15, _no_rnd_, PUT_OP, PUT_OP) | |
1520 QPEL_OP(put_ , ff_pw_16, _ , PUT_OP, 3dnow) | |
1521 QPEL_OP(avg_ , ff_pw_16, _ , AVG_3DNOW_OP, 3dnow) | |
1522 QPEL_OP(put_no_rnd_, ff_pw_15, _no_rnd_, PUT_OP, 3dnow) | |
954 | 1523 QPEL_OP(put_ , ff_pw_16, _ , PUT_OP, mmx2) |
959 | 1524 QPEL_OP(avg_ , ff_pw_16, _ , AVG_MMX2_OP, mmx2) |
954 | 1525 QPEL_OP(put_no_rnd_, ff_pw_15, _no_rnd_, PUT_OP, mmx2) |
1526 | |
3807
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1527 /***********************************/ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1528 /* bilinear qpel: not compliant to any spec, only for -lavdopts fast */ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1529 |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1530 #define QPEL_2TAP_XY(OPNAME, SIZE, MMX, XY, HPEL)\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1531 static void OPNAME ## 2tap_qpel ## SIZE ## _mc ## XY ## _ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1532 OPNAME ## pixels ## SIZE ## HPEL(dst, src, stride, SIZE);\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1533 } |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1534 #define QPEL_2TAP_L3(OPNAME, SIZE, MMX, XY, S0, S1, S2)\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1535 static void OPNAME ## 2tap_qpel ## SIZE ## _mc ## XY ## _ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1536 OPNAME ## 2tap_qpel ## SIZE ## _l3_ ## MMX(dst, src+S0, stride, SIZE, S1, S2);\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1537 } |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1538 |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1539 #define QPEL_2TAP(OPNAME, SIZE, MMX)\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1540 QPEL_2TAP_XY(OPNAME, SIZE, MMX, 20, _x2_ ## MMX)\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1541 QPEL_2TAP_XY(OPNAME, SIZE, MMX, 02, _y2_ ## MMX)\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1542 QPEL_2TAP_XY(OPNAME, SIZE, MMX, 22, _xy2_mmx)\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1543 static const qpel_mc_func OPNAME ## 2tap_qpel ## SIZE ## _mc00_ ## MMX =\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1544 OPNAME ## qpel ## SIZE ## _mc00_ ## MMX;\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1545 static const qpel_mc_func OPNAME ## 2tap_qpel ## SIZE ## _mc21_ ## MMX =\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1546 OPNAME ## 2tap_qpel ## SIZE ## _mc20_ ## MMX;\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1547 static const qpel_mc_func OPNAME ## 2tap_qpel ## SIZE ## _mc12_ ## MMX =\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1548 OPNAME ## 2tap_qpel ## SIZE ## _mc02_ ## MMX;\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1549 static void OPNAME ## 2tap_qpel ## SIZE ## _mc32_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1550 OPNAME ## pixels ## SIZE ## _y2_ ## MMX(dst, src+1, stride, SIZE);\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1551 }\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1552 static void OPNAME ## 2tap_qpel ## SIZE ## _mc23_ ## MMX(uint8_t *dst, uint8_t *src, int stride){\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1553 OPNAME ## pixels ## SIZE ## _x2_ ## MMX(dst, src+stride, stride, SIZE);\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1554 }\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1555 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 10, 0, 1, 0)\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1556 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 30, 1, -1, 0)\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1557 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 01, 0, stride, 0)\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1558 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 03, stride, -stride, 0)\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1559 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 11, 0, stride, 1)\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1560 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 31, 1, stride, -1)\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1561 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 13, stride, -stride, 1)\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1562 QPEL_2TAP_L3(OPNAME, SIZE, MMX, 33, stride+1, -stride, -1)\ |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1563 |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1564 QPEL_2TAP(put_, 16, mmx2) |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1565 QPEL_2TAP(avg_, 16, mmx2) |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1566 QPEL_2TAP(put_, 8, mmx2) |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1567 QPEL_2TAP(avg_, 8, mmx2) |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1568 QPEL_2TAP(put_, 16, 3dnow) |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1569 QPEL_2TAP(avg_, 16, 3dnow) |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1570 QPEL_2TAP(put_, 8, 3dnow) |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1571 QPEL_2TAP(avg_, 8, 3dnow) |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1572 |
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
1573 |
393 | 1574 #if 0 |
247
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
1575 static void just_return() { return; } |
393 | 1576 #endif |
247
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
1577 |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1578 static void gmc_mmx(uint8_t *dst, uint8_t *src, int stride, int h, int ox, int oy, |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1579 int dxx, int dxy, int dyx, int dyy, int shift, int r, int width, int height){ |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1580 const int w = 8; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1581 const int ix = ox>>(16+shift); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1582 const int iy = oy>>(16+shift); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1583 const int oxs = ox>>4; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1584 const int oys = oy>>4; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1585 const int dxxs = dxx>>4; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1586 const int dxys = dxy>>4; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1587 const int dyxs = dyx>>4; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1588 const int dyys = dyy>>4; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1589 const uint16_t r4[4] = {r,r,r,r}; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1590 const uint16_t dxy4[4] = {dxys,dxys,dxys,dxys}; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1591 const uint16_t dyy4[4] = {dyys,dyys,dyys,dyys}; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1592 const uint64_t shift2 = 2*shift; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1593 uint8_t edge_buf[(h+1)*stride]; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1594 int x, y; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1595 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1596 const int dxw = (dxx-(1<<(16+shift)))*(w-1); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1597 const int dyh = (dyy-(1<<(16+shift)))*(h-1); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1598 const int dxh = dxy*(h-1); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1599 const int dyw = dyx*(w-1); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1600 if( // non-constant fullpel offset (3% of blocks) |
6196
166bef5cad01
add parenthesis, fix warning: i386/dsputil_mmx.c:2618: warning: suggest parentheses around arithmetic in operand of |
bcoudurier
parents:
6195
diff
changeset
|
1601 ((ox^(ox+dxw)) | (ox^(ox+dxh)) | (ox^(ox+dxw+dxh)) | |
166bef5cad01
add parenthesis, fix warning: i386/dsputil_mmx.c:2618: warning: suggest parentheses around arithmetic in operand of |
bcoudurier
parents:
6195
diff
changeset
|
1602 (oy^(oy+dyw)) | (oy^(oy+dyh)) | (oy^(oy+dyw+dyh))) >> (16+shift) |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1603 // uses more than 16 bits of subpel mv (only at huge resolution) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1604 || (dxx|dxy|dyx|dyy)&15 ) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1605 { |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1606 //FIXME could still use mmx for some of the rows |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1607 ff_gmc_c(dst, src, stride, h, ox, oy, dxx, dxy, dyx, dyy, shift, r, width, height); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1608 return; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1609 } |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1610 |
3250 | 1611 src += ix + iy*stride; |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1612 if( (unsigned)ix >= width-w || |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1613 (unsigned)iy >= height-h ) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1614 { |
3250 | 1615 ff_emulated_edge_mc(edge_buf, src, stride, w+1, h+1, ix, iy, width, height); |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1616 src = edge_buf; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1617 } |
3250 | 1618 |
1619 asm volatile( | |
1620 "movd %0, %%mm6 \n\t" | |
1621 "pxor %%mm7, %%mm7 \n\t" | |
1622 "punpcklwd %%mm6, %%mm6 \n\t" | |
1623 "punpcklwd %%mm6, %%mm6 \n\t" | |
1624 :: "r"(1<<shift) | |
1625 ); | |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1626 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1627 for(x=0; x<w; x+=4){ |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1628 uint16_t dx4[4] = { oxs - dxys + dxxs*(x+0), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1629 oxs - dxys + dxxs*(x+1), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1630 oxs - dxys + dxxs*(x+2), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1631 oxs - dxys + dxxs*(x+3) }; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1632 uint16_t dy4[4] = { oys - dyys + dyxs*(x+0), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1633 oys - dyys + dyxs*(x+1), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1634 oys - dyys + dyxs*(x+2), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1635 oys - dyys + dyxs*(x+3) }; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1636 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1637 for(y=0; y<h; y++){ |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1638 asm volatile( |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1639 "movq %0, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1640 "movq %1, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1641 "paddw %2, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1642 "paddw %3, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1643 "movq %%mm4, %0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1644 "movq %%mm5, %1 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1645 "psrlw $12, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1646 "psrlw $12, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1647 : "+m"(*dx4), "+m"(*dy4) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1648 : "m"(*dxy4), "m"(*dyy4) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1649 ); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1650 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1651 asm volatile( |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1652 "movq %%mm6, %%mm2 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1653 "movq %%mm6, %%mm1 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1654 "psubw %%mm4, %%mm2 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1655 "psubw %%mm5, %%mm1 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1656 "movq %%mm2, %%mm0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1657 "movq %%mm4, %%mm3 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1658 "pmullw %%mm1, %%mm0 \n\t" // (s-dx)*(s-dy) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1659 "pmullw %%mm5, %%mm3 \n\t" // dx*dy |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1660 "pmullw %%mm5, %%mm2 \n\t" // (s-dx)*dy |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1661 "pmullw %%mm4, %%mm1 \n\t" // dx*(s-dy) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1662 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1663 "movd %4, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1664 "movd %3, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1665 "punpcklbw %%mm7, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1666 "punpcklbw %%mm7, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1667 "pmullw %%mm5, %%mm3 \n\t" // src[1,1] * dx*dy |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1668 "pmullw %%mm4, %%mm2 \n\t" // src[0,1] * (s-dx)*dy |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1669 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1670 "movd %2, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1671 "movd %1, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1672 "punpcklbw %%mm7, %%mm5 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1673 "punpcklbw %%mm7, %%mm4 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1674 "pmullw %%mm5, %%mm1 \n\t" // src[1,0] * dx*(s-dy) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1675 "pmullw %%mm4, %%mm0 \n\t" // src[0,0] * (s-dx)*(s-dy) |
3250 | 1676 "paddw %5, %%mm1 \n\t" |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1677 "paddw %%mm3, %%mm2 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1678 "paddw %%mm1, %%mm0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1679 "paddw %%mm2, %%mm0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1680 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1681 "psrlw %6, %%mm0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1682 "packuswb %%mm0, %%mm0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1683 "movd %%mm0, %0 \n\t" |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1684 |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1685 : "=m"(dst[x+y*stride]) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1686 : "m"(src[0]), "m"(src[1]), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1687 "m"(src[stride]), "m"(src[stride+1]), |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1688 "m"(*r4), "m"(shift2) |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1689 ); |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1690 src += stride; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1691 } |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1692 src += 4-h*stride; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1693 } |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1694 } |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
1695 |
3215
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1696 #define PREFETCH(name, op) \ |
4172 | 1697 static void name(void *mem, int stride, int h){\ |
3215
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1698 const uint8_t *p= mem;\ |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1699 do{\ |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1700 asm volatile(#op" %0" :: "m"(*p));\ |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1701 p+= stride;\ |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1702 }while(--h);\ |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1703 } |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1704 PREFETCH(prefetch_mmx2, prefetcht0) |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1705 PREFETCH(prefetch_3dnow, prefetch) |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1706 #undef PREFETCH |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
1707 |
2754 | 1708 #include "h264dsp_mmx.c" |
2967 | 1709 |
6009 | 1710 /* CAVS specific */ |
3524 | 1711 void ff_cavsdsp_init_mmx2(DSPContext* c, AVCodecContext *avctx); |
6522
dfa76e0734e5
Add missed call to ff_cavsdsp_init_3dnow() in dsputil_init_mmx()
zuxy
parents:
6513
diff
changeset
|
1712 void ff_cavsdsp_init_3dnow(DSPContext* c, AVCodecContext *avctx); |
3524 | 1713 |
1714 void ff_put_cavs_qpel8_mc00_mmx2(uint8_t *dst, uint8_t *src, int stride) { | |
1715 put_pixels8_mmx(dst, src, stride, 8); | |
1716 } | |
1717 void ff_avg_cavs_qpel8_mc00_mmx2(uint8_t *dst, uint8_t *src, int stride) { | |
1718 avg_pixels8_mmx(dst, src, stride, 8); | |
1719 } | |
1720 void ff_put_cavs_qpel16_mc00_mmx2(uint8_t *dst, uint8_t *src, int stride) { | |
1721 put_pixels16_mmx(dst, src, stride, 16); | |
1722 } | |
1723 void ff_avg_cavs_qpel16_mc00_mmx2(uint8_t *dst, uint8_t *src, int stride) { | |
1724 avg_pixels16_mmx(dst, src, stride, 16); | |
1725 } | |
1726 | |
5948 | 1727 /* VC1 specific */ |
1728 void ff_vc1dsp_init_mmx(DSPContext* dsp, AVCodecContext *avctx); | |
1729 | |
1730 void ff_put_vc1_mspel_mc00_mmx(uint8_t *dst, const uint8_t *src, int stride, int rnd) { | |
1731 put_pixels8_mmx(dst, src, stride, 8); | |
1732 } | |
1733 | |
1092 | 1734 /* external functions, from idct_mmx.c */ |
1735 void ff_mmx_idct(DCTELEM *block); | |
1736 void ff_mmxext_idct(DCTELEM *block); | |
1737 | |
1738 /* XXX: those functions should be suppressed ASAP when all IDCTs are | |
1739 converted */ | |
4020
723818b5de0f
Put libmpeg2 IDCT functions under CONFIG_GPL, fixes link failure
diego
parents:
4001
diff
changeset
|
1740 #ifdef CONFIG_GPL |
1092 | 1741 static void ff_libmpeg2mmx_idct_put(uint8_t *dest, int line_size, DCTELEM *block) |
1742 { | |
1743 ff_mmx_idct (block); | |
1744 put_pixels_clamped_mmx(block, dest, line_size); | |
1745 } | |
1746 static void ff_libmpeg2mmx_idct_add(uint8_t *dest, int line_size, DCTELEM *block) | |
1747 { | |
1748 ff_mmx_idct (block); | |
1749 add_pixels_clamped_mmx(block, dest, line_size); | |
1750 } | |
1751 static void ff_libmpeg2mmx2_idct_put(uint8_t *dest, int line_size, DCTELEM *block) | |
1752 { | |
1753 ff_mmxext_idct (block); | |
1754 put_pixels_clamped_mmx(block, dest, line_size); | |
1755 } | |
1756 static void ff_libmpeg2mmx2_idct_add(uint8_t *dest, int line_size, DCTELEM *block) | |
1757 { | |
1758 ff_mmxext_idct (block); | |
1759 add_pixels_clamped_mmx(block, dest, line_size); | |
1760 } | |
4020
723818b5de0f
Put libmpeg2 IDCT functions under CONFIG_GPL, fixes link failure
diego
parents:
4001
diff
changeset
|
1761 #endif |
2868 | 1762 static void ff_idct_xvid_mmx_put(uint8_t *dest, int line_size, DCTELEM *block) |
1763 { | |
1764 ff_idct_xvid_mmx (block); | |
1765 put_pixels_clamped_mmx(block, dest, line_size); | |
1766 } | |
1767 static void ff_idct_xvid_mmx_add(uint8_t *dest, int line_size, DCTELEM *block) | |
1768 { | |
1769 ff_idct_xvid_mmx (block); | |
1770 add_pixels_clamped_mmx(block, dest, line_size); | |
1771 } | |
1772 static void ff_idct_xvid_mmx2_put(uint8_t *dest, int line_size, DCTELEM *block) | |
1773 { | |
1774 ff_idct_xvid_mmx2 (block); | |
1775 put_pixels_clamped_mmx(block, dest, line_size); | |
1776 } | |
1777 static void ff_idct_xvid_mmx2_add(uint8_t *dest, int line_size, DCTELEM *block) | |
1778 { | |
1779 ff_idct_xvid_mmx2 (block); | |
1780 add_pixels_clamped_mmx(block, dest, line_size); | |
1781 } | |
2967 | 1782 |
3541
3fbddeb13686
10l, vorbis_inverse_coupling_sse() was really 3dnow
lorenm
parents:
3536
diff
changeset
|
1783 static void vorbis_inverse_coupling_3dnow(float *mag, float *ang, int blocksize) |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1784 { |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1785 int i; |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1786 asm volatile("pxor %%mm7, %%mm7":); |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1787 for(i=0; i<blocksize; i+=2) { |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1788 asm volatile( |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1789 "movq %0, %%mm0 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1790 "movq %1, %%mm1 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1791 "movq %%mm0, %%mm2 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1792 "movq %%mm1, %%mm3 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1793 "pfcmpge %%mm7, %%mm2 \n\t" // m <= 0.0 |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1794 "pfcmpge %%mm7, %%mm3 \n\t" // a <= 0.0 |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1795 "pslld $31, %%mm2 \n\t" // keep only the sign bit |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1796 "pxor %%mm2, %%mm1 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1797 "movq %%mm3, %%mm4 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1798 "pand %%mm1, %%mm3 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1799 "pandn %%mm1, %%mm4 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1800 "pfadd %%mm0, %%mm3 \n\t" // a = m + ((a<0) & (a ^ sign(m))) |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1801 "pfsub %%mm4, %%mm0 \n\t" // m = m + ((a>0) & (a ^ sign(m))) |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1802 "movq %%mm3, %1 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1803 "movq %%mm0, %0 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1804 :"+m"(mag[i]), "+m"(ang[i]) |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1805 ::"memory" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1806 ); |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1807 } |
3561 | 1808 asm volatile("femms"); |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1809 } |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1810 static void vorbis_inverse_coupling_sse(float *mag, float *ang, int blocksize) |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1811 { |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1812 int i; |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1813 |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1814 asm volatile( |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1815 "movaps %0, %%xmm5 \n\t" |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1816 ::"m"(ff_pdw_80000000[0]) |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1817 ); |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1818 for(i=0; i<blocksize; i+=4) { |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1819 asm volatile( |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1820 "movaps %0, %%xmm0 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1821 "movaps %1, %%xmm1 \n\t" |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1822 "xorps %%xmm2, %%xmm2 \n\t" |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1823 "xorps %%xmm3, %%xmm3 \n\t" |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1824 "cmpleps %%xmm0, %%xmm2 \n\t" // m <= 0.0 |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1825 "cmpleps %%xmm1, %%xmm3 \n\t" // a <= 0.0 |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1826 "andps %%xmm5, %%xmm2 \n\t" // keep only the sign bit |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1827 "xorps %%xmm2, %%xmm1 \n\t" |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1828 "movaps %%xmm3, %%xmm4 \n\t" |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1829 "andps %%xmm1, %%xmm3 \n\t" |
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
1830 "andnps %%xmm1, %%xmm4 \n\t" |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1831 "addps %%xmm0, %%xmm3 \n\t" // a = m + ((a<0) & (a ^ sign(m))) |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1832 "subps %%xmm4, %%xmm0 \n\t" // m = m + ((a>0) & (a ^ sign(m))) |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1833 "movaps %%xmm3, %1 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1834 "movaps %%xmm0, %0 \n\t" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1835 :"+m"(mag[i]), "+m"(ang[i]) |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1836 ::"memory" |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1837 ); |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1838 } |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1839 } |
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
1840 |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1841 static void vector_fmul_3dnow(float *dst, const float *src, int len){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1842 x86_reg i = (len-4)*4; |
3574 | 1843 asm volatile( |
1844 "1: \n\t" | |
1845 "movq (%1,%0), %%mm0 \n\t" | |
1846 "movq 8(%1,%0), %%mm1 \n\t" | |
1847 "pfmul (%2,%0), %%mm0 \n\t" | |
1848 "pfmul 8(%2,%0), %%mm1 \n\t" | |
1849 "movq %%mm0, (%1,%0) \n\t" | |
1850 "movq %%mm1, 8(%1,%0) \n\t" | |
1851 "sub $16, %0 \n\t" | |
1852 "jge 1b \n\t" | |
1853 "femms \n\t" | |
1854 :"+r"(i) | |
1855 :"r"(dst), "r"(src) | |
1856 :"memory" | |
1857 ); | |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1858 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1859 static void vector_fmul_sse(float *dst, const float *src, int len){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1860 x86_reg i = (len-8)*4; |
3574 | 1861 asm volatile( |
1862 "1: \n\t" | |
1863 "movaps (%1,%0), %%xmm0 \n\t" | |
1864 "movaps 16(%1,%0), %%xmm1 \n\t" | |
1865 "mulps (%2,%0), %%xmm0 \n\t" | |
1866 "mulps 16(%2,%0), %%xmm1 \n\t" | |
1867 "movaps %%xmm0, (%1,%0) \n\t" | |
1868 "movaps %%xmm1, 16(%1,%0) \n\t" | |
1869 "sub $32, %0 \n\t" | |
1870 "jge 1b \n\t" | |
1871 :"+r"(i) | |
1872 :"r"(dst), "r"(src) | |
1873 :"memory" | |
1874 ); | |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1875 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1876 |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1877 static void vector_fmul_reverse_3dnow2(float *dst, const float *src0, const float *src1, int len){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1878 x86_reg i = len*4-16; |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1879 asm volatile( |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1880 "1: \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1881 "pswapd 8(%1), %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1882 "pswapd (%1), %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1883 "pfmul (%3,%0), %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1884 "pfmul 8(%3,%0), %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1885 "movq %%mm0, (%2,%0) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1886 "movq %%mm1, 8(%2,%0) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1887 "add $16, %1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1888 "sub $16, %0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1889 "jge 1b \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1890 :"+r"(i), "+r"(src1) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1891 :"r"(dst), "r"(src0) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1892 ); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1893 asm volatile("femms"); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1894 } |
3569
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1895 static void vector_fmul_reverse_sse(float *dst, const float *src0, const float *src1, int len){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1896 x86_reg i = len*4-32; |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1897 asm volatile( |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1898 "1: \n\t" |
3569
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1899 "movaps 16(%1), %%xmm0 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1900 "movaps (%1), %%xmm1 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1901 "shufps $0x1b, %%xmm0, %%xmm0 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1902 "shufps $0x1b, %%xmm1, %%xmm1 \n\t" |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1903 "mulps (%3,%0), %%xmm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1904 "mulps 16(%3,%0), %%xmm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1905 "movaps %%xmm0, (%2,%0) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1906 "movaps %%xmm1, 16(%2,%0) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1907 "add $32, %1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1908 "sub $32, %0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1909 "jge 1b \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1910 :"+r"(i), "+r"(src1) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1911 :"r"(dst), "r"(src0) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1912 ); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1913 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1914 |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1915 static void vector_fmul_add_add_3dnow(float *dst, const float *src0, const float *src1, |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1916 const float *src2, int src3, int len, int step){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1917 x86_reg i = (len-4)*4; |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1918 if(step == 2 && src3 == 0){ |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1919 dst += (len-4)*2; |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1920 asm volatile( |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1921 "1: \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1922 "movq (%2,%0), %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1923 "movq 8(%2,%0), %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1924 "pfmul (%3,%0), %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1925 "pfmul 8(%3,%0), %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1926 "pfadd (%4,%0), %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1927 "pfadd 8(%4,%0), %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1928 "movd %%mm0, (%1) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1929 "movd %%mm1, 16(%1) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1930 "psrlq $32, %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1931 "psrlq $32, %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1932 "movd %%mm0, 8(%1) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1933 "movd %%mm1, 24(%1) \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1934 "sub $32, %1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1935 "sub $16, %0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1936 "jge 1b \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1937 :"+r"(i), "+r"(dst) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1938 :"r"(src0), "r"(src1), "r"(src2) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1939 :"memory" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1940 ); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1941 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1942 else if(step == 1 && src3 == 0){ |
3574 | 1943 asm volatile( |
1944 "1: \n\t" | |
1945 "movq (%2,%0), %%mm0 \n\t" | |
1946 "movq 8(%2,%0), %%mm1 \n\t" | |
1947 "pfmul (%3,%0), %%mm0 \n\t" | |
1948 "pfmul 8(%3,%0), %%mm1 \n\t" | |
1949 "pfadd (%4,%0), %%mm0 \n\t" | |
1950 "pfadd 8(%4,%0), %%mm1 \n\t" | |
1951 "movq %%mm0, (%1,%0) \n\t" | |
1952 "movq %%mm1, 8(%1,%0) \n\t" | |
1953 "sub $16, %0 \n\t" | |
1954 "jge 1b \n\t" | |
1955 :"+r"(i) | |
1956 :"r"(dst), "r"(src0), "r"(src1), "r"(src2) | |
1957 :"memory" | |
1958 ); | |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1959 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1960 else |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1961 ff_vector_fmul_add_add_c(dst, src0, src1, src2, src3, len, step); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1962 asm volatile("femms"); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1963 } |
3569
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1964 static void vector_fmul_add_add_sse(float *dst, const float *src0, const float *src1, |
3574 | 1965 const float *src2, int src3, int len, int step){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
6601
diff
changeset
|
1966 x86_reg i = (len-8)*4; |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1967 if(step == 2 && src3 == 0){ |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1968 dst += (len-8)*2; |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1969 asm volatile( |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1970 "1: \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1971 "movaps (%2,%0), %%xmm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1972 "movaps 16(%2,%0), %%xmm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1973 "mulps (%3,%0), %%xmm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1974 "mulps 16(%3,%0), %%xmm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1975 "addps (%4,%0), %%xmm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1976 "addps 16(%4,%0), %%xmm1 \n\t" |
3569
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1977 "movss %%xmm0, (%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1978 "movss %%xmm1, 32(%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1979 "movhlps %%xmm0, %%xmm2 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1980 "movhlps %%xmm1, %%xmm3 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1981 "movss %%xmm2, 16(%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1982 "movss %%xmm3, 48(%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1983 "shufps $0xb1, %%xmm0, %%xmm0 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1984 "shufps $0xb1, %%xmm1, %%xmm1 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1985 "movss %%xmm0, 8(%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1986 "movss %%xmm1, 40(%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1987 "movhlps %%xmm0, %%xmm2 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1988 "movhlps %%xmm1, %%xmm3 \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1989 "movss %%xmm2, 24(%1) \n\t" |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
1990 "movss %%xmm3, 56(%1) \n\t" |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1991 "sub $64, %1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1992 "sub $32, %0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1993 "jge 1b \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1994 :"+r"(i), "+r"(dst) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1995 :"r"(src0), "r"(src1), "r"(src2) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1996 :"memory" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1997 ); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1998 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
1999 else if(step == 1 && src3 == 0){ |
3574 | 2000 asm volatile( |
2001 "1: \n\t" | |
2002 "movaps (%2,%0), %%xmm0 \n\t" | |
2003 "movaps 16(%2,%0), %%xmm1 \n\t" | |
2004 "mulps (%3,%0), %%xmm0 \n\t" | |
2005 "mulps 16(%3,%0), %%xmm1 \n\t" | |
2006 "addps (%4,%0), %%xmm0 \n\t" | |
2007 "addps 16(%4,%0), %%xmm1 \n\t" | |
2008 "movaps %%xmm0, (%1,%0) \n\t" | |
2009 "movaps %%xmm1, 16(%1,%0) \n\t" | |
2010 "sub $32, %0 \n\t" | |
2011 "jge 1b \n\t" | |
2012 :"+r"(i) | |
2013 :"r"(dst), "r"(src0), "r"(src1), "r"(src2) | |
2014 :"memory" | |
2015 ); | |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2016 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2017 else |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2018 ff_vector_fmul_add_add_c(dst, src0, src1, src2, src3, len, step); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2019 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2020 |
4172 | 2021 static void float_to_int16_3dnow(int16_t *dst, const float *src, int len){ |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2022 // not bit-exact: pf2id uses different rounding than C and SSE |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2023 int i; |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2024 for(i=0; i<len; i+=4) { |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2025 asm volatile( |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2026 "pf2id %1, %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2027 "pf2id %2, %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2028 "packssdw %%mm1, %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2029 "movq %%mm0, %0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2030 :"=m"(dst[i]) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2031 :"m"(src[i]), "m"(src[i+2]) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2032 ); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2033 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2034 asm volatile("femms"); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2035 } |
4172 | 2036 static void float_to_int16_sse(int16_t *dst, const float *src, int len){ |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2037 int i; |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2038 for(i=0; i<len; i+=4) { |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2039 asm volatile( |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2040 "cvtps2pi %1, %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2041 "cvtps2pi %2, %%mm1 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2042 "packssdw %%mm1, %%mm0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2043 "movq %%mm0, %0 \n\t" |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2044 :"=m"(dst[i]) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2045 :"m"(src[i]), "m"(src[i+2]) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2046 ); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2047 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2048 asm volatile("emms"); |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2049 } |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2050 |
6195
5f704e9cb518
fix prototypes, remove warning: i386/dsputil_mmx.c:3594: warning: assignment from incompatible pointer type
bcoudurier
parents:
6181
diff
changeset
|
2051 extern void ff_snow_horizontal_compose97i_sse2(IDWTELEM *b, int width); |
5f704e9cb518
fix prototypes, remove warning: i386/dsputil_mmx.c:3594: warning: assignment from incompatible pointer type
bcoudurier
parents:
6181
diff
changeset
|
2052 extern void ff_snow_horizontal_compose97i_mmx(IDWTELEM *b, int width); |
5f704e9cb518
fix prototypes, remove warning: i386/dsputil_mmx.c:3594: warning: assignment from incompatible pointer type
bcoudurier
parents:
6181
diff
changeset
|
2053 extern void ff_snow_vertical_compose97i_sse2(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, IDWTELEM *b3, IDWTELEM *b4, IDWTELEM *b5, int width); |
5f704e9cb518
fix prototypes, remove warning: i386/dsputil_mmx.c:3594: warning: assignment from incompatible pointer type
bcoudurier
parents:
6181
diff
changeset
|
2054 extern void ff_snow_vertical_compose97i_mmx(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, IDWTELEM *b3, IDWTELEM *b4, IDWTELEM *b5, int width); |
4436
d3e389536b0a
Add the const specifier as needed to reduce the number of warnings.
takis
parents:
4197
diff
changeset
|
2055 extern void ff_snow_inner_add_yblock_sse2(const uint8_t *obmc, const int obmc_stride, uint8_t * * block, int b_w, int b_h, |
3211
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents:
3210
diff
changeset
|
2056 int src_x, int src_y, int src_stride, slice_buffer * sb, int add, uint8_t * dst8); |
4436
d3e389536b0a
Add the const specifier as needed to reduce the number of warnings.
takis
parents:
4197
diff
changeset
|
2057 extern void ff_snow_inner_add_yblock_mmx(const uint8_t *obmc, const int obmc_stride, uint8_t * * block, int b_w, int b_h, |
3211
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents:
3210
diff
changeset
|
2058 int src_x, int src_y, int src_stride, slice_buffer * sb, int add, uint8_t * dst8); |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2059 |
1092 | 2060 void dsputil_init_mmx(DSPContext* c, AVCodecContext *avctx) |
0 | 2061 { |
4197 | 2062 mm_flags = mm_support(); |
1115 | 2063 |
1122 | 2064 if (avctx->dsp_mask) { |
2979 | 2065 if (avctx->dsp_mask & FF_MM_FORCE) |
4197 | 2066 mm_flags |= (avctx->dsp_mask & 0xffff); |
2979 | 2067 else |
4197 | 2068 mm_flags &= ~(avctx->dsp_mask & 0xffff); |
1122 | 2069 } |
1115 | 2070 |
631
47a8964ba5cd
be less verbose patch by (Lennert Buytenhek <buytenh at math dot leidenuniv dot nl>)
michaelni
parents:
629
diff
changeset
|
2071 #if 0 |
1868 | 2072 av_log(avctx, AV_LOG_INFO, "libavcodec: CPU flags:"); |
4197 | 2073 if (mm_flags & MM_MMX) |
1868 | 2074 av_log(avctx, AV_LOG_INFO, " mmx"); |
4197 | 2075 if (mm_flags & MM_MMXEXT) |
1868 | 2076 av_log(avctx, AV_LOG_INFO, " mmxext"); |
4197 | 2077 if (mm_flags & MM_3DNOW) |
1868 | 2078 av_log(avctx, AV_LOG_INFO, " 3dnow"); |
4197 | 2079 if (mm_flags & MM_SSE) |
1868 | 2080 av_log(avctx, AV_LOG_INFO, " sse"); |
4197 | 2081 if (mm_flags & MM_SSE2) |
1868 | 2082 av_log(avctx, AV_LOG_INFO, " sse2"); |
2083 av_log(avctx, AV_LOG_INFO, "\n"); | |
0 | 2084 #endif |
2085 | |
4197 | 2086 if (mm_flags & MM_MMX) { |
1092 | 2087 const int idct_algo= avctx->idct_algo; |
2088 | |
2256 | 2089 if(avctx->lowres==0){ |
2090 if(idct_algo==FF_IDCT_AUTO || idct_algo==FF_IDCT_SIMPLEMMX){ | |
2091 c->idct_put= ff_simple_idct_put_mmx; | |
2092 c->idct_add= ff_simple_idct_add_mmx; | |
2093 c->idct = ff_simple_idct_mmx; | |
2094 c->idct_permutation_type= FF_SIMPLE_IDCT_PERM; | |
3717
ea9fe1c9d126
Remove the LGPL exception clause as discussed on ffmpeg-devel
diego
parents:
3712
diff
changeset
|
2095 #ifdef CONFIG_GPL |
2256 | 2096 }else if(idct_algo==FF_IDCT_LIBMPEG2MMX){ |
4197 | 2097 if(mm_flags & MM_MMXEXT){ |
2256 | 2098 c->idct_put= ff_libmpeg2mmx2_idct_put; |
2099 c->idct_add= ff_libmpeg2mmx2_idct_add; | |
2100 c->idct = ff_mmxext_idct; | |
2101 }else{ | |
2102 c->idct_put= ff_libmpeg2mmx_idct_put; | |
2103 c->idct_add= ff_libmpeg2mmx_idct_add; | |
2104 c->idct = ff_mmx_idct; | |
2105 } | |
2106 c->idct_permutation_type= FF_LIBMPEG2_IDCT_PERM; | |
3717
ea9fe1c9d126
Remove the LGPL exception clause as discussed on ffmpeg-devel
diego
parents:
3712
diff
changeset
|
2107 #endif |
5007 | 2108 }else if((ENABLE_VP3_DECODER || ENABLE_VP5_DECODER || ENABLE_VP6_DECODER) && |
2109 idct_algo==FF_IDCT_VP3 && | |
3721
2000e401593d
disable vp3 mmx idct for theora files to avoid artifacts
aurel
parents:
3717
diff
changeset
|
2110 avctx->codec->id!=CODEC_ID_THEORA && |
3712
f7f75f718efb
Enables back the mmx/sse optimized version of the vp3 idct.
aurel
parents:
3666
diff
changeset
|
2111 !(avctx->flags & CODEC_FLAG_BITEXACT)){ |
4197 | 2112 if(mm_flags & MM_SSE2){ |
2696
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2113 c->idct_put= ff_vp3_idct_put_sse2; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2114 c->idct_add= ff_vp3_idct_add_sse2; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2115 c->idct = ff_vp3_idct_sse2; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2116 c->idct_permutation_type= FF_TRANSPOSE_IDCT_PERM; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2117 }else{ |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2118 ff_vp3_dsp_init_mmx(); |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2119 c->idct_put= ff_vp3_idct_put_mmx; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2120 c->idct_add= ff_vp3_idct_add_mmx; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2121 c->idct = ff_vp3_idct_mmx; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2122 c->idct_permutation_type= FF_PARTTRANS_IDCT_PERM; |
9699d325049d
porting the mmx&sse2 (sse2 untested) vp3 idcts to the lavc idct API
michael
parents:
2691
diff
changeset
|
2123 } |
3524 | 2124 }else if(idct_algo==FF_IDCT_CAVS){ |
2125 c->idct_permutation_type= FF_TRANSPOSE_IDCT_PERM; | |
2868 | 2126 }else if(idct_algo==FF_IDCT_XVIDMMX){ |
6601 | 2127 if(mm_flags & MM_SSE2){ |
2128 c->idct_put= ff_idct_xvid_sse2_put; | |
2129 c->idct_add= ff_idct_xvid_sse2_add; | |
2130 c->idct = ff_idct_xvid_sse2; | |
2131 c->idct_permutation_type= FF_SSE2_IDCT_PERM; | |
2132 }else if(mm_flags & MM_MMXEXT){ | |
2868 | 2133 c->idct_put= ff_idct_xvid_mmx2_put; |
2134 c->idct_add= ff_idct_xvid_mmx2_add; | |
2135 c->idct = ff_idct_xvid_mmx2; | |
2136 }else{ | |
2137 c->idct_put= ff_idct_xvid_mmx_put; | |
2138 c->idct_add= ff_idct_xvid_mmx_add; | |
2139 c->idct = ff_idct_xvid_mmx; | |
2140 } | |
1092 | 2141 } |
2142 } | |
1868 | 2143 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2144 c->put_pixels_clamped = put_pixels_clamped_mmx; |
1984
ef919e9ef73e
separate out put_signed_pixels_clamped() into its own function and
melanson
parents:
1977
diff
changeset
|
2145 c->put_signed_pixels_clamped = put_signed_pixels_clamped_mmx; |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2146 c->add_pixels_clamped = add_pixels_clamped_mmx; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2147 c->clear_blocks = clear_blocks_mmx; |
415 | 2148 |
6327 | 2149 #define SET_HPEL_FUNCS(PFX, IDX, SIZE, CPU) \ |
2150 c->PFX ## _pixels_tab[IDX][0] = PFX ## _pixels ## SIZE ## _ ## CPU; \ | |
2151 c->PFX ## _pixels_tab[IDX][1] = PFX ## _pixels ## SIZE ## _x2_ ## CPU; \ | |
2152 c->PFX ## _pixels_tab[IDX][2] = PFX ## _pixels ## SIZE ## _y2_ ## CPU; \ | |
2153 c->PFX ## _pixels_tab[IDX][3] = PFX ## _pixels ## SIZE ## _xy2_ ## CPU | |
2154 | |
2155 SET_HPEL_FUNCS(put, 0, 16, mmx); | |
2156 SET_HPEL_FUNCS(put_no_rnd, 0, 16, mmx); | |
2157 SET_HPEL_FUNCS(avg, 0, 16, mmx); | |
2158 SET_HPEL_FUNCS(avg_no_rnd, 0, 16, mmx); | |
2159 SET_HPEL_FUNCS(put, 1, 8, mmx); | |
2160 SET_HPEL_FUNCS(put_no_rnd, 1, 8, mmx); | |
2161 SET_HPEL_FUNCS(avg, 1, 8, mmx); | |
2162 SET_HPEL_FUNCS(avg_no_rnd, 1, 8, mmx); | |
2967 | 2163 |
3248
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
2164 c->gmc= gmc_mmx; |
7aa9f80e7954
mmx implementation of 3-point GMC. (5x faster than C)
lorenm
parents:
3215
diff
changeset
|
2165 |
866 | 2166 c->add_bytes= add_bytes_mmx; |
6384 | 2167 c->add_bytes_l2= add_bytes_l2_mmx; |
1647 | 2168 |
6437 | 2169 c->draw_edges = draw_edges_mmx; |
2170 | |
5277
7b3fcb7c61ce
Avoid linking with h263.c functions when the relevant codecs
aurel
parents:
5255
diff
changeset
|
2171 if (ENABLE_ANY_H263) { |
5278 | 2172 c->h263_v_loop_filter= h263_v_loop_filter_mmx; |
2173 c->h263_h_loop_filter= h263_h_loop_filter_mmx; | |
5277
7b3fcb7c61ce
Avoid linking with h263.c functions when the relevant codecs
aurel
parents:
5255
diff
changeset
|
2174 } |
6057
03febc8f506f
add MMX version for put_no_rnd_h264_chroma_mc8_c, used in VC-1 decoding.
gpoirier
parents:
6056
diff
changeset
|
2175 c->put_h264_chroma_pixels_tab[0]= put_h264_chroma_mc8_mmx_rnd; |
2922
d772011258ec
faster h264_chroma_mc8_mmx, added h264_chroma_mc4_mmx.
lorenm
parents:
2902
diff
changeset
|
2176 c->put_h264_chroma_pixels_tab[1]= put_h264_chroma_mc4_mmx; |
6057
03febc8f506f
add MMX version for put_no_rnd_h264_chroma_mc8_c, used in VC-1 decoding.
gpoirier
parents:
6056
diff
changeset
|
2177 c->put_no_rnd_h264_chroma_pixels_tab[0]= put_h264_chroma_mc8_mmx_nornd; |
2967 | 2178 |
3173 | 2179 c->h264_idct_dc_add= |
2180 c->h264_idct_add= ff_h264_idct_add_mmx; | |
3174 | 2181 c->h264_idct8_dc_add= |
2182 c->h264_idct8_add= ff_h264_idct8_add_mmx; | |
6320 | 2183 if (mm_flags & MM_SSE2) |
2184 c->h264_idct8_add= ff_h264_idct8_add_sse2; | |
3173 | 2185 |
4197 | 2186 if (mm_flags & MM_MMXEXT) { |
3215
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
2187 c->prefetch = prefetch_mmx2; |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
2188 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2189 c->put_pixels_tab[0][1] = put_pixels16_x2_mmx2; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2190 c->put_pixels_tab[0][2] = put_pixels16_y2_mmx2; |
651 | 2191 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2192 c->avg_pixels_tab[0][0] = avg_pixels16_mmx2; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2193 c->avg_pixels_tab[0][1] = avg_pixels16_x2_mmx2; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2194 c->avg_pixels_tab[0][2] = avg_pixels16_y2_mmx2; |
415 | 2195 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2196 c->put_pixels_tab[1][1] = put_pixels8_x2_mmx2; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2197 c->put_pixels_tab[1][2] = put_pixels8_y2_mmx2; |
651 | 2198 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2199 c->avg_pixels_tab[1][0] = avg_pixels8_mmx2; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2200 c->avg_pixels_tab[1][1] = avg_pixels8_x2_mmx2; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2201 c->avg_pixels_tab[1][2] = avg_pixels8_y2_mmx2; |
1092 | 2202 |
3105
2d35fb3cb940
h264: special case dc-only idct. ~1% faster overall
lorenm
parents:
3089
diff
changeset
|
2203 c->h264_idct_dc_add= ff_h264_idct_dc_add_mmx2; |
2d35fb3cb940
h264: special case dc-only idct. ~1% faster overall
lorenm
parents:
3089
diff
changeset
|
2204 c->h264_idct8_dc_add= ff_h264_idct8_dc_add_mmx2; |
2745 | 2205 |
1092 | 2206 if(!(avctx->flags & CODEC_FLAG_BITEXACT)){ |
2207 c->put_no_rnd_pixels_tab[0][1] = put_no_rnd_pixels16_x2_mmx2; | |
2208 c->put_no_rnd_pixels_tab[0][2] = put_no_rnd_pixels16_y2_mmx2; | |
2209 c->put_no_rnd_pixels_tab[1][1] = put_no_rnd_pixels8_x2_mmx2; | |
2210 c->put_no_rnd_pixels_tab[1][2] = put_no_rnd_pixels8_y2_mmx2; | |
2211 c->avg_pixels_tab[0][3] = avg_pixels16_xy2_mmx2; | |
2212 c->avg_pixels_tab[1][3] = avg_pixels8_xy2_mmx2; | |
2213 } | |
959 | 2214 |
6327 | 2215 #define SET_QPEL_FUNCS(PFX, IDX, SIZE, CPU) \ |
2216 c->PFX ## _pixels_tab[IDX][ 0] = PFX ## SIZE ## _mc00_ ## CPU; \ | |
2217 c->PFX ## _pixels_tab[IDX][ 1] = PFX ## SIZE ## _mc10_ ## CPU; \ | |
2218 c->PFX ## _pixels_tab[IDX][ 2] = PFX ## SIZE ## _mc20_ ## CPU; \ | |
2219 c->PFX ## _pixels_tab[IDX][ 3] = PFX ## SIZE ## _mc30_ ## CPU; \ | |
2220 c->PFX ## _pixels_tab[IDX][ 4] = PFX ## SIZE ## _mc01_ ## CPU; \ | |
2221 c->PFX ## _pixels_tab[IDX][ 5] = PFX ## SIZE ## _mc11_ ## CPU; \ | |
2222 c->PFX ## _pixels_tab[IDX][ 6] = PFX ## SIZE ## _mc21_ ## CPU; \ | |
2223 c->PFX ## _pixels_tab[IDX][ 7] = PFX ## SIZE ## _mc31_ ## CPU; \ | |
2224 c->PFX ## _pixels_tab[IDX][ 8] = PFX ## SIZE ## _mc02_ ## CPU; \ | |
2225 c->PFX ## _pixels_tab[IDX][ 9] = PFX ## SIZE ## _mc12_ ## CPU; \ | |
2226 c->PFX ## _pixels_tab[IDX][10] = PFX ## SIZE ## _mc22_ ## CPU; \ | |
2227 c->PFX ## _pixels_tab[IDX][11] = PFX ## SIZE ## _mc32_ ## CPU; \ | |
2228 c->PFX ## _pixels_tab[IDX][12] = PFX ## SIZE ## _mc03_ ## CPU; \ | |
2229 c->PFX ## _pixels_tab[IDX][13] = PFX ## SIZE ## _mc13_ ## CPU; \ | |
2230 c->PFX ## _pixels_tab[IDX][14] = PFX ## SIZE ## _mc23_ ## CPU; \ | |
2231 c->PFX ## _pixels_tab[IDX][15] = PFX ## SIZE ## _mc33_ ## CPU | |
2232 | |
2233 SET_QPEL_FUNCS(put_qpel, 0, 16, mmx2); | |
2234 SET_QPEL_FUNCS(put_qpel, 1, 8, mmx2); | |
2235 SET_QPEL_FUNCS(put_no_rnd_qpel, 0, 16, mmx2); | |
2236 SET_QPEL_FUNCS(put_no_rnd_qpel, 1, 8, mmx2); | |
2237 SET_QPEL_FUNCS(avg_qpel, 0, 16, mmx2); | |
2238 SET_QPEL_FUNCS(avg_qpel, 1, 8, mmx2); | |
2239 | |
2240 SET_QPEL_FUNCS(put_h264_qpel, 0, 16, mmx2); | |
2241 SET_QPEL_FUNCS(put_h264_qpel, 1, 8, mmx2); | |
2242 SET_QPEL_FUNCS(put_h264_qpel, 2, 4, mmx2); | |
2243 SET_QPEL_FUNCS(avg_h264_qpel, 0, 16, mmx2); | |
2244 SET_QPEL_FUNCS(avg_h264_qpel, 1, 8, mmx2); | |
2245 SET_QPEL_FUNCS(avg_h264_qpel, 2, 4, mmx2); | |
2246 | |
2247 SET_QPEL_FUNCS(put_2tap_qpel, 0, 16, mmx2); | |
2248 SET_QPEL_FUNCS(put_2tap_qpel, 1, 8, mmx2); | |
2249 SET_QPEL_FUNCS(avg_2tap_qpel, 0, 16, mmx2); | |
2250 SET_QPEL_FUNCS(avg_2tap_qpel, 1, 8, mmx2); | |
2209 | 2251 |
6057
03febc8f506f
add MMX version for put_no_rnd_h264_chroma_mc8_c, used in VC-1 decoding.
gpoirier
parents:
6056
diff
changeset
|
2252 c->avg_h264_chroma_pixels_tab[0]= avg_h264_chroma_mc8_mmx2_rnd; |
2922
d772011258ec
faster h264_chroma_mc8_mmx, added h264_chroma_mc4_mmx.
lorenm
parents:
2902
diff
changeset
|
2253 c->avg_h264_chroma_pixels_tab[1]= avg_h264_chroma_mc4_mmx2; |
3213 | 2254 c->avg_h264_chroma_pixels_tab[2]= avg_h264_chroma_mc2_mmx2; |
2255 c->put_h264_chroma_pixels_tab[2]= put_h264_chroma_mc2_mmx2; | |
2633 | 2256 c->h264_v_loop_filter_luma= h264_v_loop_filter_luma_mmx2; |
2257 c->h264_h_loop_filter_luma= h264_h_loop_filter_luma_mmx2; | |
2258 c->h264_v_loop_filter_chroma= h264_v_loop_filter_chroma_mmx2; | |
2259 c->h264_h_loop_filter_chroma= h264_h_loop_filter_chroma_mmx2; | |
2707
360024d31dab
H.264 deblocking optimizations (mmx for chroma_bS4 case, convert existing cases to 8-bit math)
lorenm
parents:
2696
diff
changeset
|
2260 c->h264_v_loop_filter_chroma_intra= h264_v_loop_filter_chroma_intra_mmx2; |
360024d31dab
H.264 deblocking optimizations (mmx for chroma_bS4 case, convert existing cases to 8-bit math)
lorenm
parents:
2696
diff
changeset
|
2261 c->h264_h_loop_filter_chroma_intra= h264_h_loop_filter_chroma_intra_mmx2; |
3645
47821be55b6c
mmx implementation of deblocking strength decision.
lorenm
parents:
3576
diff
changeset
|
2262 c->h264_loop_filter_strength= h264_loop_filter_strength_mmx2; |
2633 | 2263 |
2902
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2264 c->weight_h264_pixels_tab[0]= ff_h264_weight_16x16_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2265 c->weight_h264_pixels_tab[1]= ff_h264_weight_16x8_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2266 c->weight_h264_pixels_tab[2]= ff_h264_weight_8x16_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2267 c->weight_h264_pixels_tab[3]= ff_h264_weight_8x8_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2268 c->weight_h264_pixels_tab[4]= ff_h264_weight_8x4_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2269 c->weight_h264_pixels_tab[5]= ff_h264_weight_4x8_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2270 c->weight_h264_pixels_tab[6]= ff_h264_weight_4x4_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2271 c->weight_h264_pixels_tab[7]= ff_h264_weight_4x2_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2272 |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2273 c->biweight_h264_pixels_tab[0]= ff_h264_biweight_16x16_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2274 c->biweight_h264_pixels_tab[1]= ff_h264_biweight_16x8_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2275 c->biweight_h264_pixels_tab[2]= ff_h264_biweight_8x16_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2276 c->biweight_h264_pixels_tab[3]= ff_h264_biweight_8x8_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2277 c->biweight_h264_pixels_tab[4]= ff_h264_biweight_8x4_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2278 c->biweight_h264_pixels_tab[5]= ff_h264_biweight_4x8_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2279 c->biweight_h264_pixels_tab[6]= ff_h264_biweight_4x4_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2280 c->biweight_h264_pixels_tab[7]= ff_h264_biweight_4x2_mmx2; |
3c79bc9f3aa9
h264 mmx weighted prediction. up to 3% overall speedup.
lorenm
parents:
2899
diff
changeset
|
2281 |
5949 | 2282 if (ENABLE_CAVS_DECODER) |
5950 | 2283 ff_cavsdsp_init_mmx2(c, avctx); |
5949 | 2284 |
2285 if (ENABLE_VC1_DECODER || ENABLE_WMV3_DECODER) | |
5950 | 2286 ff_vc1dsp_init_mmx(c, avctx); |
5933 | 2287 |
6384 | 2288 c->add_png_paeth_prediction= add_png_paeth_prediction_mmx2; |
4197 | 2289 } else if (mm_flags & MM_3DNOW) { |
3215
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
2290 c->prefetch = prefetch_3dnow; |
06f98047ff26
prefetch pixels for future motion compensation. 2-5% faster h264.
lorenm
parents:
3213
diff
changeset
|
2291 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2292 c->put_pixels_tab[0][1] = put_pixels16_x2_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2293 c->put_pixels_tab[0][2] = put_pixels16_y2_3dnow; |
393 | 2294 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2295 c->avg_pixels_tab[0][0] = avg_pixels16_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2296 c->avg_pixels_tab[0][1] = avg_pixels16_x2_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2297 c->avg_pixels_tab[0][2] = avg_pixels16_y2_3dnow; |
651 | 2298 |
853
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2299 c->put_pixels_tab[1][1] = put_pixels8_x2_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2300 c->put_pixels_tab[1][2] = put_pixels8_y2_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2301 |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2302 c->avg_pixels_tab[1][0] = avg_pixels8_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2303 c->avg_pixels_tab[1][1] = avg_pixels8_x2_3dnow; |
eacc2dd8fd9d
* using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents:
706
diff
changeset
|
2304 c->avg_pixels_tab[1][2] = avg_pixels8_y2_3dnow; |
1092 | 2305 |
2306 if(!(avctx->flags & CODEC_FLAG_BITEXACT)){ | |
2307 c->put_no_rnd_pixels_tab[0][1] = put_no_rnd_pixels16_x2_3dnow; | |
2308 c->put_no_rnd_pixels_tab[0][2] = put_no_rnd_pixels16_y2_3dnow; | |
2309 c->put_no_rnd_pixels_tab[1][1] = put_no_rnd_pixels8_x2_3dnow; | |
2310 c->put_no_rnd_pixels_tab[1][2] = put_no_rnd_pixels8_y2_3dnow; | |
2311 c->avg_pixels_tab[0][3] = avg_pixels16_xy2_3dnow; | |
2312 c->avg_pixels_tab[1][3] = avg_pixels8_xy2_3dnow; | |
2313 } | |
984 | 2314 |
6327 | 2315 SET_QPEL_FUNCS(put_qpel, 0, 16, 3dnow); |
2316 SET_QPEL_FUNCS(put_qpel, 1, 8, 3dnow); | |
2317 SET_QPEL_FUNCS(put_no_rnd_qpel, 0, 16, 3dnow); | |
2318 SET_QPEL_FUNCS(put_no_rnd_qpel, 1, 8, 3dnow); | |
2319 SET_QPEL_FUNCS(avg_qpel, 0, 16, 3dnow); | |
2320 SET_QPEL_FUNCS(avg_qpel, 1, 8, 3dnow); | |
2321 | |
2322 SET_QPEL_FUNCS(put_h264_qpel, 0, 16, 3dnow); | |
2323 SET_QPEL_FUNCS(put_h264_qpel, 1, 8, 3dnow); | |
2324 SET_QPEL_FUNCS(put_h264_qpel, 2, 4, 3dnow); | |
2325 SET_QPEL_FUNCS(avg_h264_qpel, 0, 16, 3dnow); | |
2326 SET_QPEL_FUNCS(avg_h264_qpel, 1, 8, 3dnow); | |
2327 SET_QPEL_FUNCS(avg_h264_qpel, 2, 4, 3dnow); | |
2328 | |
2329 SET_QPEL_FUNCS(put_2tap_qpel, 0, 16, 3dnow); | |
2330 SET_QPEL_FUNCS(put_2tap_qpel, 1, 8, 3dnow); | |
2331 SET_QPEL_FUNCS(avg_2tap_qpel, 0, 16, 3dnow); | |
2332 SET_QPEL_FUNCS(avg_2tap_qpel, 1, 8, 3dnow); | |
3807
6a40092eb9e6
approximate qpel functions: sacrifice some quality for some decoding speed. enabled on B-frames with -lavdopts fast.
lorenm
parents:
3777
diff
changeset
|
2333 |
6057
03febc8f506f
add MMX version for put_no_rnd_h264_chroma_mc8_c, used in VC-1 decoding.
gpoirier
parents:
6056
diff
changeset
|
2334 c->avg_h264_chroma_pixels_tab[0]= avg_h264_chroma_mc8_3dnow_rnd; |
2922
d772011258ec
faster h264_chroma_mc8_mmx, added h264_chroma_mc4_mmx.
lorenm
parents:
2902
diff
changeset
|
2335 c->avg_h264_chroma_pixels_tab[1]= avg_h264_chroma_mc4_3dnow; |
6522
dfa76e0734e5
Add missed call to ff_cavsdsp_init_3dnow() in dsputil_init_mmx()
zuxy
parents:
6513
diff
changeset
|
2336 |
dfa76e0734e5
Add missed call to ff_cavsdsp_init_3dnow() in dsputil_init_mmx()
zuxy
parents:
6513
diff
changeset
|
2337 if (ENABLE_CAVS_DECODER) |
dfa76e0734e5
Add missed call to ff_cavsdsp_init_3dnow() in dsputil_init_mmx()
zuxy
parents:
6513
diff
changeset
|
2338 ff_cavsdsp_init_3dnow(c, avctx); |
0 | 2339 } |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2340 |
6336
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2341 |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2342 #define H264_QPEL_FUNCS(x, y, CPU)\ |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2343 c->put_h264_qpel_pixels_tab[0][x+y*4] = put_h264_qpel16_mc##x##y##_##CPU;\ |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2344 c->put_h264_qpel_pixels_tab[1][x+y*4] = put_h264_qpel8_mc##x##y##_##CPU;\ |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2345 c->avg_h264_qpel_pixels_tab[0][x+y*4] = avg_h264_qpel16_mc##x##y##_##CPU;\ |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2346 c->avg_h264_qpel_pixels_tab[1][x+y*4] = avg_h264_qpel8_mc##x##y##_##CPU; |
6331 | 2347 if((mm_flags & MM_SSE2) && !(mm_flags & MM_3DNOW)){ |
2348 // these functions are slower than mmx on AMD, but faster on Intel | |
6336
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2349 /* FIXME works in most codecs, but crashes svq1 due to unaligned chroma |
6331 | 2350 c->put_pixels_tab[0][0] = put_pixels16_sse2; |
2351 c->avg_pixels_tab[0][0] = avg_pixels16_sse2; | |
6336
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2352 */ |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2353 H264_QPEL_FUNCS(0, 0, sse2); |
6331 | 2354 } |
6336
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2355 if(mm_flags & MM_SSE2){ |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2356 H264_QPEL_FUNCS(0, 1, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2357 H264_QPEL_FUNCS(0, 2, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2358 H264_QPEL_FUNCS(0, 3, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2359 H264_QPEL_FUNCS(1, 1, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2360 H264_QPEL_FUNCS(1, 2, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2361 H264_QPEL_FUNCS(1, 3, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2362 H264_QPEL_FUNCS(2, 1, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2363 H264_QPEL_FUNCS(2, 2, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2364 H264_QPEL_FUNCS(2, 3, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2365 H264_QPEL_FUNCS(3, 1, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2366 H264_QPEL_FUNCS(3, 2, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2367 H264_QPEL_FUNCS(3, 3, sse2); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2368 } |
6331 | 2369 #ifdef HAVE_SSSE3 |
2370 if(mm_flags & MM_SSSE3){ | |
6336
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2371 H264_QPEL_FUNCS(1, 0, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2372 H264_QPEL_FUNCS(1, 1, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2373 H264_QPEL_FUNCS(1, 2, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2374 H264_QPEL_FUNCS(1, 3, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2375 H264_QPEL_FUNCS(2, 0, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2376 H264_QPEL_FUNCS(2, 1, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2377 H264_QPEL_FUNCS(2, 2, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2378 H264_QPEL_FUNCS(2, 3, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2379 H264_QPEL_FUNCS(3, 0, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2380 H264_QPEL_FUNCS(3, 1, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2381 H264_QPEL_FUNCS(3, 2, ssse3); |
ef3fb5a7e275
sse2 h264 motion compensation. not new code, just separate out the cases that didn't need ssse3.
lorenm
parents:
6335
diff
changeset
|
2382 H264_QPEL_FUNCS(3, 3, ssse3); |
6557 | 2383 c->put_no_rnd_h264_chroma_pixels_tab[0]= put_h264_chroma_mc8_ssse3_nornd; |
2384 c->put_h264_chroma_pixels_tab[0]= put_h264_chroma_mc8_ssse3_rnd; | |
2385 c->avg_h264_chroma_pixels_tab[0]= avg_h264_chroma_mc8_ssse3_rnd; | |
2386 c->put_h264_chroma_pixels_tab[1]= put_h264_chroma_mc4_ssse3; | |
2387 c->avg_h264_chroma_pixels_tab[1]= avg_h264_chroma_mc4_ssse3; | |
6384 | 2388 c->add_png_paeth_prediction= add_png_paeth_prediction_ssse3; |
6331 | 2389 } |
2390 #endif | |
2391 | |
4589
30261f4ed12d
Fix wrong conditional, Snow decoding, not encoding, was SIMD-accelerated.
diego
parents:
4436
diff
changeset
|
2392 #ifdef CONFIG_SNOW_DECODER |
5591 | 2393 if(mm_flags & MM_SSE2 & 0){ |
3210 | 2394 c->horizontal_compose97i = ff_snow_horizontal_compose97i_sse2; |
5602 | 2395 #ifdef HAVE_7REGS |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2396 c->vertical_compose97i = ff_snow_vertical_compose97i_sse2; |
5601
b26025b9586d
workaround gcc bug, untested as my gcc is not complaining
michael
parents:
5594
diff
changeset
|
2397 #endif |
3211
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents:
3210
diff
changeset
|
2398 c->inner_add_yblock = ff_snow_inner_add_yblock_sse2; |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2399 } |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2400 else{ |
5594
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5591
diff
changeset
|
2401 if(mm_flags & MM_MMXEXT){ |
3210 | 2402 c->horizontal_compose97i = ff_snow_horizontal_compose97i_mmx; |
5602 | 2403 #ifdef HAVE_7REGS |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2404 c->vertical_compose97i = ff_snow_vertical_compose97i_mmx; |
5601
b26025b9586d
workaround gcc bug, untested as my gcc is not complaining
michael
parents:
5594
diff
changeset
|
2405 #endif |
5594
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5591
diff
changeset
|
2406 } |
3211
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents:
3210
diff
changeset
|
2407 c->inner_add_yblock = ff_snow_inner_add_yblock_mmx; |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2408 } |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
3174
diff
changeset
|
2409 #endif |
3536
545a15c19c91
sse & sse2 implementations of vorbis channel coupling.
lorenm
parents:
3524
diff
changeset
|
2410 |
4197 | 2411 if(mm_flags & MM_3DNOW){ |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2412 c->vorbis_inverse_coupling = vorbis_inverse_coupling_3dnow; |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2413 c->vector_fmul = vector_fmul_3dnow; |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2414 if(!(avctx->flags & CODEC_FLAG_BITEXACT)) |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2415 c->float_to_int16 = float_to_int16_3dnow; |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2416 } |
4197 | 2417 if(mm_flags & MM_3DNOWEXT) |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2418 c->vector_fmul_reverse = vector_fmul_reverse_3dnow2; |
4197 | 2419 if(mm_flags & MM_SSE){ |
3557
8e13ec0f8aa3
change vorbis_inverse_coupling_sse2() so it works on sse1 cpus
michael
parents:
3541
diff
changeset
|
2420 c->vorbis_inverse_coupling = vorbis_inverse_coupling_sse; |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2421 c->vector_fmul = vector_fmul_sse; |
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2422 c->float_to_int16 = float_to_int16_sse; |
3569
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2423 c->vector_fmul_reverse = vector_fmul_reverse_sse; |
c42c03f3b402
convert vector_fmul_reverse_sse2 and vector_fmul_add_add_sse2 to sse
michael
parents:
3568
diff
changeset
|
2424 c->vector_fmul_add_add = vector_fmul_add_add_sse; |
3568
945caa35ee9a
sse and 3dnow implementations of float->int conversion and mdct windowing.
lorenm
parents:
3561
diff
changeset
|
2425 } |
4197 | 2426 if(mm_flags & MM_3DNOW) |
3574 | 2427 c->vector_fmul_add_add = vector_fmul_add_add_3dnow; // faster than sse |
0 | 2428 } |
2967 | 2429 |
6403
9a736918fd90
split encoding part of dsputil_mmx into its own file
aurel
parents:
6391
diff
changeset
|
2430 if (ENABLE_ENCODERS) |
9a736918fd90
split encoding part of dsputil_mmx into its own file
aurel
parents:
6391
diff
changeset
|
2431 dsputilenc_init_mmx(c, avctx); |
9a736918fd90
split encoding part of dsputil_mmx into its own file
aurel
parents:
6391
diff
changeset
|
2432 |
247
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2433 #if 0 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2434 // for speed testing |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2435 get_pixels = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2436 put_pixels_clamped = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2437 add_pixels_clamped = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2438 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2439 pix_abs16x16 = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2440 pix_abs16x16_x2 = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2441 pix_abs16x16_y2 = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2442 pix_abs16x16_xy2 = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2443 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2444 put_pixels_tab[0] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2445 put_pixels_tab[1] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2446 put_pixels_tab[2] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2447 put_pixels_tab[3] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2448 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2449 put_no_rnd_pixels_tab[0] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2450 put_no_rnd_pixels_tab[1] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2451 put_no_rnd_pixels_tab[2] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2452 put_no_rnd_pixels_tab[3] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2453 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2454 avg_pixels_tab[0] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2455 avg_pixels_tab[1] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2456 avg_pixels_tab[2] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2457 avg_pixels_tab[3] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2458 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2459 avg_no_rnd_pixels_tab[0] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2460 avg_no_rnd_pixels_tab[1] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2461 avg_no_rnd_pixels_tab[2] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2462 avg_no_rnd_pixels_tab[3] = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2463 |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2464 //av_fdct = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2465 //ff_idct = just_return; |
6f48cacd9ed9
* some modifications to allow gcc to compile same code for -fPIC
kabi
parents:
188
diff
changeset
|
2466 #endif |
0 | 2467 } |