comparison armv4l/dsputil_arm.c @ 7688:160d5c1ae60a libavcodec

ARM: add prefetch function using ARMv5 PLD instruction

7687:e5b5a9af1b68

    add_pixels_clamped_ARM(block, dest, line_size);
#endif
}
#endif

int mm_support(void)
{
    return ENABLE_IWMMXT * MM_IWMMXT;
}

    c->put_no_rnd_pixels_tab[1][0] = put_pixels8_arm;//OK
    c->put_no_rnd_pixels_tab[1][1] = put_no_rnd_pixels8_x2_arm; //OK
    c->put_no_rnd_pixels_tab[1][2] = put_no_rnd_pixels8_y2_arm; //OK
    c->put_no_rnd_pixels_tab[1][3] = put_no_rnd_pixels8_xy2_arm;

#ifdef HAVE_IWMMXT
    dsputil_init_iwmmxt(c, avctx);
#endif
#ifdef HAVE_ARMVFP
    ff_float_init_arm_vfp(c, avctx);

7688:160d5c1ae60a

    add_pixels_clamped_ARM(block, dest, line_size);
#endif
}
#endif

#ifdef HAVE_ARMV5TE
static void prefetch_arm(void *mem, int stride, int h)
{
    asm volatile(
        "1:              \n\t"
        "subs %0, %0, #1 \n\t"
        "pld  [%1]       \n\t"
        "add  %1, %1, %2 \n\t"
        "bgt  1b         \n\t"
        : "+r"(h), "+r"(mem) : "r"(stride));
}
#endif

int mm_support(void)
{
    return ENABLE_IWMMXT * MM_IWMMXT;
}

    c->put_no_rnd_pixels_tab[1][0] = put_pixels8_arm;//OK
    c->put_no_rnd_pixels_tab[1][1] = put_no_rnd_pixels8_x2_arm; //OK
    c->put_no_rnd_pixels_tab[1][2] = put_no_rnd_pixels8_y2_arm; //OK
    c->put_no_rnd_pixels_tab[1][3] = put_no_rnd_pixels8_xy2_arm;

#ifdef HAVE_ARMV5TE
    c->prefetch = prefetch_arm;
#endif

#ifdef HAVE_IWMMXT
    dsputil_init_iwmmxt(c, avctx);
#endif
#ifdef HAVE_ARMVFP
    ff_float_init_arm_vfp(c, avctx);