Mercurial > libavcodec.hg
comparison ppc/int_altivec.c @ 8494:1615d6b75ada libavcodec
Cleanup _t types in libavcodec/ppc
author | lu_zero |
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date | Sat, 27 Dec 2008 11:21:28 +0000 |
parents | a8a79f5385f6 |
children | e9d9d946f213 |
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8493:469f3e5bcf13 | 8494:1615d6b75ada |
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77 } | 77 } |
78 | 78 |
79 static void add_int16_altivec(int16_t * v1, int16_t * v2, int order) | 79 static void add_int16_altivec(int16_t * v1, int16_t * v2, int order) |
80 { | 80 { |
81 int i; | 81 int i; |
82 register vec_s16_t vec, *pv; | 82 register vec_s16 vec, *pv; |
83 | 83 |
84 for(i = 0; i < order; i += 8){ | 84 for(i = 0; i < order; i += 8){ |
85 pv = (vec_s16_t*)v2; | 85 pv = (vec_s16*)v2; |
86 vec = vec_perm(pv[0], pv[1], vec_lvsl(0, v2)); | 86 vec = vec_perm(pv[0], pv[1], vec_lvsl(0, v2)); |
87 vec_st(vec_add(vec_ld(0, v1), vec), 0, v1); | 87 vec_st(vec_add(vec_ld(0, v1), vec), 0, v1); |
88 v1 += 8; | 88 v1 += 8; |
89 v2 += 8; | 89 v2 += 8; |
90 } | 90 } |
91 } | 91 } |
92 | 92 |
93 static void sub_int16_altivec(int16_t * v1, int16_t * v2, int order) | 93 static void sub_int16_altivec(int16_t * v1, int16_t * v2, int order) |
94 { | 94 { |
95 int i; | 95 int i; |
96 register vec_s16_t vec, *pv; | 96 register vec_s16 vec, *pv; |
97 | 97 |
98 for(i = 0; i < order; i += 8){ | 98 for(i = 0; i < order; i += 8){ |
99 pv = (vec_s16_t*)v2; | 99 pv = (vec_s16*)v2; |
100 vec = vec_perm(pv[0], pv[1], vec_lvsl(0, v2)); | 100 vec = vec_perm(pv[0], pv[1], vec_lvsl(0, v2)); |
101 vec_st(vec_sub(vec_ld(0, v1), vec), 0, v1); | 101 vec_st(vec_sub(vec_ld(0, v1), vec), 0, v1); |
102 v1 += 8; | 102 v1 += 8; |
103 v2 += 8; | 103 v2 += 8; |
104 } | 104 } |
106 | 106 |
107 static int32_t scalarproduct_int16_altivec(int16_t * v1, int16_t * v2, int order, const int shift) | 107 static int32_t scalarproduct_int16_altivec(int16_t * v1, int16_t * v2, int order, const int shift) |
108 { | 108 { |
109 int i; | 109 int i; |
110 LOAD_ZERO; | 110 LOAD_ZERO; |
111 register vec_s16_t vec1, *pv; | 111 register vec_s16 vec1, *pv; |
112 register vec_s32_t res = vec_splat_s32(0), t; | 112 register vec_s32 res = vec_splat_s32(0), t; |
113 register vec_u32_t shifts; | 113 register vec_u32 shifts; |
114 DECLARE_ALIGNED_16(int32_t, ires); | 114 DECLARE_ALIGNED_16(int32_t, ires); |
115 | 115 |
116 shifts = zero_u32v; | 116 shifts = zero_u32v; |
117 if(shift & 0x10) shifts = vec_add(shifts, vec_sl(vec_splat_u32(0x08), vec_splat_u32(0x1))); | 117 if(shift & 0x10) shifts = vec_add(shifts, vec_sl(vec_splat_u32(0x08), vec_splat_u32(0x1))); |
118 if(shift & 0x08) shifts = vec_add(shifts, vec_splat_u32(0x08)); | 118 if(shift & 0x08) shifts = vec_add(shifts, vec_splat_u32(0x08)); |
119 if(shift & 0x04) shifts = vec_add(shifts, vec_splat_u32(0x04)); | 119 if(shift & 0x04) shifts = vec_add(shifts, vec_splat_u32(0x04)); |
120 if(shift & 0x02) shifts = vec_add(shifts, vec_splat_u32(0x02)); | 120 if(shift & 0x02) shifts = vec_add(shifts, vec_splat_u32(0x02)); |
121 if(shift & 0x01) shifts = vec_add(shifts, vec_splat_u32(0x01)); | 121 if(shift & 0x01) shifts = vec_add(shifts, vec_splat_u32(0x01)); |
122 | 122 |
123 for(i = 0; i < order; i += 8){ | 123 for(i = 0; i < order; i += 8){ |
124 pv = (vec_s16_t*)v1; | 124 pv = (vec_s16*)v1; |
125 vec1 = vec_perm(pv[0], pv[1], vec_lvsl(0, v1)); | 125 vec1 = vec_perm(pv[0], pv[1], vec_lvsl(0, v1)); |
126 t = vec_msum(vec1, vec_ld(0, v2), zero_s32v); | 126 t = vec_msum(vec1, vec_ld(0, v2), zero_s32v); |
127 t = vec_sr(t, shifts); | 127 t = vec_sr(t, shifts); |
128 res = vec_sums(t, res); | 128 res = vec_sums(t, res); |
129 v1 += 8; | 129 v1 += 8; |