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comparison ppc/dsputil_altivec.c @ 7373:266d4949aa15 libavcodec

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Remove AltiVec vector declaration compiler compatibility macros. The original problem was that FSF and Apple gcc used a different syntax for vector declarations, i.e. {} vs. (). Nowadays Apple gcc versions support the standard {} syntax and versions that support {} are available on all relevant Mac OS X versions. Thus the greater compatibility is no longer worth cluttering the code with macros.
author diego
date Thu, 24 Jul 2008 10:53:32 +0000
parents d463d8ee7755
children bf5bc1f4cba0
comparison
equal deleted inserted replaced
7372:e97d0795ee70 7373:266d4949aa15
275 vector unsigned int sad; 275 vector unsigned int sad;
276 vector signed int sumdiffs; 276 vector signed int sumdiffs;
277 277
278 sad = (vector unsigned int)vec_splat_u32(0); 278 sad = (vector unsigned int)vec_splat_u32(0);
279 279
280 permclear = (vector unsigned char)AVV(255,255,255,255,255,255,255,255,0,0,0,0,0,0,0,0); 280 permclear = (vector unsigned char){255,255,255,255,255,255,255,255,0,0,0,0,0,0,0,0};
281 281
282 for (i = 0; i < h; i++) { 282 for (i = 0; i < h; i++) {
283 /* Read potentially unaligned pixels into t1 and t2 283 /* Read potentially unaligned pixels into t1 and t2
284 Since we're reading 16 pixels, and actually only want 8, 284 Since we're reading 16 pixels, and actually only want 8,
285 mask out the last 8 pixels. The 0s don't change the sum. */ 285 mask out the last 8 pixels. The 0s don't change the sum. */
356 vector unsigned int sum; 356 vector unsigned int sum;
357 vector signed int sumsqr; 357 vector signed int sumsqr;
358 358
359 sum = (vector unsigned int)vec_splat_u32(0); 359 sum = (vector unsigned int)vec_splat_u32(0);
360 360
361 permclear = (vector unsigned char)AVV(255,255,255,255,255,255,255,255,0,0,0,0,0,0,0,0); 361 permclear = (vector unsigned char){255,255,255,255,255,255,255,255,0,0,0,0,0,0,0,0};
362 362
363 363
364 for (i = 0; i < h; i++) { 364 for (i = 0; i < h; i++) {
365 /* Read potentially unaligned pixels into t1 and t2 365 /* Read potentially unaligned pixels into t1 and t2
366 Since we're reading 16 pixels, and actually only want 8, 366 Since we're reading 16 pixels, and actually only want 8,
988 register vector signed short temp0, temp1, temp2, temp3, temp4, 988 register vector signed short temp0, temp1, temp2, temp3, temp4,
989 temp5, temp6, temp7; 989 temp5, temp6, temp7;
990 POWERPC_PERF_START_COUNT(altivec_hadamard8_diff8x8_num, 1); 990 POWERPC_PERF_START_COUNT(altivec_hadamard8_diff8x8_num, 1);
991 { 991 {
992 register const vector signed short vprod1 =(const vector signed short) 992 register const vector signed short vprod1 =(const vector signed short)
993 AVV( 1,-1, 1,-1, 1,-1, 1,-1); 993 { 1,-1, 1,-1, 1,-1, 1,-1 };
994 register const vector signed short vprod2 =(const vector signed short) 994 register const vector signed short vprod2 =(const vector signed short)
995 AVV( 1, 1,-1,-1, 1, 1,-1,-1); 995 { 1, 1,-1,-1, 1, 1,-1,-1 };
996 register const vector signed short vprod3 =(const vector signed short) 996 register const vector signed short vprod3 =(const vector signed short)
997 AVV( 1, 1, 1, 1,-1,-1,-1,-1); 997 { 1, 1, 1, 1,-1,-1,-1,-1 };
998 register const vector unsigned char perm1 = (const vector unsigned char) 998 register const vector unsigned char perm1 = (const vector unsigned char)
999 AVV(0x02, 0x03, 0x00, 0x01, 0x06, 0x07, 0x04, 0x05, 999 {0x02, 0x03, 0x00, 0x01, 0x06, 0x07, 0x04, 0x05,
1000 0x0A, 0x0B, 0x08, 0x09, 0x0E, 0x0F, 0x0C, 0x0D); 1000 0x0A, 0x0B, 0x08, 0x09, 0x0E, 0x0F, 0x0C, 0x0D};
1001 register const vector unsigned char perm2 = (const vector unsigned char) 1001 register const vector unsigned char perm2 = (const vector unsigned char)
1002 AVV(0x04, 0x05, 0x06, 0x07, 0x00, 0x01, 0x02, 0x03, 1002 {0x04, 0x05, 0x06, 0x07, 0x00, 0x01, 0x02, 0x03,
1003 0x0C, 0x0D, 0x0E, 0x0F, 0x08, 0x09, 0x0A, 0x0B); 1003 0x0C, 0x0D, 0x0E, 0x0F, 0x08, 0x09, 0x0A, 0x0B};
1004 register const vector unsigned char perm3 = (const vector unsigned char) 1004 register const vector unsigned char perm3 = (const vector unsigned char)
1005 AVV(0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 1005 {0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
1006 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); 1006 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07};
1007 1007
1008 #define ONEITERBUTTERFLY(i, res) \ 1008 #define ONEITERBUTTERFLY(i, res) \
1009 { \ 1009 { \
1010 register vector unsigned char src1, src2, srcO; \ 1010 register vector unsigned char src1, src2, srcO; \
1011 register vector unsigned char dst1, dst2, dstO; \ 1011 register vector unsigned char dst1, dst2, dstO; \
1128 temp7S REG_v(v15); 1128 temp7S REG_v(v15);
1129 register const vector unsigned char vzero REG_v(v31)= 1129 register const vector unsigned char vzero REG_v(v31)=
1130 (const vector unsigned char)vec_splat_u8(0); 1130 (const vector unsigned char)vec_splat_u8(0);
1131 { 1131 {
1132 register const vector signed short vprod1 REG_v(v16)= 1132 register const vector signed short vprod1 REG_v(v16)=
1133 (const vector signed short)AVV( 1,-1, 1,-1, 1,-1, 1,-1); 1133 (const vector signed short){ 1,-1, 1,-1, 1,-1, 1,-1 };
1134 register const vector signed short vprod2 REG_v(v17)= 1134 register const vector signed short vprod2 REG_v(v17)=
1135 (const vector signed short)AVV( 1, 1,-1,-1, 1, 1,-1,-1); 1135 (const vector signed short){ 1, 1,-1,-1, 1, 1,-1,-1 };
1136 register const vector signed short vprod3 REG_v(v18)= 1136 register const vector signed short vprod3 REG_v(v18)=
1137 (const vector signed short)AVV( 1, 1, 1, 1,-1,-1,-1,-1); 1137 (const vector signed short){ 1, 1, 1, 1,-1,-1,-1,-1 };
1138 register const vector unsigned char perm1 REG_v(v19)= 1138 register const vector unsigned char perm1 REG_v(v19)=
1139 (const vector unsigned char) 1139 (const vector unsigned char)
1140 AVV(0x02, 0x03, 0x00, 0x01, 0x06, 0x07, 0x04, 0x05, 1140 {0x02, 0x03, 0x00, 0x01, 0x06, 0x07, 0x04, 0x05,
1141 0x0A, 0x0B, 0x08, 0x09, 0x0E, 0x0F, 0x0C, 0x0D); 1141 0x0A, 0x0B, 0x08, 0x09, 0x0E, 0x0F, 0x0C, 0x0D};
1142 register const vector unsigned char perm2 REG_v(v20)= 1142 register const vector unsigned char perm2 REG_v(v20)=
1143 (const vector unsigned char) 1143 (const vector unsigned char)
1144 AVV(0x04, 0x05, 0x06, 0x07, 0x00, 0x01, 0x02, 0x03, 1144 {0x04, 0x05, 0x06, 0x07, 0x00, 0x01, 0x02, 0x03,
1145 0x0C, 0x0D, 0x0E, 0x0F, 0x08, 0x09, 0x0A, 0x0B); 1145 0x0C, 0x0D, 0x0E, 0x0F, 0x08, 0x09, 0x0A, 0x0B};
1146 register const vector unsigned char perm3 REG_v(v21)= 1146 register const vector unsigned char perm3 REG_v(v21)=
1147 (const vector unsigned char) 1147 (const vector unsigned char)
1148 AVV(0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 1148 {0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
1149 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); 1149 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07};
1150 1150
1151 #define ONEITERBUTTERFLY(i, res1, res2) \ 1151 #define ONEITERBUTTERFLY(i, res1, res2) \
1152 { \ 1152 { \
1153 register vector unsigned char src1 REG_v(v22), \ 1153 register vector unsigned char src1 REG_v(v22), \
1154 src2 REG_v(v23), \ 1154 src2 REG_v(v23), \