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AAC: ARM/NEON asm for VMUL2/4 functions
author mru
date Fri, 15 Jan 2010 02:58:24 +0000
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children a69d6f292f95
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10880:1184d065c26a 10881:798c62217427
1 /*
2 * Copyright (c) 2010 Mans Rullgard <mans@mansr.com>
3 *
4 * This file is part of FFmpeg.
5 *
6 * FFmpeg is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
10 *
11 * FFmpeg is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with FFmpeg; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21 #if HAVE_NEON && HAVE_INLINE_ASM
22
23 #define VMUL2 VMUL2
24 static inline float *VMUL2(float *dst, const float *v, unsigned idx,
25 const float *scale)
26 {
27 unsigned v0, v1;
28 __asm__ volatile ("ubfx %0, %4, #0, #4 \n\t"
29 "ubfx %1, %4, #4, #4 \n\t"
30 "ldr %0, [%3, %0, lsl #2] \n\t"
31 "ldr %1, [%3, %1, lsl #2] \n\t"
32 "vld1.32 {d1[]}, [%5,:32] \n\t"
33 "vmov d0, %0, %1 \n\t"
34 "vmul.f32 d0, d0, d1 \n\t"
35 "vst1.32 {d0}, [%2,:64]! \n\t"
36 : "=&r"(v0), "=&r"(v1), "+r"(dst)
37 : "r"(v), "r"(idx), "r"(scale)
38 : "d0", "d1");
39 return dst;
40 }
41
42 #define VMUL4 VMUL4
43 static inline float *VMUL4(float *dst, const float *v, unsigned idx,
44 const float *scale)
45 {
46 unsigned v0, v1, v2, v3;
47 __asm__ volatile ("ubfx %0, %6, #0, #2 \n\t"
48 "ubfx %1, %6, #2, #2 \n\t"
49 "ldr %0, [%5, %0, lsl #2] \n\t"
50 "ubfx %2, %6, #4, #2 \n\t"
51 "ldr %1, [%5, %1, lsl #2] \n\t"
52 "ubfx %3, %6, #6, #2 \n\t"
53 "ldr %2, [%5, %2, lsl #2] \n\t"
54 "vmov d0, %0, %1 \n\t"
55 "ldr %3, [%5, %3, lsl #2] \n\t"
56 "vld1.32 {d2[],d3[]},[%7,:32] \n\t"
57 "vmov d1, %2, %3 \n\t"
58 "vmul.f32 q0, q0, q1 \n\t"
59 "vst1.32 {q0}, [%4,:128]! \n\t"
60 : "=&r"(v0), "=&r"(v1), "=&r"(v2), "=&r"(v3), "+r"(dst)
61 : "r"(v), "r"(idx), "r"(scale)
62 : "d0", "d1", "d2", "d3");
63 return dst;
64 }
65
66 #define VMUL2S VMUL2S
67 static inline float *VMUL2S(float *dst, const float *v, unsigned idx,
68 unsigned sign, const float *scale)
69 {
70 unsigned v0, v1, v2, v3;
71 __asm__ volatile ("ubfx %0, %6, #0, #4 \n\t"
72 "ubfx %1, %6, #4, #4 \n\t"
73 "ldr %0, [%5, %0, lsl #2] \n\t"
74 "lsl %2, %8, #30 \n\t"
75 "ldr %1, [%5, %1, lsl #2] \n\t"
76 "lsl %3, %8, #31 \n\t"
77 "vmov d0, %0, %1 \n\t"
78 "bic %2, %2, #1<<30 \n\t"
79 "vld1.32 {d1[]}, [%7,:32] \n\t"
80 "vmov d2, %2, %3 \n\t"
81 "veor d0, d0, d2 \n\t"
82 "vmul.f32 d0, d0, d1 \n\t"
83 "vst1.32 {d0}, [%4,:64]! \n\t"
84 : "=&r"(v0), "=&r"(v1), "=&r"(v2), "=&r"(v3), "+r"(dst)
85 : "r"(v), "r"(idx), "r"(scale), "r"(sign)
86 : "d0", "d1", "d2");
87 return dst;
88 }
89
90 #define VMUL4S VMUL4S
91 static inline float *VMUL4S(float *dst, const float *v, unsigned idx,
92 unsigned sign, const float *scale)
93 {
94 unsigned v0, v1, v2, v3, nz;
95 __asm__ volatile ("vld1.32 {d2[],d3[]},[%9,:32] \n\t"
96 "ubfx %0, %8, #0, #2 \n\t"
97 "ubfx %1, %8, #2, #2 \n\t"
98 "ldr %0, [%7, %0, lsl #2] \n\t"
99 "ubfx %2, %8, #4, #2 \n\t"
100 "ldr %1, [%7, %1, lsl #2] \n\t"
101 "ubfx %3, %8, #6, #2 \n\t"
102 "ldr %2, [%7, %2, lsl #2] \n\t"
103 "vmov d0, %0, %1 \n\t"
104 "ldr %3, [%7, %3, lsl #2] \n\t"
105 "lsr %6, %8, #12 \n\t"
106 "rbit %6, %6 \n\t"
107 "vmov d1, %2, %3 \n\t"
108 "lsls %6, %6, #1 \n\t"
109 "and %0, %5, #1<<31 \n\t"
110 "lslcs %5, %5, #1 \n\t"
111 "lsls %6, %6, #1 \n\t"
112 "and %1, %5, #1<<31 \n\t"
113 "lslcs %5, %5, #1 \n\t"
114 "lsls %6, %6, #1 \n\t"
115 "and %2, %5, #1<<31 \n\t"
116 "lslcs %5, %5, #1 \n\t"
117 "vmov d4, %0, %1 \n\t"
118 "and %3, %5, #1<<31 \n\t"
119 "vmov d5, %2, %3 \n\t"
120 "veor q0, q0, q2 \n\t"
121 "vmul.f32 q0, q0, q1 \n\t"
122 "vst1.32 {q0}, [%4,:128]! \n\t"
123 : "=&r"(v0), "=&r"(v1), "=&r"(v2), "=&r"(v3), "+r"(dst),
124 "+r"(sign), "=r"(nz)
125 : "r"(v), "r"(idx), "r"(scale)
126 : "d0", "d1", "d2", "d3", "d4", "d5");
127 return dst;
128 }
129
130 #endif /* HAVE_NEON && HAVE_INLINE_ASM */