comparison ppc/dsputil_ppc.c @ 8590:7a463923ecd1 libavcodec

Change semantic of CONFIG_*, HAVE_* and ARCH_*. They are now always defined to either 0 or 1.

8589:a29b5b5c3c9d

#include "libavcodec/dsputil.h"

#include "dsputil_ppc.h"

#ifdef HAVE_ALTIVEC
#include "dsputil_altivec.h"

void fdct_altivec(int16_t *block);
void gmc1_altivec(uint8_t *dst, uint8_t *src, int stride, int h,
                  int x16, int y16, int rounder);

int mm_flags = 0;

int mm_support(void)
{
    int result = 0;
#ifdef HAVE_ALTIVEC
    if (has_altivec()) {
        result |= FF_MM_ALTIVEC;
    }
#endif /* result */
    return result;
}

#ifdef CONFIG_POWERPC_PERF
unsigned long long perfdata[POWERPC_NUM_PMC_ENABLED][powerpc_perf_total][powerpc_data_total];
/* list below must match enum in dsputil_ppc.h */
static unsigned char* perfname[] = {
    "ff_fft_calc_altivec",
    "gmc1_altivec",

    ""
};
#include <stdio.h>
#endif

#ifdef CONFIG_POWERPC_PERF
void powerpc_display_perf_report(void)
{
    int i, j;
    av_log(NULL, AV_LOG_INFO, "PowerPC performance report\n Values are from the PMC registers, and represent whatever the registers are set to record.\n");
    for(i = 0 ; i < powerpc_perf_total ; i++) {

POWERPC_PERF_STOP_COUNT(powerpc_clear_blocks_dcbz32, 1);
}

/* same as above, when dcbzl clear a whole 128B cache line
   i.e. the PPC970 aka G5 */
#ifdef HAVE_DCBZL
void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
{
POWERPC_PERF_DECLARE(powerpc_clear_blocks_dcbz128, 1);
    register int misal = ((unsigned long)blocks & 0x0000007f);
    register int i = 0;

{
    memset(blocks, 0, sizeof(DCTELEM)*6*64);
}
#endif

#ifdef HAVE_DCBZL
/* check dcbz report how many bytes are set to 0 by dcbz */
/* update 24/06/2003 : replace dcbz by dcbzl to get
   the intended effect (Apple "fixed" dcbz)
   unfortunately this cannot be used unless the assembler
   knows about dcbzl ... */

            break;
        default:
            break;
    }

#ifdef HAVE_ALTIVEC
    if(ENABLE_H264_DECODER) dsputil_h264_init_ppc(c, avctx);

    if (has_altivec()) {
        mm_flags |= FF_MM_ALTIVEC;

            vc1dsp_init_altivec(c, avctx);
        float_init_altivec(c, avctx);
        int_init_altivec(c, avctx);
        c->gmc1 = gmc1_altivec;

#ifdef CONFIG_ENCODERS
        if (avctx->dct_algo == FF_DCT_AUTO ||
            avctx->dct_algo == FF_DCT_ALTIVEC) {
            c->fdct = fdct_altivec;
        }
#endif //CONFIG_ENCODERS

                c->idct_add = idct_add_altivec;
                c->idct_permutation_type = FF_TRANSPOSE_IDCT_PERM;
            }
        }

#ifdef CONFIG_POWERPC_PERF
        {
            int i, j;
            for (i = 0 ; i < powerpc_perf_total ; i++) {
                for (j = 0; j < POWERPC_NUM_PMC_ENABLED ; j++) {
                    perfdata[j][i][powerpc_data_min] = 0xFFFFFFFFFFFFFFFFULL;

8590:7a463923ecd1

#include "libavcodec/dsputil.h"

#include "dsputil_ppc.h"

#if HAVE_ALTIVEC
#include "dsputil_altivec.h"

void fdct_altivec(int16_t *block);
void gmc1_altivec(uint8_t *dst, uint8_t *src, int stride, int h,
                  int x16, int y16, int rounder);

int mm_flags = 0;

int mm_support(void)
{
    int result = 0;
#if HAVE_ALTIVEC
    if (has_altivec()) {
        result |= FF_MM_ALTIVEC;
    }
#endif /* result */
    return result;
}

#if CONFIG_POWERPC_PERF
unsigned long long perfdata[POWERPC_NUM_PMC_ENABLED][powerpc_perf_total][powerpc_data_total];
/* list below must match enum in dsputil_ppc.h */
static unsigned char* perfname[] = {
    "ff_fft_calc_altivec",
    "gmc1_altivec",

    ""
};
#include <stdio.h>
#endif

#if CONFIG_POWERPC_PERF
void powerpc_display_perf_report(void)
{
    int i, j;
    av_log(NULL, AV_LOG_INFO, "PowerPC performance report\n Values are from the PMC registers, and represent whatever the registers are set to record.\n");
    for(i = 0 ; i < powerpc_perf_total ; i++) {

POWERPC_PERF_STOP_COUNT(powerpc_clear_blocks_dcbz32, 1);
}

/* same as above, when dcbzl clear a whole 128B cache line
   i.e. the PPC970 aka G5 */
#if HAVE_DCBZL
void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
{
POWERPC_PERF_DECLARE(powerpc_clear_blocks_dcbz128, 1);
    register int misal = ((unsigned long)blocks & 0x0000007f);
    register int i = 0;

{
    memset(blocks, 0, sizeof(DCTELEM)*6*64);
}
#endif

#if HAVE_DCBZL
/* check dcbz report how many bytes are set to 0 by dcbz */
/* update 24/06/2003 : replace dcbz by dcbzl to get
   the intended effect (Apple "fixed" dcbz)
   unfortunately this cannot be used unless the assembler
   knows about dcbzl ... */

            break;
        default:
            break;
    }

#if HAVE_ALTIVEC
    if(ENABLE_H264_DECODER) dsputil_h264_init_ppc(c, avctx);

    if (has_altivec()) {
        mm_flags |= FF_MM_ALTIVEC;

            vc1dsp_init_altivec(c, avctx);
        float_init_altivec(c, avctx);
        int_init_altivec(c, avctx);
        c->gmc1 = gmc1_altivec;

#if CONFIG_ENCODERS
        if (avctx->dct_algo == FF_DCT_AUTO ||
            avctx->dct_algo == FF_DCT_ALTIVEC) {
            c->fdct = fdct_altivec;
        }
#endif //CONFIG_ENCODERS

                c->idct_add = idct_add_altivec;
                c->idct_permutation_type = FF_TRANSPOSE_IDCT_PERM;
            }
        }

#if CONFIG_POWERPC_PERF
        {
            int i, j;
            for (i = 0 ; i < powerpc_perf_total ; i++) {
                for (j = 0; j < POWERPC_NUM_PMC_ENABLED ; j++) {
                    perfdata[j][i][powerpc_data_min] = 0xFFFFFFFFFFFFFFFFULL;