Mercurial > libavcodec.hg
comparison x86/mlpdsp.c @ 9791:de4a8f76b1b9 libavcodec
Use fewer macros in x86-optimized mlpdsp.
Fixes compilation on 32-bit llvm which didn't allow a cast in an m operand.
| author | ramiro |
|---|---|
| date | Wed, 03 Jun 2009 23:48:28 +0000 |
| parents | dc3c984a1c1a |
| children |
comparison
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deleted
inserted
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| 9790:3fbd5452cbd1 | 9791:de4a8f76b1b9 |
|---|---|
| 73 | 73 |
| 74 #define ACCUM "%%rdx" | 74 #define ACCUM "%%rdx" |
| 75 #define RESULT "%%rsi" | 75 #define RESULT "%%rsi" |
| 76 #define RESULT32 "%%esi" | 76 #define RESULT32 "%%esi" |
| 77 | 77 |
| 78 #define READVAL "r" | |
| 79 #define RDWRVAL "+r" | |
| 80 #define COUNTER "c" | |
| 81 #define ECXUSED | |
| 82 | |
| 83 #else /* if ARCH_X86_32 */ | 78 #else /* if ARCH_X86_32 */ |
| 84 | 79 |
| 85 #define MLPMUL(label, offset, offs, offc) \ | 80 #define MLPMUL(label, offset, offs, offc) \ |
| 86 LABEL_MANGLE(label)": \n\t" \ | 81 LABEL_MANGLE(label)": \n\t" \ |
| 87 "mov "offset"+"offs"(%0), %%eax\n\t" \ | 82 "mov "offset"+"offs"(%0), %%eax\n\t" \ |
| 103 "shrd %%cl, %%edx, %%eax\n\t" \ | 98 "shrd %%cl, %%edx, %%eax\n\t" \ |
| 104 | 99 |
| 105 #define ACCUM "%%edx" | 100 #define ACCUM "%%edx" |
| 106 #define RESULT "%%eax" | 101 #define RESULT "%%eax" |
| 107 #define RESULT32 "%%eax" | 102 #define RESULT32 "%%eax" |
| 108 | |
| 109 #define READVAL "m" | |
| 110 #define RDWRVAL "+m" | |
| 111 #define COUNTER "m" | |
| 112 #define ECXUSED , "ecx" | |
| 113 | 103 |
| 114 #endif /* !ARCH_X86_64 */ | 104 #endif /* !ARCH_X86_64 */ |
| 115 | 105 |
| 116 #define BINC AV_STRINGIFY(4* MAX_CHANNELS) | 106 #define BINC AV_STRINGIFY(4* MAX_CHANNELS) |
| 117 #define IOFFS AV_STRINGIFY(4*(MAX_FIR_ORDER + MAX_BLOCKSIZE)) | 107 #define IOFFS AV_STRINGIFY(4*(MAX_FIR_ORDER + MAX_BLOCKSIZE)) |
| 162 "incl %3 \n\t" | 152 "incl %3 \n\t" |
| 163 "js 1b \n\t" | 153 "js 1b \n\t" |
| 164 : /* 0*/"+r"(state), | 154 : /* 0*/"+r"(state), |
| 165 /* 1*/"+r"(coeff), | 155 /* 1*/"+r"(coeff), |
| 166 /* 2*/"+r"(sample_buffer), | 156 /* 2*/"+r"(sample_buffer), |
| 167 /* 3*/RDWRVAL(blocksize) | |
| 168 : | |
| 169 /* 4*/READVAL((x86_reg)mask), | |
| 170 /* 5*/READVAL(firjump), | |
| 171 /* 6*/READVAL(iirjump), | |
| 172 /* 7*/COUNTER(filter_shift) | |
| 173 #if ARCH_X86_64 | 157 #if ARCH_X86_64 |
| 158 /* 3*/"+r"(blocksize) | |
| 159 : /* 4*/"r"((x86_reg)mask), /* 5*/"r"(firjump), | |
| 160 /* 6*/"r"(iirjump) , /* 7*/"c"(filter_shift) | |
| 174 , /* 8*/"r"((int64_t)coeff[0]) | 161 , /* 8*/"r"((int64_t)coeff[0]) |
| 175 , /* 9*/"r"((int64_t)coeff[1]) | 162 , /* 9*/"r"((int64_t)coeff[1]) |
| 176 , /*10*/"r"((int64_t)coeff[2]) | 163 , /*10*/"r"((int64_t)coeff[2]) |
| 177 #endif /* ARCH_X86_64 */ | 164 : "rax", "rdx", "rsi" |
| 178 : REG_a, REG_d, REG_S | 165 #else /* ARCH_X86_32 */ |
| 179 ECXUSED | 166 /* 3*/"+m"(blocksize) |
| 167 : /* 4*/"m"( mask), /* 5*/"m"(firjump), | |
| 168 /* 6*/"m"(iirjump) , /* 7*/"m"(filter_shift) | |
| 169 : "eax", "edx", "esi", "ecx" | |
| 170 #endif /* !ARCH_X86_64 */ | |
| 180 ); | 171 ); |
| 181 } | 172 } |
| 182 | 173 |
| 183 #endif /* HAVE_7REGS && HAVE_TEN_OPERANDS */ | 174 #endif /* HAVE_7REGS && HAVE_TEN_OPERANDS */ |
| 184 | 175 |