Mercurial > libavcodec.hg
comparison i386/fdct_mmx.c @ 2967:ef2149182f1c libavcodec
COSMETICS: Remove all trailing whitespace.
author | diego |
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date | Sat, 17 Dec 2005 18:14:38 +0000 |
parents | b128802eb77b |
children | bfabfdf9ce55 |
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2966:564788471dd4 | 2967:ef2149182f1c |
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3 * The gcc porting is Copyright (c) 2001 Fabrice Bellard. | 3 * The gcc porting is Copyright (c) 2001 Fabrice Bellard. |
4 * cleanup/optimizations are Copyright (c) 2002-2004 Michael Niedermayer <michaelni@gmx.at> | 4 * cleanup/optimizations are Copyright (c) 2002-2004 Michael Niedermayer <michaelni@gmx.at> |
5 * SSE2 optimization is Copyright (c) 2004 Denes Balatoni. | 5 * SSE2 optimization is Copyright (c) 2004 Denes Balatoni. |
6 * | 6 * |
7 * from fdctam32.c - AP922 MMX(3D-Now) forward-DCT | 7 * from fdctam32.c - AP922 MMX(3D-Now) forward-DCT |
8 * | 8 * |
9 * Intel Application Note AP-922 - fast, precise implementation of DCT | 9 * Intel Application Note AP-922 - fast, precise implementation of DCT |
10 * http://developer.intel.com/vtune/cbts/appnotes.htm | 10 * http://developer.intel.com/vtune/cbts/appnotes.htm |
11 * | 11 * |
12 * Also of inspiration: | 12 * Also of inspiration: |
13 * a page about fdct at http://www.geocities.com/ssavekar/dct.htm | 13 * a page about fdct at http://www.geocities.com/ssavekar/dct.htm |
49 | 49 |
50 static const int64_t fdct_one_corr ATTR_ALIGN(8) = 0x0001000100010001LL; | 50 static const int64_t fdct_one_corr ATTR_ALIGN(8) = 0x0001000100010001LL; |
51 | 51 |
52 static const int32_t fdct_r_row[2] ATTR_ALIGN(8) = {RND_FRW_ROW, RND_FRW_ROW }; | 52 static const int32_t fdct_r_row[2] ATTR_ALIGN(8) = {RND_FRW_ROW, RND_FRW_ROW }; |
53 | 53 |
54 struct | 54 struct |
55 { | 55 { |
56 const int32_t fdct_r_row_sse2[4] ATTR_ALIGN(16); | 56 const int32_t fdct_r_row_sse2[4] ATTR_ALIGN(16); |
57 } fdct_r_row_sse2 ATTR_ALIGN(16)= | 57 } fdct_r_row_sse2 ATTR_ALIGN(16)= |
58 {{ | 58 {{ |
59 RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW | 59 RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW |
60 }}; | 60 }}; |
61 //static const long fdct_r_row_sse2[4] ATTR_ALIGN(16) = {RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW}; | 61 //static const long fdct_r_row_sse2[4] ATTR_ALIGN(16) = {RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW}; |
62 | 62 |
63 static const int16_t tab_frw_01234567[] ATTR_ALIGN(8) = { // forward_dct coeff table | 63 static const int16_t tab_frw_01234567[] ATTR_ALIGN(8) = { // forward_dct coeff table |
64 16384, 16384, 22725, 19266, | 64 16384, 16384, 22725, 19266, |
65 16384, 16384, 12873, 4520, | 65 16384, 16384, 12873, 4520, |
66 21407, 8867, 19266, -4520, | 66 21407, 8867, 19266, -4520, |
67 -8867, -21407, -22725, -12873, | 67 -8867, -21407, -22725, -12873, |
68 16384, -16384, 12873, -22725, | 68 16384, -16384, 12873, -22725, |
69 -16384, 16384, 4520, 19266, | 69 -16384, 16384, 4520, 19266, |
70 8867, -21407, 4520, -12873, | 70 8867, -21407, 4520, -12873, |
71 21407, -8867, 19266, -22725, | 71 21407, -8867, 19266, -22725, |
72 | 72 |
73 22725, 22725, 31521, 26722, | 73 22725, 22725, 31521, 26722, |
74 22725, 22725, 17855, 6270, | 74 22725, 22725, 17855, 6270, |
75 29692, 12299, 26722, -6270, | 75 29692, 12299, 26722, -6270, |
76 -12299, -29692, -31521, -17855, | 76 -12299, -29692, -31521, -17855, |
77 22725, -22725, 17855, -31521, | 77 22725, -22725, 17855, -31521, |
78 -22725, 22725, 6270, 26722, | 78 -22725, 22725, 6270, 26722, |
79 12299, -29692, 6270, -17855, | 79 12299, -29692, 6270, -17855, |
80 29692, -12299, 26722, -31521, | 80 29692, -12299, 26722, -31521, |
81 | 81 |
82 21407, 21407, 29692, 25172, | 82 21407, 21407, 29692, 25172, |
83 21407, 21407, 16819, 5906, | 83 21407, 21407, 16819, 5906, |
84 27969, 11585, 25172, -5906, | 84 27969, 11585, 25172, -5906, |
85 -11585, -27969, -29692, -16819, | 85 -11585, -27969, -29692, -16819, |
86 21407, -21407, 16819, -29692, | 86 21407, -21407, 16819, -29692, |
87 -21407, 21407, 5906, 25172, | 87 -21407, 21407, 5906, 25172, |
88 11585, -27969, 5906, -16819, | 88 11585, -27969, 5906, -16819, |
89 27969, -11585, 25172, -29692, | 89 27969, -11585, 25172, -29692, |
90 | 90 |
91 19266, 19266, 26722, 22654, | 91 19266, 19266, 26722, 22654, |
92 19266, 19266, 15137, 5315, | 92 19266, 19266, 15137, 5315, |
93 25172, 10426, 22654, -5315, | 93 25172, 10426, 22654, -5315, |
94 -10426, -25172, -26722, -15137, | 94 -10426, -25172, -26722, -15137, |
95 19266, -19266, 15137, -26722, | 95 19266, -19266, 15137, -26722, |
96 -19266, 19266, 5315, 22654, | 96 -19266, 19266, 5315, 22654, |
97 10426, -25172, 5315, -15137, | 97 10426, -25172, 5315, -15137, |
98 25172, -10426, 22654, -26722, | 98 25172, -10426, 22654, -26722, |
99 | 99 |
100 16384, 16384, 22725, 19266, | 100 16384, 16384, 22725, 19266, |
101 16384, 16384, 12873, 4520, | 101 16384, 16384, 12873, 4520, |
102 21407, 8867, 19266, -4520, | 102 21407, 8867, 19266, -4520, |
103 -8867, -21407, -22725, -12873, | 103 -8867, -21407, -22725, -12873, |
104 16384, -16384, 12873, -22725, | 104 16384, -16384, 12873, -22725, |
105 -16384, 16384, 4520, 19266, | 105 -16384, 16384, 4520, 19266, |
106 8867, -21407, 4520, -12873, | 106 8867, -21407, 4520, -12873, |
107 21407, -8867, 19266, -22725, | 107 21407, -8867, 19266, -22725, |
108 | 108 |
109 19266, 19266, 26722, 22654, | 109 19266, 19266, 26722, 22654, |
110 19266, 19266, 15137, 5315, | 110 19266, 19266, 15137, 5315, |
111 25172, 10426, 22654, -5315, | 111 25172, 10426, 22654, -5315, |
112 -10426, -25172, -26722, -15137, | 112 -10426, -25172, -26722, -15137, |
113 19266, -19266, 15137, -26722, | 113 19266, -19266, 15137, -26722, |
114 -19266, 19266, 5315, 22654, | 114 -19266, 19266, 5315, 22654, |
115 10426, -25172, 5315, -15137, | 115 10426, -25172, 5315, -15137, |
116 25172, -10426, 22654, -26722, | 116 25172, -10426, 22654, -26722, |
117 | 117 |
118 21407, 21407, 29692, 25172, | 118 21407, 21407, 29692, 25172, |
119 21407, 21407, 16819, 5906, | 119 21407, 21407, 16819, 5906, |
120 27969, 11585, 25172, -5906, | 120 27969, 11585, 25172, -5906, |
121 -11585, -27969, -29692, -16819, | 121 -11585, -27969, -29692, -16819, |
122 21407, -21407, 16819, -29692, | 122 21407, -21407, 16819, -29692, |
123 -21407, 21407, 5906, 25172, | 123 -21407, 21407, 5906, 25172, |
124 11585, -27969, 5906, -16819, | 124 11585, -27969, 5906, -16819, |
125 27969, -11585, 25172, -29692, | 125 27969, -11585, 25172, -29692, |
126 | 126 |
127 22725, 22725, 31521, 26722, | 127 22725, 22725, 31521, 26722, |
128 22725, 22725, 17855, 6270, | 128 22725, 22725, 17855, 6270, |
129 29692, 12299, 26722, -6270, | 129 29692, 12299, 26722, -6270, |
130 -12299, -29692, -31521, -17855, | 130 -12299, -29692, -31521, -17855, |
131 22725, -22725, 17855, -31521, | 131 22725, -22725, 17855, -31521, |
132 -22725, 22725, 6270, 26722, | 132 -22725, 22725, 6270, 26722, |
133 12299, -29692, 6270, -17855, | 133 12299, -29692, 6270, -17855, |
134 29692, -12299, 26722, -31521, | 134 29692, -12299, 26722, -31521, |
135 }; | 135 }; |
136 | 136 |
137 struct | 137 struct |
138 { | 138 { |
139 const int16_t tab_frw_01234567_sse2[256] ATTR_ALIGN(16); | 139 const int16_t tab_frw_01234567_sse2[256] ATTR_ALIGN(16); |
140 } tab_frw_01234567_sse2 ATTR_ALIGN(16) = | 140 } tab_frw_01234567_sse2 ATTR_ALIGN(16) = |
141 {{ | 141 {{ |
142 //static const int16_t tab_frw_01234567_sse2[] ATTR_ALIGN(16) = { // forward_dct coeff table | 142 //static const int16_t tab_frw_01234567_sse2[] ATTR_ALIGN(16) = { // forward_dct coeff table |
143 #define TABLE_SSE2 C4, C4, C1, C3, -C6, -C2, -C1, -C5, \ | 143 #define TABLE_SSE2 C4, C4, C1, C3, -C6, -C2, -C1, -C5, \ |
144 C4, C4, C5, C7, C2, C6, C3, -C7, \ | 144 C4, C4, C5, C7, C2, C6, C3, -C7, \ |
145 -C4, C4, C7, C3, C6, -C2, C7, -C5, \ | 145 -C4, C4, C7, C3, C6, -C2, C7, -C5, \ |
146 C4, -C4, C5, -C1, C2, -C6, C3, -C1, | 146 C4, -C4, C5, -C1, C2, -C6, C3, -C1, |
147 // c1..c7 * cos(pi/4) * 2^15 | 147 // c1..c7 * cos(pi/4) * 2^15 |
148 #define C1 22725 | 148 #define C1 22725 |
149 #define C2 21407 | 149 #define C2 21407 |
150 #define C3 19266 | 150 #define C3 19266 |
151 #define C4 16384 | 151 #define C4 16384 |
152 #define C5 12873 | 152 #define C5 12873 |
353 asm volatile( | 353 asm volatile( |
354 ".macro FDCT_ROW_SSE2_H1 i t \n\t" | 354 ".macro FDCT_ROW_SSE2_H1 i t \n\t" |
355 "movq \\i(%0), %%xmm2 \n\t" | 355 "movq \\i(%0), %%xmm2 \n\t" |
356 "movq \\i+8(%0), %%xmm0 \n\t" | 356 "movq \\i+8(%0), %%xmm0 \n\t" |
357 "movdqa \\t+32(%1), %%xmm3 \n\t" | 357 "movdqa \\t+32(%1), %%xmm3 \n\t" |
358 "movdqa \\t+48(%1), %%xmm7 \n\t" | 358 "movdqa \\t+48(%1), %%xmm7 \n\t" |
359 "movdqa \\t(%1), %%xmm4 \n\t" | 359 "movdqa \\t(%1), %%xmm4 \n\t" |
360 "movdqa \\t+16(%1), %%xmm5 \n\t" | 360 "movdqa \\t+16(%1), %%xmm5 \n\t" |
361 ".endm \n\t" | 361 ".endm \n\t" |
362 ".macro FDCT_ROW_SSE2_H2 i t \n\t" | 362 ".macro FDCT_ROW_SSE2_H2 i t \n\t" |
363 "movq \\i(%0), %%xmm2 \n\t" | 363 "movq \\i(%0), %%xmm2 \n\t" |
364 "movq \\i+8(%0), %%xmm0 \n\t" | 364 "movq \\i+8(%0), %%xmm0 \n\t" |
365 "movdqa \\t+32(%1), %%xmm3 \n\t" | 365 "movdqa \\t+32(%1), %%xmm3 \n\t" |
366 "movdqa \\t+48(%1), %%xmm7 \n\t" | 366 "movdqa \\t+48(%1), %%xmm7 \n\t" |
367 ".endm \n\t" | 367 ".endm \n\t" |
368 ".macro FDCT_ROW_SSE2 i \n\t" | 368 ".macro FDCT_ROW_SSE2 i \n\t" |
369 "movq %%xmm2, %%xmm1 \n\t" | 369 "movq %%xmm2, %%xmm1 \n\t" |
370 "pshuflw $27, %%xmm0, %%xmm0 \n\t" | 370 "pshuflw $27, %%xmm0, %%xmm0 \n\t" |
371 "paddsw %%xmm0, %%xmm1 \n\t" | 371 "paddsw %%xmm0, %%xmm1 \n\t" |
372 "psubsw %%xmm0, %%xmm2 \n\t" | 372 "psubsw %%xmm0, %%xmm2 \n\t" |
373 "punpckldq %%xmm2, %%xmm1 \n\t" | 373 "punpckldq %%xmm2, %%xmm1 \n\t" |
374 "pshufd $78, %%xmm1, %%xmm2 \n\t" | 374 "pshufd $78, %%xmm1, %%xmm2 \n\t" |
375 "pmaddwd %%xmm2, %%xmm3 \n\t" | 375 "pmaddwd %%xmm2, %%xmm3 \n\t" |
376 "pmaddwd %%xmm1, %%xmm7 \n\t" | 376 "pmaddwd %%xmm1, %%xmm7 \n\t" |
377 "pmaddwd %%xmm5, %%xmm2 \n\t" | 377 "pmaddwd %%xmm5, %%xmm2 \n\t" |
378 "pmaddwd %%xmm4, %%xmm1 \n\t" | 378 "pmaddwd %%xmm4, %%xmm1 \n\t" |
379 "paddd %%xmm7, %%xmm3 \n\t" | 379 "paddd %%xmm7, %%xmm3 \n\t" |
380 "paddd %%xmm2, %%xmm1 \n\t" | 380 "paddd %%xmm2, %%xmm1 \n\t" |
381 "paddd %%xmm6, %%xmm3 \n\t" | 381 "paddd %%xmm6, %%xmm3 \n\t" |
382 "paddd %%xmm6, %%xmm1 \n\t" | 382 "paddd %%xmm6, %%xmm1 \n\t" |
383 "psrad %3, %%xmm3 \n\t" | 383 "psrad %3, %%xmm3 \n\t" |
384 "psrad %3, %%xmm1 \n\t" | 384 "psrad %3, %%xmm1 \n\t" |
385 "packssdw %%xmm3, %%xmm1 \n\t" | 385 "packssdw %%xmm3, %%xmm1 \n\t" |
386 "movdqa %%xmm1, \\i(%4) \n\t" | 386 "movdqa %%xmm1, \\i(%4) \n\t" |
387 ".endm \n\t" | 387 ".endm \n\t" |
388 "movdqa (%2), %%xmm6 \n\t" | 388 "movdqa (%2), %%xmm6 \n\t" |
389 "FDCT_ROW_SSE2_H1 0 0 \n\t" | 389 "FDCT_ROW_SSE2_H1 0 0 \n\t" |
390 "FDCT_ROW_SSE2 0 \n\t" | 390 "FDCT_ROW_SSE2 0 \n\t" |
391 "FDCT_ROW_SSE2_H2 64 0 \n\t" | 391 "FDCT_ROW_SSE2_H2 64 0 \n\t" |
392 "FDCT_ROW_SSE2 64 \n\t" | 392 "FDCT_ROW_SSE2 64 \n\t" |
393 | 393 |
409 : "r" (in), "r" (tab_frw_01234567_sse2.tab_frw_01234567_sse2), "r" (fdct_r_row_sse2.fdct_r_row_sse2), "i" (SHIFT_FRW_ROW), "r" (out) | 409 : "r" (in), "r" (tab_frw_01234567_sse2.tab_frw_01234567_sse2), "r" (fdct_r_row_sse2.fdct_r_row_sse2), "i" (SHIFT_FRW_ROW), "r" (out) |
410 ); | 410 ); |
411 } | 411 } |
412 | 412 |
413 static always_inline void fdct_row_mmx2(const int16_t *in, int16_t *out, const int16_t *table) | 413 static always_inline void fdct_row_mmx2(const int16_t *in, int16_t *out, const int16_t *table) |
414 { | 414 { |
415 pshufw_m2r(*(in + 4), mm5, 0x1B); | 415 pshufw_m2r(*(in + 4), mm5, 0x1B); |
416 movq_m2r(*(in + 0), mm0); | 416 movq_m2r(*(in + 0), mm0); |
417 movq_r2r(mm0, mm1); | 417 movq_r2r(mm0, mm1); |
418 paddsw_r2r(mm5, mm0); | 418 paddsw_r2r(mm5, mm0); |
419 psubsw_r2r(mm5, mm1); | 419 psubsw_r2r(mm5, mm1); |
452 movq_r2m(mm3, *(out + 0)); | 452 movq_r2m(mm3, *(out + 0)); |
453 movq_r2m(mm7, *(out + 4)); | 453 movq_r2m(mm7, *(out + 4)); |
454 } | 454 } |
455 | 455 |
456 static always_inline void fdct_row_mmx(const int16_t *in, int16_t *out, const int16_t *table) | 456 static always_inline void fdct_row_mmx(const int16_t *in, int16_t *out, const int16_t *table) |
457 { | 457 { |
458 //FIXME reorder (i dont have a old mmx only cpu here to benchmark ...) | 458 //FIXME reorder (i dont have a old mmx only cpu here to benchmark ...) |
459 movd_m2r(*(in + 6), mm1); | 459 movd_m2r(*(in + 6), mm1); |
460 punpcklwd_m2r(*(in + 4), mm1); | 460 punpcklwd_m2r(*(in + 4), mm1); |
461 movq_r2r(mm1, mm2); | 461 movq_r2r(mm1, mm2); |
462 psrlq_i2r(0x20, mm1); | 462 psrlq_i2r(0x20, mm1); |
545 table += 32; | 545 table += 32; |
546 out += 8; | 546 out += 8; |
547 } | 547 } |
548 } | 548 } |
549 | 549 |
550 void ff_fdct_sse2(int16_t *block) | 550 void ff_fdct_sse2(int16_t *block) |
551 { | 551 { |
552 int64_t align_tmp[16] ATTR_ALIGN(8); | 552 int64_t align_tmp[16] ATTR_ALIGN(8); |
553 int16_t * const block_tmp= (int16_t*)align_tmp; | 553 int16_t * const block_tmp= (int16_t*)align_tmp; |
554 int16_t *block1; | 554 int16_t *block1; |
555 | 555 |