diff i386/snowdsp_mmx.c @ 6755:33896780c612 libavcodec

Do not misuse long as the size of a register in x86. typedef x86_reg as the appropriate size and use it instead.

--- a/i386/snowdsp_mmx.c	Thu May 08 14:02:35 2008 +0000
+++ b/i386/snowdsp_mmx.c	Thu May 08 21:11:24 2008 +0000
@@ -73,7 +73,7 @@
         IDWTELEM * const dst = b+w2;
 
         i = 0;
-        for(; (((long)&dst[i]) & 0x1F) && i<w_r; i++){
+        for(; (((x86_reg)&dst[i]) & 0x1F) && i<w_r; i++){
             dst[i] = dst[i] - (b[i] + b[i + 1]);
         }
         for(; i<w_r-15; i+=16){
@@ -146,7 +146,7 @@
         IDWTELEM * const src = b+w2;
 
         i = 0;
-        for(; (((long)&temp[i]) & 0x1F) && i<w_r; i++){
+        for(; (((x86_reg)&temp[i]) & 0x1F) && i<w_r; i++){
             temp[i] = src[i] - ((-W_AM*(b[i] + b[i+1]))>>W_AS);
         }
         for(; i<w_r-7; i+=8){
@@ -436,7 +436,7 @@
         "movdqa %%"s3", %%"t3" \n\t"
 
 void ff_snow_vertical_compose97i_sse2(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, IDWTELEM *b3, IDWTELEM *b4, IDWTELEM *b5, int width){
-    long i = width;
+    x86_reg i = width;
 
     while(i & 0x1F)
     {
@@ -534,7 +534,7 @@
 
 
 void ff_snow_vertical_compose97i_mmx(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, IDWTELEM *b3, IDWTELEM *b4, IDWTELEM *b5, int width){
-    long i = width;
+    x86_reg i = width;
     while(i & 15)
     {
         i--;
@@ -605,7 +605,7 @@
 
 #define snow_inner_add_yblock_sse2_header \
     IDWTELEM * * dst_array = sb->line + src_y;\
-    long tmp;\
+    x86_reg tmp;\
     asm volatile(\
              "mov  %7, %%"REG_c"             \n\t"\
              "mov  %6, %2                    \n\t"\
@@ -667,7 +667,7 @@
              "jnz 1b                         \n\t"\
              :"+m"(dst8),"+m"(dst_array),"=&r"(tmp)\
              :\
-             "rm"((long)(src_x<<1)),"m"(obmc),"a"(block),"m"((long)b_h),"m"((long)src_stride):\
+             "rm"((x86_reg)(src_x<<1)),"m"(obmc),"a"(block),"m"((x86_reg)b_h),"m"((x86_reg)src_stride):\
              "%"REG_c"","%"REG_S"","%"REG_D"","%"REG_d"");
 
 #define snow_inner_add_yblock_sse2_end_8\
@@ -684,8 +684,8 @@
              "dec %2                         \n\t"\
              snow_inner_add_yblock_sse2_end_common2
 
-static void inner_add_yblock_bw_8_obmc_16_bh_even_sse2(const uint8_t *obmc, const long obmc_stride, uint8_t * * block, int b_w, long b_h,
-                      int src_x, int src_y, long src_stride, slice_buffer * sb, int add, uint8_t * dst8){
+static void inner_add_yblock_bw_8_obmc_16_bh_even_sse2(const uint8_t *obmc, const x86_reg obmc_stride, uint8_t * * block, int b_w, x86_reg b_h,
+                      int src_x, int src_y, x86_reg src_stride, slice_buffer * sb, int add, uint8_t * dst8){
 snow_inner_add_yblock_sse2_header
 snow_inner_add_yblock_sse2_start_8("xmm1", "xmm5", "3", "0")
 snow_inner_add_yblock_sse2_accum_8("2", "8")
@@ -732,8 +732,8 @@
 snow_inner_add_yblock_sse2_end_8
 }
 
-static void inner_add_yblock_bw_16_obmc_32_sse2(const uint8_t *obmc, const long obmc_stride, uint8_t * * block, int b_w, long b_h,
-                      int src_x, int src_y, long src_stride, slice_buffer * sb, int add, uint8_t * dst8){
+static void inner_add_yblock_bw_16_obmc_32_sse2(const uint8_t *obmc, const x86_reg obmc_stride, uint8_t * * block, int b_w, x86_reg b_h,
+                      int src_x, int src_y, x86_reg src_stride, slice_buffer * sb, int add, uint8_t * dst8){
 snow_inner_add_yblock_sse2_header
 snow_inner_add_yblock_sse2_start_16("xmm1", "xmm5", "3", "0")
 snow_inner_add_yblock_sse2_accum_16("2", "16")
@@ -758,7 +758,7 @@
 
 #define snow_inner_add_yblock_mmx_header \
     IDWTELEM * * dst_array = sb->line + src_y;\
-    long tmp;\
+    x86_reg tmp;\
     asm volatile(\
              "mov  %7, %%"REG_c"             \n\t"\
              "mov  %6, %2                    \n\t"\
@@ -815,11 +815,11 @@
              "jnz 1b                         \n\t"\
              :"+m"(dst8),"+m"(dst_array),"=&r"(tmp)\
              :\
-             "rm"((long)(src_x<<1)),"m"(obmc),"a"(block),"m"((long)b_h),"m"((long)src_stride):\
+             "rm"((x86_reg)(src_x<<1)),"m"(obmc),"a"(block),"m"((x86_reg)b_h),"m"((x86_reg)src_stride):\
              "%"REG_c"","%"REG_S"","%"REG_D"","%"REG_d"");
 
-static void inner_add_yblock_bw_8_obmc_16_mmx(const uint8_t *obmc, const long obmc_stride, uint8_t * * block, int b_w, long b_h,
-                      int src_x, int src_y, long src_stride, slice_buffer * sb, int add, uint8_t * dst8){
+static void inner_add_yblock_bw_8_obmc_16_mmx(const uint8_t *obmc, const x86_reg obmc_stride, uint8_t * * block, int b_w, x86_reg b_h,
+                      int src_x, int src_y, x86_reg src_stride, slice_buffer * sb, int add, uint8_t * dst8){
 snow_inner_add_yblock_mmx_header
 snow_inner_add_yblock_mmx_start("mm1", "mm5", "3", "0", "0")
 snow_inner_add_yblock_mmx_accum("2", "8", "0")
@@ -829,8 +829,8 @@
 snow_inner_add_yblock_mmx_end("16")
 }
 
-static void inner_add_yblock_bw_16_obmc_32_mmx(const uint8_t *obmc, const long obmc_stride, uint8_t * * block, int b_w, long b_h,
-                      int src_x, int src_y, long src_stride, slice_buffer * sb, int add, uint8_t * dst8){
+static void inner_add_yblock_bw_16_obmc_32_mmx(const uint8_t *obmc, const x86_reg obmc_stride, uint8_t * * block, int b_w, x86_reg b_h,
+                      int src_x, int src_y, x86_reg src_stride, slice_buffer * sb, int add, uint8_t * dst8){
 snow_inner_add_yblock_mmx_header
 snow_inner_add_yblock_mmx_start("mm1", "mm5", "3", "0", "0")
 snow_inner_add_yblock_mmx_accum("2", "16", "0")