diff ppc/dsputil_ppc.c @ 7333:a8a79f5385f6 libavcodec

cosmetics: Reformat PPC code in libavcodec according to style guidelines. This includes indentation changes, comment reformatting, consistent brace placement and some prettyprinting.

--- a/ppc/dsputil_ppc.c	Sun Jul 20 18:06:41 2008 +0000
+++ b/ppc/dsputil_ppc.c	Sun Jul 20 18:58:30 2008 +0000
@@ -60,33 +60,33 @@
 unsigned long long perfdata[POWERPC_NUM_PMC_ENABLED][powerpc_perf_total][powerpc_data_total];
 /* list below must match enum in dsputil_ppc.h */
 static unsigned char* perfname[] = {
-  "ff_fft_calc_altivec",
-  "gmc1_altivec",
-  "dct_unquantize_h263_altivec",
-  "fdct_altivec",
-  "idct_add_altivec",
-  "idct_put_altivec",
-  "put_pixels16_altivec",
-  "avg_pixels16_altivec",
-  "avg_pixels8_altivec",
-  "put_pixels8_xy2_altivec",
-  "put_no_rnd_pixels8_xy2_altivec",
-  "put_pixels16_xy2_altivec",
-  "put_no_rnd_pixels16_xy2_altivec",
-  "hadamard8_diff8x8_altivec",
-  "hadamard8_diff16_altivec",
-  "avg_pixels8_xy2_altivec",
-  "clear_blocks_dcbz32_ppc",
-  "clear_blocks_dcbz128_ppc",
-  "put_h264_chroma_mc8_altivec",
-  "avg_h264_chroma_mc8_altivec",
-  "put_h264_qpel16_h_lowpass_altivec",
-  "avg_h264_qpel16_h_lowpass_altivec",
-  "put_h264_qpel16_v_lowpass_altivec",
-  "avg_h264_qpel16_v_lowpass_altivec",
-  "put_h264_qpel16_hv_lowpass_altivec",
-  "avg_h264_qpel16_hv_lowpass_altivec",
-  ""
+    "ff_fft_calc_altivec",
+    "gmc1_altivec",
+    "dct_unquantize_h263_altivec",
+    "fdct_altivec",
+    "idct_add_altivec",
+    "idct_put_altivec",
+    "put_pixels16_altivec",
+    "avg_pixels16_altivec",
+    "avg_pixels8_altivec",
+    "put_pixels8_xy2_altivec",
+    "put_no_rnd_pixels8_xy2_altivec",
+    "put_pixels16_xy2_altivec",
+    "put_no_rnd_pixels16_xy2_altivec",
+    "hadamard8_diff8x8_altivec",
+    "hadamard8_diff16_altivec",
+    "avg_pixels8_xy2_altivec",
+    "clear_blocks_dcbz32_ppc",
+    "clear_blocks_dcbz128_ppc",
+    "put_h264_chroma_mc8_altivec",
+    "avg_h264_chroma_mc8_altivec",
+    "put_h264_qpel16_h_lowpass_altivec",
+    "avg_h264_qpel16_h_lowpass_altivec",
+    "put_h264_qpel16_v_lowpass_altivec",
+    "avg_h264_qpel16_v_lowpass_altivec",
+    "put_h264_qpel16_hv_lowpass_altivec",
+    "avg_h264_qpel16_hv_lowpass_altivec",
+    ""
 };
 #include <stdio.h>
 #endif
@@ -94,51 +94,44 @@
 #ifdef CONFIG_POWERPC_PERF
 void powerpc_display_perf_report(void)
 {
-  int i, j;
-  av_log(NULL, AV_LOG_INFO, "PowerPC performance report\n Values are from the PMC registers, and represent whatever the registers are set to record.\n");
-  for(i = 0 ; i < powerpc_perf_total ; i++)
-  {
-    for (j = 0; j < POWERPC_NUM_PMC_ENABLED ; j++)
-      {
-        if (perfdata[j][i][powerpc_data_num] != (unsigned long long)0)
-          av_log(NULL, AV_LOG_INFO,
-                  " Function \"%s\" (pmc%d):\n\tmin: %"PRIu64"\n\tmax: %"PRIu64"\n\tavg: %1.2lf (%"PRIu64")\n",
-                  perfname[i],
-                  j+1,
-                  perfdata[j][i][powerpc_data_min],
-                  perfdata[j][i][powerpc_data_max],
-                  (double)perfdata[j][i][powerpc_data_sum] /
-                  (double)perfdata[j][i][powerpc_data_num],
-                  perfdata[j][i][powerpc_data_num]);
-      }
-  }
+    int i, j;
+    av_log(NULL, AV_LOG_INFO, "PowerPC performance report\n Values are from the PMC registers, and represent whatever the registers are set to record.\n");
+    for(i = 0 ; i < powerpc_perf_total ; i++) {
+        for (j = 0; j < POWERPC_NUM_PMC_ENABLED ; j++) {
+            if (perfdata[j][i][powerpc_data_num] != (unsigned long long)0)
+                av_log(NULL, AV_LOG_INFO,
+                       " Function \"%s\" (pmc%d):\n\tmin: %"PRIu64"\n\tmax: %"PRIu64"\n\tavg: %1.2lf (%"PRIu64")\n",
+                       perfname[i],
+                       j+1,
+                       perfdata[j][i][powerpc_data_min],
+                       perfdata[j][i][powerpc_data_max],
+                       (double)perfdata[j][i][powerpc_data_sum] /
+                       (double)perfdata[j][i][powerpc_data_num],
+                       perfdata[j][i][powerpc_data_num]);
+        }
+    }
 }
 #endif /* CONFIG_POWERPC_PERF */
 
 /* ***** WARNING ***** WARNING ***** WARNING ***** */
 /*
-  clear_blocks_dcbz32_ppc will not work properly
-  on PowerPC processors with a cache line size
-  not equal to 32 bytes.
-  Fortunately all processor used by Apple up to
-  at least the 7450 (aka second generation G4)
-  use 32 bytes cache line.
-  This is due to the use of the 'dcbz' instruction.
-  It simply clear to zero a single cache line,
-  so you need to know the cache line size to use it !
-  It's absurd, but it's fast...
+clear_blocks_dcbz32_ppc will not work properly on PowerPC processors with a
+cache line size not equal to 32 bytes.
+Fortunately all processor used by Apple up to at least the 7450 (aka second
+generation G4) use 32 bytes cache line.
+This is due to the use of the 'dcbz' instruction. It simply clear to zero a
+single cache line, so you need to know the cache line size to use it !
+It's absurd, but it's fast...
 
-  update 24/06/2003 : Apple released yesterday the G5,
-  with a PPC970. cache line size : 128 bytes. Oups.
-  The semantic of dcbz was changed, it always clear
-  32 bytes. so the function below will work, but will
-  be slow. So I fixed check_dcbz_effect to use dcbzl,
-  which is defined to clear a cache line (as dcbz before).
-  So we still can distinguish, and use dcbz (32 bytes)
-  or dcbzl (one cache line) as required.
+update 24/06/2003 : Apple released yesterday the G5, with a PPC970. cache line
+size: 128 bytes. Oups.
+The semantic of dcbz was changed, it always clear 32 bytes. so the function
+below will work, but will be slow. So I fixed check_dcbz_effect to use dcbzl,
+which is defined to clear a cache line (as dcbz before). So we still can
+distinguish, and use dcbz (32 bytes) or dcbzl (one cache line) as required.
 
-  see <http://developer.apple.com/technotes/tn/tn2087.html>
-  and <http://developer.apple.com/technotes/tn/tn2086.html>
+see <http://developer.apple.com/technotes/tn/tn2087.html>
+and <http://developer.apple.com/technotes/tn/tn2086.html>
 */
 void clear_blocks_dcbz32_ppc(DCTELEM *blocks)
 {
@@ -148,21 +141,21 @@
 POWERPC_PERF_START_COUNT(powerpc_clear_blocks_dcbz32, 1);
 #if 1
     if (misal) {
-      ((unsigned long*)blocks)[0] = 0L;
-      ((unsigned long*)blocks)[1] = 0L;
-      ((unsigned long*)blocks)[2] = 0L;
-      ((unsigned long*)blocks)[3] = 0L;
-      i += 16;
+        ((unsigned long*)blocks)[0] = 0L;
+        ((unsigned long*)blocks)[1] = 0L;
+        ((unsigned long*)blocks)[2] = 0L;
+        ((unsigned long*)blocks)[3] = 0L;
+        i += 16;
     }
     for ( ; i < sizeof(DCTELEM)*6*64-31 ; i += 32) {
-      asm volatile("dcbz %0,%1" : : "b" (blocks), "r" (i) : "memory");
+        asm volatile("dcbz %0,%1" : : "b" (blocks), "r" (i) : "memory");
     }
     if (misal) {
-      ((unsigned long*)blocks)[188] = 0L;
-      ((unsigned long*)blocks)[189] = 0L;
-      ((unsigned long*)blocks)[190] = 0L;
-      ((unsigned long*)blocks)[191] = 0L;
-      i += 16;
+        ((unsigned long*)blocks)[188] = 0L;
+        ((unsigned long*)blocks)[189] = 0L;
+        ((unsigned long*)blocks)[190] = 0L;
+        ((unsigned long*)blocks)[191] = 0L;
+        i += 16;
     }
 #else
     memset(blocks, 0, sizeof(DCTELEM)*6*64);
@@ -180,16 +173,16 @@
     register int i = 0;
 POWERPC_PERF_START_COUNT(powerpc_clear_blocks_dcbz128, 1);
 #if 1
- if (misal) {
-   // we could probably also optimize this case,
-   // but there's not much point as the machines
-   // aren't available yet (2003-06-26)
-      memset(blocks, 0, sizeof(DCTELEM)*6*64);
+    if (misal) {
+        // we could probably also optimize this case,
+        // but there's not much point as the machines
+        // aren't available yet (2003-06-26)
+        memset(blocks, 0, sizeof(DCTELEM)*6*64);
     }
     else
-      for ( ; i < sizeof(DCTELEM)*6*64 ; i += 128) {
-        asm volatile("dcbzl %0,%1" : : "b" (blocks), "r" (i) : "memory");
-      }
+        for ( ; i < sizeof(DCTELEM)*6*64 ; i += 128) {
+            asm volatile("dcbzl %0,%1" : : "b" (blocks), "r" (i) : "memory");
+        }
 #else
     memset(blocks, 0, sizeof(DCTELEM)*6*64);
 #endif
@@ -198,7 +191,7 @@
 #else
 void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
 {
-  memset(blocks, 0, sizeof(DCTELEM)*6*64);
+    memset(blocks, 0, sizeof(DCTELEM)*6*64);
 }
 #endif
 
@@ -210,34 +203,32 @@
    knows about dcbzl ... */
 long check_dcbzl_effect(void)
 {
-  register char *fakedata = av_malloc(1024);
-  register char *fakedata_middle;
-  register long zero = 0;
-  register long i = 0;
-  long count = 0;
+    register char *fakedata = av_malloc(1024);
+    register char *fakedata_middle;
+    register long zero = 0;
+    register long i = 0;
+    long count = 0;
 
-  if (!fakedata)
-  {
-    return 0L;
-  }
+    if (!fakedata) {
+        return 0L;
+    }
 
-  fakedata_middle = (fakedata + 512);
+    fakedata_middle = (fakedata + 512);
 
-  memset(fakedata, 0xFF, 1024);
+    memset(fakedata, 0xFF, 1024);
 
-  /* below the constraint "b" seems to mean "Address base register"
-     in gcc-3.3 / RS/6000 speaks. seems to avoid using r0, so.... */
-  asm volatile("dcbzl %0, %1" : : "b" (fakedata_middle), "r" (zero));
+    /* below the constraint "b" seems to mean "Address base register"
+       in gcc-3.3 / RS/6000 speaks. seems to avoid using r0, so.... */
+    asm volatile("dcbzl %0, %1" : : "b" (fakedata_middle), "r" (zero));
 
-  for (i = 0; i < 1024 ; i ++)
-  {
-    if (fakedata[i] == (char)0)
-      count++;
-  }
+    for (i = 0; i < 1024 ; i ++) {
+        if (fakedata[i] == (char)0)
+            count++;
+    }
 
-  av_free(fakedata);
+    av_free(fakedata);
 
-  return count;
+    return count;
 }
 #else
 long check_dcbzl_effect(void)
@@ -286,36 +277,31 @@
 
 #ifdef CONFIG_ENCODERS
         if (avctx->dct_algo == FF_DCT_AUTO ||
-            avctx->dct_algo == FF_DCT_ALTIVEC)
-        {
+            avctx->dct_algo == FF_DCT_ALTIVEC) {
             c->fdct = fdct_altivec;
         }
 #endif //CONFIG_ENCODERS
 
-        if (avctx->lowres==0)
-        {
-        if ((avctx->idct_algo == FF_IDCT_AUTO) ||
-                (avctx->idct_algo == FF_IDCT_ALTIVEC))
-        {
-            c->idct_put = idct_put_altivec;
-            c->idct_add = idct_add_altivec;
-            c->idct_permutation_type = FF_TRANSPOSE_IDCT_PERM;
-        }
+        if (avctx->lowres==0) {
+            if ((avctx->idct_algo == FF_IDCT_AUTO) ||
+                (avctx->idct_algo == FF_IDCT_ALTIVEC)) {
+                c->idct_put = idct_put_altivec;
+                c->idct_add = idct_add_altivec;
+                c->idct_permutation_type = FF_TRANSPOSE_IDCT_PERM;
+            }
         }
 
 #ifdef CONFIG_POWERPC_PERF
         {
-          int i, j;
-          for (i = 0 ; i < powerpc_perf_total ; i++)
-          {
-            for (j = 0; j < POWERPC_NUM_PMC_ENABLED ; j++)
-              {
-                perfdata[j][i][powerpc_data_min] = 0xFFFFFFFFFFFFFFFFULL;
-                perfdata[j][i][powerpc_data_max] = 0x0000000000000000ULL;
-                perfdata[j][i][powerpc_data_sum] = 0x0000000000000000ULL;
-                perfdata[j][i][powerpc_data_num] = 0x0000000000000000ULL;
+            int i, j;
+            for (i = 0 ; i < powerpc_perf_total ; i++) {
+                for (j = 0; j < POWERPC_NUM_PMC_ENABLED ; j++) {
+                    perfdata[j][i][powerpc_data_min] = 0xFFFFFFFFFFFFFFFFULL;
+                    perfdata[j][i][powerpc_data_max] = 0x0000000000000000ULL;
+                    perfdata[j][i][powerpc_data_sum] = 0x0000000000000000ULL;
+                    perfdata[j][i][powerpc_data_num] = 0x0000000000000000ULL;
+                  }
               }
-          }
         }
 #endif /* CONFIG_POWERPC_PERF */
     }