# HG changeset patch # User diego # Date 1216896812 0 # Node ID 266d4949aa15322215c3318287a69ce10dfde8cb # Parent e97d0795ee7029d5b5f821271a4545cfbe81a4a8 Remove AltiVec vector declaration compiler compatibility macros. The original problem was that FSF and Apple gcc used a different syntax for vector declarations, i.e. {} vs. (). Nowadays Apple gcc versions support the standard {} syntax and versions that support {} are available on all relevant Mac OS X versions. Thus the greater compatibility is no longer worth cluttering the code with macros. diff -r e97d0795ee70 -r 266d4949aa15 ppc/dsputil_altivec.c --- a/ppc/dsputil_altivec.c Thu Jul 24 04:29:23 2008 +0000 +++ b/ppc/dsputil_altivec.c Thu Jul 24 10:53:32 2008 +0000 @@ -277,7 +277,7 @@ sad = (vector unsigned int)vec_splat_u32(0); - permclear = (vector unsigned char)AVV(255,255,255,255,255,255,255,255,0,0,0,0,0,0,0,0); + permclear = (vector unsigned char){255,255,255,255,255,255,255,255,0,0,0,0,0,0,0,0}; for (i = 0; i < h; i++) { /* Read potentially unaligned pixels into t1 and t2 @@ -358,7 +358,7 @@ sum = (vector unsigned int)vec_splat_u32(0); - permclear = (vector unsigned char)AVV(255,255,255,255,255,255,255,255,0,0,0,0,0,0,0,0); + permclear = (vector unsigned char){255,255,255,255,255,255,255,255,0,0,0,0,0,0,0,0}; for (i = 0; i < h; i++) { @@ -990,20 +990,20 @@ POWERPC_PERF_START_COUNT(altivec_hadamard8_diff8x8_num, 1); { register const vector signed short vprod1 =(const vector signed short) - AVV( 1,-1, 1,-1, 1,-1, 1,-1); + { 1,-1, 1,-1, 1,-1, 1,-1 }; register const vector signed short vprod2 =(const vector signed short) - AVV( 1, 1,-1,-1, 1, 1,-1,-1); + { 1, 1,-1,-1, 1, 1,-1,-1 }; register const vector signed short vprod3 =(const vector signed short) - AVV( 1, 1, 1, 1,-1,-1,-1,-1); + { 1, 1, 1, 1,-1,-1,-1,-1 }; register const vector unsigned char perm1 = (const vector unsigned char) - AVV(0x02, 0x03, 0x00, 0x01, 0x06, 0x07, 0x04, 0x05, - 0x0A, 0x0B, 0x08, 0x09, 0x0E, 0x0F, 0x0C, 0x0D); + {0x02, 0x03, 0x00, 0x01, 0x06, 0x07, 0x04, 0x05, + 0x0A, 0x0B, 0x08, 0x09, 0x0E, 0x0F, 0x0C, 0x0D}; register const vector unsigned char perm2 = (const vector unsigned char) - AVV(0x04, 0x05, 0x06, 0x07, 0x00, 0x01, 0x02, 0x03, - 0x0C, 0x0D, 0x0E, 0x0F, 0x08, 0x09, 0x0A, 0x0B); + {0x04, 0x05, 0x06, 0x07, 0x00, 0x01, 0x02, 0x03, + 0x0C, 0x0D, 0x0E, 0x0F, 0x08, 0x09, 0x0A, 0x0B}; register const vector unsigned char perm3 = (const vector unsigned char) - AVV(0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, - 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); + {0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07}; #define ONEITERBUTTERFLY(i, res) \ { \ @@ -1130,23 +1130,23 @@ (const vector unsigned char)vec_splat_u8(0); { register const vector signed short vprod1 REG_v(v16)= - (const vector signed short)AVV( 1,-1, 1,-1, 1,-1, 1,-1); + (const vector signed short){ 1,-1, 1,-1, 1,-1, 1,-1 }; register const vector signed short vprod2 REG_v(v17)= - (const vector signed short)AVV( 1, 1,-1,-1, 1, 1,-1,-1); + (const vector signed short){ 1, 1,-1,-1, 1, 1,-1,-1 }; register const vector signed short vprod3 REG_v(v18)= - (const vector signed short)AVV( 1, 1, 1, 1,-1,-1,-1,-1); + (const vector signed short){ 1, 1, 1, 1,-1,-1,-1,-1 }; register const vector unsigned char perm1 REG_v(v19)= (const vector unsigned char) - AVV(0x02, 0x03, 0x00, 0x01, 0x06, 0x07, 0x04, 0x05, - 0x0A, 0x0B, 0x08, 0x09, 0x0E, 0x0F, 0x0C, 0x0D); + {0x02, 0x03, 0x00, 0x01, 0x06, 0x07, 0x04, 0x05, + 0x0A, 0x0B, 0x08, 0x09, 0x0E, 0x0F, 0x0C, 0x0D}; register const vector unsigned char perm2 REG_v(v20)= (const vector unsigned char) - AVV(0x04, 0x05, 0x06, 0x07, 0x00, 0x01, 0x02, 0x03, - 0x0C, 0x0D, 0x0E, 0x0F, 0x08, 0x09, 0x0A, 0x0B); + {0x04, 0x05, 0x06, 0x07, 0x00, 0x01, 0x02, 0x03, + 0x0C, 0x0D, 0x0E, 0x0F, 0x08, 0x09, 0x0A, 0x0B}; register const vector unsigned char perm3 REG_v(v21)= (const vector unsigned char) - AVV(0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, - 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); + {0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07}; #define ONEITERBUTTERFLY(i, res1, res2) \ { \ diff -r e97d0795ee70 -r 266d4949aa15 ppc/fdct_altivec.c --- a/ppc/fdct_altivec.c Thu Jul 24 04:29:23 2008 +0000 +++ b/ppc/fdct_altivec.c Thu Jul 24 10:53:32 2008 +0000 @@ -58,9 +58,9 @@ static vector float fdctconsts[3] = { - AVV( W0, W1, W2, W3 ), - AVV( W4, W5, W6, W7 ), - AVV( W8, W9, WA, WB ) + { W0, W1, W2, W3 }, + { W4, W5, W6, W7 }, + { W8, W9, WA, WB } }; #define LD_W0 vec_splat(cnsts0, 0) diff -r e97d0795ee70 -r 266d4949aa15 ppc/h264_altivec.c --- a/ppc/h264_altivec.c Thu Jul 24 04:29:23 2008 +0000 +++ b/ppc/h264_altivec.c Thu Jul 24 10:53:32 2008 +0000 @@ -208,15 +208,15 @@ vec_u8_t vdst, ppsum, fsum; if (((unsigned long)dst) % 16 == 0) { - fperm = (vec_u8_t)AVV(0x10, 0x11, 0x12, 0x13, + fperm = (vec_u8_t){0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x08, 0x09, 0x0A, 0x0B, - 0x0C, 0x0D, 0x0E, 0x0F); + 0x0C, 0x0D, 0x0E, 0x0F}; } else { - fperm = (vec_u8_t)AVV(0x00, 0x01, 0x02, 0x03, + fperm = (vec_u8_t){0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x18, 0x19, 0x1A, 0x1B, - 0x1C, 0x1D, 0x1E, 0x1F); + 0x1C, 0x1D, 0x1E, 0x1F}; } vsrcAuc = vec_ld(0, src); @@ -563,7 +563,7 @@ const vec_u16_t twov = vec_splat_u16(2); const vec_u16_t sixv = vec_splat_u16(6); - const vec_u8_t sel = (vec_u8_t) AVV(0,0,0,0,0,0,0,0,-1,-1,-1,-1,-1,-1,-1,-1); + const vec_u8_t sel = (vec_u8_t) {0,0,0,0,0,0,0,0,-1,-1,-1,-1,-1,-1,-1,-1}; LOAD_ZERO; dct[0] += 32; // rounding for the >>6 at the end diff -r e97d0795ee70 -r 266d4949aa15 ppc/h264_template_altivec.c --- a/ppc/h264_template_altivec.c Thu Jul 24 04:29:23 2008 +0000 +++ b/ppc/h264_template_altivec.c Thu Jul 24 10:53:32 2008 +0000 @@ -102,15 +102,15 @@ POWERPC_PERF_START_COUNT(PREFIX_h264_chroma_mc8_num, 1); if (((unsigned long)dst) % 16 == 0) { - fperm = (vec_u8_t)AVV(0x10, 0x11, 0x12, 0x13, + fperm = (vec_u8_t){0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x08, 0x09, 0x0A, 0x0B, - 0x0C, 0x0D, 0x0E, 0x0F); + 0x0C, 0x0D, 0x0E, 0x0F}; } else { - fperm = (vec_u8_t)AVV(0x00, 0x01, 0x02, 0x03, + fperm = (vec_u8_t){0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x18, 0x19, 0x1A, 0x1B, - 0x1C, 0x1D, 0x1E, 0x1F); + 0x1C, 0x1D, 0x1E, 0x1F}; } vsrcAuc = vec_ld(0, src); @@ -485,8 +485,8 @@ pp1A, pp1B, pp2A, pp2B, psumA, psumB; const vec_u8_t mperm = (const vec_u8_t) - AVV(0x00, 0x08, 0x01, 0x09, 0x02, 0x0A, 0x03, 0x0B, - 0x04, 0x0C, 0x05, 0x0D, 0x06, 0x0E, 0x07, 0x0F); + {0x00, 0x08, 0x01, 0x09, 0x02, 0x0A, 0x03, 0x0B, + 0x04, 0x0C, 0x05, 0x0D, 0x06, 0x0E, 0x07, 0x0F}; int16_t *tmpbis = tmp; vec_s16_t tmpM1ssA, tmpM1ssB, tmpM2ssA, tmpM2ssB, diff -r e97d0795ee70 -r 266d4949aa15 ppc/idct_altivec.c --- a/ppc/idct_altivec.c Thu Jul 24 04:29:23 2008 +0000 +++ b/ppc/idct_altivec.c Thu Jul 24 10:53:32 2008 +0000 @@ -157,11 +157,11 @@ static const_vector_s16_t constants[5] = { - AVV(23170, 13573, 6518, 21895, -23170, -21895, 32, 31), - AVV(16384, 22725, 21407, 19266, 16384, 19266, 21407, 22725), - AVV(22725, 31521, 29692, 26722, 22725, 26722, 29692, 31521), - AVV(21407, 29692, 27969, 25172, 21407, 25172, 27969, 29692), - AVV(19266, 26722, 25172, 22654, 19266, 22654, 25172, 26722) + {23170, 13573, 6518, 21895, -23170, -21895, 32, 31}, + {16384, 22725, 21407, 19266, 16384, 19266, 21407, 22725}, + {22725, 31521, 29692, 26722, 22725, 26722, 29692, 31521}, + {21407, 29692, 27969, 25172, 21407, 25172, 27969, 29692}, + {19266, 26722, 25172, 22654, 19266, 22654, 25172, 26722} }; void idct_put_altivec(uint8_t* dest, int stride, vector_s16_t* block) diff -r e97d0795ee70 -r 266d4949aa15 ppc/mpegvideo_altivec.c --- a/ppc/mpegvideo_altivec.c Thu Jul 24 04:29:23 2008 +0000 +++ b/ppc/mpegvideo_altivec.c Thu Jul 24 10:53:32 2008 +0000 @@ -66,7 +66,7 @@ } -#define FOUROF(a) AVV(a,a,a,a) +#define FOUROF(a) {a,a,a,a} int dct_quantize_altivec(MpegEncContext* s, DCTELEM* data, int n, diff -r e97d0795ee70 -r 266d4949aa15 ppc/util_altivec.h --- a/ppc/util_altivec.h Thu Jul 24 04:29:23 2008 +0000 +++ b/ppc/util_altivec.h Thu Jul 24 10:53:32 2008 +0000 @@ -43,8 +43,8 @@ #define WORD_s2 0x18,0x19,0x1a,0x1b #define WORD_s3 0x1c,0x1d,0x1e,0x1f -#define vcprm(a,b,c,d) (const vector unsigned char)AVV(WORD_ ## a, WORD_ ## b, WORD_ ## c, WORD_ ## d) -#define vcii(a,b,c,d) (const vector float)AVV(FLOAT_ ## a, FLOAT_ ## b, FLOAT_ ## c, FLOAT_ ## d) +#define vcprm(a,b,c,d) (const vector unsigned char){WORD_ ## a, WORD_ ## b, WORD_ ## c, WORD_ ## d} +#define vcii(a,b,c,d) (const vector float){FLOAT_ ## a, FLOAT_ ## b, FLOAT_ ## c, FLOAT_ ## d} // vcprmle is used to keep the same index as in the SSE version. // it's the same as vcprm, with the index inversed