# HG changeset patch # User michael # Date 1098044831 0 # Node ID 40542ea560d5fa29cb9ee26d403391f6f291cce9 # Parent eb0c851db536718beed54a7d32d22bd5646a1e14 gcc 3.4.3 preversions do not appreciate invalid instruction and operand combinations anymore patch by (Aurelien Jacobs ) diff -r eb0c851db536 -r 40542ea560d5 i386/cputest.c --- a/i386/cputest.c Fri Oct 15 11:48:50 2004 +0000 +++ b/i386/cputest.c Sun Oct 17 20:27:11 2004 +0000 @@ -27,29 +27,30 @@ { int rval; int eax, ebx, ecx, edx; + long a, c; __asm__ __volatile__ ( /* See if CPUID instruction is supported ... */ /* ... Get copies of EFLAGS into eax and ecx */ "pushf\n\t" "pop %0\n\t" - "movl %0, %1\n\t" + "mov %0, %1\n\t" /* ... Toggle the ID bit in one copy and store */ /* to the EFLAGS reg */ - "xorl $0x200000, %0\n\t" + "xor $0x200000, %0\n\t" "push %0\n\t" "popf\n\t" /* ... Get the (hopefully modified) EFLAGS */ "pushf\n\t" "pop %0\n\t" - : "=a" (eax), "=c" (ecx) + : "=a" (a), "=c" (c) : : "cc" ); - if (eax == ecx) + if (a == c) return 0; /* CPUID not supported */ cpuid(0, eax, ebx, ecx, edx);