# HG changeset patch
# User diego
# Date 1157927342 0
# Node ID b3149af0768156077d95800b108573393c705c45
# Parent  0ff52e136358a9e9b6aae5fbf1e4a202cd2dc6ee
armv5 optimizations
patch by Siarhei Siamashka siarhei.siamashka at gmail com

diff -r 0ff52e136358 -r b3149af07681 mpegaudiodec.c
--- a/mpegaudiodec.c	Sun Sep 10 21:51:08 2006 +0000
+++ b/mpegaudiodec.c	Sun Sep 10 22:29:02 2006 +0000
@@ -27,6 +27,11 @@
 #include "bitstream.h"
 #include "dsputil.h"
 
+/* Assume that all Intel XScale processors support armv5 edsp instructions */
+#if defined(ARCH_ARMV4L) && defined (HAVE_IWMMXT)
+#define ARCH_ARM5E
+#endif
+
 /*
  * TODO:
  *  - in low precision mode, use more 16 bit multiplies in synth filter
@@ -791,6 +796,17 @@
         /* signed 16x16 -> 32 multiply */
 #       define MULS(ra, rb) \
             ({ int __rt; asm ("mullhw %0, %1, %2" : "=r" (__rt) : "r" (ra), "r" (rb)); __rt; })
+
+#   elif defined(ARCH_ARM5E)
+
+        /* signed 16x16 -> 32 multiply add accumulate */
+#       define MACS(rt, ra, rb) \
+            asm ("smlabb %0, %2, %3, %0" : "=r" (rt) : "0" (rt), "r" (ra), "r" (rb));
+
+        /* signed 16x16 -> 32 multiply */
+#       define MULS(ra, rb) \
+            ({ int __rt; asm ("smulbb %0, %1, %2" : "=r" (__rt) : "r" (ra), "r" (rb)); __rt; })
+
 #   else
         /* signed 16x16 -> 32 multiply add accumulate */
 #       define MACS(rt, ra, rb) rt += (ra) * (rb)