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1 /*
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2 * Copyright (c) 2009 Mans Rullgard <mans@mansr.com>
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3 *
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4 * This file is part of FFmpeg.
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5 *
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6 * FFmpeg is free software; you can redistribute it and/or
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7 * modify it under the terms of the GNU Lesser General Public
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8 * License as published by the Free Software Foundation; either
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9 * version 2.1 of the License, or (at your option) any later version.
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10 *
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11 * FFmpeg is distributed in the hope that it will be useful,
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12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 * Lesser General Public License for more details.
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15 *
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16 * You should have received a copy of the GNU Lesser General Public
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17 * License along with FFmpeg; if not, write to the Free Software
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18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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19 */
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20
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21 #ifndef AVUTIL_AVR32_INTREADWRITE_H
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22 #define AVUTIL_AVR32_INTREADWRITE_H
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23
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24 #include <stdint.h>
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25 #include "config.h"
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26 #include "libavutil/bswap.h"
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27
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28 /*
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29 * AVR32 does not support unaligned memory accesses, except for the AP
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30 * series which suppports unaligned 32-bit loads and stores. 16-bit
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31 * and 64-bit accesses must be aligned to 16 and 32 bits, respectively.
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32 * This means we cannot use the byte-swapping load/store instructions
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33 * here.
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34 *
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35 * For 16-bit, 24-bit, and (on UC series) 32-bit loads, we instead use
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36 * the LDINS.B instruction, which gcc fails to utilise with the
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37 * generic code. GCC also fails to use plain LD.W and ST.W even for
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38 * AP processors, so we override the generic code. The 64-bit
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39 * versions are improved by using our optimised 32-bit functions.
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40 */
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41
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42 #define AV_RL16 AV_RL16
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812
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43 static av_always_inline uint16_t AV_RL16(const void *p)
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44 {
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45 uint16_t v;
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46 __asm__ ("ld.ub %0, %1 \n\t"
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47 "ldins.b %0:l, %2 \n\t"
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48 : "=&r"(v)
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49 : "m"(*(const uint8_t*)p), "RKs12"(*((const uint8_t*)p+1)));
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50 return v;
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51 }
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52
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53 #define AV_RB16 AV_RB16
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812
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54 static av_always_inline uint16_t AV_RB16(const void *p)
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55 {
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56 uint16_t v;
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57 __asm__ ("ld.ub %0, %2 \n\t"
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58 "ldins.b %0:l, %1 \n\t"
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59 : "=&r"(v)
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60 : "RKs12"(*(const uint8_t*)p), "m"(*((const uint8_t*)p+1)));
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61 return v;
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62 }
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63
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64 #define AV_RB24 AV_RB24
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812
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65 static av_always_inline uint32_t AV_RB24(const void *p)
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66 {
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67 uint32_t v;
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68 __asm__ ("ld.ub %0, %3 \n\t"
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69 "ldins.b %0:l, %2 \n\t"
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70 "ldins.b %0:u, %1 \n\t"
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71 : "=&r"(v)
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72 : "RKs12"(* (const uint8_t*)p),
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73 "RKs12"(*((const uint8_t*)p+1)),
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74 "m" (*((const uint8_t*)p+2)));
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75 return v;
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76 }
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77
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78 #define AV_RL24 AV_RL24
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812
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79 static av_always_inline uint32_t AV_RL24(const void *p)
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80 {
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81 uint32_t v;
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82 __asm__ ("ld.ub %0, %1 \n\t"
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83 "ldins.b %0:l, %2 \n\t"
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84 "ldins.b %0:u, %3 \n\t"
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85 : "=&r"(v)
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86 : "m" (* (const uint8_t*)p),
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87 "RKs12"(*((const uint8_t*)p+1)),
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88 "RKs12"(*((const uint8_t*)p+2)));
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89 return v;
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90 }
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91
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92 #if ARCH_AVR32_AP
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93
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94 #define AV_RB32 AV_RB32
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95 static av_always_inline uint32_t AV_RB32(const void *p)
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96 {
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97 uint32_t v;
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98 __asm__ ("ld.w %0, %1" : "=r"(v) : "m"(*(const uint32_t*)p));
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99 return v;
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100 }
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101
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102 #define AV_WB32 AV_WB32
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812
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103 static av_always_inline void AV_WB32(void *p, uint32_t v)
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104 {
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105 __asm__ ("st.w %0, %1" : "=m"(*(uint32_t*)p) : "r"(v));
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106 }
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107
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108 /* These two would be defined by generic code, but we need them sooner. */
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109 #define AV_RL32(p) bswap_32(AV_RB32(p))
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110 #define AV_WL32(p, v) AV_WB32(p, bswap_32(v))
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111
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112 #define AV_WB64 AV_WB64
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812
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113 static av_always_inline void AV_WB64(void *p, uint64_t v)
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114 {
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115 union { uint64_t v; uint32_t hl[2]; } vv = { v };
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116 AV_WB32(p, vv.hl[0]);
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117 AV_WB32((uint32_t*)p+1, vv.hl[1]);
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118 }
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119
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120 #define AV_WL64 AV_WL64
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121 static av_always_inline void AV_WL64(void *p, uint64_t v)
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122 {
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123 union { uint64_t v; uint32_t hl[2]; } vv = { v };
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124 AV_WL32(p, vv.hl[1]);
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125 AV_WL32((uint32_t*)p+1, vv.hl[0]);
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126 }
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127
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128 #else /* ARCH_AVR32_AP */
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129
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130 #define AV_RB32 AV_RB32
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812
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131 static av_always_inline uint32_t AV_RB32(const void *p)
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132 {
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133 uint32_t v;
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134 __asm__ ("ld.ub %0, %4 \n\t"
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135 "ldins.b %0:l, %3 \n\t"
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136 "ldins.b %0:u, %2 \n\t"
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137 "ldins.b %0:t, %1 \n\t"
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138 : "=&r"(v)
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139 : "RKs12"(* (const uint8_t*)p),
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140 "RKs12"(*((const uint8_t*)p+1)),
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141 "RKs12"(*((const uint8_t*)p+2)),
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142 "m" (*((const uint8_t*)p+3)));
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143 return v;
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144 }
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145
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146 #define AV_RL32 AV_RL32
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812
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147 static av_always_inline uint32_t AV_RL32(const void *p)
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148 {
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149 uint32_t v;
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150 __asm__ ("ld.ub %0, %1 \n\t"
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151 "ldins.b %0:l, %2 \n\t"
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152 "ldins.b %0:u, %3 \n\t"
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153 "ldins.b %0:t, %4 \n\t"
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154 : "=&r"(v)
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155 : "m" (* (const uint8_t*)p),
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156 "RKs12"(*((const uint8_t*)p+1)),
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157 "RKs12"(*((const uint8_t*)p+2)),
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158 "RKs12"(*((const uint8_t*)p+3)));
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159 return v;
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160 }
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161
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162 #endif /* ARCH_AVR32_AP */
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163
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164 #define AV_RB64 AV_RB64
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812
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165 static av_always_inline uint64_t AV_RB64(const void *p)
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166 {
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167 union { uint64_t v; uint32_t hl[2]; } v;
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168 v.hl[0] = AV_RB32(p);
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169 v.hl[1] = AV_RB32((const uint32_t*)p+1);
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170 return v.v;
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171 }
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172
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173 #define AV_RL64 AV_RL64
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812
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174 static av_always_inline uint64_t AV_RL64(const void *p)
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175 {
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176 union { uint64_t v; uint32_t hl[2]; } v;
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177 v.hl[1] = AV_RL32(p);
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178 v.hl[0] = AV_RL32((const uint32_t*)p+1);
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179 return v.v;
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180 }
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181
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182 #endif /* AVUTIL_AVR32_INTREADWRITE_H */
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