annotate libmpcodecs/vf_tfields.c @ 20420:0c63edaa7714

Fix single-black-pixel-in-upper-left-corner bug (how do people notice a single black pixel?? Amazing...).
author reimar
date Tue, 24 Oct 2006 18:51:38 +0000
parents d743c48823cc
children a124f3abc1ec
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1 #include <stdio.h>
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2 #include <stdlib.h>
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3 #include <string.h>
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4
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5 #include "config.h"
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6 #include "mp_msg.h"
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7 #include "cpudetect.h"
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8
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9 #include "img_format.h"
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10 #include "mp_image.h"
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11 #include "vf.h"
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12
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13 #include "libvo/fastmemcpy.h"
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14
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15 struct vf_priv_s {
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16 int mode;
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17 int parity;
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18 int buffered_i;
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19 mp_image_t *buffered_mpi;
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20 double buffered_pts;
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21 };
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22
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23 static inline void *my_memcpy_pic(void * dst, void * src, int bytesPerLine, int height, int dstStride, int srcStride)
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24 {
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25 int i;
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26 void *retval=dst;
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27
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28 for(i=0; i<height; i++)
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29 {
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30 memcpy(dst, src, bytesPerLine);
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31 src+= srcStride;
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32 dst+= dstStride;
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33 }
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34
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35 return retval;
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36 }
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37
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38 static void deint(unsigned char *dest, int ds, unsigned char *src, int ss, int w, int h, int field)
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39 {
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40 int x, y;
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41 src += ss;
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42 dest += ds;
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43 if (field) {
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44 src += ss;
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45 dest += ds;
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46 h -= 2;
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47 }
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48 for (y=h/2; y; y--) {
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49 for (x=0; x<w; x++) {
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50 if (((src[x-ss] < src[x]) && (src[x+ss] < src[x])) ||
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51 ((src[x-ss] > src[x]) && (src[x+ss] > src[x]))) {
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52 //dest[x] = (src[x+ss] + src[x-ss])>>1;
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53 dest[x] = ((src[x+ss]<<1) + (src[x-ss]<<1)
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54 + src[x+ss+1] + src[x-ss+1]
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55 + src[x+ss-1] + src[x-ss-1])>>3;
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56 }
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57 else dest[x] = src[x];
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58 }
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59 dest += ds<<1;
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60 src += ss<<1;
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61 }
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62 }
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63
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64 #ifdef HAVE_3DNOW
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65 static void qpel_li_3DNOW(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
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66 {
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67 int i, j, ssd=ss;
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68 long crap1, crap2;
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69 if (up) {
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70 ssd = -ss;
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71 memcpy(d, s, w);
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72 d += ds;
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73 s += ss;
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74 }
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75 for (i=h-1; i; i--) {
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76 asm volatile(
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77 "1: \n\t"
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78 "movq (%%"REG_S"), %%mm0 \n\t"
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79 "movq (%%"REG_S",%%"REG_a"), %%mm1 \n\t"
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80 "pavgusb %%mm0, %%mm1 \n\t"
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81 "add $8, %%"REG_S" \n\t"
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82 "pavgusb %%mm0, %%mm1 \n\t"
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83 "movq %%mm1, (%%"REG_D") \n\t"
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84 "add $8, %%"REG_D" \n\t"
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85 "decl %%ecx \n\t"
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86 "jnz 1b \n\t"
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87 : "=S"(crap1), "=D"(crap2)
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88 : "c"(w>>3), "S"(s), "D"(d), "a"((long)ssd)
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89 );
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90 for (j=w-(w&7); j<w; j++)
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91 d[j] = (s[j+ssd] + 3*s[j])>>2;
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92 d += ds;
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93 s += ss;
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94 }
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95 if (!up) memcpy(d, s, w);
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96 asm volatile("emms \n\t" : : : "memory");
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97 }
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98 #endif
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99
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100 #ifdef HAVE_MMX2
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101 static void qpel_li_MMX2(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
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102 {
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103 int i, j, ssd=ss;
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104 long crap1, crap2;
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105 if (up) {
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106 ssd = -ss;
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107 memcpy(d, s, w);
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108 d += ds;
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109 s += ss;
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110 }
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111 for (i=h-1; i; i--) {
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112 asm volatile(
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113 "pxor %%mm7, %%mm7 \n\t"
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114 "2: \n\t"
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115 "movq (%%"REG_S"), %%mm0 \n\t"
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116 "movq (%%"REG_S",%%"REG_a"), %%mm1 \n\t"
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117 "pavgb %%mm0, %%mm1 \n\t"
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118 "add $8, %%"REG_S" \n\t"
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119 "pavgb %%mm0, %%mm1 \n\t"
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120 "movq %%mm1, (%%"REG_D") \n\t"
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121 "add $8, %%"REG_D" \n\t"
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122 "decl %%ecx \n\t"
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123 "jnz 2b \n\t"
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124 : "=S"(crap1), "=D"(crap2)
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125 : "c"(w>>3), "S"(s), "D"(d), "a"((long)ssd)
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126 );
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127 for (j=w-(w&7); j<w; j++)
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128 d[j] = (s[j+ssd] + 3*s[j])>>2;
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129 d += ds;
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130 s += ss;
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131 }
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132 if (!up) memcpy(d, s, w);
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133 asm volatile("emms \n\t" : : : "memory");
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134 }
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135 #endif
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136
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137 #ifdef HAVE_MMX
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138 static void qpel_li_MMX(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
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139 {
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140 int i, j, ssd=ss;
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141 int crap1, crap2;
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142 if (up) {
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143 ssd = -ss;
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144 memcpy(d, s, w);
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145 d += ds;
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146 s += ss;
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147 }
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148 for (i=h-1; i; i--) {
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149 asm volatile(
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150 "pxor %%mm7, %%mm7 \n\t"
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151 "3: \n\t"
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152 "movq (%%"REG_S"), %%mm0 \n\t"
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153 "movq (%%"REG_S"), %%mm1 \n\t"
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154 "movq (%%"REG_S",%%"REG_a"), %%mm2 \n\t"
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155 "movq (%%"REG_S",%%"REG_a"), %%mm3 \n\t"
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156 "add $8, %%"REG_S" \n\t"
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157 "punpcklbw %%mm7, %%mm0 \n\t"
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158 "punpckhbw %%mm7, %%mm1 \n\t"
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diff changeset
159 "punpcklbw %%mm7, %%mm2 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
160 "punpckhbw %%mm7, %%mm3 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
161 "paddw %%mm0, %%mm2 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
162 "paddw %%mm1, %%mm3 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
163 "paddw %%mm0, %%mm2 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
164 "paddw %%mm1, %%mm3 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
165 "paddw %%mm0, %%mm2 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
166 "paddw %%mm1, %%mm3 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
167 "psrlw $2, %%mm2 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
168 "psrlw $2, %%mm3 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
169 "packsswb %%mm3, %%mm2 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
170 "movq %%mm2, (%%"REG_D") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10078
diff changeset
171 "add $8, %%"REG_D" \n\t"
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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parents: 10009
diff changeset
172 "decl %%ecx \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
173 "jnz 3b \n\t"
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
174 : "=S"(crap1), "=D"(crap2)
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821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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diff changeset
175 : "c"(w>>3), "S"(s), "D"(d), "a"((long)ssd)
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
176 );
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
177 for (j=w-(w&7); j<w; j++)
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
178 d[j] = (s[j+ssd] + 3*s[j])>>2;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
179 d += ds;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
180 s += ss;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
181 }
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
182 if (!up) memcpy(d, s, w);
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
183 asm volatile("emms \n\t" : : : "memory");
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
184 }
10049
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diff changeset
185
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
186 static void qpel_4tap_MMX(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
187 {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
188 int i, j, ssd=ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
189 static const short filter[] = {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
190 29, 29, 29, 29, 110, 110, 110, 110,
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
191 9, 9, 9, 9, 3, 3, 3, 3,
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
192 64, 64, 64, 64 };
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
193 int crap1, crap2;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
194 if (up) {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
195 ssd = -ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
196 memcpy(d, s, w);
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
197 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
198 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
199 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
200 d[j] = (s[j+ssd] + 3*s[j])>>2;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
201 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
202 for (i=h-3; i; i--) {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
203 asm volatile(
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
204 "pxor %%mm0, %%mm0 \n\t"
13720
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diff changeset
205 "movq (%%"REG_d"), %%mm4 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
206 "movq 8(%%"REG_d"), %%mm5 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10078
diff changeset
207 "movq 16(%%"REG_d"), %%mm6 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
208 "movq 24(%%"REG_d"), %%mm7 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
209 "4: \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
210
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
211 "movq (%%"REG_S",%%"REG_a"), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
212 "movq (%%"REG_S"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
213 "movq (%%"REG_S",%%"REG_b"), %%mm3 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
214 "punpcklbw %%mm0, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
215 "punpcklbw %%mm0, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
216 "pmullw %%mm4, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
217 "punpcklbw %%mm0, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
218 "pmullw %%mm5, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
219 "paddusw %%mm2, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
220 "pmullw %%mm6, %%mm3 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
221 "movq (%%"REG_S",%%"REG_a",2), %%mm2 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
222 "psubusw %%mm3, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
223 "punpcklbw %%mm0, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
224 "pmullw %%mm7, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
225 "psubusw %%mm2, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
226 "psrlw $7, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
227
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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diff changeset
228 "movq (%%"REG_S",%%"REG_a"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10078
diff changeset
229 "movq (%%"REG_S"), %%mm3 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
230 "punpckhbw %%mm0, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
231 "punpckhbw %%mm0, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
232 "pmullw %%mm4, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
233 "pmullw %%mm5, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
234 "paddusw %%mm3, %%mm2 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10078
diff changeset
235 "movq (%%"REG_S",%%"REG_b"), %%mm3 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
236 "punpckhbw %%mm0, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
237 "pmullw %%mm6, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
238 "psubusw %%mm3, %%mm2 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
239 "movq (%%"REG_S",%%"REG_a",2), %%mm3 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
240 "punpckhbw %%mm0, %%mm3 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
241 "add $8, %%"REG_S" \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
242 "pmullw %%mm7, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
243 "psubusw %%mm3, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
244 "psrlw $7, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
245
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
246 "packuswb %%mm2, %%mm1 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
247 "movq %%mm1, (%%"REG_D") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
248 "add $8, %%"REG_D" \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
249 "decl %%ecx \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
250 "jnz 4b \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
251 : "=S"(crap1), "=D"(crap2)
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821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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diff changeset
252 : "c"(w>>3), "S"(s), "D"(d), "a"((long)ssd), "b"((long)-ssd), "d"(filter)
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
253 );
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
254 for (j=w-(w&7); j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
255 d[j] = (-9*s[j-ssd] + 111*s[j] + 29*s[j+ssd] - 3*s[j+ssd+ssd])>>7;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
256 d += ds;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
257 s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
258 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
259 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
260 d[j] = (s[j+ssd] + 3*s[j])>>2;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
261 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
262 if (!up) memcpy(d, s, w);
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
263 asm volatile("emms \n\t" : : : "memory");
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
264 }
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
265 #endif
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
266
10049
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diff changeset
267 static inline int clamp(int a)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
268 {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
269 // If a<512, this is equivalent to:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
270 // return (a<0) ? 0 : ( (a>255) ? 255 : a);
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
271 return (~(a>>31)) & (a | ((a<<23)>>31));
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
272 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
273
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
274 static void qpel_li_C(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
275 {
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
276 int i, j, ssd=ss;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
277 if (up) {
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
278 ssd = -ss;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
279 memcpy(d, s, w);
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
280 d += ds;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
281 s += ss;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
282 }
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
283 for (i=h-1; i; i--) {
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
284 for (j=0; j<w; j++)
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
285 d[j] = (s[j+ssd] + 3*s[j])>>2;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
286 d += ds;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
287 s += ss;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
288 }
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
289 if (!up) memcpy(d, s, w);
10009
69f10d08c3be new mode for tfields filter -- shifts fields by a quarter-pixel so the
rfelker
parents: 9593
diff changeset
290 }
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
291
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
292 static void qpel_4tap_C(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
293 {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
294 int i, j, ssd=ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
295 if (up) {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
296 ssd = -ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
297 memcpy(d, s, w);
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
298 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
299 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
300 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
301 d[j] = (s[j+ssd] + 3*s[j] + 2)>>2;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
302 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
303 for (i=h-3; i; i--) {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
304 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
305 d[j] = clamp((-9*s[j-ssd] + 111*s[j] + 29*s[j+ssd] - 3*s[j+ssd+ssd] + 64)>>7);
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
306 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
307 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
308 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
309 d[j] = (s[j+ssd] + 3*s[j] + 2)>>2;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
310 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
311 if (!up) memcpy(d, s, w);
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
312 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
313
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
314 static void (*qpel_li)(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up);
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
315 static void (*qpel_4tap)(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up);
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
316
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
317 static int continue_buffered_image(struct vf_instance_s *);
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
318 extern int correct_pts;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
319
17906
20aca9baf5d8 passing pts through the filter layer (lets see if pts or cola comes out at the end)
michael
parents: 17012
diff changeset
320 static int put_image(struct vf_instance_s* vf, mp_image_t *mpi, double pts)
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
321 {
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
322 vf->priv->buffered_mpi = mpi;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
323 vf->priv->buffered_pts = pts;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
324 vf->priv->buffered_i = 0;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
325 return continue_buffered_image(vf);
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
326 }
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
327
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
328 static int continue_buffered_image(struct vf_instance_s *vf)
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
329 {
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
330 int i=vf->priv->buffered_i;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
331 double pts = vf->priv->buffered_pts;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
332 mp_image_t *mpi = vf->priv->buffered_mpi;
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
333 int ret=0;
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
334 mp_image_t *dmpi;
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
335 void (*qpel)(unsigned char *, unsigned char *, int, int, int, int, int);
10078
379f48cace77 support more image formats. hopefully this bpp handling is correct...
rfelker
parents: 10052
diff changeset
336 int bpp=1;
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
337 int tff;
10078
379f48cace77 support more image formats. hopefully this bpp handling is correct...
rfelker
parents: 10052
diff changeset
338
18986
d743c48823cc c++ decls, 100000000000l to whoever broke my code like this..
rfelker
parents: 18917
diff changeset
339 if (i == 0)
d743c48823cc c++ decls, 100000000000l to whoever broke my code like this..
rfelker
parents: 18917
diff changeset
340 vf_queue_frame(vf, continue_buffered_image);
d743c48823cc c++ decls, 100000000000l to whoever broke my code like this..
rfelker
parents: 18917
diff changeset
341 pts += i * .02; // XXX not right
d743c48823cc c++ decls, 100000000000l to whoever broke my code like this..
rfelker
parents: 18917
diff changeset
342
10078
379f48cace77 support more image formats. hopefully this bpp handling is correct...
rfelker
parents: 10052
diff changeset
343 if (!(mpi->flags & MP_IMGFLAG_PLANAR)) bpp = mpi->bpp/8;
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
344 if (vf->priv->parity < 0) {
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
345 if (mpi->fields & MP_IMGFIELD_ORDERED)
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
346 tff = mpi->fields & MP_IMGFIELD_TOP_FIRST;
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
347 else
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
348 tff = 1;
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
349 }
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
350 else tff = (vf->priv->parity&1)^1;
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
351
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
352 switch (vf->priv->mode) {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
353 case 2:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
354 qpel = qpel_li;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
355 break;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
356 case 3:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
357 // TODO: add 3tap filter
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
358 qpel = qpel_4tap;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
359 break;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
360 case 4:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
361 qpel = qpel_4tap;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
362 break;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
363 }
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
364
08264c647f46 new filter
rfelker
parents:
diff changeset
365 switch (vf->priv->mode) {
08264c647f46 new filter
rfelker
parents:
diff changeset
366 case 0:
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
367 for (; i<2; i++) {
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
368 dmpi = vf_get_image(vf->next, mpi->imgfmt,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
369 MP_IMGTYPE_EXPORT, MP_IMGFLAG_ACCEPT_STRIDE,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
370 mpi->width, mpi->height/2);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
371 dmpi->planes[0] = mpi->planes[0] + (i^!tff)*mpi->stride[0];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
372 dmpi->stride[0] = 2*mpi->stride[0];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
373 if (mpi->flags & MP_IMGFLAG_PLANAR) {
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
374 dmpi->planes[1] = mpi->planes[1] + (i^!tff)*mpi->stride[1];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
375 dmpi->planes[2] = mpi->planes[2] + (i^!tff)*mpi->stride[2];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
376 dmpi->stride[1] = 2*mpi->stride[1];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
377 dmpi->stride[2] = 2*mpi->stride[2];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
378 }
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
379 ret |= vf_next_put_image(vf, dmpi, pts);
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
380 if (correct_pts)
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
381 break;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
382 else
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
383 if (!i) vf_next_control(vf, VFCTRL_FLIP_PAGE, NULL);
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
384 }
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
385 break;
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
386 case 1:
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
387 for (; i<2; i++) {
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
388 dmpi = vf_get_image(vf->next, mpi->imgfmt,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
389 MP_IMGTYPE_TEMP, MP_IMGFLAG_ACCEPT_STRIDE,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
390 mpi->width, mpi->height);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
391 my_memcpy_pic(dmpi->planes[0] + (i^!tff)*dmpi->stride[0],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
392 mpi->planes[0] + (i^!tff)*mpi->stride[0],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
393 mpi->w*bpp, mpi->h/2, dmpi->stride[0]*2, mpi->stride[0]*2);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
394 deint(dmpi->planes[0], dmpi->stride[0], mpi->planes[0], mpi->stride[0], mpi->w, mpi->h, (i^!tff));
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
395 if (mpi->flags & MP_IMGFLAG_PLANAR) {
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
396 my_memcpy_pic(dmpi->planes[1] + (i^!tff)*dmpi->stride[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
397 mpi->planes[1] + (i^!tff)*mpi->stride[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
398 mpi->chroma_width, mpi->chroma_height/2,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
399 dmpi->stride[1]*2, mpi->stride[1]*2);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
400 my_memcpy_pic(dmpi->planes[2] + (i^!tff)*dmpi->stride[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
401 mpi->planes[2] + (i^!tff)*mpi->stride[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
402 mpi->chroma_width, mpi->chroma_height/2,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
403 dmpi->stride[2]*2, mpi->stride[2]*2);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
404 deint(dmpi->planes[1], dmpi->stride[1], mpi->planes[1], mpi->stride[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
405 mpi->chroma_width, mpi->chroma_height, (i^!tff));
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
406 deint(dmpi->planes[2], dmpi->stride[2], mpi->planes[2], mpi->stride[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
407 mpi->chroma_width, mpi->chroma_height, (i^!tff));
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
408 }
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
409 ret |= vf_next_put_image(vf, dmpi, pts);
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
410 if (correct_pts)
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
411 break;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
412 else
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
413 if (!i) vf_next_control(vf, VFCTRL_FLIP_PAGE, NULL);
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
414 }
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
415 break;
10009
69f10d08c3be new mode for tfields filter -- shifts fields by a quarter-pixel so the
rfelker
parents: 9593
diff changeset
416 case 2:
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
417 case 3:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
418 case 4:
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
419 for (; i<2; i++) {
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
420 dmpi = vf_get_image(vf->next, mpi->imgfmt,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
421 MP_IMGTYPE_TEMP, MP_IMGFLAG_ACCEPT_STRIDE,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
422 mpi->width, mpi->height/2);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
423 qpel(dmpi->planes[0], mpi->planes[0] + (i^!tff)*mpi->stride[0],
15012
ad8815f740d3 1000l, last commit broke qpel interp entirely
rfelker
parents: 14888
diff changeset
424 mpi->w*bpp, mpi->h/2, dmpi->stride[0], mpi->stride[0]*2, (i^!tff));
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
425 if (mpi->flags & MP_IMGFLAG_PLANAR) {
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
426 qpel(dmpi->planes[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
427 mpi->planes[1] + (i^!tff)*mpi->stride[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
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428 mpi->chroma_width, mpi->chroma_height/2,
15012
ad8815f740d3 1000l, last commit broke qpel interp entirely
rfelker
parents: 14888
diff changeset
429 dmpi->stride[1], mpi->stride[1]*2, (i^!tff));
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
430 qpel(dmpi->planes[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
431 mpi->planes[2] + (i^!tff)*mpi->stride[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
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432 mpi->chroma_width, mpi->chroma_height/2,
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ad8815f740d3 1000l, last commit broke qpel interp entirely
rfelker
parents: 14888
diff changeset
433 dmpi->stride[2], mpi->stride[2]*2, (i^!tff));
14888
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rfelker
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diff changeset
434 }
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
435 ret |= vf_next_put_image(vf, dmpi, pts);
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
436 if (correct_pts)
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
437 break;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
438 else
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
439 if (!i) vf_next_control(vf, VFCTRL_FLIP_PAGE, NULL);
10009
69f10d08c3be new mode for tfields filter -- shifts fields by a quarter-pixel so the
rfelker
parents: 9593
diff changeset
440 }
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
441 break;
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
442 }
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
443 vf->priv->buffered_i = 1;
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
444 return ret;
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
445 }
08264c647f46 new filter
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parents:
diff changeset
446
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parents:
diff changeset
447 static int query_format(struct vf_instance_s* vf, unsigned int fmt)
08264c647f46 new filter
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parents:
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448 {
08264c647f46 new filter
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parents:
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449 /* FIXME - figure out which other formats work */
08264c647f46 new filter
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parents:
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450 switch (fmt) {
08264c647f46 new filter
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parents:
diff changeset
451 case IMGFMT_YV12:
08264c647f46 new filter
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parents:
diff changeset
452 case IMGFMT_IYUV:
08264c647f46 new filter
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parents:
diff changeset
453 case IMGFMT_I420:
08264c647f46 new filter
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parents:
diff changeset
454 return vf_next_query_format(vf, fmt);
08264c647f46 new filter
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parents:
diff changeset
455 }
08264c647f46 new filter
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parents:
diff changeset
456 return 0;
08264c647f46 new filter
rfelker
parents:
diff changeset
457 }
08264c647f46 new filter
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parents:
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458
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parents:
diff changeset
459 static int config(struct vf_instance_s* vf,
08264c647f46 new filter
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parents:
diff changeset
460 int width, int height, int d_width, int d_height,
08264c647f46 new filter
rfelker
parents:
diff changeset
461 unsigned int flags, unsigned int outfmt)
08264c647f46 new filter
rfelker
parents:
diff changeset
462 {
08264c647f46 new filter
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parents:
diff changeset
463 switch (vf->priv->mode) {
08264c647f46 new filter
rfelker
parents:
diff changeset
464 case 0:
10009
69f10d08c3be new mode for tfields filter -- shifts fields by a quarter-pixel so the
rfelker
parents: 9593
diff changeset
465 case 2:
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
466 case 3:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
467 case 4:
9514
08264c647f46 new filter
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parents:
diff changeset
468 return vf_next_config(vf,width,height/2,d_width,d_height,flags,outfmt);
08264c647f46 new filter
rfelker
parents:
diff changeset
469 case 1:
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parents:
diff changeset
470 return vf_next_config(vf,width,height,d_width,d_height,flags,outfmt);
08264c647f46 new filter
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parents:
diff changeset
471 }
08264c647f46 new filter
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parents:
diff changeset
472 return 0;
08264c647f46 new filter
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parents:
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473 }
08264c647f46 new filter
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parents:
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474
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parents:
diff changeset
475 static void uninit(struct vf_instance_s* vf)
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parents:
diff changeset
476 {
08264c647f46 new filter
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parents:
diff changeset
477 free(vf->priv);
08264c647f46 new filter
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parents:
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478 }
08264c647f46 new filter
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parents:
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479
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parents:
diff changeset
480 static int open(vf_instance_t *vf, char* args)
08264c647f46 new filter
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parents:
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481 {
08264c647f46 new filter
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parents:
diff changeset
482 struct vf_priv_s *p;
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parents:
diff changeset
483 vf->config = config;
08264c647f46 new filter
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parents:
diff changeset
484 vf->put_image = put_image;
10078
379f48cace77 support more image formats. hopefully this bpp handling is correct...
rfelker
parents: 10052
diff changeset
485 //vf->query_format = query_format;
9514
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parents:
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486 vf->uninit = uninit;
08264c647f46 new filter
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parents:
diff changeset
487 vf->default_reqs = VFCAP_ACCEPT_STRIDE;
08264c647f46 new filter
rfelker
parents:
diff changeset
488 vf->priv = p = calloc(1, sizeof(struct vf_priv_s));
15013
0bb95cd581b6 sane default mode
rfelker
parents: 15012
diff changeset
489 vf->priv->mode = 4;
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
490 vf->priv->parity = -1;
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
491 if (args) sscanf(args, "%d:%d", &vf->priv->mode, &vf->priv->parity);
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
492 qpel_li = qpel_li_C;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
493 qpel_4tap = qpel_4tap_C;
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
494 #ifdef HAVE_MMX
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
495 if(gCpuCaps.hasMMX) qpel_li = qpel_li_MMX;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
496 if(gCpuCaps.hasMMX) qpel_4tap = qpel_4tap_MMX;
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
497 #endif
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
498 #ifdef HAVE_MMX2
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
499 if(gCpuCaps.hasMMX2) qpel_li = qpel_li_MMX2;
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
500 #endif
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
501 #ifdef HAVE_3DNOW
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
502 if(gCpuCaps.has3DNow) qpel_li = qpel_li_3DNOW;
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
503 #endif
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
504 return 1;
08264c647f46 new filter
rfelker
parents:
diff changeset
505 }
08264c647f46 new filter
rfelker
parents:
diff changeset
506
08264c647f46 new filter
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parents:
diff changeset
507 vf_info_t vf_info_tfields = {
08264c647f46 new filter
rfelker
parents:
diff changeset
508 "temporal field separation",
08264c647f46 new filter
rfelker
parents:
diff changeset
509 "tfields",
08264c647f46 new filter
rfelker
parents:
diff changeset
510 "Rich Felker",
08264c647f46 new filter
rfelker
parents:
diff changeset
511 "",
9593
e9a2af584986 Add the new -vf option wich is the same as vop in reverse order.
albeu
parents: 9514
diff changeset
512 open,
e9a2af584986 Add the new -vf option wich is the same as vop in reverse order.
albeu
parents: 9514
diff changeset
513 NULL
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
514 };
08264c647f46 new filter
rfelker
parents:
diff changeset
515
08264c647f46 new filter
rfelker
parents:
diff changeset
516