Mercurial > mplayer.hg
annotate cpudetect.h @ 21231:1a963c0b58c5
Remove nonexistent variable.
author | diego |
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date | Sat, 25 Nov 2006 19:19:36 +0000 |
parents | 739849dfb699 |
children | 3658234e099b |
rev | line source |
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3146
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
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1 #ifndef CPUDETECT_H |
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
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2 #define CPUDETECT_H |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
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3 |
2281 | 4 #define CPUTYPE_I386 3 |
5 #define CPUTYPE_I486 4 | |
6 #define CPUTYPE_I586 5 | |
7 #define CPUTYPE_I686 6 | |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
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8 |
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adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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9 #ifdef ARCH_X86_64 |
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adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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10 # define REGa rax |
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11 # define REGb rbx |
18391 | 12 # define REGBP rbp |
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adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
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13 # define REGSP rsp |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
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14 # define REG_a "rax" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
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15 # define REG_b "rbx" |
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adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
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16 # define REG_c "rcx" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
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17 # define REG_d "rdx" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
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18 # define REG_S "rsi" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
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19 # define REG_D "rdi" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
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20 # define REG_SP "rsp" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
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21 # define REG_BP "rbp" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
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22 #else |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
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23 # define REGa eax |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
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24 # define REGb ebx |
18391 | 25 # define REGBP ebp |
13720
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adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
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26 # define REGSP esp |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
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27 # define REG_a "eax" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
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28 # define REG_b "ebx" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
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29 # define REG_c "ecx" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
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30 # define REG_d "edx" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
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31 # define REG_S "esi" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
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32 # define REG_D "edi" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
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33 # define REG_SP "esp" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
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34 # define REG_BP "ebp" |
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adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
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35 #endif |
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adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
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36 |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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37 typedef struct cpucaps_s { |
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arpi
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38 int cpuType; |
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Retrieve CPU built-in namestring, and if it exists, print it during cpu detection; t it doesn't exist, fallback to the cpu table. Patch by Zuxy Meng
gpoirier
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39 int cpuModel; |
3403 | 40 int cpuStepping; |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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41 int hasMMX; |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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42 int hasMMX2; |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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43 int has3DNow; |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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44 int has3DNowExt; |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
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45 int hasSSE; |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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46 int hasSSE2; |
3146
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2303
diff
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47 int isX86; |
8860 | 48 unsigned cl_size; /* size of cache line */ |
9003 | 49 int hasAltiVec; |
10885
685c416f12b5
cpuspeed detection for X86 TSC capable CPUs (also added TSC detection, should best be verified by some people with TSC/nonTSC capable CPUs)
atmos4
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50 int hasTSC; |
2268
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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51 } CpuCaps; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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52 |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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53 extern CpuCaps gCpuCaps; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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54 |
2301 | 55 void GetCpuCaps(CpuCaps *caps); |
2303 | 56 |
57 /* returned value is malloc()'ed so free() it after use */ | |
2301 | 58 char *GetCpuFriendlyName(unsigned int regs[], unsigned int regs2[]); |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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59 |
3146
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2303
diff
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60 #endif /* !CPUDETECT_H */ |
2301 | 61 |