annotate postproc/yuv2rgb_template.c @ 7390:2357ee501582

fixed to comply with new loader
author alex
date Fri, 13 Sep 2002 21:55:55 +0000
parents e7635c03910f
children 7bbe4bce6293
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1
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2 /*
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3 * yuv2rgb_mmx.c, Software YUV to RGB coverter with Intel MMX "technology"
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4 *
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5 * Copyright (C) 2000, Silicon Integrated System Corp.
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6 * All Rights Reserved.
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7 *
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8 * Author: Olie Lho <ollie@sis.com.tw>
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9 *
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10 * This file is part of mpeg2dec, a free MPEG-2 video decoder
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11 *
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12 * mpeg2dec is free software; you can redistribute it and/or modify
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13 * it under the terms of the GNU General Public License as published by
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14 * the Free Software Foundation; either version 2, or (at your option)
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15 * any later version.
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16 *
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17 * mpeg2dec is distributed in the hope that it will be useful,
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18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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20 * GNU General Public License for more details.
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21 *
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22 * You should have received a copy of the GNU General Public License
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23 * along with GNU Make; see the file COPYING. If not, write to
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24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
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25 *
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26 * 15,24 bpp and dithering from Michael Niedermayer (michaelni@gmx.at)
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27 * MMX/MMX2 Template stuff from Michael Niedermayer (needed for fast movntq support)
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28 */
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29
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30 #undef MOVNTQ
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31 #undef EMMS
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32 #undef SFENCE
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33
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34 #ifdef HAVE_3DNOW
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35 /* On K6 femms is faster of emms. On K7 femms is directly mapped on emms. */
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36 #define EMMS "femms"
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37 #else
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38 #define EMMS "emms"
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39 #endif
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40
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41 #ifdef HAVE_MMX2
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42 #define MOVNTQ "movntq"
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43 #define SFENCE "sfence"
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44 #else
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45 #define MOVNTQ "movq"
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46 #define SFENCE "/nop"
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47 #endif
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48
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49 #define YUV2RGB \
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50 /* Do the multiply part of the conversion for even and odd pixels,
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51 register usage:
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52 mm0 -> Cblue, mm1 -> Cred, mm2 -> Cgreen even pixels,
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53 mm3 -> Cblue, mm4 -> Cred, mm5 -> Cgreen odd pixels,
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54 mm6 -> Y even, mm7 -> Y odd */\
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55 /* convert the chroma part */\
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56 "punpcklbw %%mm4, %%mm0;" /* scatter 4 Cb 00 u3 00 u2 00 u1 00 u0 */ \
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57 "punpcklbw %%mm4, %%mm1;" /* scatter 4 Cr 00 v3 00 v2 00 v1 00 v0 */ \
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58 \
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59 "psubsw "MANGLE(mmx_80w)", %%mm0;" /* Cb -= 128 */ \
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60 "psubsw "MANGLE(mmx_80w)", %%mm1;" /* Cr -= 128 */ \
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61 \
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62 "psllw $3, %%mm0;" /* Promote precision */ \
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63 "psllw $3, %%mm1;" /* Promote precision */ \
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64 \
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65 "movq %%mm0, %%mm2;" /* Copy 4 Cb 00 u3 00 u2 00 u1 00 u0 */ \
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66 "movq %%mm1, %%mm3;" /* Copy 4 Cr 00 v3 00 v2 00 v1 00 v0 */ \
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67 \
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68 "pmulhw "MANGLE(mmx_U_green)", %%mm2;" /* Mul Cb with green coeff -> Cb green */ \
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69 "pmulhw "MANGLE(mmx_V_green)", %%mm3;" /* Mul Cr with green coeff -> Cr green */ \
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70 \
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71 "pmulhw "MANGLE(mmx_U_blue)", %%mm0;" /* Mul Cb -> Cblue 00 b3 00 b2 00 b1 00 b0 */\
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72 "pmulhw "MANGLE(mmx_V_red)", %%mm1;" /* Mul Cr -> Cred 00 r3 00 r2 00 r1 00 r0 */\
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73 \
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74 "paddsw %%mm3, %%mm2;" /* Cb green + Cr green -> Cgreen */\
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75 \
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76 /* convert the luma part */\
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77 "psubusb "MANGLE(mmx_10w)", %%mm6;" /* Y -= 16 */\
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78 \
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79 "movq %%mm6, %%mm7;" /* Copy 8 Y Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 */\
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80 "pand "MANGLE(mmx_00ffw)", %%mm6;" /* get Y even 00 Y6 00 Y4 00 Y2 00 Y0 */\
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81 \
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82 "psrlw $8, %%mm7;" /* get Y odd 00 Y7 00 Y5 00 Y3 00 Y1 */\
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83 \
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84 "psllw $3, %%mm6;" /* Promote precision */\
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85 "psllw $3, %%mm7;" /* Promote precision */\
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86 \
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87 "pmulhw "MANGLE(mmx_Y_coeff)", %%mm6;" /* Mul 4 Y even 00 y6 00 y4 00 y2 00 y0 */\
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88 "pmulhw "MANGLE(mmx_Y_coeff)", %%mm7;" /* Mul 4 Y odd 00 y7 00 y5 00 y3 00 y1 */\
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89 \
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90 /* Do the addition part of the conversion for even and odd pixels,
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91 register usage:
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92 mm0 -> Cblue, mm1 -> Cred, mm2 -> Cgreen even pixels,
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93 mm3 -> Cblue, mm4 -> Cred, mm5 -> Cgreen odd pixels,
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94 mm6 -> Y even, mm7 -> Y odd */\
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95 "movq %%mm0, %%mm3;" /* Copy Cblue */\
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96 "movq %%mm1, %%mm4;" /* Copy Cred */\
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97 "movq %%mm2, %%mm5;" /* Copy Cgreen */\
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98 \
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99 "paddsw %%mm6, %%mm0;" /* Y even + Cblue 00 B6 00 B4 00 B2 00 B0 */\
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100 "paddsw %%mm7, %%mm3;" /* Y odd + Cblue 00 B7 00 B5 00 B3 00 B1 */\
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101 \
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102 "paddsw %%mm6, %%mm1;" /* Y even + Cred 00 R6 00 R4 00 R2 00 R0 */\
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103 "paddsw %%mm7, %%mm4;" /* Y odd + Cred 00 R7 00 R5 00 R3 00 R1 */\
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104 \
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105 "paddsw %%mm6, %%mm2;" /* Y even + Cgreen 00 G6 00 G4 00 G2 00 G0 */\
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106 "paddsw %%mm7, %%mm5;" /* Y odd + Cgreen 00 G7 00 G5 00 G3 00 G1 */\
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107 \
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108 /* Limit RGB even to 0..255 */\
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109 "packuswb %%mm0, %%mm0;" /* B6 B4 B2 B0 B6 B4 B2 B0 */\
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110 "packuswb %%mm1, %%mm1;" /* R6 R4 R2 R0 R6 R4 R2 R0 */\
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111 "packuswb %%mm2, %%mm2;" /* G6 G4 G2 G0 G6 G4 G2 G0 */\
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112 \
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113 /* Limit RGB odd to 0..255 */\
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114 "packuswb %%mm3, %%mm3;" /* B7 B5 B3 B1 B7 B5 B3 B1 */\
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115 "packuswb %%mm4, %%mm4;" /* R7 R5 R3 R1 R7 R5 R3 R1 */\
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116 "packuswb %%mm5, %%mm5;" /* G7 G5 G3 G1 G7 G5 G3 G1 */\
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117 \
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118 /* Interleave RGB even and odd */\
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119 "punpcklbw %%mm3, %%mm0;" /* B7 B6 B5 B4 B3 B2 B1 B0 */\
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120 "punpcklbw %%mm4, %%mm1;" /* R7 R6 R5 R4 R3 R2 R1 R0 */\
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121 "punpcklbw %%mm5, %%mm2;" /* G7 G6 G5 G4 G3 G2 G1 G0 */\
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122
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123
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124 static inline void RENAME(yuv420_rgb16) (uint8_t * image, uint8_t * py,
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125 uint8_t * pu, uint8_t * pv,
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126 unsigned h_size, unsigned v_size,
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127 unsigned rgb_stride, unsigned y_stride, unsigned uv_stride)
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128 {
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129 int even = 1;
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130 int x, y;
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131
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132 __asm__ __volatile__ ("pxor %mm4, %mm4;" /* zero mm4 */ );
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133
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134 for (y = v_size; --y >= 0; ) {
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135 uint8_t *_image = image;
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136 uint8_t *_py = py;
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137 uint8_t *_pu = pu;
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138 uint8_t *_pv = pv;
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139 int internal_h_size= h_size;
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140 int aligned_h_size= (h_size+7)&~7;
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141
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142 if(rgb_stride >= aligned_h_size*2) internal_h_size= aligned_h_size;
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143
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144 b5Dither= dither8[y&1];
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145 g6Dither= dither4[y&1];
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146 g5Dither= dither8[y&1];
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147 r5Dither= dither8[(y+1)&1];
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148
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149 /* load data for start of next scan line */
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150 __asm__ __volatile__ (
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151 "movd (%1), %%mm0;" /* Load 4 Cb 00 00 00 00 u3 u2 u1 u0 */
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152 "movd (%2), %%mm1;" /* Load 4 Cr 00 00 00 00 v3 v2 v1 v0 */
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153 "movq (%0), %%mm6;" /* Load 8 Y Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 */
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154
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155 : : "r" (_py), "r" (_pu), "r" (_pv));
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156
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157 for (x = internal_h_size >> 3; --x >= 0; ) {
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158 /* this mmx assembly code deals with SINGLE scan line at a time, it convert 8
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159 pixels in each iteration */
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160
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161 __asm__ __volatile__ (
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162 /* no speed diference on my p3@500 with prefetch,
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163 * if it is faster for anyone with -benchmark then tell me
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164 PREFETCH" 64(%0) \n\t"
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165 PREFETCH" 64(%1) \n\t"
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166 PREFETCH" 64(%2) \n\t"
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167 */
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168 YUV2RGB
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169
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170 #ifdef DITHER1XBPP
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171 "paddusb "MANGLE(b5Dither)", %%mm0;"
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172 "paddusb "MANGLE(g6Dither)", %%mm2;"
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173 "paddusb "MANGLE(r5Dither)", %%mm1;"
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174 #endif
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175 /* mask unneeded bits off */
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176 "pand "MANGLE(mmx_redmask)", %%mm0;" /* b7b6b5b4 b3_0_0_0 b7b6b5b4 b3_0_0_0 */
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177 "pand "MANGLE(mmx_grnmask)", %%mm2;" /* g7g6g5g4 g3g2_0_0 g7g6g5g4 g3g2_0_0 */
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178 "pand "MANGLE(mmx_redmask)", %%mm1;" /* r7r6r5r4 r3_0_0_0 r7r6r5r4 r3_0_0_0 */
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179
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180 "psrlw $3,%%mm0;" /* 0_0_0_b7 b6b5b4b3 0_0_0_b7 b6b5b4b3 */
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181 "pxor %%mm4, %%mm4;" /* zero mm4 */
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182
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183 "movq %%mm0, %%mm5;" /* Copy B7-B0 */
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184 "movq %%mm2, %%mm7;" /* Copy G7-G0 */
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185
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186 /* convert rgb24 plane to rgb16 pack for pixel 0-3 */
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187 "punpcklbw %%mm4, %%mm2;" /* 0_0_0_0 0_0_0_0 g7g6g5g4 g3g2_0_0 */
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188 "punpcklbw %%mm1, %%mm0;" /* r7r6r5r4 r3_0_0_0 0_0_0_b7 b6b5b4b3 */
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189
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190 "psllw $3, %%mm2;" /* 0_0_0_0 0_g7g6g5 g4g3g2_0 0_0_0_0 */
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191 "por %%mm2, %%mm0;" /* r7r6r5r4 r3g7g6g5 g4g3g2b7 b6b5b4b3 */
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192
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193 "movq 8 (%0), %%mm6;" /* Load 8 Y Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 */
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194 MOVNTQ " %%mm0, (%3);" /* store pixel 0-3 */
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195
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196 /* convert rgb24 plane to rgb16 pack for pixel 0-3 */
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197 "punpckhbw %%mm4, %%mm7;" /* 0_0_0_0 0_0_0_0 g7g6g5g4 g3g2_0_0 */
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198 "punpckhbw %%mm1, %%mm5;" /* r7r6r5r4 r3_0_0_0 0_0_0_b7 b6b5b4b3 */
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199
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200 "psllw $3, %%mm7;" /* 0_0_0_0 0_g7g6g5 g4g3g2_0 0_0_0_0 */
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201 "movd 4 (%1), %%mm0;" /* Load 4 Cb 00 00 00 00 u3 u2 u1 u0 */
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202
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203 "por %%mm7, %%mm5;" /* r7r6r5r4 r3g7g6g5 g4g3g2b7 b6b5b4b3 */
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204 "movd 4 (%2), %%mm1;" /* Load 4 Cr 00 00 00 00 v3 v2 v1 v0 */
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205
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206 MOVNTQ " %%mm5, 8 (%3);" /* store pixel 4-7 */
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207 : : "r" (_py), "r" (_pu), "r" (_pv), "r" (_image));
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208
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209 _py += 8;
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210 _pu += 4;
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211 _pv += 4;
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212 _image += 16;
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213 }
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214
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215 if (!even) {
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216 pu += uv_stride;
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217 pv += uv_stride;
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218 }
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219
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220 py += y_stride;
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221 image += rgb_stride;
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222
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223 even = (!even);
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224 }
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225
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226 __asm__ __volatile__ (EMMS);
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227 }
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228
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229 static inline void RENAME(yuv420_rgb15) (uint8_t * image, uint8_t * py,
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230 uint8_t * pu, uint8_t * pv,
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231 unsigned h_size, unsigned v_size,
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232 unsigned rgb_stride, unsigned y_stride, unsigned uv_stride)
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233 {
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234 int even = 1;
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235 int x, y;
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236
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237 __asm__ __volatile__ ("pxor %mm4, %mm4;" /* zero mm4 */ );
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238
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239 for (y = v_size; --y >= 0; ) {
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240 uint8_t *_image = image;
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241 uint8_t *_py = py;
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242 uint8_t *_pu = pu;
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243 uint8_t *_pv = pv;
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244 int internal_h_size= h_size;
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245 int aligned_h_size= (h_size+7)&~7;
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246
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247 if(rgb_stride >= aligned_h_size*2) internal_h_size= aligned_h_size;
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248
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249 b5Dither= dither8[y&1];
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250 g6Dither= dither4[y&1];
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251 g5Dither= dither8[y&1];
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252 r5Dither= dither8[(y+1)&1];
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253
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254 /* load data for start of next scan line */
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255 __asm__ __volatile__ (
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256 "movd (%1), %%mm0;" /* Load 4 Cb 00 00 00 00 u3 u2 u1 u0 */
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257 "movd (%2), %%mm1;" /* Load 4 Cr 00 00 00 00 v3 v2 v1 v0 */
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258 "movq (%0), %%mm6;" /* Load 8 Y Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 */
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259
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260 : : "r" (_py), "r" (_pu), "r" (_pv));
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261
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262 for (x = internal_h_size >> 3; --x >= 0; ) {
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263 /* this mmx assembly code deals with SINGLE scan line at a time, it convert 8
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264 pixels in each iteration */
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265
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266 __asm__ __volatile__ (
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267 YUV2RGB
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268
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269 #ifdef DITHER1XBPP
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270 "paddusb "MANGLE(b5Dither)", %%mm0 \n\t"
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271 "paddusb "MANGLE(g5Dither)", %%mm2 \n\t"
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272 "paddusb "MANGLE(r5Dither)", %%mm1 \n\t"
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273 #endif
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274
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275 /* mask unneeded bits off */
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276 "pand "MANGLE(mmx_redmask)", %%mm0;" /* b7b6b5b4 b3_0_0_0 b7b6b5b4 b3_0_0_0 */
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277 "pand "MANGLE(mmx_redmask)", %%mm2;" /* g7g6g5g4 g3_0_0_0 g7g6g5g4 g3_0_0_0 */
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278 "pand "MANGLE(mmx_redmask)", %%mm1;" /* r7r6r5r4 r3_0_0_0 r7r6r5r4 r3_0_0_0 */
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279
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280 "psrlw $3,%%mm0;" /* 0_0_0_b7 b6b5b4b3 0_0_0_b7 b6b5b4b3 */
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281 "psrlw $1,%%mm1;" /* 0_r7r6r5 r4r3_0_0 0_r7r6r5 r4r3_0_0 */
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282 "pxor %%mm4, %%mm4;" /* zero mm4 */
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283
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284 "movq %%mm0, %%mm5;" /* Copy B7-B0 */
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285 "movq %%mm2, %%mm7;" /* Copy G7-G0 */
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286
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287 /* convert rgb24 plane to rgb16 pack for pixel 0-3 */
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288 "punpcklbw %%mm4, %%mm2;" /* 0_0_0_0 0_0_0_0 g7g6g5g4 g3_0_0_0 */
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289 "punpcklbw %%mm1, %%mm0;" /* r7r6r5r4 r3_0_0_0 0_0_0_b7 b6b5b4b3 */
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290
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291 "psllw $2, %%mm2;" /* 0_0_0_0 0_0_g7g6 g5g4g3_0 0_0_0_0 */
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292 "por %%mm2, %%mm0;" /* 0_r7r6r5 r4r3g7g6 g5g4g3b7 b6b5b4b3 */
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293
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294 "movq 8 (%0), %%mm6;" /* Load 8 Y Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 */
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295 MOVNTQ " %%mm0, (%3);" /* store pixel 0-3 */
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296
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297 /* convert rgb24 plane to rgb16 pack for pixel 0-3 */
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298 "punpckhbw %%mm4, %%mm7;" /* 0_0_0_0 0_0_0_0 0_g7g6g5 g4g3_0_0 */
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299 "punpckhbw %%mm1, %%mm5;" /* r7r6r5r4 r3_0_0_0 0_0_0_b7 b6b5b4b3 */
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300
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301 "psllw $2, %%mm7;" /* 0_0_0_0 0_0_g7g6 g5g4g3_0 0_0_0_0 */
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302 "movd 4 (%1), %%mm0;" /* Load 4 Cb 00 00 00 00 u3 u2 u1 u0 */
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303
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304 "por %%mm7, %%mm5;" /* 0_r7r6r5 r4r3g7g6 g5g4g3b7 b6b5b4b3 */
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305 "movd 4 (%2), %%mm1;" /* Load 4 Cr 00 00 00 00 v3 v2 v1 v0 */
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306
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307 MOVNTQ " %%mm5, 8 (%3);" /* store pixel 4-7 */
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308 : : "r" (_py), "r" (_pu), "r" (_pv), "r" (_image));
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309
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310 _py += 8;
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311 _pu += 4;
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312 _pv += 4;
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313 _image += 16;
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314 }
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315
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316 if (!even) {
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317 pu += uv_stride;
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318 pv += uv_stride;
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319 }
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320
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321 py += y_stride;
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322 image += rgb_stride;
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323
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324 even = (!even);
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325 }
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326
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327 __asm__ __volatile__ (EMMS);
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328 }
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329
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330 static inline void RENAME(yuv420_rgb24) (uint8_t * image, uint8_t * py,
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331 uint8_t * pu, uint8_t * pv,
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332 unsigned h_size, unsigned v_size,
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333 unsigned rgb_stride, unsigned y_stride, unsigned uv_stride)
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334 {
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335 int even = 1;
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336 int x, y;
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337
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338 __asm__ __volatile__ ("pxor %mm4, %mm4;" /* zero mm4 */ );
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339
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340 for (y = v_size; --y >= 0; ) {
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diff changeset
341 uint8_t *_image = image;
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
342 uint8_t *_py = py;
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
343 uint8_t *_pu = pu;
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
344 uint8_t *_pv = pv;
5533
dd78203ea703 fixing black stripe at right if width%8!=0 && stride%8==0 reported by kabi
michael
parents: 4285
diff changeset
345 int internal_h_size= h_size;
dd78203ea703 fixing black stripe at right if width%8!=0 && stride%8==0 reported by kabi
michael
parents: 4285
diff changeset
346 int aligned_h_size= (h_size+7)&~7;
dd78203ea703 fixing black stripe at right if width%8!=0 && stride%8==0 reported by kabi
michael
parents: 4285
diff changeset
347
dd78203ea703 fixing black stripe at right if width%8!=0 && stride%8==0 reported by kabi
michael
parents: 4285
diff changeset
348 if(rgb_stride >= aligned_h_size*3) internal_h_size= aligned_h_size;
2734
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
349
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
350 /* load data for start of next scan line */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
351 __asm__ __volatile__ (
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
352 "movd (%1), %%mm0;" /* Load 4 Cb 00 00 00 00 u3 u2 u1 u0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
353 "movd (%2), %%mm1;" /* Load 4 Cr 00 00 00 00 v3 v2 v1 v0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
354 "movq (%0), %%mm6;" /* Load 8 Y Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
355
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
356 : : "r" (_py), "r" (_pu), "r" (_pv));
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
357
5533
dd78203ea703 fixing black stripe at right if width%8!=0 && stride%8==0 reported by kabi
michael
parents: 4285
diff changeset
358 for (x = internal_h_size >> 3; --x >= 0; ) {
2734
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
359 /* this mmx assembly code deals with SINGLE scan line at a time, it convert 8
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
360 pixels in each iteration */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
361
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
362 __asm__ __volatile__ (
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
363 YUV2RGB
2739
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
364 /* mm0=B, %%mm2=G, %%mm1=R */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
365 #ifdef HAVE_MMX2
4285
20806e535b96 add mangling
atmos4
parents: 3143
diff changeset
366 "movq "MANGLE(M24A)", %%mm4 \n\t"
20806e535b96 add mangling
atmos4
parents: 3143
diff changeset
367 "movq "MANGLE(M24C)", %%mm7 \n\t"
2739
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
368 "pshufw $0x50, %%mm0, %%mm5 \n\t" /* B3 B2 B3 B2 B1 B0 B1 B0 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
369 "pshufw $0x50, %%mm2, %%mm3 \n\t" /* G3 G2 G3 G2 G1 G0 G1 G0 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
370 "pshufw $0x00, %%mm1, %%mm6 \n\t" /* R1 R0 R1 R0 R1 R0 R1 R0 */
2734
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
371
2739
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
372 "pand %%mm4, %%mm5 \n\t" /* B2 B1 B0 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
373 "pand %%mm4, %%mm3 \n\t" /* G2 G1 G0 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
374 "pand %%mm7, %%mm6 \n\t" /* R1 R0 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
375
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
376 "psllq $8, %%mm3 \n\t" /* G2 G1 G0 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
377 "por %%mm5, %%mm6 \n\t"
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
378 "por %%mm3, %%mm6 \n\t"
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
379 MOVNTQ" %%mm6, (%3) \n\t"
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
380
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
381 "psrlq $8, %%mm2 \n\t" /* 00 G7 G6 G5 G4 G3 G2 G1 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
382 "pshufw $0xA5, %%mm0, %%mm5 \n\t" /* B5 B4 B5 B4 B3 B2 B3 B2 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
383 "pshufw $0x55, %%mm2, %%mm3 \n\t" /* G4 G3 G4 G3 G4 G3 G4 G3 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
384 "pshufw $0xA5, %%mm1, %%mm6 \n\t" /* R5 R4 R5 R4 R3 R2 R3 R2 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
385
4285
20806e535b96 add mangling
atmos4
parents: 3143
diff changeset
386 "pand "MANGLE(M24B)", %%mm5 \n\t" /* B5 B4 B3 */
2739
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
387 "pand %%mm7, %%mm3 \n\t" /* G4 G3 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
388 "pand %%mm4, %%mm6 \n\t" /* R4 R3 R2 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
389
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
390 "por %%mm5, %%mm3 \n\t" /* B5 G4 B4 G3 B3 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
391 "por %%mm3, %%mm6 \n\t"
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
392 MOVNTQ" %%mm6, 8(%3) \n\t"
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
393
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
394 "pshufw $0xFF, %%mm0, %%mm5 \n\t" /* B7 B6 B7 B6 B7 B6 B6 B7 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
395 "pshufw $0xFA, %%mm2, %%mm3 \n\t" /* 00 G7 00 G7 G6 G5 G6 G5 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
396 "pshufw $0xFA, %%mm1, %%mm6 \n\t" /* R7 R6 R7 R6 R5 R4 R5 R4 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
397 "movd 4 (%1), %%mm0;" /* Load 4 Cb 00 00 00 00 u3 u2 u1 u0 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
398
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
399 "pand %%mm7, %%mm5 \n\t" /* B7 B6 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
400 "pand %%mm4, %%mm3 \n\t" /* G7 G6 G5 */
4285
20806e535b96 add mangling
atmos4
parents: 3143
diff changeset
401 "pand "MANGLE(M24B)", %%mm6 \n\t" /* R7 R6 R5 */
2739
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
402 "movd 4 (%2), %%mm1;" /* Load 4 Cr 00 00 00 00 v3 v2 v1 v0 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
403 \
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
404 "por %%mm5, %%mm3 \n\t"
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
405 "por %%mm3, %%mm6 \n\t"
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
406 MOVNTQ" %%mm6, 16(%3) \n\t"
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
407 "movq 8 (%0), %%mm6;" /* Load 8 Y Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 */
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
408 "pxor %%mm4, %%mm4 \n\t"
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
409
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
410 #else
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
411
2734
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
412 "pxor %%mm4, %%mm4 \n\t"
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
413 "movq %%mm0, %%mm5 \n\t" /* B */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
414 "movq %%mm1, %%mm6 \n\t" /* R */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
415 "punpcklbw %%mm2, %%mm0 \n\t" /* GBGBGBGB 0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
416 "punpcklbw %%mm4, %%mm1 \n\t" /* 0R0R0R0R 0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
417 "punpckhbw %%mm2, %%mm5 \n\t" /* GBGBGBGB 2 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
418 "punpckhbw %%mm4, %%mm6 \n\t" /* 0R0R0R0R 2 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
419 "movq %%mm0, %%mm7 \n\t" /* GBGBGBGB 0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
420 "movq %%mm5, %%mm3 \n\t" /* GBGBGBGB 2 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
421 "punpcklwd %%mm1, %%mm7 \n\t" /* 0RGB0RGB 0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
422 "punpckhwd %%mm1, %%mm0 \n\t" /* 0RGB0RGB 1 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
423 "punpcklwd %%mm6, %%mm5 \n\t" /* 0RGB0RGB 2 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
424 "punpckhwd %%mm6, %%mm3 \n\t" /* 0RGB0RGB 3 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
425
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
426 "movq %%mm7, %%mm2 \n\t" /* 0RGB0RGB 0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
427 "movq %%mm0, %%mm6 \n\t" /* 0RGB0RGB 1 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
428 "movq %%mm5, %%mm1 \n\t" /* 0RGB0RGB 2 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
429 "movq %%mm3, %%mm4 \n\t" /* 0RGB0RGB 3 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
430
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
431 "psllq $40, %%mm7 \n\t" /* RGB00000 0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
432 "psllq $40, %%mm0 \n\t" /* RGB00000 1 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
433 "psllq $40, %%mm5 \n\t" /* RGB00000 2 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
434 "psllq $40, %%mm3 \n\t" /* RGB00000 3 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
435
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
436 "punpckhdq %%mm2, %%mm7 \n\t" /* 0RGBRGB0 0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
437 "punpckhdq %%mm6, %%mm0 \n\t" /* 0RGBRGB0 1 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
438 "punpckhdq %%mm1, %%mm5 \n\t" /* 0RGBRGB0 2 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
439 "punpckhdq %%mm4, %%mm3 \n\t" /* 0RGBRGB0 3 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
440
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
441 "psrlq $8, %%mm7 \n\t" /* 00RGBRGB 0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
442 "movq %%mm0, %%mm6 \n\t" /* 0RGBRGB0 1 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
443 "psllq $40, %%mm0 \n\t" /* GB000000 1 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
444 "por %%mm0, %%mm7 \n\t" /* GBRGBRGB 0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
445 MOVNTQ" %%mm7, (%3) \n\t"
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
446
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
447 "movd 4 (%1), %%mm0;" /* Load 4 Cb 00 00 00 00 u3 u2 u1 u0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
448
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
449 "psrlq $24, %%mm6 \n\t" /* 0000RGBR 1 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
450 "movq %%mm5, %%mm1 \n\t" /* 0RGBRGB0 2 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
451 "psllq $24, %%mm5 \n\t" /* BRGB0000 2 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
452 "por %%mm5, %%mm6 \n\t" /* BRGBRGBR 1 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
453 MOVNTQ" %%mm6, 8(%3) \n\t"
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
454
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
455 "movq 8 (%0), %%mm6;" /* Load 8 Y Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
456
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
457 "psrlq $40, %%mm1 \n\t" /* 000000RG 2 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
458 "psllq $8, %%mm3 \n\t" /* RGBRGB00 3 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
459 "por %%mm3, %%mm1 \n\t" /* RGBRGBRG 2 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
460 MOVNTQ" %%mm1, 16(%3) \n\t"
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
461
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
462 "movd 4 (%2), %%mm1;" /* Load 4 Cr 00 00 00 00 v3 v2 v1 v0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
463 "pxor %%mm4, %%mm4 \n\t"
2739
f365024806c0 mmx2 bgr24 stuff from swscale (slightly faster)
michael
parents: 2737
diff changeset
464 #endif
2734
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
465
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
466 : : "r" (_py), "r" (_pu), "r" (_pv), "r" (_image));
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
467
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
468 _py += 8;
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
469 _pu += 4;
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
470 _pv += 4;
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
471 _image += 24;
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
472 }
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
473
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
474 if (!even) {
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
475 pu += uv_stride;
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
476 pv += uv_stride;
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
477 }
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
478
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
479 py += y_stride;
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
480 image += rgb_stride;
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
481
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
482 even = (!even);
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
483 }
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
484
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
485 __asm__ __volatile__ (EMMS);
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
486 }
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
487
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
488
3143
86910f54c391 runtime cpu detection
michael
parents: 2749
diff changeset
489 static inline void RENAME(yuv420_argb32) (uint8_t * image, uint8_t * py,
2732
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
490 uint8_t * pu, uint8_t * pv,
6492
e7635c03910f sync with mplayer xp
arpi
parents: 5533
diff changeset
491 unsigned h_size, unsigned v_size,
e7635c03910f sync with mplayer xp
arpi
parents: 5533
diff changeset
492 unsigned rgb_stride, unsigned y_stride, unsigned uv_stride)
2732
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
493 {
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
494 int even = 1;
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
495 int x, y;
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
496
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
497 __asm__ __volatile__ ("pxor %mm4, %mm4;" /* zero mm4 */ );
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
498
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
499 for (y = v_size; --y >= 0; ) {
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
500 uint8_t *_image = image;
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
501 uint8_t *_py = py;
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
502 uint8_t *_pu = pu;
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
503 uint8_t *_pv = pv;
5533
dd78203ea703 fixing black stripe at right if width%8!=0 && stride%8==0 reported by kabi
michael
parents: 4285
diff changeset
504 int internal_h_size= h_size;
dd78203ea703 fixing black stripe at right if width%8!=0 && stride%8==0 reported by kabi
michael
parents: 4285
diff changeset
505 int aligned_h_size= (h_size+7)&~7;
dd78203ea703 fixing black stripe at right if width%8!=0 && stride%8==0 reported by kabi
michael
parents: 4285
diff changeset
506
dd78203ea703 fixing black stripe at right if width%8!=0 && stride%8==0 reported by kabi
michael
parents: 4285
diff changeset
507 if(rgb_stride >= aligned_h_size*4) internal_h_size= aligned_h_size;
2732
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
508
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
509 /* load data for start of next scan line */
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
510 __asm__ __volatile__
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
511 (
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
512 "movd (%1), %%mm0;" /* Load 4 Cb 00 00 00 00 u3 u2 u1 u0 */
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
513 "movd (%2), %%mm1;" /* Load 4 Cr 00 00 00 00 v3 v2 v1 v0 */
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
514 "movq (%0), %%mm6;" /* Load 8 Y Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 */
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
515 : : "r" (_py), "r" (_pu), "r" (_pv)
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
516 );
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
517
5533
dd78203ea703 fixing black stripe at right if width%8!=0 && stride%8==0 reported by kabi
michael
parents: 4285
diff changeset
518 for (x = internal_h_size >> 3; --x >= 0; ) {
2732
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
519 /* this mmx assembly code deals with SINGLE scan line at a time, it convert 8
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
520 pixels in each iteration */
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
521 __asm__ __volatile__ (
2734
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
522 YUV2RGB
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
523 /* convert RGB plane to RGB packed format,
2732
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
524 mm0 -> B, mm1 -> R, mm2 -> G, mm3 -> 0,
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
525 mm4 -> GB, mm5 -> AR pixel 4-7,
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
526 mm6 -> GB, mm7 -> AR pixel 0-3 */
2734
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
527 "pxor %%mm3, %%mm3;" /* zero mm3 */
2732
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
528
2734
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
529 "movq %%mm0, %%mm6;" /* B7 B6 B5 B4 B3 B2 B1 B0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
530 "movq %%mm1, %%mm7;" /* R7 R6 R5 R4 R3 R2 R1 R0 */
2732
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
531
2734
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
532 "movq %%mm0, %%mm4;" /* B7 B6 B5 B4 B3 B2 B1 B0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
533 "movq %%mm1, %%mm5;" /* R7 R6 R5 R4 R3 R2 R1 R0 */
2732
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
534
2734
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
535 "punpcklbw %%mm2, %%mm6;" /* G3 B3 G2 B2 G1 B1 G0 B0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
536 "punpcklbw %%mm3, %%mm7;" /* 00 R3 00 R2 00 R1 00 R0 */
2732
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
537
2734
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
538 "punpcklwd %%mm7, %%mm6;" /* 00 R1 B1 G1 00 R0 B0 G0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
539 MOVNTQ " %%mm6, (%3);" /* Store ARGB1 ARGB0 */
2732
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
540
2734
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
541 "movq %%mm0, %%mm6;" /* B7 B6 B5 B4 B3 B2 B1 B0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
542 "punpcklbw %%mm2, %%mm6;" /* G3 B3 G2 B2 G1 B1 G0 B0 */
2732
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
543
2734
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
544 "punpckhwd %%mm7, %%mm6;" /* 00 R3 G3 B3 00 R2 B3 G2 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
545 MOVNTQ " %%mm6, 8 (%3);" /* Store ARGB3 ARGB2 */
2732
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
546
2734
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
547 "punpckhbw %%mm2, %%mm4;" /* G7 B7 G6 B6 G5 B5 G4 B4 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
548 "punpckhbw %%mm3, %%mm5;" /* 00 R7 00 R6 00 R5 00 R4 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
549
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
550 "punpcklwd %%mm5, %%mm4;" /* 00 R5 B5 G5 00 R4 B4 G4 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
551 MOVNTQ " %%mm4, 16 (%3);" /* Store ARGB5 ARGB4 */
2732
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
552
2734
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
553 "movq %%mm0, %%mm4;" /* B7 B6 B5 B4 B3 B2 B1 B0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
554 "punpckhbw %%mm2, %%mm4;" /* G7 B7 G6 B6 G5 B5 G4 B4 */
2732
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
555
2734
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
556 "punpckhwd %%mm5, %%mm4;" /* 00 R7 G7 B7 00 R6 B6 G6 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
557 MOVNTQ " %%mm4, 24 (%3);" /* Store ARGB7 ARGB6 */
2732
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
558
2734
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
559 "movd 4 (%1), %%mm0;" /* Load 4 Cb 00 00 00 00 u3 u2 u1 u0 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
560 "movd 4 (%2), %%mm1;" /* Load 4 Cr 00 00 00 00 v3 v2 v1 v0 */
2732
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
561
2734
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
562 "pxor %%mm4, %%mm4;" /* zero mm4 */
4ce165aa0135 common code moved to a #define
michael
parents: 2732
diff changeset
563 "movq 8 (%0), %%mm6;" /* Load 8 Y Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 */
2732
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
564
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
565 : : "r" (_py), "r" (_pu), "r" (_pv), "r" (_image));
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
566
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
567 _py += 8;
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
568 _pu += 4;
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
569 _pv += 4;
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
570 _image += 32;
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
571 }
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
572
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
573 if (!even) {
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
574 pu += uv_stride;
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
575 pv += uv_stride;
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
576 }
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
577
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
578 py += y_stride;
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
579 image += rgb_stride;
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
580
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
581 even = (!even);
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
582 }
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
583
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
584 __asm__ __volatile__ (EMMS);
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
585 }
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
586
6492
e7635c03910f sync with mplayer xp
arpi
parents: 5533
diff changeset
587 yuv2rgb_fun RENAME(yuv2rgb_init) (unsigned bpp, int mode)
2732
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
588 {
3143
86910f54c391 runtime cpu detection
michael
parents: 2749
diff changeset
589 if (bpp == 15 && mode == MODE_RGB) return RENAME(yuv420_rgb15);
86910f54c391 runtime cpu detection
michael
parents: 2749
diff changeset
590 if (bpp == 16 && mode == MODE_RGB) return RENAME(yuv420_rgb16);
86910f54c391 runtime cpu detection
michael
parents: 2749
diff changeset
591 if (bpp == 24 && mode == MODE_RGB) return RENAME(yuv420_rgb24);
86910f54c391 runtime cpu detection
michael
parents: 2749
diff changeset
592 if (bpp == 32 && mode == MODE_RGB) return RENAME(yuv420_argb32);
2732
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
593 return NULL; // Fallback to C.
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
594 }
ae79207a3055 Move yuv2rgb to postprocess
nick
parents:
diff changeset
595