annotate mp3lib/d_cpu.s @ 625:2f321fe55bdb

#if 0 'd main()
author laaz
date Tue, 24 Apr 2001 21:52:10 +0000
parents 3b5f5d1c5041
children bab1d9b1056a
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
1
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
1
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
2 / ---------------------------------------------------------------------------
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
3 / Cpu function detect by Pontscho/fresh!mindworkz
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
4 / (c) 2000 - 2000
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
5 / ---------------------------------------------------------------------------
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
6
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
7 .text
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
8
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
9 .globl CpuDetect
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
10 .globl ipentium
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
11 .globl a3dnow
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
12
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
13 / ---------------------------------------------------------------------------
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
14 / in C: unsigned long CpuDetect( void );
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
15 / return: cpu ident number.
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
16 / ---------------------------------------------------------------------------
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
17 CpuDetect:
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
18 pushl %ebx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
19 pushl %ecx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
20 pushl %edx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
21
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
22 movl $1,%eax
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
23 cpuid
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
24
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
25 popl %edx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
26 popl %ecx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
27 popl %ebx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
28 ret
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
29
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
30 / ---------------------------------------------------------------------------
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
31 / in C: unsigled long ipentium( void );
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
32 / return: 0 if the processor is not P5 or above else above 1.
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
33 / ---------------------------------------------------------------------------
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
34 ipentium:
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
35 pushl %ebx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
36 pushl %ecx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
37 pushl %edx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
38 pushfl
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
39 popl %eax
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
40 movl %eax,%ebx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
41 xorl $0x00200000,%eax
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
42 pushl %eax
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
43 popfl
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
44 pushfl
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
45 popl %eax
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
46 cmpl %eax,%ebx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
47 jz no_cpuid
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
48 movl $1,%eax
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
49 cpuid
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
50 shrl $8,%eax
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
51 cmpl $5,%eax
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
52 jb no_cpuid
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
53 movl $1,%eax
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
54 jmp exit
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
55 no_cpuid:
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
56 xorl %eax,%eax
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
57 exit:
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
58 popl %edx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
59 popl %ecx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
60 popl %ebx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
61 ret
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
62
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
63 / ---------------------------------------------------------------------------
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
64 / in C: unsigned long a3dnow( void );
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
65 / return: 0 if this processor not requiment 3dnow! else above 1.
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
66 / ---------------------------------------------------------------------------
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
67 a3dnow:
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
68 pushl %ebx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
69 pushl %edx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
70 pushl %ecx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
71
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
72
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
73 call ipentium
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
74 shrl $1,%eax
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
75 jnc no_3dnow
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
76
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
77 movl $0x80000000,%eax
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
78 cpuid
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
79 cmpl $0x80000000,%eax
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
80 jbe no_3dnow
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
81 movl $0x80000001,%eax
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
82 cpuid
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
83 testl $0x80000000,%edx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
84 jz no_3dnow
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
85 movl $1,%eax
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
86 jmp exit2
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
87 no_3dnow:
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
88 xorl %eax,%eax
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
89 exit2:
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
90
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
91 popl %ecx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
92 popl %edx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
93 popl %ebx
3b5f5d1c5041 Initial revision
arpi_esp
parents:
diff changeset
94 ret