Mercurial > mplayer.hg
annotate libdha/pci.c @ 4148:3b29772a4fb2
S->C
author | nick |
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date | Mon, 14 Jan 2002 10:34:38 +0000 |
parents | 3822582553d6 |
children | 2e3262002acb |
rev | line source |
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3973 | 1 /* |
2 (C) 2002 - library implementation by Nick Kyrshev | |
3 XFree86 3.3.3 scanpci.c, modified for GATOS/win/gfxdump by Øyvind Aabling. | |
4 */ | |
5 | |
6 #include "libdha.h" | |
7 | |
8 #include <errno.h> | |
9 #include <string.h> | |
10 #include "AsmMacros.h" | |
11 #ifdef __unix__ | |
12 #include <unistd.h> | |
13 #include <sys/mman.h> | |
14 #elif defined ( _WIN32 ) | |
15 #include <windows.h> | |
16 #else | |
17 #include <dos.h> | |
18 #endif | |
19 | |
20 #define outb pcioutb | |
21 #define outl pcioutl | |
22 #define inb pciinb | |
23 #define inl pciinl | |
24 | |
25 /* $XConsortium: scanpci.c /main/25 1996/10/27 11:48:40 kaleb $ */ | |
26 /* | |
27 * name: scanpci.c | |
28 * | |
29 * purpose: This program will scan for and print details of | |
30 * devices on the PCI bus. | |
31 | |
32 * author: Robin Cutshaw (robin@xfree86.org) | |
33 * | |
34 * supported O/S's: SVR4, UnixWare, SCO, Solaris, | |
35 * FreeBSD, NetBSD, 386BSD, BSDI BSD/386, | |
36 * Linux, Mach/386, ISC | |
37 * DOS (WATCOM 9.5 compiler) | |
38 * | |
39 * compiling: [g]cc scanpci.c -o scanpci | |
40 * for SVR4 (not Solaris), UnixWare use: | |
41 * [g]cc -DSVR4 scanpci.c -o scanpci | |
42 * for DOS, watcom 9.5: | |
43 * wcc386p -zq -omaxet -7 -4s -s -w3 -d2 name.c | |
44 * and link with PharLap or other dos extender for exe | |
45 * | |
46 */ | |
47 | |
48 /* $XFree86: xc/programs/Xserver/hw/xfree86/etc/scanpci.c,v 3.34.2.17 1998/11/10 11:55:40 dawes Exp $ */ | |
49 | |
50 /* | |
51 * Copyright 1995 by Robin Cutshaw <robin@XFree86.Org> | |
52 * | |
53 * Permission to use, copy, modify, distribute, and sell this software and its | |
54 * documentation for any purpose is hereby granted without fee, provided that | |
55 * the above copyright notice appear in all copies and that both that | |
56 * copyright notice and this permission notice appear in supporting | |
57 * documentation, and that the names of the above listed copyright holder(s) | |
58 * not be used in advertising or publicity pertaining to distribution of | |
59 * the software without specific, written prior permission. The above listed | |
60 * copyright holder(s) make(s) no representations about the suitability of this | |
61 * software for any purpose. It is provided "as is" without express or | |
62 * implied warranty. | |
63 * | |
64 * THE ABOVE LISTED COPYRIGHT HOLDER(S) DISCLAIM(S) ALL WARRANTIES WITH REGARD | |
65 * TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY | |
66 * AND FITNESS, IN NO EVENT SHALL THE ABOVE LISTED COPYRIGHT HOLDER(S) BE | |
67 * LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY | |
68 * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER | |
69 * IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING | |
70 * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
71 * | |
72 */ | |
73 | |
74 #if defined(__SVR4) | |
75 #if !defined(SVR4) | |
76 #define SVR4 | |
77 #endif | |
78 #endif | |
79 | |
80 #ifdef __EMX__ | |
81 #define INCL_DOSFILEMGR | |
82 #include <os2.h> | |
83 #endif | |
84 | |
85 #include <stdio.h> | |
86 #include <sys/types.h> | |
87 #if defined(SVR4) | |
88 #if defined(sun) | |
89 #ifndef __EXTENSIONS__ | |
90 #define __EXTENSIONS__ | |
91 #endif | |
92 #endif | |
93 #include <sys/proc.h> | |
94 #include <sys/tss.h> | |
95 #if defined(NCR) | |
96 #define __STDC | |
97 #include <sys/sysi86.h> | |
98 #undef __STDC | |
99 #else | |
100 #include <sys/sysi86.h> | |
101 #endif | |
102 #if defined(__SUNPRO_C) || defined(sun) || defined(__sun) | |
103 #include <sys/psw.h> | |
104 #else | |
105 #include <sys/seg.h> | |
106 #endif | |
107 #include <sys/v86.h> | |
108 #endif | |
109 #if defined(__FreeBSD__) || defined(__386BSD__) | |
110 #include <sys/file.h> | |
111 #include <machine/console.h> | |
112 #ifndef GCCUSESGAS | |
113 #define GCCUSESGAS | |
114 #endif | |
115 #endif | |
116 #if defined(__NetBSD__) | |
117 #include <sys/param.h> | |
118 #include <sys/file.h> | |
119 #include <machine/sysarch.h> | |
120 #ifndef GCCUSESGAS | |
121 #define GCCUSESGAS | |
122 #endif | |
123 #endif | |
124 #if defined(__bsdi__) | |
125 #include <sys/file.h> | |
126 #include <sys/ioctl.h> | |
127 #include <i386/isa/pcconsioctl.h> | |
128 #ifndef GCCUSESGAS | |
129 #define GCCUSESGAS | |
130 #endif | |
131 #endif | |
132 #if defined(SCO) || defined(ISC) | |
133 #ifndef ISC | |
134 #include <sys/console.h> | |
135 #endif | |
136 #include <sys/param.h> | |
137 #include <sys/immu.h> | |
138 #include <sys/region.h> | |
139 #include <sys/proc.h> | |
140 #include <sys/tss.h> | |
141 #include <sys/sysi86.h> | |
142 #include <sys/v86.h> | |
143 #endif | |
144 #if defined(Lynx_22) | |
145 #ifndef GCCUSESGAS | |
146 #define GCCUSESGAS | |
147 #endif | |
148 #endif | |
149 | |
150 | |
151 #if defined(__WATCOMC__) | |
152 | |
153 #include <stdlib.h> | |
154 static void outl(unsigned port, unsigned data); | |
155 #pragma aux outl = "out dx, eax" parm [dx] [eax]; | |
156 static void outb(unsigned port, unsigned data); | |
157 #pragma aux outb = "out dx, al" parm [dx] [eax]; | |
158 static unsigned inl(unsigned port); | |
159 #pragma aux inl = "in eax, dx" parm [dx]; | |
160 static unsigned inb(unsigned port); | |
161 #pragma aux inb = "xor eax,eax" "in al, dx" parm [dx]; | |
162 | |
163 #else /* __WATCOMC__ */ | |
164 | |
165 #if defined(__GNUC__) | |
166 | |
167 #if !defined(__alpha__) && !defined(__powerpc__) | |
168 #if defined(GCCUSESGAS) | |
169 #define OUTB_GCC "outb %0,%1" | |
170 #define OUTL_GCC "outl %0,%1" | |
171 #define INB_GCC "inb %1,%0" | |
172 #define INL_GCC "inl %1,%0" | |
173 #else | |
174 #define OUTB_GCC "out%B0 (%1)" | |
175 #define OUTL_GCC "out%L0 (%1)" | |
176 #define INB_GCC "in%B0 (%1)" | |
177 #define INL_GCC "in%L0 (%1)" | |
178 #endif /* GCCUSESGAS */ | |
179 | |
180 static void outb(unsigned short port, unsigned char val) { | |
181 __asm__ __volatile__(OUTB_GCC : :"a" (val), "d" (port)); } | |
182 static void outl(unsigned short port, unsigned long val) { | |
183 __asm__ __volatile__(OUTL_GCC : :"a" (val), "d" (port)); } | |
184 static unsigned char inb(unsigned short port) { unsigned char ret; | |
185 __asm__ __volatile__(INB_GCC : "=a" (ret) : "d" (port)); return ret; } | |
186 static unsigned long inl(unsigned short port) { unsigned long ret; | |
187 __asm__ __volatile__(INL_GCC : "=a" (ret) : "d" (port)); return ret; } | |
188 | |
189 #endif /* !defined(__alpha__) && !defined(__powerpc__) */ | |
190 #else /* __GNUC__ */ | |
191 | |
192 #if defined(__STDC__) && (__STDC__ == 1) | |
193 # if !defined(NCR) | |
194 # define asm __asm | |
195 # endif | |
196 #endif | |
197 | |
198 #if defined(__SUNPRO_C) | |
199 /* | |
200 * This section is a gross hack in if you tell anyone that I wrote it, | |
201 * I'll deny it. :-) | |
202 * The leave/ret instructions are the big hack to leave %eax alone on return. | |
203 */ | |
204 static unsigned char inb(int port) { | |
205 asm(" movl 8(%esp),%edx"); | |
206 asm(" subl %eax,%eax"); | |
207 asm(" inb (%dx)"); | |
208 asm(" leave"); | |
209 asm(" ret"); | |
210 } | |
211 | |
212 static unsigned short inw(int port) { | |
213 asm(" movl 8(%esp),%edx"); | |
214 asm(" subl %eax,%eax"); | |
215 asm(" inw (%dx)"); | |
216 asm(" leave"); | |
217 asm(" ret"); | |
218 } | |
219 | |
220 static unsigned long inl(int port) { | |
221 asm(" movl 8(%esp),%edx"); | |
222 asm(" inl (%dx)"); | |
223 asm(" leave"); | |
224 asm(" ret"); | |
225 } | |
226 | |
227 static void outb(int port, unsigned char value) { | |
228 asm(" movl 8(%esp),%edx"); | |
229 asm(" movl 12(%esp),%eax"); | |
230 asm(" outb (%dx)"); | |
231 } | |
232 | |
233 static void outw(int port, unsigned short value) { | |
234 asm(" movl 8(%esp),%edx"); | |
235 asm(" movl 12(%esp),%eax"); | |
236 asm(" outw (%dx)"); | |
237 } | |
238 | |
239 static void outl(int port, unsigned long value) { | |
240 asm(" movl 8(%esp),%edx"); | |
241 asm(" movl 12(%esp),%eax"); | |
242 asm(" outl (%dx)"); | |
243 } | |
244 #else | |
245 | |
246 #if defined(SVR4) | |
247 # if !defined(__USLC__) | |
248 # define __USLC__ | |
249 # endif | |
250 #endif | |
251 | |
252 #ifdef __unix__ | |
253 #ifndef SCO325 | |
254 # include <sys/inline.h> | |
255 #else | |
256 # include "scoasm.h" | |
257 #endif | |
258 #endif | |
259 | |
260 #endif /* SUNPRO_C */ | |
261 | |
262 #endif /* __GNUC__ */ | |
263 #endif /* __WATCOMC__ */ | |
264 | |
265 #undef outb | |
266 #undef outl | |
267 #undef inb | |
268 #undef inl | |
269 | |
270 #if defined(__GLIBC__) && __GLIBC__ >= 2 | |
271 #if defined(linux) | |
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272 #ifdef __i386__ |
3973 | 273 #include <sys/perm.h> |
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274 #else |
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275 #include <sys/io.h> |
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276 #endif |
3973 | 277 #endif |
278 #endif | |
279 | |
280 #if defined(__alpha__) | |
281 #if defined(linux) | |
282 #include <asm/unistd.h> | |
283 #define BUS(tag) (((tag)>>16)&0xff) | |
284 #define DFN(tag) (((tag)>>8)&0xff) | |
285 #else | |
286 Generate compiler error - scanpci unsupported on non-linux alpha platforms | |
287 #endif /* linux */ | |
288 #endif /* __alpha__ */ | |
289 #if defined(Lynx) && defined(__powerpc__) | |
290 /* let's mimick the Linux Alpha stuff for LynxOS so we don't have | |
291 * to change too much code | |
292 */ | |
293 #include <smem.h> | |
294 | |
295 static unsigned char *pciConfBase; | |
296 | |
297 static __inline__ unsigned long | |
298 static swapl(unsigned long val) | |
299 { | |
300 unsigned char *p = (unsigned char *)&val; | |
301 return ((p[3] << 24) | (p[2] << 16) | (p[1] << 8) | (p[0] << 0)); | |
302 } | |
303 | |
304 | |
305 #define BUS(tag) (((tag)>>16)&0xff) | |
306 #define DFN(tag) (((tag)>>8)&0xff) | |
307 | |
308 #define PCIBIOS_DEVICE_NOT_FOUND 0x86 | |
309 #define PCIBIOS_SUCCESSFUL 0x00 | |
310 | |
311 static int pciconfig_read( | |
312 unsigned char bus, | |
313 unsigned char dev, | |
314 unsigned char offset, | |
315 int len, /* unused, alway 4 */ | |
316 unsigned long *val) | |
317 { | |
318 unsigned long _val; | |
319 unsigned long *ptr; | |
320 | |
321 dev >>= 3; | |
322 if (bus || dev >= 16) { | |
323 *val = 0xFFFFFFFF; | |
324 return PCIBIOS_DEVICE_NOT_FOUND; | |
325 } else { | |
326 ptr = (unsigned long *)(pciConfBase + ((1<<dev) | offset)); | |
327 _val = swapl(*ptr); | |
328 } | |
329 *val = _val; | |
330 return PCIBIOS_SUCCESSFUL; | |
331 } | |
332 | |
333 static int pciconfig_write( | |
334 unsigned char bus, | |
335 unsigned char dev, | |
336 unsigned char offset, | |
337 int len, /* unused, alway 4 */ | |
338 unsigned long val) | |
339 { | |
340 unsigned long _val; | |
341 unsigned long *ptr; | |
342 | |
343 dev >>= 3; | |
344 _val = swapl(val); | |
345 if (bus || dev >= 16) { | |
346 return PCIBIOS_DEVICE_NOT_FOUND; | |
347 } else { | |
348 ptr = (unsigned long *)(pciConfBase + ((1<<dev) | offset)); | |
349 *ptr = _val; | |
350 } | |
351 return PCIBIOS_SUCCESSFUL; | |
352 } | |
353 #endif | |
354 | |
355 #if !defined(__powerpc__) | |
356 struct pci_config_reg { | |
357 /* start of official PCI config space header */ | |
358 union { | |
359 unsigned long device_vendor; | |
360 struct { | |
361 unsigned short vendor; | |
362 unsigned short device; | |
363 } dv; | |
364 } dv_id; | |
365 #define _device_vendor dv_id.device_vendor | |
366 #define _vendor dv_id.dv.vendor | |
367 #define _device dv_id.dv.device | |
368 union { | |
369 unsigned long status_command; | |
370 struct { | |
371 unsigned short command; | |
372 unsigned short status; | |
373 } sc; | |
374 } stat_cmd; | |
375 #define _status_command stat_cmd.status_command | |
376 #define _command stat_cmd.sc.command | |
377 #define _status stat_cmd.sc.status | |
378 union { | |
379 unsigned long class_revision; | |
380 struct { | |
381 unsigned char rev_id; | |
382 unsigned char prog_if; | |
383 unsigned char sub_class; | |
384 unsigned char base_class; | |
385 } cr; | |
386 } class_rev; | |
387 #define _class_revision class_rev.class_revision | |
388 #define _rev_id class_rev.cr.rev_id | |
389 #define _prog_if class_rev.cr.prog_if | |
390 #define _sub_class class_rev.cr.sub_class | |
391 #define _base_class class_rev.cr.base_class | |
392 union { | |
393 unsigned long bist_header_latency_cache; | |
394 struct { | |
395 unsigned char cache_line_size; | |
396 unsigned char latency_timer; | |
397 unsigned char header_type; | |
398 unsigned char bist; | |
399 } bhlc; | |
400 } bhlc; | |
401 #define _bist_header_latency_cache bhlc.bist_header_latency_cache | |
402 #define _cache_line_size bhlc.bhlc.cache_line_size | |
403 #define _latency_timer bhlc.bhlc.latency_timer | |
404 #define _header_type bhlc.bhlc.header_type | |
405 #define _bist bhlc.bhlc.bist | |
406 union { | |
407 struct { | |
408 unsigned long dv_base0; | |
409 unsigned long dv_base1; | |
410 unsigned long dv_base2; | |
411 unsigned long dv_base3; | |
412 unsigned long dv_base4; | |
413 unsigned long dv_base5; | |
414 } dv; | |
415 struct { | |
416 unsigned long bg_rsrvd[2]; | |
417 unsigned char primary_bus_number; | |
418 unsigned char secondary_bus_number; | |
419 unsigned char subordinate_bus_number; | |
420 unsigned char secondary_latency_timer; | |
421 unsigned char io_base; | |
422 unsigned char io_limit; | |
423 unsigned short secondary_status; | |
424 unsigned short mem_base; | |
425 unsigned short mem_limit; | |
426 unsigned short prefetch_mem_base; | |
427 unsigned short prefetch_mem_limit; | |
428 } bg; | |
429 } bc; | |
430 #define _base0 bc.dv.dv_base0 | |
431 #define _base1 bc.dv.dv_base1 | |
432 #define _base2 bc.dv.dv_base2 | |
433 #define _base3 bc.dv.dv_base3 | |
434 #define _base4 bc.dv.dv_base4 | |
435 #define _base5 bc.dv.dv_base5 | |
436 #define _primary_bus_number bc.bg.primary_bus_number | |
437 #define _secondary_bus_number bc.bg.secondary_bus_number | |
438 #define _subordinate_bus_number bc.bg.subordinate_bus_number | |
439 #define _secondary_latency_timer bc.bg.secondary_latency_timer | |
440 #define _io_base bc.bg.io_base | |
441 #define _io_limit bc.bg.io_limit | |
442 #define _secondary_status bc.bg.secondary_status | |
443 #define _mem_base bc.bg.mem_base | |
444 #define _mem_limit bc.bg.mem_limit | |
445 #define _prefetch_mem_base bc.bg.prefetch_mem_base | |
446 #define _prefetch_mem_limit bc.bg.prefetch_mem_limit | |
447 unsigned long rsvd1; | |
448 unsigned long rsvd2; | |
449 unsigned long _baserom; | |
450 unsigned long rsvd3; | |
451 unsigned long rsvd4; | |
452 union { | |
453 unsigned long max_min_ipin_iline; | |
454 struct { | |
455 unsigned char int_line; | |
456 unsigned char int_pin; | |
457 unsigned char min_gnt; | |
458 unsigned char max_lat; | |
459 } mmii; | |
460 } mmii; | |
461 #define _max_min_ipin_iline mmii.max_min_ipin_iline | |
462 #define _int_line mmii.mmii.int_line | |
463 #define _int_pin mmii.mmii.int_pin | |
464 #define _min_gnt mmii.mmii.min_gnt | |
465 #define _max_lat mmii.mmii.max_lat | |
466 /* I don't know how accurate or standard this is (DHD) */ | |
467 union { | |
468 unsigned long user_config; | |
469 struct { | |
470 unsigned char user_config_0; | |
471 unsigned char user_config_1; | |
472 unsigned char user_config_2; | |
473 unsigned char user_config_3; | |
474 } uc; | |
475 } uc; | |
476 #define _user_config uc.user_config | |
477 #define _user_config_0 uc.uc.user_config_0 | |
478 #define _user_config_1 uc.uc.user_config_1 | |
479 #define _user_config_2 uc.uc.user_config_2 | |
480 #define _user_config_3 uc.uc.user_config_3 | |
481 /* end of official PCI config space header */ | |
482 unsigned long _pcibusidx; | |
483 unsigned long _pcinumbus; | |
484 unsigned long _pcibuses[16]; | |
485 unsigned short _configtype; /* config type found */ | |
486 unsigned short _ioaddr; /* config type 1 - private I/O addr */ | |
487 unsigned long _cardnum; /* config type 2 - private card number */ | |
488 }; | |
489 #else | |
490 /* ppc is big endian, swapping bytes is not quite enough | |
491 * to interpret the PCI config registers... | |
492 */ | |
493 struct pci_config_reg { | |
494 /* start of official PCI config space header */ | |
495 union { | |
496 unsigned long device_vendor; | |
497 struct { | |
498 unsigned short device; | |
499 unsigned short vendor; | |
500 } dv; | |
501 } dv_id; | |
502 #define _device_vendor dv_id.device_vendor | |
503 #define _vendor dv_id.dv.vendor | |
504 #define _device dv_id.dv.device | |
505 union { | |
506 unsigned long status_command; | |
507 struct { | |
508 unsigned short status; | |
509 unsigned short command; | |
510 } sc; | |
511 } stat_cmd; | |
512 #define _status_command stat_cmd.status_command | |
513 #define _command stat_cmd.sc.command | |
514 #define _status stat_cmd.sc.status | |
515 union { | |
516 unsigned long class_revision; | |
517 struct { | |
518 unsigned char base_class; | |
519 unsigned char sub_class; | |
520 unsigned char prog_if; | |
521 unsigned char rev_id; | |
522 } cr; | |
523 } class_rev; | |
524 #define _class_revision class_rev.class_revision | |
525 #define _rev_id class_rev.cr.rev_id | |
526 #define _prog_if class_rev.cr.prog_if | |
527 #define _sub_class class_rev.cr.sub_class | |
528 #define _base_class class_rev.cr.base_class | |
529 union { | |
530 unsigned long bist_header_latency_cache; | |
531 struct { | |
532 unsigned char bist; | |
533 unsigned char header_type; | |
534 unsigned char latency_timer; | |
535 unsigned char cache_line_size; | |
536 } bhlc; | |
537 } bhlc; | |
538 #define _bist_header_latency_cache bhlc.bist_header_latency_cache | |
539 #define _cache_line_size bhlc.bhlc.cache_line_size | |
540 #define _latency_timer bhlc.bhlc.latency_timer | |
541 #define _header_type bhlc.bhlc.header_type | |
542 #define _bist bhlc.bhlc.bist | |
543 union { | |
544 struct { | |
545 unsigned long dv_base0; | |
546 unsigned long dv_base1; | |
547 unsigned long dv_base2; | |
548 unsigned long dv_base3; | |
549 unsigned long dv_base4; | |
550 unsigned long dv_base5; | |
551 } dv; | |
552 /* ?? */ | |
553 struct { | |
554 unsigned long bg_rsrvd[2]; | |
555 | |
556 unsigned char secondary_latency_timer; | |
557 unsigned char subordinate_bus_number; | |
558 unsigned char secondary_bus_number; | |
559 unsigned char primary_bus_number; | |
560 | |
561 unsigned short secondary_status; | |
562 unsigned char io_limit; | |
563 unsigned char io_base; | |
564 | |
565 unsigned short mem_limit; | |
566 unsigned short mem_base; | |
567 | |
568 unsigned short prefetch_mem_limit; | |
569 unsigned short prefetch_mem_base; | |
570 } bg; | |
571 } bc; | |
572 #define _base0 bc.dv.dv_base0 | |
573 #define _base1 bc.dv.dv_base1 | |
574 #define _base2 bc.dv.dv_base2 | |
575 #define _base3 bc.dv.dv_base3 | |
576 #define _base4 bc.dv.dv_base4 | |
577 #define _base5 bc.dv.dv_base5 | |
578 #define _primary_bus_number bc.bg.primary_bus_number | |
579 #define _secondary_bus_number bc.bg.secondary_bus_number | |
580 #define _subordinate_bus_number bc.bg.subordinate_bus_number | |
581 #define _secondary_latency_timer bc.bg.secondary_latency_timer | |
582 #define _io_base bc.bg.io_base | |
583 #define _io_limit bc.bg.io_limit | |
584 #define _secondary_status bc.bg.secondary_status | |
585 #define _mem_base bc.bg.mem_base | |
586 #define _mem_limit bc.bg.mem_limit | |
587 #define _prefetch_mem_base bc.bg.prefetch_mem_base | |
588 #define _prefetch_mem_limit bc.bg.prefetch_mem_limit | |
589 unsigned long rsvd1; | |
590 unsigned long rsvd2; | |
591 unsigned long _baserom; | |
592 unsigned long rsvd3; | |
593 unsigned long rsvd4; | |
594 union { | |
595 unsigned long max_min_ipin_iline; | |
596 struct { | |
597 unsigned char max_lat; | |
598 unsigned char min_gnt; | |
599 unsigned char int_pin; | |
600 unsigned char int_line; | |
601 } mmii; | |
602 } mmii; | |
603 #define _max_min_ipin_iline mmii.max_min_ipin_iline | |
604 #define _int_line mmii.mmii.int_line | |
605 #define _int_pin mmii.mmii.int_pin | |
606 #define _min_gnt mmii.mmii.min_gnt | |
607 #define _max_lat mmii.mmii.max_lat | |
608 /* I don't know how accurate or standard this is (DHD) */ | |
609 union { | |
610 unsigned long user_config; | |
611 struct { | |
612 unsigned char user_config_3; | |
613 unsigned char user_config_2; | |
614 unsigned char user_config_1; | |
615 unsigned char user_config_0; | |
616 } uc; | |
617 } uc; | |
618 #define _user_config uc.user_config | |
619 #define _user_config_0 uc.uc.user_config_0 | |
620 #define _user_config_1 uc.uc.user_config_1 | |
621 #define _user_config_2 uc.uc.user_config_2 | |
622 #define _user_config_3 uc.uc.user_config_3 | |
623 /* end of official PCI config space header */ | |
624 unsigned long _pcibusidx; | |
625 unsigned long _pcinumbus; | |
626 unsigned long _pcibuses[16]; | |
627 unsigned short _ioaddr; /* config type 1 - private I/O addr */ | |
628 unsigned short _configtype; /* config type found */ | |
629 unsigned long _cardnum; /* config type 2 - private card number */ | |
630 }; | |
631 #endif | |
632 | |
633 #define MAX_DEV_PER_VENDOR_CFG1 64 | |
634 #define MAX_PCI_DEVICES_PER_BUS 32 | |
635 #define MAX_PCI_DEVICES 64 | |
636 #define NF ((void (*)())NULL), { 0.0, 0, 0, NULL } | |
637 #define PCI_MULTIFUNC_DEV 0x80 | |
638 #if defined(__alpha__) || defined(__powerpc__) | |
639 #define PCI_ID_REG 0x00 | |
640 #define PCI_CMD_STAT_REG 0x04 | |
641 #define PCI_CLASS_REG 0x08 | |
642 #define PCI_HEADER_MISC 0x0C | |
643 #define PCI_MAP_REG_START 0x10 | |
644 #define PCI_MAP_ROM_REG 0x30 | |
645 #define PCI_INTERRUPT_REG 0x3C | |
646 #define PCI_REG_USERCONFIG 0x40 | |
647 #endif | |
648 | |
649 static int pcibus=-1, pcicard=-1, pcifunc=-1 ; | |
650 /*static struct pci_device *pcidev=NULL ;*/ | |
651 | |
652 #if defined(__alpha__) | |
653 #define PCI_EN 0x00000000 | |
654 #else | |
655 #define PCI_EN 0x80000000 | |
656 #endif | |
657 | |
658 #define PCI_MODE1_ADDRESS_REG 0xCF8 | |
659 #define PCI_MODE1_DATA_REG 0xCFC | |
660 | |
661 #define PCI_MODE2_ENABLE_REG 0xCF8 | |
662 #ifdef PC98 | |
663 #define PCI_MODE2_FORWARD_REG 0xCF9 | |
664 #else | |
665 #define PCI_MODE2_FORWARD_REG 0xCFA | |
666 #endif | |
667 | |
668 static int pcicards=0 ; | |
669 static pciinfo_t *pci_lst; | |
670 | |
671 static void identify_card(struct pci_config_reg *pcr) | |
672 { | |
673 | |
674 if (pcicards>=MAX_PCI_DEVICES) return ; | |
675 | |
676 pci_lst[pcicards].bus = pcibus ; | |
677 pci_lst[pcicards].card = pcicard ; | |
678 pci_lst[pcicards].func = pcifunc ; | |
679 pci_lst[pcicards].vendor = pcr->_vendor ; | |
680 pci_lst[pcicards].device = pcr->_device ; | |
681 pci_lst[pcicards].base0 = 0xFFFFFFFF ; | |
682 pci_lst[pcicards].base1 = 0xFFFFFFFF ; | |
683 pci_lst[pcicards].base2 = 0xFFFFFFFF ; | |
684 pci_lst[pcicards].baserom = 0x000C0000 ; | |
685 if (pcr->_base0) pci_lst[pcicards].base0 = pcr->_base0 & | |
686 ((pcr->_base0&0x1) ? 0xFFFFFFFC : 0xFFFFFFF0) ; | |
687 if (pcr->_base1) pci_lst[pcicards].base1 = pcr->_base1 & | |
688 ((pcr->_base1&0x1) ? 0xFFFFFFFC : 0xFFFFFFF0) ; | |
689 if (pcr->_base2) pci_lst[pcicards].base2 = pcr->_base2 & | |
690 ((pcr->_base2&0x1) ? 0xFFFFFFFC : 0xFFFFFFF0) ; | |
691 if (pcr->_baserom) pci_lst[pcicards].baserom = pcr->_baserom ; | |
692 | |
693 pcicards++; | |
694 } | |
695 | |
696 static int io_fd; | |
697 #ifdef __EMX__ | |
698 static USHORT callgate[3] = {0,0,0}; | |
699 #endif | |
700 | |
701 static void enable_os_io(void) | |
702 { | |
703 io_fd = -1 ; | |
704 #if defined(SVR4) || defined(SCO) || defined(ISC) | |
705 #if defined(SI86IOPL) | |
706 sysi86(SI86IOPL, 3); | |
707 #else | |
708 sysi86(SI86V86, V86SC_IOPL, PS_IOPL); | |
709 #endif | |
710 #endif | |
711 #if defined(linux) | |
712 iopl(3); | |
713 #endif | |
714 #if defined(__FreeBSD__) || defined(__386BSD__) || defined(__bsdi__) | |
715 if ((io_fd = open("/dev/console", O_RDWR, 0)) < 0) { | |
716 perror("/dev/console"); | |
717 exit(1); | |
718 } | |
719 #if defined(__FreeBSD__) || defined(__386BSD__) | |
720 if (ioctl(io_fd, KDENABIO, 0) < 0) { | |
721 perror("ioctl(KDENABIO)"); | |
722 exit(1); | |
723 } | |
724 #endif | |
725 #if defined(__bsdi__) | |
726 if (ioctl(io_fd, PCCONENABIOPL, 0) < 0) { | |
727 perror("ioctl(PCCONENABIOPL)"); | |
728 exit(1); | |
729 } | |
730 #endif | |
731 #endif | |
732 #if defined(__NetBSD__) | |
733 #if !defined(USE_I386_IOPL) | |
734 if ((io_fd = open("/dev/io", O_RDWR, 0)) < 0) { | |
735 perror("/dev/io"); | |
736 exit(1); | |
737 } | |
738 #else | |
739 if (i386_iopl(1) < 0) { | |
740 perror("i386_iopl"); | |
741 exit(1); | |
742 } | |
743 #endif /* USE_I386_IOPL */ | |
744 #endif /* __NetBSD__ */ | |
745 #if defined(__OpenBSD__) | |
746 if (i386_iopl(1) < 0) { | |
747 perror("i386_iopl"); | |
748 exit(1); | |
749 } | |
750 #endif /* __OpenBSD__ */ | |
751 #if defined(MACH386) | |
752 if ((io_fd = open("/dev/iopl", O_RDWR, 0)) < 0) { | |
753 perror("/dev/iopl"); | |
754 exit(1); | |
755 } | |
756 #endif | |
757 #ifdef __EMX__ | |
758 { | |
759 HFILE hfd; | |
760 ULONG dlen,action; | |
761 APIRET rc; | |
762 static char *ioDrvPath = "/dev/fastio$"; | |
763 | |
764 if (DosOpen((PSZ)ioDrvPath, (PHFILE)&hfd, (PULONG)&action, | |
765 (ULONG)0, FILE_SYSTEM, FILE_OPEN, | |
766 OPEN_SHARE_DENYNONE|OPEN_FLAGS_NOINHERIT|OPEN_ACCESS_READONLY, | |
767 (ULONG)0) != 0) { | |
768 fprintf(stderr,"Error opening fastio$ driver...\n"); | |
769 fprintf(stderr,"Please install xf86sup.sys in config.sys!\n"); | |
770 exit(42); | |
771 } | |
772 callgate[0] = callgate[1] = 0; | |
773 | |
774 /* Get callgate from driver for fast io to ports and other stuff */ | |
775 | |
776 rc = DosDevIOCtl(hfd, (ULONG)0x76, (ULONG)0x64, | |
777 NULL, 0, NULL, | |
778 (ULONG*)&callgate[2], sizeof(USHORT), &dlen); | |
779 if (rc) { | |
780 fprintf(stderr,"xf86-OS/2: EnableIOPorts failed, rc=%d, dlen=%d; emergency exit\n", | |
781 rc,dlen); | |
782 DosClose(hfd); | |
783 exit(42); | |
784 } | |
785 | |
786 /* Calling callgate with function 13 sets IOPL for the program */ | |
787 | |
788 asm volatile ("movl $13,%%ebx;.byte 0xff,0x1d;.long _callgate" | |
789 : /*no outputs */ | |
790 : /*no inputs */ | |
791 : "eax","ebx","ecx","edx","cc"); | |
792 | |
793 DosClose(hfd); | |
794 } | |
795 #endif | |
796 #if defined(Lynx) && defined(__powerpc__) | |
797 pciConfBase = (unsigned char *) smem_create("PCI-CONF", | |
798 (char *)0x80800000, 64*1024, SM_READ|SM_WRITE); | |
799 if (pciConfBase == (void *) -1) | |
800 exit(1); | |
801 #endif | |
802 } | |
803 | |
804 | |
805 static void disable_os_io(void) | |
806 { | |
807 #if defined(SVR4) || defined(SCO) || defined(ISC) | |
808 #if defined(SI86IOPL) | |
809 sysi86(SI86IOPL, 0); | |
810 #else | |
811 sysi86(SI86V86, V86SC_IOPL, 0); | |
812 #endif | |
813 #endif | |
814 #if defined(linux) | |
815 iopl(0); | |
816 #endif | |
817 #if defined(__FreeBSD__) || defined(__386BSD__) | |
818 if (ioctl(io_fd, KDDISABIO, 0) < 0) { | |
819 perror("ioctl(KDDISABIO)"); | |
820 close(io_fd); | |
821 exit(1); | |
822 } | |
823 close(io_fd); | |
824 #endif | |
825 #if defined(__NetBSD__) | |
826 #if !defined(USE_I386_IOPL) | |
827 close(io_fd); | |
828 #else | |
829 if (i386_iopl(0) < 0) { | |
830 perror("i386_iopl"); | |
831 exit(1); | |
832 } | |
833 #endif /* NetBSD1_1 */ | |
834 #endif /* __NetBSD__ */ | |
835 #if defined(__bsdi__) | |
836 if (ioctl(io_fd, PCCONDISABIOPL, 0) < 0) { | |
837 perror("ioctl(PCCONDISABIOPL)"); | |
838 close(io_fd); | |
839 exit(1); | |
840 } | |
841 close(io_fd); | |
842 #endif | |
843 #if defined(MACH386) | |
844 close(io_fd); | |
845 #endif | |
846 #if defined(Lynx) && defined(__powerpc__) | |
847 smem_create(NULL, (char *) pciConfBase, 0, SM_DETACH); | |
848 smem_remove("PCI-CONF"); | |
849 pciConfBase = NULL; | |
850 #endif | |
851 } | |
852 | |
853 /*main(int argc, char *argv[])*/ | |
854 int pci_scan(pciinfo_t *pci_list,unsigned *num_pci) | |
855 { | |
856 unsigned long tmplong1, tmplong2, config_cmd; | |
857 unsigned char tmp1, tmp2; | |
858 unsigned int idx; | |
859 struct pci_config_reg pcr; | |
860 int do_mode1_scan = 0, do_mode2_scan = 0; | |
861 int func, hostbridges=0; | |
862 | |
863 pci_lst = pci_list; | |
864 | |
865 enable_os_io(); | |
866 | |
867 #if !defined(__alpha__) && !defined(__powerpc__) | |
868 pcr._configtype = 0; | |
869 | |
870 outb(PCI_MODE2_ENABLE_REG, 0x00); | |
871 outb(PCI_MODE2_FORWARD_REG, 0x00); | |
872 tmp1 = inb(PCI_MODE2_ENABLE_REG); | |
873 tmp2 = inb(PCI_MODE2_FORWARD_REG); | |
874 if ((tmp1 == 0x00) && (tmp2 == 0x00)) { | |
875 pcr._configtype = 2; | |
876 /*printf("PCI says configuration type 2\n");*/ | |
877 } else { | |
878 tmplong1 = inl(PCI_MODE1_ADDRESS_REG); | |
879 outl(PCI_MODE1_ADDRESS_REG, PCI_EN); | |
880 tmplong2 = inl(PCI_MODE1_ADDRESS_REG); | |
881 outl(PCI_MODE1_ADDRESS_REG, tmplong1); | |
882 if (tmplong2 == PCI_EN) { | |
883 pcr._configtype = 1; | |
884 /*printf("PCI says configuration type 1\n");*/ | |
885 } else { | |
886 /*printf("No PCI !\n");*/ | |
887 disable_os_io(); | |
888 /*exit(1);*/ | |
889 return ENODEV ; | |
890 } | |
891 } | |
892 #else | |
893 pcr._configtype = 1; | |
894 #endif | |
895 | |
896 /* Try pci config 1 probe first */ | |
897 | |
898 if ((pcr._configtype == 1) || do_mode1_scan) { | |
899 /*printf("\nPCI probing configuration type 1\n");*/ | |
900 | |
901 pcr._ioaddr = 0xFFFF; | |
902 | |
903 pcr._pcibuses[0] = 0; | |
904 pcr._pcinumbus = 1; | |
905 pcr._pcibusidx = 0; | |
906 idx = 0; | |
907 | |
908 do { | |
909 /*printf("Probing for devices on PCI bus %d:\n\n", pcr._pcibusidx);*/ | |
910 | |
911 for (pcr._cardnum = 0x0; pcr._cardnum < MAX_PCI_DEVICES_PER_BUS; | |
912 pcr._cardnum += 0x1) { | |
913 func = 0; | |
914 do { /* loop over the different functions, if present */ | |
915 #if !defined(__alpha__) && !defined(__powerpc__) | |
916 config_cmd = PCI_EN | (pcr._pcibuses[pcr._pcibusidx]<<16) | | |
917 (pcr._cardnum<<11) | (func<<8); | |
918 | |
919 outl(PCI_MODE1_ADDRESS_REG, config_cmd); /* ioreg 0 */ | |
920 pcr._device_vendor = inl(PCI_MODE1_DATA_REG); | |
921 #else | |
922 pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3, | |
923 PCI_ID_REG, 4, &pcr._device_vendor); | |
924 #endif | |
925 | |
926 if ((pcr._vendor == 0xFFFF) || (pcr._device == 0xFFFF)) | |
927 break; /* nothing there */ | |
928 | |
929 /*printf("\npci bus 0x%x cardnum 0x%02x function 0x%04x: vendor 0x%04x device 0x%04x\n", | |
930 pcr._pcibuses[pcr._pcibusidx], pcr._cardnum, func, | |
931 pcr._vendor, pcr._device);*/ | |
932 pcibus = pcr._pcibuses[pcr._pcibusidx] ; | |
933 pcicard = pcr._cardnum ; pcifunc = func ; | |
934 | |
935 #if !defined(__alpha__) && !defined(__powerpc__) | |
936 outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x04); | |
937 pcr._status_command = inl(PCI_MODE1_DATA_REG); | |
938 outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x08); | |
939 pcr._class_revision = inl(PCI_MODE1_DATA_REG); | |
940 outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x0C); | |
941 pcr._bist_header_latency_cache = inl(PCI_MODE1_DATA_REG); | |
942 outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x10); | |
943 pcr._base0 = inl(PCI_MODE1_DATA_REG); | |
944 outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x14); | |
945 pcr._base1 = inl(PCI_MODE1_DATA_REG); | |
946 outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x18); | |
947 pcr._base2 = inl(PCI_MODE1_DATA_REG); | |
948 outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x1C); | |
949 pcr._base3 = inl(PCI_MODE1_DATA_REG); | |
950 outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x20); | |
951 pcr._base4 = inl(PCI_MODE1_DATA_REG); | |
952 outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x24); | |
953 pcr._base5 = inl(PCI_MODE1_DATA_REG); | |
954 outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x30); | |
955 pcr._baserom = inl(PCI_MODE1_DATA_REG); | |
956 outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x3C); | |
957 pcr._max_min_ipin_iline = inl(PCI_MODE1_DATA_REG); | |
958 outl(PCI_MODE1_ADDRESS_REG, config_cmd | 0x40); | |
959 pcr._user_config = inl(PCI_MODE1_DATA_REG); | |
960 #else | |
961 pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3, | |
962 PCI_CMD_STAT_REG, 4, &pcr._status_command); | |
963 pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3, | |
964 PCI_CLASS_REG, 4, &pcr._class_revision); | |
965 pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3, | |
966 PCI_HEADER_MISC, 4, &pcr._bist_header_latency_cache); | |
967 pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3, | |
968 PCI_MAP_REG_START, 4, &pcr._base0); | |
969 pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3, | |
970 PCI_MAP_REG_START + 0x04, 4, &pcr._base1); | |
971 pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3, | |
972 PCI_MAP_REG_START + 0x08, 4, &pcr._base2); | |
973 pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3, | |
974 PCI_MAP_REG_START + 0x0C, 4, &pcr._base3); | |
975 pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3, | |
976 PCI_MAP_REG_START + 0x10, 4, &pcr._base4); | |
977 pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3, | |
978 PCI_MAP_REG_START + 0x14, 4, &pcr._base5); | |
979 pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3, | |
980 PCI_MAP_ROM_REG, 4, &pcr._baserom); | |
981 pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3, | |
982 PCI_INTERRUPT_REG, 4, &pcr._max_min_ipin_iline); | |
983 pciconfig_read(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum<<3, | |
984 PCI_REG_USERCONFIG, 4, &pcr._user_config); | |
985 #endif | |
986 | |
987 /* check for pci-pci bridges */ | |
988 #define PCI_CLASS_MASK 0xff000000 | |
989 #define PCI_SUBCLASS_MASK 0x00ff0000 | |
990 #define PCI_CLASS_BRIDGE 0x06000000 | |
991 #define PCI_SUBCLASS_BRIDGE_PCI 0x00040000 | |
992 switch(pcr._class_revision & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) { | |
993 case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI: | |
994 if (pcr._secondary_bus_number > 0) { | |
995 pcr._pcibuses[pcr._pcinumbus++] = pcr._secondary_bus_number; | |
996 } | |
997 break; | |
998 case PCI_CLASS_BRIDGE: | |
999 if ( ++hostbridges > 1) { | |
1000 pcr._pcibuses[pcr._pcinumbus] = pcr._pcinumbus; | |
1001 pcr._pcinumbus++; | |
1002 } | |
1003 break; | |
1004 default: | |
1005 break; | |
1006 } | |
1007 if((func==0) && ((pcr._header_type & PCI_MULTIFUNC_DEV) == 0)) { | |
1008 /* not a multi function device */ | |
1009 func = 8; | |
1010 } else { | |
1011 func++; | |
1012 } | |
1013 | |
1014 if (idx++ >= MAX_PCI_DEVICES) | |
1015 continue; | |
1016 | |
1017 identify_card(&pcr); | |
1018 } while( func < 8 ); | |
1019 } | |
1020 } while (++pcr._pcibusidx < pcr._pcinumbus); | |
1021 } | |
1022 | |
1023 #if !defined(__alpha__) && !defined(__powerpc__) | |
1024 /* Now try pci config 2 probe (deprecated) */ | |
1025 | |
1026 if ((pcr._configtype == 2) || do_mode2_scan) { | |
1027 outb(PCI_MODE2_ENABLE_REG, 0xF1); | |
1028 outb(PCI_MODE2_FORWARD_REG, 0x00); /* bus 0 for now */ | |
1029 | |
1030 /*printf("\nPCI probing configuration type 2\n");*/ | |
1031 | |
1032 pcr._pcibuses[0] = 0; | |
1033 pcr._pcinumbus = 1; | |
1034 pcr._pcibusidx = 0; | |
1035 idx = 0; | |
1036 | |
1037 do { | |
1038 for (pcr._ioaddr = 0xC000; pcr._ioaddr < 0xD000; pcr._ioaddr += 0x0100){ | |
1039 outb(PCI_MODE2_FORWARD_REG, pcr._pcibuses[pcr._pcibusidx]); /* bus 0 for now */ | |
1040 pcr._device_vendor = inl(pcr._ioaddr); | |
1041 outb(PCI_MODE2_FORWARD_REG, 0x00); /* bus 0 for now */ | |
1042 | |
1043 if ((pcr._vendor == 0xFFFF) || (pcr._device == 0xFFFF)) | |
1044 continue; | |
1045 if ((pcr._vendor == 0xF0F0) || (pcr._device == 0xF0F0)) | |
1046 continue; /* catch ASUS P55TP4XE motherboards */ | |
1047 | |
1048 /*printf("\npci bus 0x%x slot at 0x%04x, vendor 0x%04x device 0x%04x\n", | |
1049 pcr._pcibuses[pcr._pcibusidx], pcr._ioaddr, pcr._vendor, | |
1050 pcr._device);*/ | |
1051 pcibus = pcr._pcibuses[pcr._pcibusidx] ; | |
1052 pcicard = pcr._ioaddr ; pcifunc = 0 ; | |
1053 | |
1054 outb(PCI_MODE2_FORWARD_REG, pcr._pcibuses[pcr._pcibusidx]); /* bus 0 for now */ | |
1055 pcr._status_command = inl(pcr._ioaddr + 0x04); | |
1056 pcr._class_revision = inl(pcr._ioaddr + 0x08); | |
1057 pcr._bist_header_latency_cache = inl(pcr._ioaddr + 0x0C); | |
1058 pcr._base0 = inl(pcr._ioaddr + 0x10); | |
1059 pcr._base1 = inl(pcr._ioaddr + 0x14); | |
1060 pcr._base2 = inl(pcr._ioaddr + 0x18); | |
1061 pcr._base3 = inl(pcr._ioaddr + 0x1C); | |
1062 pcr._base4 = inl(pcr._ioaddr + 0x20); | |
1063 pcr._base5 = inl(pcr._ioaddr + 0x24); | |
1064 pcr._baserom = inl(pcr._ioaddr + 0x30); | |
1065 pcr._max_min_ipin_iline = inl(pcr._ioaddr + 0x3C); | |
1066 pcr._user_config = inl(pcr._ioaddr + 0x40); | |
1067 outb(PCI_MODE2_FORWARD_REG, 0x00); /* bus 0 for now */ | |
1068 | |
1069 /* check for pci-pci bridges (currently we only know Digital) */ | |
1070 if ((pcr._vendor == 0x1011) && (pcr._device == 0x0001)) | |
1071 if (pcr._secondary_bus_number > 0) | |
1072 pcr._pcibuses[pcr._pcinumbus++] = pcr._secondary_bus_number; | |
1073 | |
1074 if (idx++ >= MAX_PCI_DEVICES) | |
1075 continue; | |
1076 | |
1077 identify_card(&pcr); | |
1078 } | |
1079 } while (++pcr._pcibusidx < pcr._pcinumbus); | |
1080 | |
1081 outb(PCI_MODE2_ENABLE_REG, 0x00); | |
1082 } | |
1083 | |
1084 #endif /* __alpha__ */ | |
1085 | |
1086 disable_os_io(); | |
1087 *num_pci = pcicards; | |
1088 | |
1089 return 0 ; | |
1090 | |
1091 } | |
1092 | |
1093 #if 0 | |
1094 void | |
1095 print_i128(struct pci_config_reg *pcr) | |
1096 { | |
1097 /* | |
1098 if (pcr->_status_command) | |
1099 printf(" STATUS 0x%04x COMMAND 0x%04x\n", | |
1100 pcr->_status, pcr->_command); | |
1101 if (pcr->_class_revision) | |
1102 printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n", | |
1103 pcr->_base_class, pcr->_sub_class, pcr->_prog_if, pcr->_rev_id); | |
1104 if (pcr->_bist_header_latency_cache) | |
1105 printf(" BIST 0x%02x HEADER 0x%02x LATENCY 0x%02x CACHE 0x%02x\n", | |
1106 pcr->_bist, pcr->_header_type, pcr->_latency_timer, | |
1107 pcr->_cache_line_size); | |
1108 printf(" MW0_AD 0x%08x addr 0x%08x %spre-fetchable\n", | |
1109 pcr->_base0, pcr->_base0 & 0xFFC00000, | |
1110 pcr->_base0 & 0x8 ? "" : "not-"); | |
1111 printf(" MW1_AD 0x%08x addr 0x%08x %spre-fetchable\n", | |
1112 pcr->_base1, pcr->_base1 & 0xFFC00000, | |
1113 pcr->_base1 & 0x8 ? "" : "not-"); | |
1114 printf(" XYW_AD(A) 0x%08x addr 0x%08x\n", | |
1115 pcr->_base2, pcr->_base2 & 0xFFC00000); | |
1116 printf(" XYW_AD(B) 0x%08x addr 0x%08x\n", | |
1117 pcr->_base3, pcr->_base3 & 0xFFC00000); | |
1118 printf(" RBASE_G 0x%08x addr 0x%08x\n", | |
1119 pcr->_base4, pcr->_base4 & 0xFFFF0000); | |
1120 printf(" IO 0x%08x addr 0x%08x\n", | |
1121 pcr->_base5, pcr->_base5 & 0xFFFFFF00); | |
1122 printf(" RBASE_E 0x%08x addr 0x%08x %sdecode-enabled\n", | |
1123 pcr->_baserom, pcr->_baserom & 0xFFFF8000, | |
1124 pcr->_baserom & 0x1 ? "" : "not-"); | |
1125 if (pcr->_max_min_ipin_iline) | |
1126 printf(" MAX_LAT 0x%02x MIN_GNT 0x%02x INT_PIN 0x%02x INT_LINE 0x%02x\n", | |
1127 pcr->_max_lat, pcr->_min_gnt, pcr->_int_pin, pcr->_int_line); | |
1128 */ | |
1129 } | |
1130 | |
1131 void | |
1132 print_pcibridge(struct pci_config_reg *pcr) | |
1133 { | |
1134 /* | |
1135 if (pcr->_status_command) | |
1136 printf(" STATUS 0x%04x COMMAND 0x%04x\n", | |
1137 pcr->_status, pcr->_command); | |
1138 if (pcr->_class_revision) | |
1139 printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n", | |
1140 pcr->_base_class, pcr->_sub_class, pcr->_prog_if, pcr->_rev_id); | |
1141 if (pcr->_bist_header_latency_cache) | |
1142 printf(" BIST 0x%02x HEADER 0x%02x LATENCY 0x%02x CACHE 0x%02x\n", | |
1143 pcr->_bist, pcr->_header_type, pcr->_latency_timer, | |
1144 pcr->_cache_line_size); | |
1145 printf(" PRIBUS 0x%02x SECBUS 0x%02x SUBBUS 0x%02x SECLT 0x%02x\n", | |
1146 pcr->_primary_bus_number, pcr->_secondary_bus_number, | |
1147 pcr->_subordinate_bus_number, pcr->_secondary_latency_timer); | |
1148 printf(" IOBASE: 0x%02x00 IOLIM 0x%02x00 SECSTATUS 0x%04x\n", | |
1149 pcr->_io_base, pcr->_io_limit, pcr->_secondary_status); | |
1150 printf(" NOPREFETCH MEMBASE: 0x%08x MEMLIM 0x%08x\n", | |
1151 pcr->_mem_base, pcr->_mem_limit); | |
1152 printf(" PREFETCH MEMBASE: 0x%08x MEMLIM 0x%08x\n", | |
1153 pcr->_prefetch_mem_base, pcr->_prefetch_mem_limit); | |
1154 printf(" RBASE_E 0x%08x addr 0x%08x %sdecode-enabled\n", | |
1155 pcr->_baserom, pcr->_baserom & 0xFFFF8000, | |
1156 pcr->_baserom & 0x1 ? "" : "not-"); | |
1157 if (pcr->_max_min_ipin_iline) | |
1158 printf(" MAX_LAT 0x%02x MIN_GNT 0x%02x INT_PIN 0x%02x INT_LINE 0x%02x\n", | |
1159 pcr->_max_lat, pcr->_min_gnt, pcr->_int_pin, pcr->_int_line); | |
1160 */ | |
1161 } | |
1162 #endif |