Mercurial > mplayer.hg
annotate cpudetect.h @ 28916:3c23b005eb98
sync w/r28950
author | gpoirier |
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date | Sat, 14 Mar 2009 20:58:18 +0000 |
parents | e1b7d9bf263b |
children | ce682f8d1f68 |
rev | line source |
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26029 | 1 #ifndef MPLAYER_CPUDETECT_H |
2 #define MPLAYER_CPUDETECT_H | |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
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3 |
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Add necessary header for ARCH_X86_64 preprocessor check.
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4 #include "config.h" |
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5 |
2281 | 6 #define CPUTYPE_I386 3 |
7 #define CPUTYPE_I486 4 | |
8 #define CPUTYPE_I586 5 | |
9 #define CPUTYPE_I686 6 | |
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10 |
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Fix first handful of #if vs. #ifdef for ARCH_, HAVE_SSE etc.
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11 #if ARCH_X86_64 |
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12 # define REGa rax |
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13 # define REGb rbx |
18391 | 14 # define REGBP rbp |
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15 # define REGSP rsp |
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16 # define REG_a "rax" |
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17 # define REG_b "rbx" |
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18 # define REG_c "rcx" |
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19 # define REG_d "rdx" |
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20 # define REG_S "rsi" |
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21 # define REG_D "rdi" |
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22 # define REG_SP "rsp" |
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23 # define REG_BP "rbp" |
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24 #else |
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25 # define REGa eax |
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26 # define REGb ebx |
18391 | 27 # define REGBP ebp |
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28 # define REGSP esp |
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29 # define REG_a "eax" |
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30 # define REG_b "ebx" |
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31 # define REG_c "ecx" |
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aurel
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32 # define REG_d "edx" |
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adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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33 # define REG_S "esi" |
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adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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34 # define REG_D "edi" |
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35 # define REG_SP "esp" |
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adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
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36 # define REG_BP "ebp" |
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adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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37 #endif |
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38 |
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39 typedef struct cpucaps_s { |
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40 int cpuType; |
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Retrieve CPU built-in namestring, and if it exists, print it during cpu detection; t it doesn't exist, fallback to the cpu table. Patch by Zuxy Meng
gpoirier
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41 int cpuModel; |
3403 | 42 int cpuStepping; |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
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43 int hasMMX; |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
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44 int hasMMX2; |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
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45 int has3DNow; |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
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46 int has3DNowExt; |
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47 int hasSSE; |
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48 int hasSSE2; |
28901
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SSE3 support patch by Zhou Zongyi, zhouzongyi pset.suntec net
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49 int hasSSE3; |
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a02c39208d49
Add detection of x86 CPU features SSSE3 and SSE4a.
gpoirier
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50 int hasSSSE3; |
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Add detection of x86 CPU features SSSE3 and SSE4a.
gpoirier
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51 int hasSSE4a; |
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non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
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52 int isX86; |
8860 | 53 unsigned cl_size; /* size of cache line */ |
9003 | 54 int hasAltiVec; |
10885
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cpuspeed detection for X86 TSC capable CPUs (also added TSC detection, should best be verified by some people with TSC/nonTSC capable CPUs)
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55 int hasTSC; |
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56 } CpuCaps; |
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57 |
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58 extern CpuCaps gCpuCaps; |
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arpi
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59 |
2301 | 60 void GetCpuCaps(CpuCaps *caps); |
2303 | 61 |
62 /* returned value is malloc()'ed so free() it after use */ | |
2301 | 63 char *GetCpuFriendlyName(unsigned int regs[], unsigned int regs2[]); |
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64 |
26029 | 65 #endif /* MPLAYER_CPUDETECT_H */ |